JP4140332B2 - Light emitting device and self-scanning light emitting device array chip - Google Patents

Description

[0001]
BACKGROUND OF THE INVENTION
The present invention relates to a self-scanning light-emitting element array, and more particularly to a self-scanning light-emitting element array that can increase the light extraction efficiency without increasing the chip area.
[0002]
[Prior art]
A light emitting element array in which a large number of light emitting elements are integrated on the same substrate is used as an optical writing head such as an optical printer head in combination with a driving IC. The inventors have paid attention to a three-terminal light-emitting thyristor having a PNPN structure as a constituent element of the light-emitting element array, and have already filed a patent application (see Patent Documents 1, 2, 3, and 4) that self-scanning of the light-emitting point can be realized. It has been shown that it is easy to mount as an optical printer head, that the light emitting element pitch can be made fine, and that a compact self-scanning light emitting element array (SLED) can be produced.
[0003]
Furthermore, the present inventors have proposed a self-scanning light-emitting element array having a structure separated from a light-emitting element (light-emitting thyristor) array, which is a light-emitting part, using a switch element (light-emitting thyristor) array as a shift part (Patent Document 5). reference).
[0004]
FIG. 1 shows an equivalent circuit diagram of a diode-coupled self-scanning light emitting element array chip 100 of a type in which a shift unit and a light emitting unit are separated. This self-scanning light emitting element array includes a switch element T ₁ , T ₂ , T _Three ..., Light emitting element L ₁ , L ₂ , L _Three It consists of ... A three-terminal light-emitting thyristor is used for both the switch element and the light-emitting element. The configuration of the shift unit uses a diode connection. That is, the diode D (D ₁ , D ₂ , ...). V _GA Is a power source (usually −5V), and the load resistance R from the common power line 113 _L And connected to the gate electrode of each switch element. The gate electrode of the switch element is also connected to the gate electrode of the light emitting element. Switch element T ₁ The gate electrode of the start pulse terminal φ _S It is connected to the. The cathode electrodes of the switch elements are alternately connected to clock pulse terminals φ1 and φ2 via transfer clock pulse lines 111 and 112, respectively. The resistors R1 and R2 are current limiting resistors inserted in the lines 111 and 112, respectively. Further, the cathode electrode of the light emitting element passes through the light emission signal line 110 and passes through the light emission signal terminal φ. _I It is connected to the. Resistance R _I Is a current limiting resistor inserted in the line 110. Start pulse terminal φ _S , Clock pulse terminals φ1, φ2, light emission signal terminal φ _I Are connected to a drive circuit (not shown).
[0005]
The operation will be briefly described. First, the voltage of the transfer clock pulse φ2 is L level, and the switch element T ₂ Is on. At this time, the switch element T ₂ The potential of the gate electrode is V _GA From -5V to almost 0V. The influence of this potential rise is caused by the diode D and the switch element T. _Three The potential is set to about −1V (the forward rising voltage of the diode D (equal to the diffusion potential)). However, since the diode D is in a reverse bias state, the gate electrode G ₁ No potential connection to the gate electrode G ₁ Remains at about -5V. Since the ON voltage of the light emitting thyristor is approximated by the gate electrode voltage + the diffusion potential (about 1V) of the pn junction between the gate and the cathode, the H level voltage of the next transfer clock pulse φ2 is about −2V (switch element T _Three Is less than or equal to a voltage necessary to turn on the switch) and is about -4V (switch element T _Five Switch element T if it is set higher than the voltage required to turn on _Three Only the other switch elements can be left off. Therefore, the ON state is transferred by two transfer clock pulses.
[0006]
Start pulse φ _S Is a pulse for disclosing such a transfer operation, and the start pulse φ _S Is set to H level (about 0V) and at the same time the transfer clock pulse φ ₂ Is set to L level (about −2 to about −4 V), and the switch element T ₁ Turn on. Immediately after that, start pulse φ _S Is returned to the L level.
[0007]
Now, switch element T ₂ Is in the ON state, the switch element T ₂ The potential of the gate electrode of V is V _GA It rises further and reaches about 0V. Therefore, the emission signal φ _I Is less than the diffusion potential of the PN junction (about 1 V), the light emitting element L ₂ Can be in a light emitting state.
[0008]
In contrast, the switch element T ₁ The gate electrode of the switch element T is about −5V, and the switch element T _Three The gate electrode is about -1V. Therefore, the light emitting element L ₁ ON voltage is about -6V, light emitting element L _Three The on-state voltage is about −2V. From now on, the light emitting element L ₂ Light-emitting signal that can be turned on _I Is in the range of −1 to −2V. Light emitting element L ₂ Is turned on, that is, when the light emission state is entered, the light emission intensity is the light emission signal φ _I The image can be written at an arbitrary intensity. In order to transfer the light emission state to the next light emitting element, the write signal φ _I It is necessary to set the line voltage to 0 V once and turn off the light emitting element that emits light.
[0009]
Although the anode electrodes of the light emitting thyristors are commonly grounded as described above, the cathode electrodes may be commonly grounded by changing the polarity.
[0010]
In addition, the present inventors have already shown the following three ideas in order to increase the light extraction efficiency of the light emitting thyristor so that no current flows directly under the electrode.
(1) An insulating film is provided directly below the electrode (see Patent Document 6).
(2) Supplying current with a transparent electrode (see Patent Document 7)
(3) An epitaxial layer is laminated on an insulating substrate, and a common electrode is taken from the substrate surface (see Patent Document 8).
[0011]
[Patent Document 1]
JP-A-1-238996
[0012]
[Patent Document 2]
Japanese Patent Laid-Open No. 2-14584
[0013]
[Patent Document 3]
Japanese Patent Laid-Open No. 2-92650
[0014]
[Patent Document 4]
JP-A-2-92651
[0015]
[Patent Document 5]
JP-A-2-263668
[0016]
[Patent Document 6]
Japanese Patent Laid-Open No. 9-92985
[0017]
[Patent Document 7]
Japanese Patent Laid-Open No. 9-283801
[0018]
[Patent Document 8]
Japanese Patent Laid-Open No. 9-283794
The techniques (1), (2), and (3) will be briefly described. 2A and 2B are diagrams for explaining the technique (1). FIG. 2A is a cross-sectional view of a light-emitting thyristor having a PNPN structure, and FIG. 2B is a plan view.
[0019]
The light emitting thyristor includes a p-type semiconductor layer 24, an n-type semiconductor layer 23, a p-type semiconductor layer 22, and an n-type semiconductor layer 21 stacked on the p-type semiconductor substrate 1. And a cathode electrode 40 formed so as to be in contact therewith. The cathode electrode is a T-shaped electrode 40 including portions 40a and 40b, and an insulating layer 47 is provided below the electrode portion 40a. The electrode portion 40a has a rectangular shape, and the electrode portion 40b has an elongated rectangular shape. Only this electrode part 40 b is in ohmic contact with the n-type semiconductor layer 21. The electrode 40a is electrically connected to the Al wiring 110 through a contact hole C provided in an insulating film (not shown) that transmits light.
[0020]
In the light emitting thyristor having such a structure, since the insulating layer 47 is provided below the electrode portion 40a having the contact hole C, the current is directly below the electrode portion 40a as shown in FIG. However, it flows from the electrode part 40b to the lower n-type semiconductor layer as indicated by an arrow. Since the emission center is not under the Al wiring 110, the light extraction efficiency is increased.
[0021]
FIG. 3 is a diagram for explaining the technique (2). In this light-emitting thyristor, a p-type semiconductor layer 24 made of GaAs, an n-type semiconductor layer 23, a p-type semiconductor layer 22, and an n-type semiconductor layer 21 are sequentially laminated on a p-type semiconductor substrate 1. A minute cathode electrode 25 made of AuGe / Ni is formed on the n-type semiconductor layer 21, a gate electrode 26 made of AuZn is formed on the p-type semiconductor layer 22, and an anode electrode (not shown) is provided on the back surface of the p-type substrate 1. Yes.
[0022]
This PNPN structure is SiO ₂ An opening is provided on the light emitting surface including the cathode electrode 25 and covered with an insulating coating 27 made of the material. A part of the opening and the insulating coating 27 is covered with an indium tin oxide (ITO) film 28 which is a transparent electrode material. An Al wiring 110 is provided on the ITO film 28 so as not to cover the light emitting surface.
[0023]
According to this light emitting thyristor, the cathode electrode 25 made of AuGe / Ni and the lower GaAs layer 21 are in ohmic contact, so that the current injected from the cathode electrode is directed toward the anode electrode as indicated by the dotted arrow. It spreads and flows. Although the light generated in the gate layers 22 and 23 is partially blocked by the microelectrode 25, most of the light passes through the transparent ITO film 28 and is extracted to the outside, so that the light extraction efficiency is increased.
[0024]
FIG. 4 is a diagram for explaining the technique (3). In the light-emitting thyristor, a p-type semiconductor layer 24, an n-type semiconductor layer 23, a p-type semiconductor layer 22, and an n-type semiconductor layer 21 are sequentially stacked on an insulating substrate 31. A cathode electrode 36 is provided on the n-type layer 21, a gate electrode 37 is provided on the p-type layer 22, and an anode electrode (common electrode) 38 is provided on the p-type layer 24. When considering a sheet resistance circuit extending from directly under the cathode electrode 36 to the anode electrode 38, the sheet resistance value of the n-type layer 21 is represented by R. _n , The sheet resistance value of the p-type layer 24 is R _p Then, the sheet resistance value R _n , R _p Is determined by the size and impurity concentration of the n-type semiconductor layer 21 and the p-type semiconductor layer 24. Sheet resistance value R _n The sheet resistance value R _p If it is smaller than that, the current concentrates at the end as shown by the dotted arrow, so that the light extraction efficiency, that is, the external light emission efficiency is increased.
[0025]
[Problems to be solved by the invention]
In the methods (1) and (2), the current density directly under the electrode is the highest, and the loss of light quantity due to the shielding of the electrode cannot be eliminated. In the method (3), it is possible to shift the current path from directly below the electrode, and it is possible to eliminate the loss of light amount due to the shielding of the electrode. However, in the method (3), the wiring resistance of the common electrode 38 becomes a problem. For example, assuming a 1200 dpi, 256-bit self-scanning light emitting element array chip, the length of the common electrode is about 5.4 mm. Assuming that gold having a width of 10 μm and a thickness of 0.1 μm is used for the common electrode 38, the volume resistivity of gold is 2.4 × 10. ^-8 The resistance value is 130Ω as Ωm. Actually, this common electrode is not pure gold, but an alloy with Ge, Ni, Zn, etc. is used to make ohmic contact with the semiconductor layer, so that the resistance value is several times more, and the measured value is about 500Ω. It became. Usually, since a current of 10 to 20 mA is supplied to the light emitting part, the voltage drop at the common electrode is 5 to 10 V, and cannot be used with a 5 V power source. In the case of driving at a constant voltage, the wiring resistance needs to be 10Ω or less in order to suppress the current fluctuation in the chip to 5% or less. For this purpose, it is necessary to increase the cross-sectional area of the common electrode 50 times. For example, a common electrode wiring having a width of 100 μm and a thickness of 0.5 μm is required. For this reason, a chip area will increase.
[0026]
In addition, when an insulating substrate is used, it is necessary to provide a bonding pad for the common electrode on the surface of the substrate, which increases the chip area.
[0027]
An object of the present invention is to provide a self-scanning light-emitting element array chip that can solve the above-described problems of the prior art and increase the light extraction efficiency without increasing the chip area.
[0028]
Another object of the present invention is to provide a light emitting element used for a switch element and / or a light emitting element constituting a self-scanning light emitting element array chip.
[0029]
Still another object of the present invention is to provide an optical printer head and an optical printer using a self-scanning light emitting element array chip.
[0030]
[Means for Solving the Problems]
According to the light emitting device of the present invention, the conductive layer having the reverse conductivity type and the lowermost layer of the PNPN structure are used, the lowermost layer and the substrate are electrically short-circuited by the short-circuit member, and the common electrode is taken from the rear surface of the substrate. In the light emitting element having such a structure, it is possible to shift the current path from directly below the electrode as in the case of using an insulating substrate, and it is possible to eliminate the loss of light amount due to the shielding of the electrode.
[0031]
There are two types of the self-scanning light-emitting element array chip of the present invention using the light-emitting element having such a structure.
[0032]
In the first type, the shift unit and the light emitting unit are shared, and a plurality of light emitting elements having threshold voltage or threshold current control electrodes for light emitting operation are arranged, and the control of each light emitting element is performed. The electrode is connected to the control electrode of at least one light emitting element located in the vicinity thereof via a connecting resistor or an electrically unidirectional electric element, and a power line is connected to each light emitting element via a load resistor. It is a self-scanning light emitting element array chip formed by connecting to the control electrode and connecting a clock line to each light emitting element.
[0033]
In the second type, the shift unit and the light emitting unit are separated, and a plurality of switch elements having threshold voltage or threshold current control electrodes for switching operation are arranged, and the control of each switch element is performed. The electrode is connected to the control electrode of at least one switch element located in the vicinity thereof via a connection resistor or an electrically unidirectional electric element, and a power supply line is connected to the control electrode of each switch element. A light emitting device in which a plurality of light emitting devices having a threshold voltage or a threshold current control electrode for light emitting operation are arranged, and a switch device array formed by connecting a clock pulse line to each switch device. An array of elements, each control electrode of the light emitting element array is connected to the control electrode of the switch element by electrical means, and each light emitting element emits light Is a self-scanning light-emitting element array chip in which a wiring for supplying a current for.
[0034]
When the light-emitting element of the present invention is used for the self-scanning light-emitting element array chip having the above structure, the wiring resistance is hardly a problem because the lowermost layer of the PNPN and the conductive substrate are connected by a short-circuit member. Furthermore, since the common electrode can be taken from the back surface of the conductive substrate, the chip area can be reduced.
[0035]
DETAILED DESCRIPTION OF THE INVENTION
Hereinafter, the present invention will be described with reference to the drawings. A self-scanning light-emitting element array chip having an anode electrode as a common electrode will be described as an example.
[0036]
[Example 1]
A cross-sectional view of a light-emitting thyristor used in the self-scanning light-emitting element array chip is shown in FIG. Here, as an example, a GaAs PNPN structure grown on an n-type GaAs substrate by metal organic chemical vapor deposition (MOCVD) will be described as an example.
[0037]
On the n-type substrate 51, a p-type semiconductor layer 24, an n-type semiconductor layer 23, a p-type semiconductor layer 22, and an n-type semiconductor layer 21 are sequentially stacked. A cathode electrode 36 is formed on the n-type semiconductor layer 21, a gate electrode 37 is formed on the p-type semiconductor layer 22 partially exposed by etching, and on the p-type semiconductor layer 24 partially exposed by etching. In addition, a short-circuit substrate-side common electrode 38 is formed. Further, a short-circuit substrate surface common electrode 52 is formed on the n-type semiconductor substrate 51 exposed by etching. The electrode 38 and the electrode 52 are connected to each other by a connection line 60. In this way, the n-type substrate 51 and the p-type semiconductor layer are electrically short-circuited.
[0038]
A back surface common electrode (anode electrode) 53 is formed on the back surface of the substrate 51. Each electrode is formed to be in ohmic contact with each formed semiconductor layer. Specifically, AuZn / Au was used as the p-type electrode, and AuGe / Ni / Au was used as the n-type electrode.
[0039]
The pn junction formed by the n-type substrate 51 and the p-type semiconductor layer is irrelevant to the function of the light-emitting thyristor. When the light-emitting thyristor is on, the pn junction is not in a conductive state. Therefore, as indicated by the dotted line in FIG. 13, when the light emitting thyristor is turned on, the current from the cathode electrode 36 flows toward the common electrode 38 and passes through the connection line 60 and the common electrode 52 as in the light emitting thyristor of FIG. And flows to the common electrode (anode electrode) 53. As described above, since the current is concentrated at the end, the light extraction efficiency, that is, the external light emission efficiency is increased.
[0040]
A manufacturing process of a self-scanning light-emitting element array chip using the light-emitting thyristor having the above structure will be described with reference to FIGS.
(A) First, as shown in FIG. 6, a p-type GaAs layer 24, an n-type GaAs layer 23, a p-type GaAs layer 22, and an n-type GaAs layer 21 are stacked on an n-type GaAs substrate 51 by MOCVD.
(B) Next, as shown in FIG. 7, a cathode electrode (AuGe / Ni / Au) 36 that is a current supply electrode is formed on the semiconductor layer 21 by lift-off. The electrodes were formed in the order of AuGe, Ni, and Au on the semiconductor layer 21 by vacuum deposition.
(C) Next, as shown in FIG. 8, a part of the cathode layer 21 is removed by etching, and a gate electrode (AuZn / Au) 37 is formed by lift-off. The electrodes were formed in the order of AuZn and Au on the cathode layer 21 by vacuum deposition.
(D) Next, as shown in FIG. 9, a part of the anode layer 24 is exposed, and an anode electrode (AuZn / Au) 38 as a common electrode is formed by lift-off. The electrodes were formed in the order of AuZn and Au on the anode layer 24 by vacuum deposition. The anode layer 24 has a structure that is not separated from all semiconductor islands.
(E) Next, as shown in FIG. 10, the n-type substrate 51 is exposed, and the substrate-side common electrode 52 is formed by lift-off.
(F) Next, as shown in FIG. 11, the back electrode 53 was formed by vacuum deposition and annealed to obtain ohmic contact between each electrode 36, 37, 38, 52 and the semiconductor layer.
(G) Next, as shown in FIG. 12, the wiring 60 connecting the electrode 38 and the electrode 52 was formed by lift-off. For the wiring, a pure gold film formed by vacuum deposition was used.
(H) Next, as shown in FIG. 13, a protective film 61 is formed on the structure of FIG. 12, contact holes are opened, an aluminum film is formed by sputtering, and the aluminum wiring 62 is patterned.
[0041]
FIG. 14 shows a structure of the self-scanning light emitting element array chip (SLED-A) manufactured as described above as viewed from above. Here, the structure of the shift portion is omitted for simplicity. In FIG. 14, it can be seen that the common electrodes 38 and 52 extend in parallel, and a connection line 60 is connected between these electrodes. Since current does not flow in the longitudinal direction of these electrodes and wirings, in the case of the present embodiment, these wiring resistances are not a problem. Accordingly, since these cross sections may be small, the chip area is not increased unlike the conventional example shown in FIG.
[0042]
In the structure of this embodiment, since the anode electrode 53 is provided on the back surface of the n-type substrate 53, it is not necessary to provide a bonding pad for the anode electrode on the substrate surface, so that the chip area can be reduced.
[0043]
For further comparison, a self-scanning light emitting element array (SLED-B) in which a PNPN structure is formed on the insulating substrate shown in FIG. 4 and a PNPN structure are formed on a p-type substrate having the same conductivity type as the lowermost layer. A self-scanning light emitting element array (SLED-C) was produced. FIG. 15 shows the structure of SLED-B as viewed from above, and FIG. 16 shows the structure of SLED-C as viewed from above.
[0044]
In FIG. 15, it can be seen that the common electrode 38 extends on the p-type layer 24. In FIG. 16, the common electrode (anode electrode) is provided on the back surface of the p-type substrate.
[0045]
The performance of these SLED-A, B, and C was compared. FIG. 17A shows a current distribution when a 128-bit SLED is driven with a constant resistance and a constant voltage. The horizontal axis represents the light emitting point (light emitting element) number, and the vertical axis represents the current (mA) flowing through each light emitting element. According to this, in SLED-B, since the wiring resistance of the common electrode 38 is large, it turns out that electric current distribution is large. In order to improve the current distribution, it is necessary to increase the cross-sectional area of the common electrode 38. However, as described above, if the wiring is thickened, the chip area is increased.
[0046]
Further, the light quantity distribution is shown in FIG. The horizontal axis indicates the light emitting point (light emitting element) number, and the vertical axis indicates the light emission quantity (μW) of each light emitting element. The light quantity distribution of SLED-B is derived from the current distribution. In both SLED-A and SLED-C, the light amount in the chip is almost constant, but the light amount of SLED-A is about 1.3 times larger than the light amount of SLED-C. Speaking on the 128th emission point side, the light amounts of SLED-A and SLED-B are substantially equal. From this, it can be seen that the increase in the amount of light of SLED-A has the same effect as SLED-B using an insulating substrate.
[0047]
In this example, ohmic contact was obtained by annealing after all metal electrodes were formed. However, depending on the impurity concentration of each layer and the composition of the electrode, ohmic contact may be obtained even if non-alloyed. It is not restricted to an Example. In this embodiment, the GaAs homojunction PNPN structure has been described. However, AlGaAs may be used to adjust the emission wavelength. Further, a PNPN structure having a homo-, single-hetero, or double-hetero structure of a binary, ternary or quaternary III-V group compound semiconductor or II-VI group compound semiconductor may be used. Further, for example, the impurity concentration, ternary system, quaternary system composition, etc. may be changed in one conductivity type layer.
[0048]
[Example 2]
In Example 1, the common electrode (anode electrode) 38 and the substrate-side common electrode 52 are separately manufactured using different alloys, and both electrodes are connected by a pure gold film after annealing. In this embodiment, the anode layer 24 and the n-type substrate 52 are made to have an impurity concentration of 10 ¹⁹ / Cm ^Three Focusing on the fact that non-alloy ohmic contact can be made if the selection is made so as to exceed the upper limit, as shown in FIG. 18, the connection line 63 is formed by one lift-off, and both the p layer 24 and the n layer 51 are connected. did. Here, the anode p layer 24 is made of C-doped GaAs having a high activity rate even at a high impurity concentration. In addition, Cr / Au is used as the non-alloy electrode, but any single metal or combination of Ag, Au, Pt, Pd, W, Ti, Ni, and Cr may be used.
[0049]
[Example 3]
19 to 21 are diagrams showing examples of self-scanning light emitting element array chips. 19 is a plan view, FIG. 20 is a sectional view taken along line AA ′ of FIG. 19, and FIG. 21 is a sectional view taken along line BB ′ of FIG. In order to simplify the drawing, the Al wiring is shown by a bold line in FIG.
[0050]
In the first embodiment, the anode layer 24 has a structure that is not separated from all the semiconductor islands. However, in this embodiment, the p-type semiconductor layer 24 is separated for each anode island 75 and is separately conductive. Connected to the conductive substrate 51. As shown in FIG. 19, the light-emitting thyristor separated for each anode island 75 has a structure in which even-numbered light-emitting points and odd-numbered light-emitting points are inverted in the figure. In the figure, 62-1 is V. _GA Aluminum wiring, 62-2 is φ1 aluminum wiring, 62-3 is φ2 aluminum wiring, 62-4 is an inter-bit coupling line, 74 is a resistor electrode, and 77 is a diode.
[0051]
FIG. 22 shows an equivalent circuit of the self-scanning light emitting element array chip.
[0052]
By adopting this structure, for example, when the direction of the feeder line is changed between the even-numbered light-emitting points and the odd-numbered light-emitting points, the current can be concentrated in a direction that is not hidden by the wiring.
[0053]
[Example 4]
The light-emitting device of the present invention is not limited to a PNPN four-layer structure, and may be a PNPNPN six-layer device. FIG. 23 is a cross-sectional view of a light-emitting element having a six-layer structure. In the figure, 29 is a p-type semiconductor layer, and 30 is an n-type semiconductor layer, which form an LED structure.
[0054]
The element of the PNPNPN 6-layer structure of this embodiment is obtained by laminating the above-described LED structure on the thyristor structure shown in FIG. 18, and has the advantage that the thyristor structure as a switch and the LED structure as a light-emitting element can be optimized separately. have. In the figure, 81 is a light emitting portion cathode electrode, 82 is a thyristor portion cathode electrode, 83 is a cathode terminal, and 84 is a resistor.
[0055]
Note that the structure in which the semiconductor substrate 51 and the p-type semiconductor layer 24 are electrically short-circuited may be a structure in which the short-circuiting electrodes shown in FIG.
[0056]
An example of a self-scanning light emitting element array chip using such a PNPNPN light emitting element having a six-layer structure is shown in FIGS. FIG. 25 shows a self-scanning light-emitting element array chip in which the shift part and the light-emitting part are separated, and a light-emitting element having a six-layer structure is used for the light-emitting part.
[0057]
[Example 5]
Next, an optical printer head using the self-scanning light emitting element array chip described above and an optical printer using such an optical printer head will be described.
[0058]
FIG. 26 is a perspective view showing the main part of the optical printer head. The optical printer head includes a self-scanning light-emitting element array 134 configured by arranging a plurality of self-scanning light-emitting element array chips 132 in a staggered arrangement on a mounting substrate 130, and a plurality of erecting equal-magnification lenses (rods). Lens) 136 and an erecting equal-magnification lens array 138 configured by arranging the same.
[0059]
The light emitted from the light emitting element array 134 is collected by the lens array 138 and irradiated onto a photosensitive drum (not shown).
[0060]
FIG. 27 shows a configuration of an optical printer including such an optical printer head 140. A photoconductive material (photosensitive member) such as amorphous Si is formed on the surface of the cylindrical photosensitive drum 142. This drum rotates at the speed of printing. The surface of the photosensitive drum of the rotating drum is uniformly charged by the charger 144. Then, the optical printer head 140 irradiates the photosensitive member with light of a dot image to be printed, and neutralizes the charging where the light hits. Subsequently, the developing device 148 applies toner to the photoconductor in accordance with the charged state on the photoconductor. Then, the toner is transferred onto the paper 154 sent from the cassette 152 by the transfer device 150. The paper is heated and fixed by the fixing device 146 and sent to the stacker 158. On the other hand, the drum that has been transferred is neutralized by the erasing lamp 160 over the entire surface, and the remaining toner is removed by the cleaner 162.
[0061]
【The invention's effect】
According to the present invention, it is possible to realize a self-scanning light emitting element array chip that can increase the light extraction efficiency without increasing the chip area. Furthermore, a light emitting element suitable for use in such a self-scanning light emitting element array chip can be provided.
[Brief description of the drawings]
FIG. 1 is an equivalent circuit diagram of a diode-coupled self-scanning light emitting element array chip in which a shift unit and a light emitting unit are separated.
FIG. 2 is a diagram illustrating a conventional technique.
FIG. 3 is a diagram illustrating a conventional technique.
FIG. 4 is a diagram illustrating a conventional technique.
FIG. 5 is a cross-sectional view of a light emitting thyristor used in a self-scanning light emitting element array chip.
FIG. 6 is a diagram showing a manufacturing process of the self-scanning light emitting element array chip.
FIG. 7 is a diagram showing a manufacturing process of a self-scanning light emitting element array chip.
FIG. 8 is a diagram showing a manufacturing process of a self-scanning light emitting element array chip.
FIG. 9 is a diagram showing a manufacturing process of the self-scanning light emitting element array chip.
FIG. 10 is a diagram showing a manufacturing process of the self-scanning light emitting element array chip.
FIG. 11 is a diagram showing a manufacturing process of the self-scanning light emitting element array chip.
FIG. 12 is a diagram showing a manufacturing process of the self-scanning light emitting element array chip.
FIG. 13 is a diagram showing a manufacturing process of the self-scanning light emitting element array chip.
FIG. 14 is a view showing a structure of a self-scanning light emitting element array chip (SLED-A) viewed from above.
FIG. 15 is a view showing a structure of a self-scanning light emitting element array chip (SLED-B) viewed from above.
FIG. 16 is a diagram showing a structure of a self-scanning light emitting element array chip (SLED-C) viewed from above.
FIG. 17 is a diagram showing current distribution and light amount distribution of SLED-A, B, and C.
FIG. 18 is a view showing a light-emitting thyristor in which a short-circuit member is formed only with a connection line.
FIG. 19 is a plan view showing an embodiment of a self-scanning light emitting element array chip.
20 is a cross-sectional view taken along line AA ′ of FIG.
21 is a cross-sectional view taken along the line BB ′ of FIG.
22 is an equivalent circuit diagram of the self-scanning light-emitting element array chip of FIG.
FIG. 23 is a cross-sectional view of a light-emitting element having a six-layer structure.
FIG. 24 is a diagram showing an example of a self-scanning light-emitting element array chip using light-emitting elements having a six-layer structure of PNPNPN.
FIG. 25 is a diagram showing another example of a self-scanning light-emitting element array chip using light-emitting elements having a six-layer structure of PNPNPN.
FIG. 26 is a perspective view showing a main part of the optical printer head.
FIG. 27 is a diagram illustrating a configuration of an optical printer including an optical printer head.
[Explanation of symbols]
21 n-type semiconductor layer
22 p-type semiconductor layer
23 n-type semiconductor layer
24 p-type semiconductor layer
29 p-type semiconductor layer
30 n-type semiconductor layer
36 Cathode electrode
37 Gate electrode
38 Common electrode on substrate side for short circuit
51 n-type substrate
52 Common electrode on substrate surface for short circuit
53 Back side common electrode (Anode electrode)
60 connection lines
62-1 V _GA Aluminum wiring
62-2 φ1 aluminum wiring
62-3 φ2 aluminum wiring
62-4 Inter-bit coupling line
63 Connection line
74 Resistor electrode
75 Anode Island
77 Diode
81 Light Emitting Cathode Electrode
82 Thyristor cathode
83 Cathode terminal
84 Resistance
130 Mounting board
132 Self-scanning light emitting device array chip
134 Self-Scanning Light Emitting Element Array
136 Rod lens
140 Optical printer head

Claims (10)

A first conductivity type semiconductor substrate;
On the semiconductor substrate, a first semiconductor layer of a second conductivity type opposite to the first conductivity type, a second semiconductor layer of a first conductivity type, and a third semiconductor of a second conductivity type. A light-emitting thyristor structure composed of four semiconductor layers in which a semiconductor layer and a fourth semiconductor layer of a first conductivity type are sequentially stacked;
A first electrode formed on the fourth semiconductor layer;
A second electrode formed on the third semiconductor layer;
A third electrode provided on the bottom surface of the semiconductor substrate;
A member for electrically short-circuiting the semiconductor substrate and the first semiconductor layer;
A light emitting device comprising: A first conductivity type semiconductor substrate;
On the semiconductor substrate, a first semiconductor layer of a second conductivity type opposite to the first conductivity type, a second semiconductor layer of a first conductivity type, and a third semiconductor of a second conductivity type. A light-emitting thyristor structure composed of four semiconductor layers in which a semiconductor layer and a fourth semiconductor layer of a first conductivity type are sequentially stacked;
A light emitting diode structure composed of two semiconductor layers in which a second conductive type fifth semiconductor layer and a first conductive type sixth semiconductor layer are sequentially stacked on the fourth semiconductor layer;
A first electrode formed on the sixth semiconductor layer;
A second electrode formed on the fourth semiconductor layer;
A third electrode formed on the third semiconductor layer;
A fourth electrode provided on the bottom surface of the semiconductor substrate;
A resistor connecting the first electrode and the second electrode;
A member for electrically short-circuiting the semiconductor substrate and the first semiconductor layer;
A light emitting device comprising: The short-circuit member is
A first short-circuit electrode formed on the semiconductor substrate;
A second short-circuit electrode formed on the first semiconductor layer;
A conductor connecting the first and second shorting electrodes;
The light emitting device according to claim 1, comprising: The light-emitting element according to claim 1, wherein the short-circuit member is made of a conductor that electrically connects the semiconductor substrate and the first semiconductor. The light emitting device according to claim 1, wherein the first conductivity type is n-type and the second conductivity type is p-type. 5. The light emitting device according to claim 1, wherein the first conductivity type is p-type, and the second conductivity type is n-type. A plurality of light emitting elements having threshold voltage or threshold current control electrodes for light emitting operation are arranged, and the control electrode of each light emitting element is connected to the control electrode of at least one light emitting element located in the vicinity thereof. Connected via resistors or electrically unidirectional electrical elements, connected to each light emitting element through a load resistor to the control electrode, and connected to each light emitting element via a clock line In the self-scanning light emitting element array chip,
The self-scanning light-emitting element array chip, wherein the light-emitting element comprises the light-emitting element according to claim 1. A plurality of switch elements having threshold voltage or threshold current control electrodes for switching operation are arranged, and the control electrode of each switch element is connected to the control electrode of at least one switch element located in the vicinity thereof. Connected via resistors or electrically unidirectional electrical elements, connected to the control electrode of each switch element via a load resistor, and connected to each switch element via a clock pulse line Switch element array,
A light-emitting element array in which a plurality of light-emitting elements having threshold voltage or threshold current control electrodes for light-emitting operation are arranged;
In the self-scanning light emitting element array chip in which each control electrode of the light emitting element array is electrically connected to the control electrode of the switch element, and a wiring for supplying a current for light emission to each light emitting element is provided.
The self-scanning light emitting element array chip, wherein each of the light emitting elements and / or the switch elements is made of the light emitting element according to any one of claims 1 to 6. 9. An optical printer head comprising a self-scanning light-emitting element array formed by arranging a plurality of self-scanning light-emitting element array chips according to claim 7 or 8. An optical printer comprising the optical printer head according to claim 9.

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