JP4127675B2 - Image processing device - Google Patents

Description

  The present invention provides an image processing apparatus (for example, a digital image forming apparatus such as a laser printer, a digital copying machine, a plain paper fax machine, or an image display apparatus) having means for processing binary image data expanded in a bitmap form. In particular, the present invention relates to an image processing apparatus that performs processing (for example, contour line jaggy correction) to improve image quality in the process of converting image data from binary to multilevel.

Conventionally, in digital image processing, image image data is quantized and developed into a bit map (dot matrix) as binary data in a video memory area on a memory, and this is used as video data to form an image as an output device. Sent to the print engine or display of the printer and used for visualization. In this case, it is known that a jaggy in which a straight line or a smooth curve inclined with respect to a direction orthogonal to the dot matrix is formed in a staircase shape is generated, and the image quality is deteriorated.
The image data processing apparatus illustrated in the following Patent Document 1 proposes one solution to the deterioration in image quality due to such jaggies. In order to improve jaggies and improve image quality, the device of Patent Document 1 reduces data that needs to be stored in advance in memory as much as possible, and discriminates pixels that need correction from image data. The correction data for the pixels that need to be corrected can be determined in a very short time by simple determination and calculation by a microprocessor or the like. For this purpose, the following means are used as elements.
That is, a window for extracting data of each pixel in a predetermined area centering on a pixel targeted for image data expanded in a bitmap shape, and black pixels of the image data by the image data extracted through the window Recognize the shape of the line segment at the boundary between the white pixel area and the multi-bit code information indicating the characteristics of the recognized line segment shape for the target pixel (whether the target pixel is a black pixel or a white pixel) Any one of the direction of the line segment, the degree of inclination, the code of the position from the end pixel of the line segment that continues in the horizontal or vertical direction of the target pixel), and at least the code information A discriminating unit that discriminates whether or not a pixel needs to be corrected by using a part thereof, and a pixel generated by the pattern recognition unit for a pixel that is determined to be corrected by the unit. It was provided with a correction data memory for reading and outputting the corrected data previously stored code information as an address.
According to the apparatus disclosed in Patent Document 1, a line segment shape of a boundary portion (a contour line of a character or the like) between a black pixel region and a white pixel region of image data expanded in a bitmap shape is recognized, and each required pixel Is replaced with a plurality of bits of code information, and at least a part of the code information is used to determine whether or not the pixel needs to be corrected. I do. In this way, it is not necessary to create and store in advance all the feature patterns that need correction as templates, and it is possible to determine the correction data for the pixels that need correction and the pixels that need correction. Information can be easily and quickly performed.
Furthermore, Patent Document 2 can be shown as a proposal based on Patent Document 1. In the apparatus of Patent Document 2, smoothing processing is performed by using different image correction data corresponding to the resolution of input image data. The method for obtaining the image correction data is basically a method of obtaining a plurality of bits of code information for each pixel by pattern recognition as in Patent Document 1, and reading out from the pattern memory storing the image correction data based on the code information. In order to deal with the resolution, code information indicating the resolution is generated and used by adding it to the address data for reading from the pattern memory.
Japanese Patent Laid-Open No. 5-207282 JP-A-9-107475

In the prior art for performing processing for improving image quality by correcting jaggies of contour lines in the process of converting data from binary to multi-valued image data developed in a bitmap form, as in Patent Document 1 above In addition, it is possible to reduce the data that needs to be stored in the memory in advance and to reduce the processing time. Further, in Patent Document 2, the method corresponds to the resolution of the input image data. And make it possible to apply.
However, since the corrected image data necessary for the jaggy correction is basically stored in the pattern memory, a low resolution is required in the case of resolution conversion in the apparatus shown in Patent Document 2 above. This data increases the amount of image correction data used in the process of converting to higher resolution data, which increases the memory capacity for storing the correction data and increases the processing load, leading to a cost increase. Can not be avoided.
The present invention has been made in order to solve this problem in view of the above-described problems of the prior art. The solution is to convert binary image data developed in a bitmap form into multi-value image data. The image quality improvement effect equivalent to that obtained by the conventional technology used for changing the resolution can be achieved without increasing the memory capacity and without increasing the processing burden, and with a low-cost device configuration. It is to make it possible.

The invention according to claim 1 is an image processing apparatus for converting binary image data developed in a bitmap form at a predetermined input resolution into double-density image data corresponding to an output resolution, wherein the binary image data Recognize the line segment shape of the boundary of the black pixel area in the image data of the predetermined area centered on the target pixel, and whether the target pixel needs to be corrected as a pixel forming a diagonal line or arc based on the recognition result Pattern recognition means for generating the recognition result of the line segment shape relating to the pixel determined to be a pixel that needs to be corrected as pattern code information, and an image that does not change the double density that is the same resolution as the output resolution The data is discriminated by the pattern recognition means, and the pattern code information relating to the pixel for which the discrimination result indicating that correction is necessary is obtained as an address in advance in the memory. By reading the corrected image data that has been stored as an image, to change the single dense-mode image data generating means for generating output data including the image data of the halftone, a double density is lower resolution than the output resolution The image data is discriminated by the pattern recognition means, and the pattern code information relating to the pixel from which the discrimination result indicating that correction is necessary and the double-dense code corresponding to the double density are input, and the specified double density is obtained. Image data generating means for double-dense mode that generates output data composed only of all white pixels and all black pixels not including halftone image data by calculating corrected image data having a corresponding pixel configuration It is characterized by that.
According to a second aspect of the present invention, in the image processing apparatus according to the first aspect, the image data generating unit for the double-dense mode includes a scaling unit for scaling the output data, and the specified double density is When the prime value is a multiplication value, the double prime density of the prime number and the pattern code information obtained from the pattern recognition means are input to obtain image data having a pixel configuration corresponding to the double prime density. According to the present invention, corrected image data having a specified double density is generated by the scaling unit for the obtained image data.
According to a third aspect of the present invention, in the image processing apparatus according to the first or second aspect, the image data generating means for the double-dense mode is a multivalued pixel data value having a pixel configuration corresponding to a specified double density. It is characterized by generating.

According to the present invention 請 Motomeko 1, when converting the image data of double density corresponding to the output resolution binary image data bitmapped in a predetermined input resolution, or due to changes of double density, whether Regardless of whether the pattern recognition means for providing data for jaggy correction is shared, and further, when this pattern recognition result is accompanied by a change in double density and not accompanied by a change in double density, the processing means optimized in each case by as it adapted to use in generating, reducing the circuit scale of the processing means, and Ru can be improved in image quality.
Basic According to the present invention 請 Motomeko 2, for example in the case of 6 double density is susceptible corresponding pixel configuration when double density during or 3 times density, data of large 3 times density of double density in because to perform the scaling process output, compared to the case variant required multiple subsequent scaling processing small double density, it made possible to cope with a small odd multiples, less expensive circuit configuration it is possible to improve the good Ri image quality.
According to the present invention 請 Motomeko 3, when involving a change of double density, since the pixel data value of a pixel structure in accordance with the double density to generate multi-valued, only black and white reversal or black pixels of the input image density Depending on the characteristics of the image, it is possible to adjust or change the required image quality.

The present invention will be described based on the following embodiments shown with the accompanying drawings. In this embodiment, an example in which the image processing apparatus according to the present invention is implemented as a digital copying machine is shown.
FIG. 1 is a schematic diagram showing a configuration of a digital copying machine according to the present embodiment. FIG. 2 is a block diagram showing the print control unit 18 of FIG. 1 in more detail.
A digital copying machine 1 shown in FIG. 1 is an apparatus that performs optical writing on a photoconductor using a one-beam method. Broadly speaking, an image reading unit 2 that reads a document (not shown) and a reading unit that reads the original (not shown). A signal processing unit 3 that performs various processes on the received image data, and an image is printed on a printing sheet (not shown) by a known electrophotographic method based on the image data processed by the signal processing unit 3 An image printing unit 4 is provided.
In the image reading unit 2, the document placed on the contact glass 5 is illuminated by a light source 6 that is elongated in the main scanning direction, and the reflected light is sequentially reflected by the first mirror 7, the second mirror 9, and the third mirror 10. Then, an image is formed on a light receiving surface of a CCD (Charge Coupled Device) sensor 13 by the imaging optical system 12 and subjected to photoelectric conversion. In this case, the light source 6 and the first mirror 7 constitute the first scanning unit 8, and the second mirror 9 and the third mirror 10 constitute the second scanning unit 11, and the first scanning unit 8 and the second scanning unit. 11 moves at a speed ratio of 2 to 1, whereby the document is scanned in the sub-main scanning direction.
In the signal processing unit 3, the analog image signal photoelectrically converted by the CCD sensor 13 is amplified by an amplifier 14 and then converted into a digital image signal by an A / D converter (ADC) 15. Next, the digital image signal is subjected to image processing such as lightness correction processing, scaling processing, and editing processing by the image processing unit 16, and then the raster image data subjected to image processing by the image processing unit 16 is smoothed by the print control unit 18. It is processed and converted into image data for one beam (one line). The LD modulator 19 modulates the beam of one semiconductor laser in the LD unit 20 based on the image data for one line. Note that a circuit that limits the image range or a circuit that performs pattern synthesis may be provided between the print control unit 18 and the LD modulation unit 19.

In the image printing unit 4, one beam emitted from the LD unit 20 is converged by the cylinder lens 22, and then one beam deflected at a constant angular velocity by the polygon mirror 23 is corrected to a uniform velocity deflection by the fθ lens 24. A latent image for one line is formed on the photosensitive drum 26 and is detected by the light detector 27. The photodetector 27 is disposed in front of the effective writing area in the main scanning direction, receives the beam, and feeds back the synchronization detection pulse signal XDETP to the print controller 18. Although a case where a semiconductor laser that generates one laser beam is used is described here, the number of beams is not limited to one, and a semiconductor laser array having a plurality of beams may be used.
The print control unit 18 also adjusts the input speed of the image data input from the image reading unit 2 and the output speed of outputting the image data to the image printing unit 4.
That is, in the image reading unit 2, the original on the contact glass 5 is scanned in the sub-scanning direction by the first and second scanning units 8 and 11, and read by the CCD sensor 13, so that the CCD sensor 13 is continuous in the sub-scanning direction. Image data composed of a dot matrix of a plurality of main scanning lines is output to the signal control unit 3 line by line. At this time, after the CCD sensor 13 resets the address of the image data for one line by the line synchronization signal LSYNC, it outputs one pixel at a time in the main scanning direction for each pixel clock, so that the signal processing unit 3 (printing control unit 18). Is output line by line at a predetermined line period based on the scanning speed of the first and second scanning units 8 and 11, the reading period of the CCD sensor 13, and the like.
On the other hand, in the image printing unit 4, when the laser beam scanned by the polygon mirror 23 enters just before the photosensitive drum 26, the light detector 27 outputs the synchronization detection pulse signal XDETP, and the print control unit 18 detects this synchronization detection. Based on the pulse signal XDETP, the printing timing of the image data input from the image reading unit 2 is controlled. As described above, the print control unit 18 performs an arbitration operation corresponding to different line cycles in input / output.

Further, the print control unit 18 performs a smoothing (jaggy correction) process on the image data output for optical writing. In the smoothing process, pattern recognition is performed and the processing result is used. Therefore, a matrix of 9 lines including 4 lines before and after the target pixel is prepared as a matrix necessary for the pattern recognition process.
As shown in FIG. 2, the matrix first stores nine lines of image data in the form of a dot matrix from the image processing unit 16 in a first temporary storage sequentially for each pixel in synchronization with the first pixel clock. It is stored in the means 31. This correction processing can also be applied to the case where the image data from the previous stage is parallel data in which a plurality of data per clock is input via a plurality of signal lines. On the other hand, parallel-to-serial conversion is performed, and image data for nine lines is stored in the first temporary storage unit 31.
The image data for nine lines stored in the first temporary storage means 31 is read simultaneously for nine lines in synchronization with the second pixel clock while the image data for one line is input.
Here, the case where the second pixel clock performs image data reading operation in units of one pixel for each of the nine lines from the first temporary storage means 31 will be described below with reference to FIGS. Examples will be described.

In this embodiment, binary image data input from the image processing unit 16 to the print control unit 18 is taken as an example in the case where the resolution at which optical writing to the photosensitive member 26 by the laser beam is performed in the image printing unit 4 is 1200 dpi. Is a resolution equal to 1200 dpi, and a case where the resolution is lower than 1200 dpi and needs to be converted to a resolution of an integer multiple of 2 or more.
FIG. 3 is a timing chart in the case where the image data reading operation in units of one pixel by the second pixel clock from the first temporary storage unit 31 is performed for each second pixel clock. FIG. 5 is a timing chart when the second pixel clock is performed every two clocks. FIG. 5 is a timing chart when the second pixel clock is performed every three clocks. FIG. 6 is a timing chart when the second pixel clock is four clocks. FIG. 7 is a timing chart in the case of performing every 6 clocks of the second pixel clock.
In the example in which the resolution of the input image data in FIG. 3 is 1200 dpi, the reading operation of the image data in units of one pixel is performed from the first temporary storage unit 31 by the second pixel clock (corresponding to 1200 dpi) as described above. This is performed every two pixel clocks, and image data in units of one pixel is sequentially output at a clock cycle of a setting frequency of a second pixel clock for writing. Accordingly, when the print control unit 18 outputs, the number of pixels of the image data is not changed, and the output is performed with the resolution of 1200 dpi.
In the example in which the resolution of the input image data in FIG. 4 is 600 dpi, the readout operation of the image data in units of one pixel is performed from the first temporary storage means 31 by the second pixel clock as in the case of FIG. The image data is sequentially output in units of one pixel at a clock cycle that is twice the set frequency of the second pixel clock when writing is performed. Therefore, at the time of printing control unit 18 output, the number of pixels of the image data is doubled to 600 dpi at the time of input, and the output is changed to a resolution of 1200 dpi.
In the example in which the resolution of the input image data in FIG. 5 is 400 dpi, the image data reading operation in units of one pixel is performed from the first temporary storage unit 31 by the second pixel clock as in FIG. The image data is sequentially output in units of one pixel at a clock cycle three times the set frequency of the second pixel clock when writing is performed. Therefore, at the time of printing / printing control unit 18 output, the number of pixels of the image data is tripled with respect to 400 dpi at the time of input, and the output is changed to a resolution of 1200 dpi.
In the example in which the resolution of the input image data in FIG. 6 is 300 dpi, the read operation of the image data in units of one pixel is performed from the first temporary storage unit 31 by the second pixel clock as in the case of FIG. The image data is sequentially output in units of one pixel at a clock cycle four times the set frequency of the second pixel clock when writing is performed. Accordingly, at the time of printing control unit 18 output, the number of pixels of the image data is four times that of 300 dpi at the time of input, and the output is changed to a resolution of 1200 dpi.
In the example in which the resolution of the input image data in FIG. 7 is 200 dpi, the reading operation of the image data in units of one pixel is performed from the first temporary storage unit 31 by the second pixel clock as in FIG. The image data is sequentially output in units of one pixel at a clock cycle that is six times the set frequency of the second pixel clock when writing is performed. Therefore, when printing and printing control unit 18 outputs, the number of pixels of the image data is 6 times that of 200 dpi at the time of input, and the output is changed to a resolution of 1200 dpi.
Further, the image data for nine lines read from the first temporary storage means 31 is detailed by performing the image data read operation according to the timing charts of FIGS. 3 to 7 on the second pixel clock. Nine lines are simultaneously output to the image processing means 32 using a window 40 (see FIG. 9), which will be described later.

The image processing means 32 generates a matrix from the data of the main scanning 13 pixels and the sub-scanning 9 lines in order to reduce the oblique lines and the arcs of the edge of the image, and sets the values of the target pixel and the peripheral pixels. Based on this, the feature of the target pixel is extracted by pattern recognition processing, and a value representing the feature of the target pixel is determined.
In addition, the image processing means 32 performs smoothing processing (jaggy correction) based on the extracted feature value for each second pixel clock, thereby converting multi-valued data of a plurality of bits per pixel for all input pixels. Perform the conversion.
FIG. 8 is a block diagram showing a schematic configuration of the image processing means 32 in FIG. FIG. 9 is a diagram showing the configuration of the window 40 that is an element of the image processing means 32.
As shown in FIG. 8, the basic configuration of the image processing means 32 includes a window 40, a pattern recognition unit 41, a memory block 42, a video data output unit 43, and a timing control unit 44 that controls these synchronously.
The timing control unit 44 includes an FGATE signal that defines a writing period for one page in the image data in the sub-scanning direction, an LGATE signal that defines a writing period for one main scanning line, and an LSYNC that indicates the writing start and end timing of each line. Necessary for synchronizing the operation of the window 40, the pattern recognition unit 41, and the memory block 42 of the image processing means 32 by inputting the image clock WCLK and the RESET signal that take the signal reading and writing cycle for each dot. A simple clock signal or the like.
The correction data in the memory block 42 can be selectively loaded from a storage means such as a ROM by an MPU or CPU in the image forming apparatus system, or can be downloaded from a host computer. It is possible to easily change the correction data for the pattern to be corrected. This correction data includes data stored in a pattern memory 421, which will be described later, or setting data for the double-dense mode pixel pattern generation unit 422.

The window 40 used for processing by the image processing means 32 is a shift register 40a to 40i corresponding to 13 pixels in the main scanning direction with respect to 9 lines of image data output from the first temporary storage means 31 of FIG. Are connected serially, and form a pattern detection matrix as shown in FIG.
In the window 40 shown in FIG. 9, the pixel position of the seventh pixel from the left end of the shift register 40e (shown with (1) in the figure) is the storage position of the target pixel of interest.
In the image processing means 32, the image data is sequentially shifted one pixel at a time in the shift registers 40a to 40i constituting the window 40, so that the target pixel is sequentially changed with respect to the image processing means 32, and the target pixel is centered. The image data of the window 40 can be continuously cut out.
The shift operation by the shift registers 40a to 40i of the window 40 shown in FIG. 9 will be described with reference to the example of FIGS. 3 to 7. In the case of FIG. 3, the second pixel clock is supplied from the first temporary storage means 31. Thus, the image data reading operation in units of one pixel is performed for each second pixel clock, and the image data in the shift registers 40a to 40i constituting the window 40 of the image processing means 32 is also the second pixel clock. The pixel of interest is sequentially changed with respect to the image processing means 32 by sequentially shifting one pixel at a time.
In the case of FIG. 4, the image data is read out in units of one pixel from the first temporary storage unit 31 by the second pixel clock, as in FIG. 3. The image data in the shift registers 40a to 40i constituting the window 40 of the image processing means 32 is also shifted by one pixel every two cycles of the second pixel clock. As a result, the target pixel sequentially changes with respect to the image processing means 32. 5, 6, and 7, the pixel of interest changes with respect to the image processing unit 32 by sequentially shifting one pixel at a time of the third, fourth, and sixth periods of the second pixel clock. .

FIG. 10 shows a specific example in which the image data is sequentially shifted one pixel at a time in the shift registers 40a to 40i constituting the window 40 arranged for the image processing means 32 described above.
(A) in FIG. 10 is at an arbitrary rising edge of the second pixel clock for the image data input from the image processing unit 16 in FIG. 2 (at the time indicated as T1 in the time chart of (C) in the figure). The image data in the window 40 is shown. A pixel surrounded by a central frame is shown as a target pixel.
FIG. 10B shows a rising edge of the second pixel clock next to an arbitrary rising edge of the second pixel clock (time point indicated as T2 in the time chart of FIG. 10C). The image data in the window 40 in FIG.
The shift operation shown in FIG. 10, that is, the image processing means 32 starts from the head of each line by shifting the image data in the shift registers 40a to 40i constituting the window 40 one pixel at a time every second pixel clock. It is possible to extract dot information with all pixels as the target pixel.
The description of FIG. 10 is the case of the operation shown in the timing chart shown in FIG. 3, but the following operation is performed in FIG. That is, in the case of FIG. 4, the image data in the shift registers 40a to 40i constituting the window 40 of the image processing means 32 is sequentially shifted by one pixel every two cycles of the second pixel clock. The image processing means 32 extracts the dot information from all the pixels from the head of each line as the target pixel, but the extraction (change) of the dot information is every two cycles of the second pixel clock. In other words, the dot information in this case continues for every two cycles of the second pixel clock.
5, 6, and 7, the pixel of interest changes with respect to the image processing unit 32 by sequentially shifting one pixel at a time of the third, fourth, and sixth periods of the second pixel clock. Therefore, the dot information continues for each period unit of the second pixel clock.

Next, processing by the pattern recognition unit 41 for the window 40 will be described.
FIG. 11 is a block diagram showing the internal configuration of the pattern recognition unit 41 and the relationship with the window 40. Note that the pattern recognition unit 41 shown in FIG. 11 applies the pattern recognition unit in the image data processing apparatus known from Japanese Patent Laid-Open No. 5-207282. Accordingly, only a brief description is given here, and the above publication is referred to for details.
The pattern recognition unit 41 shown in FIG. 11 uses the dot information extracted for the target pixel of the window 40 as a target target pixel and its surrounding information, particularly the boundary between the black pixel and the white pixel of the image data. This is a block that recognizes the feature of the line segment shape and outputs the recognition result as code information in a predetermined format. The code information output from the pattern recognition unit 41 is used as a read address of the memory block 42 to read correction data for performing image processing (smoothing) from the memory, and for the pixel pattern generation unit 422 for the double density mode. It is used for the processing (described later).
FIG. 11 is a block diagram showing the internal configuration of the pattern recognition unit 41 and the relationship with the window 40. The window 40 which is a sample window includes a central 3 × 3-bit core region (Core) 40C including a target pixel, an upper region (Lower) 40D, a left region (Left) 40L, and a right region (Right) 40R. It is divided.
The pattern recognition unit 41 includes a core region recognition unit 411, a peripheral region recognition unit 412, multiplexers 413 and 414, a gradient calculation unit 415, a position calculation unit 416, a determination unit 417, and a gate 418. The peripheral region recognition unit 412 is further configured by an upper region recognition unit 412U, a right region recognition unit 412R, a lower region recognition unit 412D, and a left region recognition unit 412L.
The pattern recognition unit 41 outputs the following signals as recognition results to the subsequent memory block 42 and the like. From the core area recognition unit 411, H / V: a signal indicating whether the line segment is close to horizontal or vertical, B / W: a signal indicating whether the pixel of interest is black or white, U / L: a pixel of interest When white, a signal indicating whether the pixel position is on the upper side (right side) or lower side (left side) with respect to the line segment is output. From the discriminating unit 417, DIR [1: 0]: a 2-bit coded signal indicating the inclination direction of the line segment, NO-MATCH: a signal indicating that there is no pattern to be corrected in the recognized line segment. Output. The inclination calculation unit 415 outputs G [3: 0]: 4-bit code information indicating the degree of inclination (GRADIENT) of the recognized line segment. From the position calculation unit 416, P [3: 0]: 4-bit code information representing the position (POSITION) of the noticed dot via the gate 418. In the case of a line segment close to the horizontal, notice from the left end in the continuous dot. For the number of dots up to a dot or a line segment close to vertical, the number of dots from the lower end in the continuous dot to the target dot is output.
Although not shown, the internal configuration of the pattern recognition unit 41 and the relationship with the window 40 are not shown in the figure, but a 3 × 3 bit core region (Core) 40C is handled as a configuration of only a 5 × 5 core region. Can be adopted.

Next, the configuration and operation related to the memory block 42 will be described.
FIG. 12 shows a memory block 42 constituted by a pattern memory 421. (A) shows an input whose resolution is not changed, and (B) shows a block configuration corresponding to an input accompanied by a change in resolution.
The memory block 42 shown in FIG. 12A includes only the pattern memory 421. FIG. 12A shows the corrected image data (4) stored in advance using the code information (13 bits) output from the pattern recognition unit 41 as an address. Bit multi-value data) is read out and output as image data for laser driving, enabling printing with a corrected dot pattern. However, it does not correspond to an operation involving a change in resolution.
A memory block 42 shown in FIG. 12B shows a preceding example in which only the pattern memory 421 is configured to be able to cope with a change in resolution. The code information (13 bits) output from the pattern recognition unit 41 includes main scanning / sub-scanning. In this method, a scanning double-density code is added, and the correction image data (4-bit multi-value data) stored in advance is read using these code information as addresses. The example shown in FIG. 12B is a method that is not adopted in the present embodiment, but is described for comparison with the present embodiment described later.
The configuration shown in FIG. 12A is basically based on the conventional method (see Japanese Patent Laid-Open No. 5-207282), and correction is not necessary as a pixel constituting a diagonal line or an arc by the determination unit 417 shown in FIG. The top black pixel or the bottom black pixel (that is, the black pixel of the image data developed in the form of a bitmap) of one pixel line or two or more pixels having a width in the vertical direction of the horizontal line segment black pixel determined to be a pixel (A black pixel that is a boundary between a region and a white pixel region but is not a pixel forming a hatched line segment with jaggies)). replace. The smoothing correction data stored in advance in the memory block 42 of the image processing means 32 corresponds to the code information from the pattern recognition unit 41 in the memory block 42 before image processing (smoothing) is performed on the image data. Data must be set. Note that the correction data setting I / F can be handled by writing data stored in a built-in memory arranged in the image forming apparatus system by the CPU.

In the present embodiment, in addition to the configuration of FIG. 12A, the configuration in which the pixel pattern generation unit 422 for double-dense mode and the selector 423 are added enables the operation in the double-dense mode corresponding to the change in resolution. .
FIG. 13 shows a block configuration of the memory block 42 of the present embodiment in which the operation of the double density mode is enabled by the pixel pattern generation unit 422 for the double density mode.
According to the memory block 42 in FIG. 13, in the operation mode described in FIG. 12A (hereinafter referred to as “single density mode”), code information (13 bits) output from the pattern recognition unit 41 is used as an address. The correction data (4 bits) stored in advance is read out, and image data for laser driving is output, which becomes a corrected dot pattern. On the other hand, the operation mode described in FIGS. 4 to 7 (hereinafter referred to as “double density mode”); FIG. 4 is double density, FIG. 5 is triple density, FIG. 6 is quadruple density, and FIG. In the above example), in addition to the code information (13 bits) output from the pattern recognition unit 41, the main scanning / sub-scanning double-dense code shown in the figure is input, and the calculation processing for the double-dense mode is performed according to the set conditions. The pixel pattern generation unit 422 generates correction data (4 bits), and outputs image data for laser driving, which becomes a corrected dot pattern.
Here, the main scanning / sub-scanning double-dense code is a code indicating how many times the pixels have been changed in the main scanning direction and the sub-scanning direction in the double-dense mode. In the fine mode, as shown in the main scanning double-dense code in the figure, two code states of 0 → 1 → 0 → 1 → 0... Are repeated. As shown in the main scanning double-density code in the figure, the three code states of 0 → 1 → 2 → 0 → 1 → 2 → 0... As shown in the main scanning double-density code in the figure, the four code states of 0 → 1 → 2 → 3 → 0 → 1 → 2 → 3 → 0... In the dense mode, as shown in the main scanning double-dense code in the figure, there are six 0 → 1 → 2 → 3 → 4 → 5 → 0 → 1 → 2 → 3 → 4 → 5 → 0. The repetition of the code state. Although not shown, the sub-scanning direction corresponds to code information indicating how many times the sub-scanning double-dense code has been changed in line units in the double-dense mode similar to FIG. Further, an image path selection signal is generated in order to select an output depending on whether the operation mode is a single density mode or a double density mode, and the setting of the selector 423 in FIG. It is selected from the pattern memory 421 or the double-dense mode pixel pattern generation unit 422.

The correction data generated by the memory block 42 shown in the embodiment of FIG. 13 includes information obtained by dividing the laser emission time into a plurality of second pixel clock widths for each second pixel clock (in this case, binary). PWM signal output) or output as multi-value information.
The correction data output that is output by one pixel every second pixel clock is finally input to the video data output unit 43 shown in FIG. 8 and converted into an image data format for one pixel. As described above, the data is output to the LD modulation unit 19, and the image data is written on the photosensitive drum 26 by ON / OFF of the LD of the LD modulation unit 19 and power control.
When the size of the window 40 is the same, the number of pattern code information that is the result of extracting the features of the pixel of interest based on the values of the pixel of interest and the surrounding pixels is the same, but the input image that is pattern-recognized by the window 40 It is possible to reduce the difference in image quality depending on what resolution the image data is and what resolution output image data is finally printed as a visible image on a print sheet.
For example, when binary image data with a resolution of 1200 dpi is input to the window 40 and is smoothed and output as multi-value image data with the same resolution of 1200 dpi (single density mode), the binary of the image data⇒multi-value The conversion effect can improve the image quality due to the jaggy reduction effect. In this case, the smoothing process (binary ⇒ multi-value conversion process) is performed by using only the pattern code information that is the result of extracting the features of the pixel of interest based on the values of the pixel of interest and surrounding pixels in the window 40, and image data. This conversion is performed using the pattern memory 421 shown in FIG. In this case, the memory capacity of the pattern memory 421 in FIG. 12A is a specification that can store information of 4 bits each using the 13-bit pattern code information shown in FIG. 12A as an address. Therefore, a capacity of 32k bits (address = 8k bits / data: 4 bits) is required.
FIG. 14 is a diagram for explaining the process of binary-to-multilevel conversion (smoothing process) in the single density mode with a specific example. As shown in the figure, at the time of input, 1200 dpi binary image data composed of only “0” or “1” data is converted into code information (in this example, [ a), and is output as multi-value image data (in this example, represented by [E, 2,0]) including a halftone of 1200 dpi at the time of output. Is done. Since this example is for the single density mode, the main scanning / sub-scanning double density codes added to the code information in FIG. 14 are all described as “0”, but are added for convenience of explanation. This information is unnecessary for the smoothing process.

On the other hand, for binary-to-multilevel conversion in the double-dense mode, for example, binary image data with a resolution of 400 dpi is input to the window 40, smoothed as multivalued image data with a resolution of 1200 dpi, and output (three times). In the dense mode, the image quality can be improved by the same reduction effect as in the binary-to-multi-value conversion method using the pattern memory in the single-density mode due to the effect of the binary-to-multi-value conversion of the image data. However, in the case of the triple density mode, in the smoothing process, in addition to the pattern code information that is the result of extracting the features of the pixel of interest based on the values of the pixel of interest and the surrounding pixels in the window 40, the resolution is set to 400 dpi. The main scanning / sub-scanning dense code generated in the process of converting to 1200 dpi is added, and the image data is converted.
Assuming that this triple density processing is performed by a method using a pattern memory similar to that in the single density mode, that is, a method using the pattern memory 421 shown in FIG. As shown in FIG. 12B, the memory capacity is a specification that can store information of 4 bits each using 13 bits of code information of the pattern recognition result and N bits of main scanning / sub-scanning dense code as addresses. Therefore, when the main scanning / sub-scanning dense code supports 3 times dense, N = 4 bits and 512 kbit capacity (address = 128 kbits / data: 4 bits) is required, which is 16 times that in the single density mode. This method requires a large cost for improving the image quality.

Therefore, in the present embodiment, the processing by the double-dense mode pixel pattern generation unit 422 shown in FIG. 13 is performed without using a pattern memory for binary-to-multilevel conversion in the double-dense mode.
In this method, jaggies are easier to visually recognize than high-resolution image data, and even when converting low-resolution image data, which is expected to have a smoothing effect, into low-bit number multi-value image data, In other words, the image quality can be improved even if various code information related to the smoothing process is reduced, and the aim is to increase the memory capacity as in the method of FIG. In view of the increase in cost and the effect on image quality, improvement in image quality is achieved with a cheaper circuit configuration.
First, the smoothing process (binary → multi-value conversion process) for the triple density mode exemplified above is a result of extracting the features of the pixel of interest based on the values of the pixel of interest and the surrounding pixels by the window 40. In addition to the pattern code information (13 bits), a main scanning / sub-scanning dense code (N bits) generated in the process of converting the resolution from 400 dpi to 1200 dpi is added as an input of the conversion process. Although the same code information is used as the input of the conversion process, in the present embodiment, the pixel pattern generation unit 422 for the double-dense mode is not a method of reading data using the pattern memory 421 shown in FIG. To generate multi-valued image data.

The double-dense mode pixel pattern generation unit 422 is not configured by a memory, but is configured by a combinational circuit that outputs an array of output pixels corresponding to one pixel of image data at the time of input as one pixel array. The combinational circuit is a hardware circuit including a logic / arithmetic circuit whose logic can be changed by setting, and outputs a pixel array (multi-valued image data) by performing logic / calculation according to the input and setting of the code information. .
The image data with a resolution of 600 dpi at the time of input is output by the double-dense mode pixel pattern generation unit 422 at the time of output, and the number of pixels is changed by 2 times of the main scanning and 2 times of the sub-scanning. In the case of image data with a resolution of 400 dpi at the time of input, the number of pixels is changed by 3 times main scanning and 3 times of sub-scanning at the time of output, and the pixels are configured with a resolution of 1200 dpi 9 pixels. When 300 dpi image data is output, the number of pixels is changed by 4 times the main scanning and 4 times the sub scanning, and the pixels are configured with a resolution of 1200 dpi 16 pixels. The image data with the input resolution of 200 dpi is output. The number of pixels is changed by 6 times the main scanning and 6 times the sub-scanning, and the pixel is configured with a resolution of 1200 dpi 36 pixels.
FIG. 15 to FIG. 18 are diagrams illustrating specific examples of the generation process of binary-to-multilevel conversion (smoothing process) in the respective double-density modes of 2 times, 3 times, 4 times, and 6 times, respectively. In each of FIGS. 15 to 18, (A) shows the pixel arrangement in the input binary image, (B) shows the pattern recognition result for each pixel, and the main scanning / sub-scanning dense code of each pixel is added. (C) shows a pixel arrangement in the output multi-valued image whose resolution has been converted, and (D) shows a pixel arrangement corresponding to the code information of the pattern recognition result. The double-dense mode pixel pattern generation unit 422 generates the data (C) on the condition (B).

In the conversion by the pixel pattern generation unit 422 for double density mode exemplified here, the image data in units of one pixel of the resolution at the time of output is multi-valued image data, but all white pixels and all as shown in FIG. Multivalue corresponding to all black pixels (“F” in the figure) and all white pixels (“0” in the figure) of the multivalued image data, not including halftone image data indicating the density gradation between the black pixels. It is assumed that it is composed only of image data.
As shown in FIGS. 15 to 18, 600/400/300/200 dpi binary image data (A) composed of only “0” or “1” data at the time of input is obtained by pattern recognition by the window 40. If each pixel has the same pattern regardless of the operation mode, it is converted into the same code information (B), and further added to the code information (B) in each double-density mode, and the main scanning / sub-scanning dense code Can be used to output an array of output pixels corresponding to one pixel of image data at the time of input as a pixel array (C) at the time of each double-definition output.
In this example, image data of the same input pixel configuration with different resolutions is processed and printed out. In the double density in FIG. 15, the quadruple density in FIG. 17, and the triple density in FIG. As shown in the figure, at the 6 × density in FIG. 18, the 1200 dpi pixel configuration at the time of printing is different, but as a result, it is possible to print as an image having twice the resolution at the time of input. An improvement effect is obtained.
Further, in the case of the double density in FIG. 15 and the quadruple density in FIG. 17 and in the triple density in FIG. 16 and the 6-fold density in FIG. 18, the former is double dense and the latter is 3 times. This is an example of double-dense, which is based on double and triple prime numbers, respectively, and the output pixel configuration during printing can be optimized for each prime multiple to improve image quality. It is said. In the case of 6 times dense in FIG. 18, a plurality of prime numbers of 2 times dense and 3 times dense can be selected as basic double dense numbers as the prime numbers, but the fineness of the pixel configuration after processing with respect to the resolution at the time of input is fundamental. The larger the prime number, the finer the pixel configuration, and the correction data can be set. Therefore, in the case of the above-mentioned 6-times density, the output is performed by setting the double-dense mode pixel pattern generation unit 422 so as to perform the scaling process based on the 3 times dense data having a large prime number. Note that when scaling is performed with such settings, it is possible to handle with a smaller number of magnifications compared to the case where the number of scalings required for processing is small, and image quality can be improved with a cheaper circuit configuration. It becomes possible to make it possible.

An embodiment in which a part thereof is modified based on the above embodiment will be described below.
In the above embodiment, the example in which the smoothing process is performed in the memory block 42 through the pattern recognition process when the input binary data is converted into the multi-value data by the image processing unit 32 (FIG. 8). After the smoothing process, 4-bit multi-value image data is output from the memory block 42. In the single density mode in which the resolution is not changed, all white pixels and all black pixels as shown in FIG. It is possible to form a dot that can express halftones according to multi-value data in units of pixels at the time of printing by including halftone image data indicating density gradations between them.
As described above, the image processing unit 32 of the present example basically displays the pixel data in the resolution at the time of printing as the multi-valued data for the print output after processing. In the mode, as shown in FIGS. 15 to 18, it is based on correspondence not including halftone image data indicating density gradation between all white pixels and all black pixels.
Therefore, here, the multi-value image data corresponding to all black pixels and all white pixels of the multi-value image data can be changed by setting, and is configured by multi-value image data meaning each individual halftone, It is possible to adjust or change the image quality.
For example, in the examples of FIGS. 15 to 18 described above, data of “F” as an all black pixel and “0” as an all white pixel are illustrated. However, to the other 4-bit image data of 1 to E, respectively. The conversion settings can be freely set. Conversion setting can be performed, for example, by changing the logic of the pixel pattern generation unit 422 for the double-dense mode in accordance with the conversion condition instructed by setting input from the operation unit. By changing the data of the data, it is possible to perform processing such as black and white inversion of the input image or conversion of the density of only the black pixels, and depending on the characteristics of the image, it is possible to adjust and change the required image quality. enable.

1 is a schematic diagram illustrating a configuration of a digital copying machine according to an embodiment of the present invention. FIG. 2 is a block diagram illustrating in more detail a print control unit illustrated in FIG. 1. It is a timing chart explaining the read-out operation (every 2nd pixel clock) from the 1st temporary storage means. It is a timing chart explaining the read-out operation (every 2 clocks of the 2nd pixel clock) from the 1st temporary storage means. It is a timing chart explaining the read-out operation (every 3 clocks of the 2nd pixel clock) from the 1st temporary storage means. It is a timing chart explaining the read-out operation (every 4 clocks of the 2nd pixel clock) from the 1st temporary storage means. It is a timing chart explaining the read-out operation (every 6 clocks of the 2nd pixel clock) from the 1st temporary storage means. It is a block diagram which shows schematic structure of the image processing means in FIG. It is a figure which shows the structure of the window which is an element of an image processing means. It is a figure which shows a mode that image data shifts a window sequentially 1 pixel at a time. It is a block diagram which shows the internal structure of a pattern recognition part, and the relationship with a window. A memory block constituted by a pattern memory is shown. (A) corresponds to an input whose resolution is not changed, and (B) corresponds to an input accompanied with a change in resolution. 2 shows a configuration of a memory block capable of double density mode operation according to an embodiment of the present invention. It is a figure explaining the process of the binary-> multi-value conversion (smoothing process) in a single density mode by a specific example. It is a figure explaining the process of the binary-> multi-value conversion (smoothing process) in a double density mode by a specific example. It is a figure explaining the process of binary-> multi-value conversion (smoothing process) in a triple density mode by a specific example. It is a figure explaining the process of binary-> multi-value conversion (smoothing process) in a 4 times dense mode by a specific example. It is a figure explaining the process of binary-> multi-value conversion (smoothing process) in 6 times dense mode by a specific example.

Explanation of symbols

1 ... Digital copier, 2 ... Image reading unit,
3 ... signal processing unit, 4 ... image printing unit,
16 ... image processing unit, 18 ... print control unit,
19 ... LD modulator, 20 ... LD unit,
31... First temporary storage means 32... Image processing means,
40 ... window, 41 ... pattern recognition unit,
42 ... Memory block, 421 ... Pattern memory,
422 ... Pixel pattern generation unit for double-dense mode,
43: Video data output unit 44: Timing control unit

Claims (3)

An image processing apparatus for converting binary image data developed in a bitmap shape at a predetermined input resolution into double-density image data corresponding to an output resolution,
The line segment shape of the boundary portion of the black pixel area in the image data of the predetermined area centered on the target pixel of the binary image data is recognized, and the target pixel constitutes a diagonal line or an arc based on the recognition result Pattern recognition means for determining whether or not the pixel needs correction, and generating the recognition result of the line segment shape related to the pixel determined to be correction as pattern code information;
Image data that does not change the double density that is the same resolution as the output resolution is discriminated by the pattern recognition means, and the pattern code information related to the pixel for which the discrimination result that correction is necessary is obtained is stored in advance in the memory as an address. By reading the corrected image data stored as a value image, single density mode image data generating means for generating output data including halftone image data ;
Image data for changing the double density, which is a resolution lower than the output resolution, is discriminated by the pattern recognition means, and the pattern code information relating to the pixel from which the discrimination result that correction is necessary is obtained and the double corresponding to the double density Output data composed only of all white pixels and all black pixels that do not contain halftone image data by calculating the corrected image data consisting of the pixel configuration corresponding to the specified double density with the dense code as input An image processing apparatus comprising image data generating means for double-dense mode for generating The image processing apparatus according to claim 1,
The double-dense mode image data generating means includes a scaling operation means for scaling the output data, and when the designated double density is a prime number multiplication value, the double density of the largest prime number in the prime number and With the pattern code information obtained from the pattern recognition means as an input, image data having a pixel configuration corresponding to the double density of the maximum prime number is obtained, and the obtained image data has a specified double density by the scaling calculator. An image processing apparatus that generates corrected image data. In the image processing apparatus according to claim 1 or 2,
The image processing apparatus according to claim 2, wherein the image data generating means for double-dense mode generates pixel data values having a pixel configuration corresponding to a specified double density in multiple values.

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