JP3985567B2 - Encoding device and encoding method - Google Patents

Description

[0001]
BACKGROUND OF THE INVENTION
The present invention relates to an encoding apparatus and an encoding method for encoding a video signal in real time in, for example, a mobile phone or a TV phone system.
[0002]
[Prior art]
FIG. 4 shows an example of an encoding device. The encoding apparatus illustrated in FIG. 4 includes a memory 1 and an encoding unit 104. The memory 1 divides a video signal composed of a luminance signal and a color difference signal into macro blocks and outputs them. FIG. 5 is a diagram schematically showing the configuration of the macroblock. Here, the size of each macroblock is 16 (pixels) × 16 (line). When the video signal is 4: 2: 0, the video of the 16 × 16 region is represented by the 16 × 16 luminance signal Y and the two color difference signals Cb and Cr of 8 × 8. Therefore, as shown in FIG. 5, one macro block is composed of six blocks of 8 × 8 (four blocks corresponding to the luminance signal and two blocks corresponding to the color difference signals Cb and Cr).
[0003]
The encoding unit 104 generates encoded data by performing intra encoding or inter encoding (sometimes referred to as interframe encoding) on a video signal input in units of macroblocks. The subtracter 2 outputs the difference between the video signal input in units of macroblocks and the predicted image output from the predicted image creator 11. The DCT circuit 3 outputs a DCT coefficient by performing a discrete cosine transform on the output of the subtractor 2. The quantization circuit 4 quantizes the DCT coefficient output from the DCT circuit 3. The DC / AC predictor 5 performs prediction of the DC coefficient and the AC coefficient based on the DC and AC coefficient of the block adjacent to the current block. The prediction coefficient output by the DC / AC predictor is converted into a one-dimensional array by a rearrangement memory (not shown) and output to the variable length coding circuit 6.
[0004]
The output of the quantization circuit 4 is also given to the inverse quantization circuit 7. The inverse quantization circuit 7 inversely quantizes the DCT coefficient quantized by the quantization circuit 4. The inverse DCT circuit 8 performs inverse DCT conversion on the output of the inverse quantization circuit. The adder 9 outputs a decoded image obtained by adding the output of the inverse DCT circuit 8 and the output of the predicted image creator 11 to the decoded image memory 10. The decoded image is used for detection of a motion vector and creation of a predicted image performed at the time of inter coding.
[0005]
The motion detection circuit 12 detects a motion vector based on the decoded image output from the decoded image memory 10 and the video signal input from the memory 1 in units of macroblocks. The motion vector indicates a position where an image closest to each macro block appears in the decoded image. The predicted image creator 11 creates a predicted image corresponding to the current video signal from the decoded image based on the motion vector, and outputs the predicted image to the subtracter 2 and the adder 9. The motion vector prediction circuit 13 performs motion vector prediction and outputs the prediction vector to the variable length encoding circuit 6. The variable length coding circuit 6 performs variable length coding on the output of the DC / AC predictor 5 and the motion vector 13 together with additional information such as a quantization parameter, and outputs a bit stream.
[0006]
Hereinafter, the operation of the encoding unit 104 in intra coding and intra coding will be described.
In the case of intra coding, since a predicted image is not created, the video signal output from the memory 1 is input to the DCT circuit 3 in units of macroblocks. The DCT circuit 3 outputs DCT coefficients obtained by performing DCT conversion on each macroblock of the video signal. The DCT coefficient of the video signal output from the DCT circuit 3 is quantized by the quantization circuit 4, then DC / AC predicted by the DC / AC predictor 5, and the variable length coding circuit 6 determines the quantization parameter and the like. Along with the additional information, it is variable length encoded and output as a bit stream. Here, a frame to which intra coding is applied to all macroblocks is called an intra frame (I frame).
[0007]
On the other hand, in the case of inter coding, the subtracter 2 outputs the difference (difference signal) between the predicted image and the video signal output from the memory 1 in units of macroblocks. The DCT circuit 3 outputs a DCT coefficient obtained by performing DCT conversion on the difference signal between the predicted image and the video signal. The DCT coefficient of the difference signal is quantized by the quantization circuit 4 and then DC / AC predicted by the DC / AC predictor 5, along with additional information such as a motion vector and a quantization parameter by the variable length coding circuit 6. Variable length encoding is performed and a bit stream is output.
[0008]
[Problems to be solved by the invention]
In an encoding apparatus using inter-frame prediction, when encoding a video with many scene changes or a video with fast motion, there is a problem that the data capacity of the bit stream output from the variable length encoding circuit 6 increases. there were. In such a case, if the quantization circuit 4 is configured to reduce the number of quantization bits, there is a problem that the quantization step width becomes coarse and coding distortion occurs.
[0009]
The present invention has been made to solve the above-described problems, and can suppress the data volume of encoded data without increasing encoding distortion even when a video with many scene changes is input. An object is to provide a possible encoding device and encoding method.
[0010]
[Means for Solving the Problems]
An encoding apparatus according to the present invention includes a filter unit that limits a band of a video signal representing an input image and outputs a band limited video signal corresponding to the input image, and either the video signal or the band limited video signal. Switching output means for outputting, the output of the switching output means is accumulated for one frame, the first switching video signal delayed for a period corresponding to one frame is outputted, and the accumulated output of the switching output means is macro Based on the video signal, the band-limited video signal, and the first switching video signal, the memory means for outputting the second switching video signal divided into blocks, the correlation between the frames of the video signal A determination unit that outputs a determination signal representing lowness, and an encoding unit that encodes the second switching video signal, wherein the switching output unit outputs based on the determination signal. With switches, said determining means, said video signal and said first and first differentiating means for differential and calculates for each pixel the outputs of the switching video signals, the said band-limited image signal a first switching A second difference unit that calculates and outputs a difference from the video signal for each pixel; and among each pixel in the frame, an absolute value of an output of the first difference unit is greater than a second predetermined value. A counter that counts the number of pixels that is large and has an absolute value of an output of the second difference means that is greater than a third predetermined value, and a value that represents a low correlation between the frames. When larger than the first predetermined value, a first determination signal for switching so that the switching output means outputs the band-limited video signal is output as the determination signal, and the correlation between the frames is low. When the value representing is less than or equal to the first predetermined value As the judgment signal, and outputs a second determination signal for switching so as to output the video signal to said switch output means, a pixel value representing the correlation between low between the frames is counted by the counter It is a count value .
[0017]
DETAILED DESCRIPTION OF THE INVENTION
Hereinafter, the present invention will be specifically described with reference to the drawings showing embodiments thereof. In the figure, parts that are the same as or equivalent to the conventional ones are given the same reference numerals and explanations thereof are omitted.
[0018]
FIG. 1 is a block diagram showing a configuration of an encoding apparatus according to an embodiment of the present invention. The encoding apparatus shown in FIG. 1 includes a filter 101, a switch 102, a determiner 103, a memory 1a, and an encoding unit 104. The configuration and operation of encoding section 104 are the same as those of the conventional one shown in FIG.
[0019]
The filter 101 outputs a band limited video signal corresponding to the video signal by limiting the band (mainly high frequency component) of the input video signal. The switch 102 selects the video signal when the determination signal output from the determination unit 103 is “0”, and outputs the band-limited video signal output from the filter 101 to the memory 1a when the determination signal is “1” ( Details of the determination signal will be described later). The memory 1a delays the video signal output from the switch 102 or the band limited video signal for a period corresponding to one frame, and then outputs the delayed signal to the determiner 103. In addition, the memory 1a outputs the video signal output from the switch 102 or the band limited video signal to the encoding unit 104 in units of macroblocks. The encoding unit 104 performs inter-frame or intra-frame predictive encoding processing on the video signal or the band-limited video signal output from the memory 1a in units of macro blocks.
[0020]
The determiner 103 represents the video signal based on the video signal based on the video signal, the band limited video signal, and the video signal one frame before output from the memory 1a or the band limited video signal corresponding to the video signal one frame before. A determination signal representing the correlation between the image to be processed and the image one frame before the image is output. The determination unit 103 outputs the determination signal as “0” when it is determined that the correlation between the current image and the image one frame before is high, and outputs “1” when it is determined as low. As a result, when the correlation with the image of the previous frame is high (determination signal “0”), the video signal is directly encoded by the encoding unit 104, and conversely, when the correlation is low, that is, a scene change occurs. If this is the case (determination signal “1”), the band-limited video signal with the data capacity reduced by the band limitation is encoded by the encoding unit 104.
[0021]
The amount of code of the bit stream output from the encoding unit 104 increases greatly when a large change such as a scene change occurs in the video signal. Therefore, in such a case, it is possible to prevent a rapid increase in the code amount by encoding the band limited video signal with the data amount reduced.
[0022]
Hereinafter, a specific configuration and operation of the determiner 103 will be described.
FIG. 2 is a block diagram illustrating an example of the internal configuration of the determiner 103. The determiner 103 includes subtractors 201 and 205, absolute value detectors 202 and 206, comparators 203 and 207, a logical product operator 204, a counter 208, and a comparator 209.
[0023]
As described above, the output of the memory 1a is a video signal representing an image one frame before, or a band limited video signal obtained by band-limiting the video signal representing the image one frame before by the filter 101.
[0024]
The subtractor 201 outputs the difference between the video signal and the output of the memory 1a for each pixel, and the absolute value detector 202 outputs the absolute value (difference absolute value a) of the output of the subtractor 201. The subtractor 205 outputs the difference between the output of the filter 101 and the output of the memory 1a for each pixel, and the absolute value detector 206 outputs the absolute value (difference absolute value b) of the output of the subtractor 205.
[0025]
The absolute difference values a and b output by the absolute value detectors 202 and 206 are large when the difference between the current image and the image one frame before is large. Here, the difference absolute value a is the case where the output of the memory 1a is a band-limited video signal one frame before output by the filter 101, and also when the video signal representing the current image includes a lot of high-frequency components. Large value. In addition, when the output of the memory 1b is a video signal representing an image one frame before, the difference absolute value b is a large value even when the video signal representing the image one frame before contains a lot of high frequency components. Become.
[0026]
The comparator 203 compares the absolute difference value a with a preset constant α, and when the absolute difference value a is less than or equal to the constant α (a ≦ α), outputs “0”, and the absolute difference value a is greater than α. If larger (a> α), “1” is output. Further, the comparator 207 compares the difference absolute value b with a preset constant β, and when the difference absolute value b is equal to or less than β (b ≦ β), outputs “0”, and conversely, the difference absolute value is When larger than β (b> β), '1' is output.
[0027]
The AND operator 204 outputs the logical product of the outputs of the comparators 203 and 207, and the counter 208 counts the output of the AND operator 204. Here, the count value of the coefficient unit 208 is reset every frame. The output of the AND operator 204 is “1” when the difference absolute value a is larger than the set value α and the difference absolute value b is larger than the set value β.
[0028]
The comparator 209 compares the count value of the counter 208 with a preset constant γ, “0” when the count value is equal to or less than the constant γ, and “1” when the count value is greater than the constant γ. Is output to the switch 102. Therefore, the determination signal output by the comparator 209 is “1” when the difference between the current image and the image one frame before is large, that is, when a scene change occurs. The switch 102 outputs a video signal to the memory 1a when the determination signal is “0”, and outputs a band-limited video signal to the memory 1a when the determination signal is “1”. As a result, when a scene change occurs, a band limited video signal whose data capacity is reduced by band limitation is encoded.
[0029]
When switching video signals or band-limited video signals in units of frames, the count value of the counter 208 is reset for each frame, and the constant γ of the comparator 209 is also set to a value corresponding to the number of pixels in one frame. To do.
[0030]
In addition, when switching a video signal or a band-limited video signal for each predetermined determination unit composed of a plurality of lines or pixels in a frame, the count value of the counter 208 is reset for each determination unit and compared. The constant γ of the unit 209 is also set to a value corresponding to the number of pixels in one block.
[0031]
The filter 101 may be a horizontal low-pass filter, a vertical low-pass filter, or a horizontal / vertical two-dimensional filter.
[0032]
In the above description, the case where the encoding unit 104 uses an encoding method compliant with MPEG4 has been described. 261, H.H. An encoding method corresponding to H.263, MPEG2, or MPEG1 may be used. In addition, the encoding unit 104 is not limited to an encoding method using motion compensation prediction and DCT, and may be any one that uses an arbitrary inter-frame prediction encoding method.
[0033]
FIG. 3 is a block diagram showing another configuration of the encoding apparatus according to the present invention. The same reference numerals as those in FIG. 1 denote the same or corresponding parts. The delay circuits 301 and 302 respectively delay the video signal and the output of the filter 101 for a predetermined period. The switch 102 outputs one of the outputs of the delay circuits 301 and 302 to the memory 1a.
[0034]
Next, the operation will be described. The determiner 103 has the same configuration as that shown in FIG. 2, and outputs a determination signal by the operation described above. At this time, the determination unit 103 performs determination for each predetermined determination unit including a plurality of lines or a plurality of pixels.
[0035]
The delay circuits 301 and 302 output the video signal and the band limited video signal output by the filter 101 for each determination unit in the determination unit 103. The switch 102 switches the outputs of the delay circuits 301 and 302 based on the determination signal output from the determiner 103 and outputs the result to the memory 1a. As a result, for the determination unit that is determined by the determination unit 103 to have a low correlation with the image one frame before, the band-limited video signal corresponding to the determination unit is output to the memory 1a. For the determination unit determined by the determination unit 103 as having a high correlation with the image one frame before, a video signal corresponding to the determination unit is output to the memory 1a.
[0036]
The memory 1 a delays the video signal output for each determination unit or the band-limited video signal by the switch 102 for a period corresponding to one frame and outputs the delayed signal to the determination circuit 103. In addition, the memory 1a outputs a video signal output for each determination unit and / or a signal representing an image for one frame composed of a band limited video signal to the encoding unit 104 in units of blocks.
[0037]
As described above, the correlation with the image one frame before is detected for each predetermined determination unit including a plurality of lines or a plurality of pixels, and the filter 101 performs detection based on the determination signal output for each determination unit. By switching the output, when a part of the image changes greatly, the resolution degradation associated with the filtering process can be made inconspicuous by filtering only the changed part.
[0038]
Note that the determination unit 103 may output a determination signal based only on the luminance signal, and the determination result of the luminance signal corresponding to the same position on the screen may be used for the color difference signal.
[0039]
In the above description, the video signal is a 4: 2: 0 signal as shown in FIG. 5, but the video signal is not limited to this, and even an RGB signal does not have color information. It may be a monochrome signal.
[0040]
【The invention's effect】
Claim 1, the encoding apparatus according to beauty 3 Oyo, and encoding method, a frame memory for outputting a previous image signal for dividing and outputting the macro block to be encoded Therefore, the circuit scale can be reduced.
[Brief description of the drawings]
FIG. 1 is a block diagram showing a configuration of an encoding apparatus according to an embodiment of the present invention.
FIG. 2 is a block diagram illustrating an example of a configuration of a determiner.
FIG. 3 is a block diagram showing another configuration of the encoding apparatus according to the embodiment of the present invention.
FIG. 4 is a block diagram showing a configuration of a conventional encoding device.
FIG. 5 is a conceptual diagram showing a configuration of a block.
[Explanation of symbols]
DESCRIPTION OF SYMBOLS 1a Memory, 101 filter, 102 switching device, 103 judgment device, 104 encoding part, 201 subtractor, 202 absolute value detector, 203 comparator, 204 AND operation unit, 205 subtractor, 206 absolute value detector, 207 Comparator, 208 counter, 209 comparator.

Claims (4)

Filter means for limiting a band of a video signal representing an input image and outputting a band limited video signal corresponding to the input image;
Switching output means for outputting either the video signal or the band-limited video signal;
The second output is obtained by accumulating the output of the switching output means for one frame, outputting a first switching video signal delayed for a period corresponding to one frame, and dividing the accumulated output of the switching output means in units of macroblocks. Memory means for outputting a switching video signal of
A determination unit that outputs a determination signal indicating low correlation between frames of the video signal based on the video signal, the band-limited video signal, and the first switching video signal;
Encoding means for encoding the second switching video signal;
With
The switching output means switches the output based on the determination signal,
The determination means includes
First difference means for calculating and outputting a difference between the video signal and the first switching video signal for each pixel;
Second difference means for calculating and outputting a difference between the band-limited video signal and the first switching video signal for each pixel;
Of each pixel in the frame, the absolute value of the output of the first difference means is larger than a second predetermined value, and the absolute value of the output of the second difference means is a third predetermined value. A counter that counts the number of pixels greater than,
With
When the value representing the low correlation between the frames is greater than a first predetermined value, the determination signal is switched as the determination signal so that the switching output means outputs the band-limited video signal. Output
When a value indicating low correlation between the frames is equal to or less than the first predetermined value, a second determination signal that is switched so that the switching output unit outputs the video signal is used as the determination signal. and outputs,
The encoding apparatus according to claim 1 , wherein a value indicating low correlation between the frames is a pixel count value counted by the counter . The determination means outputs a determination signal indicating low correlation between the input image and an image one frame before the input image for each determination unit including a plurality of pixels or lines constituting the input image,
Switching output means, based on said decision signal, wherein the video signal corresponding to the determination unit encoding apparatus according or claim 1, characterized in that outputs one of band-limited image signal. A filtering step for limiting a bandwidth of a video signal representing an input image, and outputting a bandwidth limited video signal corresponding to the input image;
A switching output step for outputting either the video signal or the band-limited video signal;
A first switching video signal obtained by accumulating the output of the switching output step for one frame and delayed for a period corresponding to one frame; a second switching video signal obtained by dividing the output of the switching output step in units of macroblocks; A memory step for outputting,
A determination step of outputting a determination signal indicating a low correlation between frames of the video signal based on the video signal, the band-limited video signal, and the first switching video signal;
An encoding step of encoding the second switching video signal;
With
The switching output step switches the output based on the determination signal,
The determination step includes
A second difference step of calculating and outputting a difference between the band-limited video signal and the first switching video signal for each pixel;
Of each pixel in the frame, the absolute value of the output in the first difference step is larger than a second predetermined value, and the absolute value of the output in the second difference step is a third value. A counting step for counting the number of pixels greater than a predetermined value;
With
When the value representing the low correlation between the frames is larger than a first predetermined value, the determination signal is switched to output the band-limited video signal in the switching output step as the determination signal. Output signal,
A second determination signal for switching to output the video signal in the switching output step as the determination signal when a value indicating low correlation between the frames is equal to or less than the first predetermined value; and it outputs a,
The encoding method characterized in that the value indicating low correlation between the frames is the pixel count value counted in the counting step . The determination step outputs a determination signal indicating a low correlation between the input image and an image one frame before the input image for each determination unit including a plurality of pixels or lines constituting the input image,
4. The encoding method according to claim 3 , wherein the switching output step outputs either a video signal corresponding to the determination unit or a band limited video signal based on the determination signal.

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