JP3975194B2 - Package manufacturing method - Google Patents

Description

The present invention relates to a method of manufacturing a package , and more particularly, to a package such as an electronic device, an optical device, and a MEMS (Micro Electro-Mechanical Systems) device using a mounting substrate having a through wiring, and in particular, reducing the thickness thereof The present invention relates to a method for manufacturing a package suitable for the above.

  In recent years, with the enhancement of functions of mobile phones and the like, system LSIs used in such devices are required to have higher speed and higher functions. In response to such a requirement, as one method for realizing this, a system in package (hereinafter referred to as “system in package”), which is a package in which a plurality of chips such as LSI and passive components are mounted on a substrate. SiP ”) has been proposed and has been actively studied in recent years (see, for example, Non-Patent Document 1).

  In addition, researches are being actively conducted to form devices having different fields such as electronic devices, optical devices, and MEMS devices on a single substrate to form a high-performance device.

  As an example of the above-described SiP, FIG. 3 is a schematic cross-sectional view of a SiP in which a plurality of chips such as semiconductor devices are arranged on a rigid mounting substrate (in the illustrated example, an interposer) made of ceramics, silicon, or the like. Indicates. In the example of the figure, the mounting substrate 31 is a ceramic substrate, and a through wiring 34 penetrating in the thickness direction is formed in the mounting substrate 31, and a semiconductor is formed on one surface of the mounting substrate 31. Chips 36a and 36b such as devices are arranged. The electrical wiring from the chips 36 a and 36 b can be drawn out to the other surface of the mounting substrate 31 through the through wiring 34 formed on the mounting substrate 31. Therefore, in the illustrated example, the circuit wiring 35 is formed on the mounting substrate 31 by connecting to the through wiring 34, and the circuit wiring 35 and the chips 36 a and 36 b are electrically connected via the solder bumps 37. have. In such SiP, if necessary, the chip can be sealed by applying and forming an insulating resin 32 or the like so as to enclose the chips 36a and 36b.

  As a method for producing such SiP, a method generally shown in time series in cross-sectional schematic views in FIGS. 4 (a), (b) and (c) is generally used. First, as shown in FIG. 4A, the mounting substrate 41 having the through wiring 44 is manufactured. Circuit wiring 45 is formed on the mounting substrate 41 as necessary. The circuit wiring 45 is used to electrically connect a chip to be mounted later and the through wiring 42 or between a plurality of chips.

  Next, as shown in FIG. 4B, the plurality of chips 46 a, 46 b and 46 c are mounted on the mounting substrate 41 so as to be electrically connected to the through wiring 44. In the illustrated example, the chips 46 a, 46 b and 46 c are electrically connected to the through wiring 44 via the circuit wiring 45 and the solder bump 47.

Further, as shown in FIG. 4 (c), the mounting substrate 41 and the chip groups 46a, 46b and 46c are covered with an insulating resin 42 and sealed for electrical insulation and chip protection as required. Stop.
"MES2002 12th Microelectronics Symposium Proceedings", Japan Institute of Electronics Packaging, p. 259-278

  There is no end to the demand for miniaturization and high functionality of portable devices. Accordingly, even SiP that is advantageous for miniaturization and high functionality of devices requires further miniaturization, thinning, and higher density. Has been. Here, the thickness in the height direction of the entire SiP is roughly determined by three factors, namely, the thickness of the mounting substrate, the thickness of the chip to be mounted, and the thickness of the resin applied on the substrate. Therefore, in order to make the SiP thinner, it is important not only to reduce the thickness of the chip in the package, but also to reduce the thickness of the substrate on which the chip is mounted (such as an interposer).

  However, in the conventional SiP manufacturing method, as described above, since the chip mounting process is performed on the mounting substrate on which the through wiring is formed, the thickness of the mounting substrate is made thinner than the current state. In some cases, a mounting process is applied to the thin substrate and hence the reduced strength. For this reason, there is a possibility that the mounting substrate may be chipped or cracked during mounting of the chip or during handling during the other process.

The present invention has been made in view of the above circumstances, and used a mounting substrate such as SiP having a through-wiring without causing a problem such as chipping or cracking of the mounting substrate at the time of manufacturing a package. It is an object to provide a method for manufacturing a package that can advantageously reduce the thickness of packages such as electronic devices, optical devices, and MEMS devices.

  The method for manufacturing a package of the present invention includes a step of forming a wiring hole from one surface of the mounting substrate to the other surface, a step of filling the hole with a conductive material and forming a wiring, A step of mounting one or more devices in electrical connection with the wiring holes on the surface of the mounting substrate in which the holes filled with the conductive material are opened, and the devices of the mounting substrate A surface on which the device is mounted, a step of fixing a support plate as a part of the package to the mounting substrate, and a surface of the mounting substrate to which the support plate is fixed opposite to the surface on which the device is mounted And a step of reducing the thickness in the thickness direction.

  In the package manufacturing method of the present invention, it is preferable that the support plate is provided with a plurality of recesses, and is fixed to the mounting substrate so that the plurality of devices correspond to the recesses.

  Also, in the package manufacturing method of the present invention, an insulating layer is formed on the inner wall portion of the hole after the step of forming the hole for wiring and before the step of filling the conductive material to form the wiring. It is preferable to have the process to do.

      In the package manufacturing method of the present invention, it is preferable that the wiring hole formed in the mounting substrate is penetrated from one surface of the mounting substrate to the other surface by the thinning process.

  In the package manufacturing method of the present invention, a wiring hole is formed from one surface of the mounting substrate to the other surface, and a conductive material is filled in the hole to form a wiring. One or more devices are mounted on the surface of the mounting substrate where the holes filled with the material are opened, electrically connected to the wiring holes, and the devices of the mounting substrate are mounted. On the surface, a support plate that is a part of the package is fixed to the mounting substrate, and the mounting substrate to which the support plate is fixed is thinned in the thickness direction from the surface opposite to the surface on which the device is mounted. To do. Therefore, when a thin package is obtained, a device can be mounted with a thick substrate. In other words, there is no need to perform a device mounting process or the like on the thin substrate. Occurrence of a substrate defect can be avoided, and handling of the substrate becomes easy.

  Further, in the package manufacturing method of the present invention, the hole for wiring formed in the mounting substrate is penetrated from one surface of the mounting substrate to the other surface by the thinning process. It is not always necessary to form a through-hole during the operation of forming. Therefore, the time and labor for the hole forming operation can be reduced.

  Hereinafter, the present invention will be described more specifically with reference to the drawings.

Figure 1 schematically shows an example of the structure of a package that is more prepared to the invention in a sectional view. In the figure, reference numeral 11 in the figure is a mounting substrate, and for example, a silicon substrate can be used. In the mounting substrate 11, a plurality of through wirings 14 penetrating both main surfaces are formed in a state insulated from the mounting substrate by the insulating layer 13. Further, circuit wiring 15 electrically connected to the through wiring 14 is formed on the mounting substrate 11. A plurality of chips 16 a, 16 b and 16 c are mounted on the substrate 11 so as to be electrically connected to the through wiring 14 via the circuit wiring 15. These chips 16a, 16b and 16c and the circuit wiring 15 are connected by solder bumps 17. With this structure, the electrical wiring from the chips 16a, 16b and 16c can be drawn out to the surface of the substrate 11 opposite to the chip mounting surface. Further, the circuit wiring 15 can serve as a so-called interposer for converting the wiring pitch of the chip to be mounted into the pitch of the through wiring.

In the package shown in FIG. 1, on the surface of the mounting substrate 11 on which the chip is mounted, the thinning support plate 18 is fixed by, for example, adhesion. The support plate 18 is fixed to the mounting substrate 11 and plays a role of supporting the substrate 11 during the thinning process of the mounting substrate 11 performed after mounting the chips 16a, 16b and 16c on the mounting substrate 11. It can serve to protect the chip as part of the package. The support plate 18 is formed with a recess that is preferably sized to accommodate the chips 16a, 16b, and 16c. The support plate 18 is attached to the mounting substrate 11 so as to receive the chip. It can be avoided that the plate 18 physically interferes with the mounted chips 16a, 16b and 16c.

The package shown in FIG. 1 provided with the support plate as described above is less likely to be chipped or cracked during processing even if the mounting substrate is thinned. In addition, since the thinning process is performed after the chip is mounted on the substrate, there is no need to mount the chip on the thinned substrate as in the prior art. There is no risk of chipping or cracking. Since the mounting substrate can be sufficiently thinned without fear of cracking and chipping, the entire package can be made thinner than before even if a support plate is provided.

Next, an example of a method of manufacturing the package according to this invention will be described in detail in the order of steps with reference to the accompanying drawings. FIG. 2 is a schematic cross-sectional view for explaining the package manufacturing method according to the present invention in the order of steps.

  First, as shown in FIG. 2A, a silicon substrate 21 was prepared as a mounting substrate. Note that the material of the substrate is not limited to the silicon substrate, and other semiconductor substrates such as gallium arsenide (GaAs), and insulating substrates such as glass and ceramics can also be used. In short, any substrate can be used as long as it can be thinned in a later process.

  A non-through hole 22 is formed in the silicon substrate 21. The diameter of the non-through hole is appropriately set according to the thickness of the substrate and a desired application, and can be determined as appropriate according to the desired wiring. Moreover, the hole shape in the cross section perpendicular to the depth direction of the non-through hole 22 may be any shape such as a circle including an ellipse, a triangle, a rectangle including a rectangle, or a polygon. For example, a deep-reactive ion etching (DRIE) method can be used to form the non-through hole 22. In this DRIE method, sulfur hexafluoride (SF6) is used as an etching gas, and etching with high-density plasma and passivation film formation on a sidewall are alternately performed (Bosch process) to deep-etch the silicon substrate. Is. The present invention is not limited to this DRIE method. In the present invention, for example, a wet etching method using a potassium hydroxide (KOH) aqueous solution or the like, a machining method using a micro drill, a photoexcited electrolytic polishing method, or the like can be used. Further, not only the non-through hole 22 but also a hole penetrating from one surface of the silicon substrate 21 to the other surface may be formed.

Next, as shown in FIG. 2B, an insulating layer 23 is formed on the surface of the silicon substrate 21 and the hole walls of the non-through holes 22. As this insulating layer 23, for example, silicon oxide (SiO ₂ ) can be used. When the substrate is the silicon substrate 21, the silicon oxide insulating layer can be formed by thermal oxidation, which is advantageous. Note that the method of forming the insulating layer 23 is not limited to the thermal oxidation method, and may be formed by, for example, a plasma CVD method using silane (SiH ₄ ) or tetraethoxysilane (TEOS). it can. The insulating layer 23 may have any thickness as long as it has a sufficient withstand voltage. Furthermore, the insulating layer 23 may not be the above-described silicon oxide, and may be another insulating material such as silicon nitride or insulating resin.

  Next, as shown in FIG. 2C, the conductive material 24 is filled into the internal space of the non-through hole 22. As the conductive material 24, for example, gold tin (Au: 80 mass% -Sn: 20 mass%) can be used. The conductive material 24 is not limited to gold tin having the above-described component composition, but is a gold-tin alloy having a different composition, a metal material such as tin (Sn), indium (In), or tin lead. Alloy solders such as (Sn—Pb) series, tin (Sn) group, lead (Pb) group, gold (Au) group, indium (In) group, aluminum (Al) group can be used. In addition, as a method for filling the non-through holes with the conductive material, for example, a molten metal suction method can be used. However, the manufacturing method of the present invention is not limited to such a molten metal suction method. Filling with (Cu) or nickel (Ni), filling with a copper (Cu) paste or silver (Ag) paste by a printing method, or the like can be applied.

  Next, as shown in FIG. 2D, circuit wiring 25 is formed on the surface of the silicon substrate 21 where the non-through holes 22 are opened. The circuit wiring 25 is formed so as to be electrically connected to the conductive material 24 filled in the non-through hole 22.

  Such a circuit wiring preferably has a multilayer structure of two or more layers because it can function as a barrier layer of a conductive material constituting the through wiring. For example, a metal thin film composed of three layers of Au / Ni / Cr can be used, and a multilayer film with the Cr layer as the through wiring side can be used, and this multilayer film can diffuse Sn components used as the through wiring. It becomes possible to prevent. Of course, the circuit wiring of the present invention is not limited to the three-layered Au / Ni / Cr shown in this embodiment, but is formed by a metal thin film made of another material, paste application, or the like. The conductor layer thus formed can be used for the circuit wiring 25.

  Next, as shown in FIG. 2E, the chip 26 is mounted using solder bumps 27 so as to be electrically connected to the circuit wiring 25. The mounting method of the chip 26 is not limited to the method using the solder bumps 27, and electrical connection can also be established using other connection methods such as wire bonding. The chip used in the present invention can be a chip such as an electronic device, an optical device, or a MEMS device, and is not particularly limited.

  Next, as shown in FIG. 2 (f), a support plate 28 is fixed to the surface on which the chip 26 is mounted on the silicon substrate 21. For example, glass can be used for the support plate 28 as a material. However, in the present invention, the support plate is not limited to a glass substrate, and when the substrate 21 is thinned, such as a silicon substrate or a ceramic substrate. Any material that can support the substrate 21 may be used.

  In addition, as a method of fixing the support plate 28 to the silicon substrate 21, there is a method of attaching the support plate 28 to the silicon substrate 21 using an adhesive insulating resin. In the present invention, the bonding using the insulating resin is used. The fixing method is not limited to the above, and any fixing method may be used as long as it can firmly fix the substrate and the support plate, such as anodic bonding, room-temperature bonding, or adhesion using solder or low-melting glass.

  Further, the pasted support plate preferably has a recess corresponding to the device (chip) mounted on the mounting substrate, so that the chip can be accommodated in this recess while avoiding physical interference with the chip. As already mentioned. In addition, depending on the device, it is preferable to fix the concave portion accommodating the chip so as to be airtight.

  Next, as shown in FIG. 2 (g), the upper surface of the support plate 28 is fixed to a jig 210 of a polishing apparatus (not shown) and polished from the lower surface of the silicon substrate 21, whereby the silicon substrate 21, that is, the mounting substrate (interposer). ). Further, by this polishing process, the non-through hole 22 filled with the conductive material 24 is penetrated to the lower surface of the substrate 21, and electrical wiring from the chip 26a, 26b or 26c mounted on one surface of the mounting substrate is performed. Can be pulled out to the other surface. That is, in the present invention, the through-hole forming process for the through wiring, which takes time and cost (see FIG. 2A), is limited to a depth through which the hole penetrates by the subsequent thinning process, that is, the non-through hole is formed. By forming it, it becomes possible to significantly reduce the processing time and cost of the hole forming step for the through wiring. From this point of view, it is desirable to form non-through holes in the through-hole forming step shown in FIG. 2A, but through-holes may be formed in this step. . Further, as the means for thinning treatment, the above-described polishing treatment is advantageous because the thinning speed is high, but in the present invention, thinning treatment other than polishing may be performed. Note that the thickness of the silicon substrate after the thinning process can be set to, for example, about 150 μm. However, in the present invention, the thickness of the entire package, heat dissipation from the chip, and the like are considered as appropriate. The size after thinning can be set.

Next, as shown in FIG. 2H, an insulating layer 230 is formed on the lower surface of the silicon substrate 21. Further, the insulating layer 230 is removed only at a portion corresponding to the opening on the lower surface of the through wiring 24, and a pad 250 made of metal or the like is formed. For example, as the insulating layer 211, a SiO2 layer was formed by plasma CVD. The insulating layer 230 is not limited to silicon oxide (SiO ₂ ), and other insulating materials such as silicon nitride and resin can be applied.

  In accordance with the manufacturing method of the package of the present invention described above, a non-through hole having a diameter of about 50 μm and a depth of about 200 μm is formed on a silicon substrate having a thickness of about 500 μm by using the DRIE method, and then formed from silicon oxide by a thermal oxidation method. After forming an insulating layer with a thickness of about 1 μm, the non-through holes were filled with gold tin (Au: 80 mass% -Sn: 20 mass%) by a molten metal suction method. Next, circuit wiring of a metal thin film composed of three layers of Au / Ni / Cr is formed, and then the chip is mounted using solder bumps, and then a support plate made of glass having a thickness of 300 μm is formed using insulating resin. Affixed to a silicon substrate. Next, the silicon substrate 21 was thinned from an initial thickness of 500 μm to 150 μm by first mechanically grinding the silicon substrate and then performing a polishing process. Thus, the package can be thinned.

The package manufactured by the manufacturing method of the present invention can be variously modified. For example, as shown in FIG. 5, a rewiring layer 51, a solder bump 52, an insulating resin layer 53, and the like can be formed on the back surface of the silicon substrate 11 as necessary. Also, a functional element 54 such as a resistor or a capacitor can be formed inside the silicon substrate. In this manner, by forming a functional element on the mounting substrate, a package with higher functionality can be provided.

  Furthermore, as shown in FIG. 6A, a support plate 61 having light transmissivity such as glass can be used as the support plate. By using a material having at least a part light-transmitting properties for the support plate in this way, a package in which a light receiving device 62 such as a photodiode or an image sensor or a light emitting device 63 such as a laser as shown in FIG. 6B is mounted. Can also be formed.

It is a cross-sectional schematic diagram explaining an example of the package manufactured with the manufacturing method of the package of this invention. It is a cross-sectional schematic diagram explaining an example of the manufacturing method of the package of this invention. It is a cross-sectional schematic diagram explaining the conventional package. It is a cross-sectional schematic diagram explaining the manufacturing method of the conventional package. It is a cross-sectional schematic diagram which shows the other example of the package manufactured with the manufacturing method of the package of this invention. It is a cross-sectional schematic diagram which shows the other example of the package manufactured with the manufacturing method of the package of this invention.

Explanation of symbols

11 Mounting board 14 Through wiring 16a, 16b, 16c Chip 18 Support plate

Claims (4)

Forming a wiring hole from one surface of the mounting substrate to the other surface;
Filling the hole with a conductive material to form a wiring;
A step of mounting one or more devices in electrical connection with the holes for wiring on the surface of the mounting substrate in which the holes filled with the conductive material are opened; and
A step of fixing a support plate, which is a part of the package, to the mounting substrate on the surface on which the device of the mounting substrate is mounted;
A process of thinning the mounting substrate to which the support plate is fixed in the thickness direction from the surface opposite to the surface on which the device is mounted;
A method for manufacturing a package, comprising: The package manufacturing method according to claim 1 , wherein the support plate is provided with a plurality of recesses, and the plurality of the devices and the recesses are fixed to the mounting substrate. 2. The method according to claim 1 , further comprising a step of forming an insulating layer on an inner wall portion of the hole after the step of forming the hole for wiring and before the step of forming the wiring by filling the conductive material. A manufacturing method of the package according to 1 or 2 . The said hole for wiring formed in the mounting board | substrate is penetrated from the one surface of a mounting board | substrate to the other surface by the said thinning process, The any one of Claims 1-3 characterized by the above-mentioned. Package manufacturing method.

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