JP3879234B2 - Ghost removal circuit - Google Patents

Description

[0001]
BACKGROUND OF THE INVENTION
The present invention relates to a ghost removal circuit used in a data receiving circuit for VBI data broadcast of a television video signal.
[0002]
[Prior art]
Waveform equalization is used as the ghost removal circuit in the VBI data receiving circuit (reference document: TV Society Vol. 45. No. 5.1991 P581 to P583).
[0003]
FIG. 16 shows a conventional example of the ghost elimination circuit of the VBI data receiving circuit.
[0004]
In this figure, 1 is a video signal input terminal, 2 is an AD conversion circuit, 3 is a synchronization separation circuit, 104 transversal filter (hereinafter referred to as TF), 105 records an AD converted digital video signal and stores the data in the CPU. An input register 107 to output, an output register 107 for recording a digital video signal after waveform equalization and outputting data to the CPU 108, and a tap 108 for fetching data in the input register 165 and the output register 107 and setting them in the tap register 106 by software processing A CPU 106 for calculating a value is a tap register for recording a tap value calculated by the CPU, and waveform equalization (ghost removal) is performed by the TF 104 based on this value, which is output from the VBI data output terminal.
[0005]
The CPU 108 performs a correlation operation between the error value detected from the value of the input register 105 and the value of the output register 167 by an algorithm such as a least square error method (MSE), and corrects the tap value based on the result. Calculated in this way
The tap value is written in the tap register 106, and waveform equalization (ghost removal) is performed in the TF 104.
[0006]
In Japanese character multiplex broadcasting and the like, waveform equalization is performed, sampling to the transmission rate of the VBI data and binarization are performed, and further error correction is performed to reproduce the data.
[0007]
[Problems to be solved by the invention]
In the conventional example, the CPU is required because the CPU optimizes the tap value by the MSE method by software processing, and in the hardware, a TF having 10 taps or more is necessary, and the coefficient is controlled. However, there is a problem that the cost of the system becomes high.
[0008]
[Means for Solving the Problems]
First As the invention of VBI data Clock run in From the waveform of, it is hard to determine whether the ghost is a proximity ghost, only when it is determined as a proximity ghost, Clock run in The ghost amount is estimated by hardware from the waveform moved back and forth from the current waveform of, and the ghost is removed. However, since it is difficult to easily distinguish between the front ghost and the rear ghost, it is difficult to easily configure the front ghost and the rear ghost. Therefore, when the reception state is determined to be bad, the front ghost and the rear ghost are switched with a switch. Thus, a ghost elimination circuit for VBI data broadcasting is provided by a simpler and cheaper system than before.
[0009]
As a second invention, Clock run in When estimating the ghost amount from the waveform moved back and forth from the current waveform, the estimated accuracy can be increased by multiplying the waveform moved back and forth by 1/2 times, 1/4 times, etc. An increased estimated ghost generation circuit is provided.
[0010]
As a third invention, Clock run in When estimating the ghost amount from the waveform moved back and forth from the current waveform of Clock run in After subtracting the minimum value of 2 As in the case of the invention, for example, by multiplying by 1/2 times, 1/4 times, etc., the SIN wave (in the case where there is no ghost) Clock run in An estimated ghost generation circuit capable of performing ghost estimation with a waveform close to (no waveform) and having higher estimation accuracy is provided.
[0011]
DETAILED DESCRIPTION OF THE INVENTION
Embodiments of a ghost elimination circuit for VBI data broadcasting according to the present invention will be described below in detail with reference to the drawings.
[0012]
(Embodiment 1)
FIG. 1 is a block diagram of a ghost elimination circuit for VBI data broadcasting according to the first embodiment.
[0013]
In FIG. 1, 1 is a video signal input terminal, 2 is an AD converter circuit, 3 is a sync separator circuit, 4 is an output terminal of VBI data from which ghost has been removed, and 5 is a first delay circuit A for corresponding to the previous ghost. , 6 is a second delay circuit B for responding to a post-ghost, 7 is an input terminal for a delay circuit A and a signal for setting the delay amount of the delay circuit B, 8 is Clock run in The estimated ghost generation circuits A and 9 that estimate the ghost amount from the waveform and generate the estimated ghost waveform are a first subtraction circuit that subtracts the estimated ghost from the output of the AD conversion circuit to remove the previous ghost, and 10 is the rear ghost. The second subtractor circuit 11 subtracts the estimated ghost from the output of the delay circuit B in order to eliminate the pre-ghost and the post-ghost, which are hard to discriminate at the input terminal of the estimated ghost switching signal. The first switches A and 13 for switching between the waveform after the pre-ghost removal and the waveform after the post-ghost removal based on the estimated ghost switching signal are as follows. Clock run in A ghost discriminating circuit that discriminates whether or not the ghost is a proximity ghost based on the waveform of, and 14 is a second switch B that turns on / off ghost elimination according to the output of the ghost discriminating circuit 13.
.
[0014]
VBI data broadcasting uses digital data and a clock (synchronized with the data) based on the horizontal and vertical synchronization signals of the video signal. Clock run in ) Is standardized for each VBI data broadcast. Figure 10 shows Japanese text multiplex broadcasting. Clock run in The waveform is shown. In FIG. 10, T is from the horizontal synchronization signal. Clock run in CW is the distance to Clock run in Indicates the width. In the present invention, a counter that counts up with a sampling clock using a horizontal synchronization signal as a load is used to arbitrarily set T and CW to generate a clock gate signal. By adopting a configuration in which T and CW can be arbitrarily set, it is possible to cope with data extraction of various types of VBI data broadcasts.
[0015]
A problem in VBI data broadcasting is when a ghost appears in the video signal. Especially close Go The first influence greatly affects the reception performance of VBI data broadcasting. If it is not a close ghost, error correction and error detection of VBI data broadcasting Mistake It is less problematic than close ghost. FIG. 11 shows a waveform when a proximity ghost is added to the waveform. The waveform is such that the valley of the SIN wave does not fall.
[0016]
In the first embodiment, the characteristic of this waveform is used to determine whether or not it is a close ghost and to estimate the ghost amount with the magnitude of Δ in FIG. Δ is calculated when the clock gate signal is H ( Clock run in This is performed by subtracting the estimated ghost value from the MAX value in (part) (an example of calculation of the estimated ghost is described in the fifth embodiment). Whether or not it is a proximity ghost is determined not to be a proximity ghost if this Δ is large but to a proximity ghost if Δ is small, and at the same time, the ghost amount is detected by the size of Δ (for an example of ghost discrimination) 3 and 4).
[0017]
Furthermore, in the present invention, both front ghost and rear ghost are supported as proximity ghosts.
Therefore, a delay circuit A and a delay circuit B are provided.
[0018]
FIG. 12 is an explanatory diagram for removing the rear ghost, and FIG. 13 is an explanatory diagram for removing the front ghost.
[0019]
In FIG. 12, (a) is an input signal of delay circuit A when there is no ghost (A is Clock run in The amplitude of the part, τ Clock run in (C) is a waveform on which a ghost with an amplitude A / 2 delayed by τ / 2, for example, is added to (a), and (d) is a delay circuit A. (C) is obtained by delaying τ / 2, and (e) is obtained by subtracting the estimated ghost generated by the estimated ghost generation circuit A from (d) by the subtractor 9, and the waveform after the post-ghost is removed. It is.
[0020]
In FIG. 13, (a) is an input signal of delay circuit B when there is no ghost (A is Clock run in The amplitude of the part, τ Clock run in (C) is, for example, a waveform on which a ghost (b) with an amplitude A / 2 delayed by -τ / 2 is added to (a), and (d) is a delay circuit B. (C) is a delay of τ / 2, and (e) is the estimated ghost generated by the estimated ghost generation circuit A subtracted from (d) by the subtractor 10, and after the previous ghost is removed. It is a waveform. Here, the reception performance of the VBI data is improved by making the delay amount variable. Regarding this delay control, the error rate of VBI data is calculated (for example, the CPU calculates how many times error correction could not be performed in 100 fields), and an optimum value is set according to the result.
[0021]
In the switch A, the processing result of the front ghost and the back ghost is switched, and this also selects the most suitable one in the calculation of the error rate. The switch B selects the output of the delay circuit A that does not remove the ghost when it is determined by the ghost determination that it is not a proximity ghost, and selects the output of the switch A after the ghost processing when the proximity ghost is determined.
[0022]
The output signal of switch B is binarized and converted into 1-bit digital data of 1 and 0.
[0023]
(Embodiment 2)
FIG. 2 is a block diagram of a ghost removal circuit for VBI data broadcasting according to the second embodiment.
[0024]
In FIG. 2, 1 is a video signal input terminal, 2 is an AD converter circuit, 3 is a sync separator circuit, 4 is an output terminal for VBI data from which ghost has been removed, and 5 is a delay circuit A and 6 for corresponding to the previous ghost. Delay circuits B and 7 for dealing with a post-ghost are input terminals for delay circuits A and a signal for setting a delay amount of the delay circuit B, 8 Clock run in The estimated ghost generation circuits A and 9 that estimate the ghost amount from the waveform and generate the estimated ghost waveform are a first subtraction circuit that subtracts the estimated ghost from the output of the AD conversion circuit to remove the previous ghost, and 10 is the rear ghost. The second subtracting circuit 11 subtracts the estimated ghost from the output of the delay circuit B in order to eliminate the pre-ghost and the post-ghost, which are hard to discriminate at the input terminal of the estimated ghost switching signal. The switches A and 13 for switching between the waveform after removing the previous ghost and the waveform after removing the subsequent ghost based on the estimated ghost switching signal, Clock run in A ghost discriminating circuit for discriminating whether or not the ghost is a proximity ghost based on the waveform of, a switch B for turning on / off ghost elimination according to an output of the ghost discriminating circuit 13, and an output of the switch B from a DC value input terminal 16 This is a DC control circuit for controlling the DC level of VBI data after adding / subtracting input values and removing ghost.
[0025]
Since the basic operation excluding the DC control circuit is the same as that of the first embodiment, it is omitted. In the second embodiment, DC control is performed on the VBI data output after ghost removal so as to further improve the reception performance of the VBI data broadcast compared to the first embodiment, and binarization processing is performed at an optimum level.
[0026]
Proximity ghost Clock run in Since the signal of the part has no valley in the waveform, the performance can be improved by increasing the threshold level in optimizing the binarization of the VBI data. In the second embodiment, instead of raising the threshold value, the DC value is lowered and binarized with the same threshold value, thereby simplifying the control.
[0027]
(Embodiment 3)
FIG. 3 is a block diagram of a ghost discrimination circuit according to the third embodiment.
[0028]
In FIG. 3, 17 is a digital video signal input terminal for inputting the output of the delay circuit A5, 18 is a horizontal synchronization signal input terminal for inputting the horizontal synchronization signal of the output of the synchronization separation 3, and 19 is a time for generating a clock part extraction gate signal. In addition, as described in the first embodiment, a gate control signal input terminal for enabling the gate position to be adjusted so as to be compatible with various VBI data broadcasts, and 20 is a clock extraction gate based on the gate control signal from the horizontal synchronization signal A clock part extraction gate signal generation circuit for generating a signal, 21 is a MIN detection circuit for detecting a minimum value during the gate period of the clock part extraction gate signal (corresponding to a period in which the clock gate signal in FIGS. 10 and 11 is at H level). , 22 is a circuit for calculating the absolute value of the minimum value detected by the MIN circuit, and 23 is the calculated absolute value. Comparator A, 24 for comparing the value input from 較器 A control signal input terminal 25 is a ghost determination signal output terminal.
[0029]
In the third embodiment, when the MIN value is larger than the value input from the comparator A control signal input terminal 25 from the waveform of FIG.
[0030]
(Embodiment 4)
FIG. 4 is a block diagram of a ghost discrimination circuit according to the fourth embodiment.
[0031]
In FIG. 4, 17 is a digital video signal input terminal for inputting the output of the delay circuit A5, 18 is a horizontal synchronization signal input terminal for inputting the horizontal synchronization signal of the output of the synchronization separation 3, and 19 is a time for generating a clock part extraction gate signal. And described in the first embodiment.
A gate control signal input terminal for enabling the gate position to be adjusted so as to be compatible with various VBI data broadcasts, and 20 is a clock part extraction gate signal for generating a clock extraction gate signal based on the gate control signal from the horizontal synchronization signal. The generation circuit 21 is a MIN detection circuit that detects the minimum value during the gate period of the clock part extraction gate signal (corresponding to the period when the clock gate signal in FIGS. 11 and 10 is H level), and 26 is the clock part extraction gate signal. A MAX detection circuit that detects the maximum value during the gate period (corresponding to the period when the clock gate signal in FIGS. 10 and 11 is at the H level), and 27 is a subtraction circuit that subtracts the output of the MIN detection circuit from the output of the MAX detection circuit 26 , 22 is a circuit for calculating an absolute value of the output value of the subtraction circuit 27, and 23 is a calculated absolute value and a comparator. Comparator A, 24 for comparing the value inputted from the control signal input terminal 25 is a ghost determination signal output terminal.
[0032]
In the fourth embodiment, when the | MAX−MIN | value is smaller than the value input from the comparator A control signal input terminal 25 from the waveform of FIG.
[0033]
(Embodiment 5)
FIG. 5 is a block diagram of an estimated ghost generation circuit according to the fifth embodiment.
In FIG. 5, 28 is a digital video input terminal for inputting the output of the delay circuit A5, 29 is a clock part extraction gate signal input terminal, and 30 is a gate period of the clock part extraction gate signal (the clock gate signal of FIGS. A MIN detection circuit 31 for detecting a minimum value (corresponding to an H level period) is an estimated ghost value output terminal.
[0034]
Comparing FIG. 11 and FIG. 10, the estimated ghost value can be estimated to be approximately the MIN value. In the fifth embodiment, the estimated ghost can be generated with simple hardware by using the estimated ghost value detecting circuit as the MIN detecting circuit.
[0035]
(Embodiment 6)
FIG. 6 is a block diagram of a ghost elimination circuit for VBI data broadcasting according to the sixth embodiment.
FIG.
[0036]
In FIG. 6, 1 is a video signal input terminal, 2 is an AD conversion circuit, 3 is a sync separation circuit, 4 is an output terminal of VBI data from which ghost has been removed, and 5 is a delay circuit A, 6 for corresponding to the previous ghost. Delay circuits B and 7 for dealing with a post-ghost are input terminals for delay circuits A and a signal for setting a delay amount of the delay circuit B, 32 Clock run in The estimated ghost generation circuits B and 33 for estimating the ghost amount by hardware from the waveform moved forward and backward from the current waveform and removing the ghost are estimated from the output of the delay circuit A5 in order to remove the ghost from the output of the delay circuit A5. Output of ghost generation circuit B Decrease Subtracting circuit 13 for calculating Clock run in A ghost discriminating circuit for discriminating whether or not the ghost is a proximity ghost based on the waveform of, and a switch B for turning on / off ghost elimination according to the output of the ghost discriminating circuit 13.
[0037]
The output of the switch B is binarized and converted into 1-bit digital data. In Example 6 only when it is determined as a proximity ghost, Clock run in The configuration is such that the ghost amount is hard-estimated from the waveform moved forward and backward from the current waveform and the ghost is removed (an example of ghost generation is described in Embodiments 8 and 9).
[0038]
In the sixth embodiment, similarly to the first embodiment, the delay circuit A and the delay circuit B are provided to deal with both the front ghost and the rear ghost as the proximity ghost.
[0039]
FIG. 14 is an explanatory diagram for removing the rear ghost, and FIG. 15 is an explanatory diagram for removing the front ghost.
[0040]
In FIG. 14, (a) is an input signal of delay circuit B when there is no ghost (A is Clock run in The amplitude of the part, τ Clock run in (C) is a waveform on which a ghost obtained by adding a ghost (b) of amplitude A / 2 delayed by τ / 2 to (a), for example, and (d) is a delay circuit. A (C) is delayed by τ / 2, and (e) is an estimated ghost waveform generated from the output signal of the delay circuit B by the estimated ghost generation circuit B (in FIG. 14, the amplitude of (d) is shown). (E) is used as the estimated ghost), and (e) is subtracted by the subtractor 33 ( c ) Is a waveform (f) after the post-ghost is removed.
[0041]
In FIG. 15, (a) is an input signal of delay circuit A when there is no ghost (A is Clock run in The amplitude of the part, τ Clock run in (C) is a waveform with a ghost obtained by adding a ghost (b) of amplitude A / 2 delayed by -τ / 2 to (a), for example (d) is a delay circuit A. (C) is delayed by τ / 2, and (e) is an estimated ghost waveform generated from the input signal of the delay circuit A by the estimated ghost generation circuit B (in FIG. 15, the amplitude of (d) is shown). The waveform obtained by subtracting (e) from (d) by the subtractor 33 is the waveform (f) after removal of the previous ghost.
[0042]
In Example 6, as in Example 1. Clock run in Compared to the generation of one estimated ghost in the first section, the estimated ghost is generated based on the signal from the delay circuit A in the previous ghost and the output from the delay circuit B in the subsequent ghost. The reception performance of VBI data can be improved from that of the first embodiment.
[0043]
(Embodiment 7)
FIG. 7 is a block diagram of a ghost removal circuit for VBI data broadcasting according to the seventh embodiment.
[0044]
In FIG. 7, 1 is a video signal input terminal, 2 is an AD conversion circuit, 3 is a sync separation circuit, 4 is an output terminal for VBI data from which ghost has been removed, and 5 is a delay circuit A, 6 for corresponding to the previous ghost. Delay circuits B and 7 for dealing with a post-ghost are input terminals for delay circuits A and a signal for setting a delay amount of the delay circuit B, 32 Clock run in The estimated ghost generation circuits B and 33 for estimating the ghost amount by hardware from the waveform moved forward and backward from the current waveform and removing the ghost are estimated from the output of the delay circuit A5 to remove the ghost from the output of the delay circuit A5. Output of ghost generation circuit B Decrease Subtracting circuit 13 for calculating Clock run in A ghost discriminating circuit for discriminating whether or not the ghost is a proximity ghost based on the waveform of, a switch B for turning on / off ghost elimination according to an output of the ghost discriminating circuit 13, and an output of the switch B from a DC value input terminal 16 This is a DC control circuit for controlling the DC level of VBI data after adding / subtracting input values and removing ghost.
[0045]
The seventh embodiment is exactly the same as the sixth embodiment except for the DC control. However, in order to optimize the binarization level, the DC control is added to the sixth embodiment to improve the VBI data broadcast reception performance. Yes.
[0046]
As in the second embodiment, the seventh embodiment is characterized in that the DC value can be lowered and binarized with the same threshold value.
[0047]
(Embodiment 8)
FIG. 8 is a block diagram of an estimated ghost generation circuit B according to the eighth embodiment.
In FIG. 8, 35 is a digital video signal input terminal A for inputting the output of the AD converter circuit, 36 is a digital video signal input terminal B for inputting the output signal of the delay circuit B, and 38 is a signal from the digital video signal input terminal A. Multipliers A and 39 for multiplying the signal from the digital video signal input terminal B by, for example, 1/2 times, 1/4 times, etc. , 34 is a multiplier control signal input terminal for setting a multiplication coefficient for the multiplier A and the multiplier B, and 40 is a switch for switching the output of the multiplier A and the output of the multiplier B with a signal from the ghost switching control signal input terminal 37. , 41 are estimated ghost output terminals.
[0048]
In the eighth embodiment, when generating the estimated ghost, not only the position (delay amount) but also the amplitude is controlled. Guess The reception performance of VBI data broadcasting can be improved by increasing the certain accuracy.
[0049]
(Embodiment 9)
FIG. 9 is a block diagram of an estimated ghost generation circuit B according to the ninth embodiment.
[0050]
In FIG. 9, reference numeral 35 denotes a digital video signal input terminal A for inputting the output of the AD conversion circuit, 36 denotes a digital video signal input terminal B for inputting the output signal of the delay circuit B, and 42 denotes an output signal of the delay circuit A. Digital video input terminals C and 43 detect clock part extraction gate signal input terminals, and 44 detects a minimum value during the gate part of the clock part extraction gate signal (corresponding to the period when the clock gate signal in FIGS. 10 and 11 is at the H level). MIN detection circuit 45 for detecting a first subtractor 45 for subtracting the minimum value detected by the MIN detection circuit 44 from the digital video signal input terminal A, 46 for detection by the MIN detection circuit 44 from the digital video signal input terminal A A second subtractor 38 for subtracting the minimum value, and a multiplier A 3 for multiplying the output of the first subtracter by, for example, 1/2 times, 1/4 times, etc. Is a multiplier B that multiplies the output of the second subtractor by, for example, ½ times, ¼ times, etc., and 34 is a multiplier control signal input terminal for setting a multiplication coefficient in the multiplier A and the multiplier B. A switch 40 switches the output of the multiplier A and the output of the multiplier B with a signal from the ghost switching control signal input terminal 37, and 41 is an estimated ghost output terminal.
[0051]
In Example 9, compared to Example 8, Clock run in When estimating the ghost amount from the waveform moved back and forth from the current waveform of Clock run in After subtracting the minimum value of, and multiplying by, for example, 1/2 times, 1/4 times, etc., as in the eighth invention, ghost estimation can be performed with a waveform that is closer to the actual, so that the estimation accuracy can be further increased. Can do.
[0052]
In this example, basically Clock run in Section (corresponding to a period in which the clock gate signal in FIGS. 10 and 11 is at the H level) operates by calculating the maximum value and the minimum value. In this method, false detection due to noise is basically a problem, but as a countermeasure, the noise amount is stopped at the pedestal part of the video signal, or the noise is removed.
There is no problem if the detection at the line-in portion is performed at, for example, two or more points and the average value is taken.
[0053]
In this embodiment, the target is basically a proximity ghost (including a front ghost and a rear ghost), and the delay and the amplitude setting when generating the estimated ghost can be correlated to some extent. For example, the amplitude is increased when the delay amount is small, and the amplitude is decreased when the delay amount is large. Further, in the present invention, in order to reduce the hardware scale, the determination of the front ghost and the back ghost and the setting of the delay amount are performed by calculating the error rate. However, after the pre-ghost processing and the post-ghost processing Clock run in | MAX value−MIN value | of each part is calculated, and this value is calculated for several types of delay amounts at the same time. Among these, the delay amount and the ghost before / after that | MAX value−MIN value | This system configuration can be configured with only hardware.
[0054]
One reason for targeting proximity ghosts is that, for example, in Japanese text multiplex broadcasting, ghosts with a large delay amount are effective in error correction, and ghost elimination systems for video signals have ghosts with a large delay amount. Although it can be removed, it is not very effective for proximity ghosts that are problematic in teletext broadcasting. For example, in combination with this embodiment, that is, if the ghost-removed signal for video signals is input to the circuit of this embodiment, This is because there is a possibility of improving the performance.
[0055]
【The invention's effect】
According to the data broadcasting ghost elimination circuit for VBI data broadcasting according to the present invention, it can be configured simply and inexpensively as compared with a conventional CPU software processing and hardware system. If this system is applied and this system is configured in two stages, it can be used for ghost removal of two waves, and if the number of stages is increased, it can be used to remove ghosts of multiple waves. In addition, since the phase of the clock extraction gate signal can be made variable, it can be applied not only to Japanese text multiplex broadcasting but also to closed captions and North American NABTS.
[Brief description of the drawings]
FIG. 1 is a block diagram of a ghost removal circuit for VBI data broadcasting in a first embodiment of the present invention.
FIG. 2 is a block diagram of a ghost removing circuit for VBI data broadcasting in a second embodiment of the present invention.
FIG. 3 is a block diagram of a ghost discrimination circuit according to a third embodiment of the present invention.
FIG. 4 is a block diagram of a ghost discrimination circuit in a fourth embodiment of the present invention.
FIG. 5 is a block diagram of an estimated ghost generation circuit according to a fifth embodiment of the present invention.
FIG. 6 is a block diagram of a ghost removing circuit for VBI data broadcasting in a sixth embodiment of the present invention.
FIG. 7 is a block diagram of a ghost elimination circuit for VBI data broadcasting in a seventh embodiment of the present invention.
FIG. 8 is a block diagram of an estimated ghost generation circuit according to an eighth embodiment of the present invention.
FIG. 9 is a block diagram of an estimated ghost generation circuit according to a ninth embodiment of the present invention.
FIG. 10 is an explanatory diagram of a clock gate signal.
FIG. 11 is a diagram showing an example of a proximity ghost
FIG. 12 is an explanatory diagram of post-ghost removal operation according to the first embodiment of the present invention.
FIG. 13 is an explanatory diagram of the operation for removing the previous ghost according to the first aspect of the present invention.
FIG. 14 is an explanatory diagram of post-ghost removal operation according to the sixth embodiment of the present invention.
FIG. 15 is an explanatory diagram of the operation for removing the previous ghost according to the sixth aspect of the present invention.
FIG. 16 is a block diagram of a conventional ghost removal circuit for VBI data broadcasting.
[Explanation of symbols]
1 Video signal input terminal
2 AD converter
3 Sync separation circuit
4 VBI data output terminal
5 Delay circuit A
6 Delay circuit B
7 Delay control input terminal
8 Estimated ghost generation circuit A
9 Subtractor
10 Subtractor
11 Estimated ghost switching signal input terminal
12 Switch A
13 Ghost discrimination circuit
14 Switch B
15 DC control circuit
16 DC value input terminal
17 Digital video signal input terminal
18 Horizontal sync signal input terminal
19 Gate control signal input terminal
20 Clock part extraction gate signal generation circuit
21 MIN detection circuit
22 ABS circuit
23 Comparator A
24 Ghost discrimination signal output terminal
25 Comparator A control signal input terminal
26 MAX detection circuit
27 Subtractor
28 Digital video signal input terminal
29 Clock Part Extraction Gate Signal Generation Circuit
30 MIN detection circuit
31 Estimated ghost output terminal
32 Estimated ghost generation circuit B
33 Subtractor
34 Multiplier control signal input terminal
35 Digital video signal input terminal A
36 Digital video signal input terminal B
37 Ghost switching control signal input terminal
38 Multiplier A
39 Multiplier B
40 switches
41 Estimated ghost output terminal
42 Digital video signal input terminal C
43 Clock extraction gate signal input terminal
44 MIN detection circuit
45 Subtractor
46 Subtractor
104 Transversal filter
105 Input register
106 Tap register
107 Output register
108 CPU

Claims (3)

First delay means for delaying an input video signal ;
A second delay means for cast delayed output of said first delay means,
Estimated ghost generating means for estimating a ghost of the input video signal from the input video signal and the output of the second delay means ;
A first subtraction means for subtracting an output of the estimated ghost generating means from an output of said first delay means,
A sync separation means for separating a synchronizing signal from the input movies image signal,
A ghost determining means for determining whether or not a ghost from the output of said first delay means and the synchronization signal generated by the synchronization separation,
A first switch that outputs the output of the first subtracting means when the ghost determining means determines that there is a ghost, and outputs the output of the first delay means when it is determined that there is no ghost. a Gore-paste removal circuit,
The ghost determination means is
MIN detecting means for detecting a minimum value during the gate period of the clock part sampling gate signal of the output of the first delay means;
MAX detection means for detecting a maximum value during the gate period of the clock part sampling gate signal of the output of the first delay means;
A second subtracting means for subtracting and outputting the maximum value detected by the MAX detecting means and the minimum value detected by the MIN detecting means;
A ghost removal circuit characterized in that a ghost is determined to be present when the output of the second subtracting means is smaller than a predetermined value. The estimated ghost generation means includes :
First multiplication means for multiplying the input video signal according to a value input from a multiplication means control signal input terminal ;
Second multiplication means for multiplying the output of the second delay means in accordance with a value input from a multiplication means control signal input terminal ;
A second switch for switching according to the value of the output is input from the ghost switching control signal input terminal of the output and the second multiplication means of the first multiplying means,
Gore paste removal circuit according to claim 1, comprising the. The estimated ghost generation means includes:
MIN detecting means for detecting the minimum value of the clock part sampling gate signal period among the outputs of the first delay means ;
Third subtracting means for subtracting the minimum value detected by the MIN detecting means from the input video signal ;
A first multiplying means for multiplying in response to the value entered from the multiplying unit control signal input terminal to an output of said third subtracting means,
A fourth subtracting means for subtracting the minimum value detected by the MIN detection unit from an output of the second delay means,
A second multiplier means for multiplying in response to the value entered from the multiplying unit control signal input terminal to an output of said fourth subtracting means,
A second switch for switching according to the value of the output is input from the ghost switching control signal input terminal of the output and the second multiplication means of the first multiplying means,
Gore paste removal circuit according to claim 1, comprising the.

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