JP3841910B2 - Method for manufacturing semiconductor device - Google Patents

Description

【０１１３】
即ち、実効溶融領域でレーザーアニールを行っている時間の積算値が処理時間となる。例えば、本実施例によるレーザーアニールは半値幅が30〜40nsecであり、スレッシュホールド幅( 実効溶融領域で照射している時間) は10〜20nsecとなっている。
【０１１４】
また、横幅0.9mm の線状レーザーを走査速度2.4mm/s で重ね合わせつつ走査するため、単位面積あたり約１５回（上述に数１においてｍ＝１５となる）のレーザーパルス照射を行うことになる。従って、本実施例において実効溶融領域によるレーザー照射時間は150 〜300nsec となっている。
【０１１５】
なお、レーザーパルスの周波数を上げたり、走査速度を遅くすることで単位面積あたりの照射回数を増やし、適宜実効溶融領域でのレーザー照射時間を調節することが可能である。
【０１１６】
以上の様にしてレーザーアニールを行うことで、図２（Ｂ）に示すような結晶性珪素膜２０４を得ることができる。この結晶性珪素膜２０４は、精密な制御を施されたレーザーアニールにより形成されるものであるため、極めて均一性、再現性に優れている。
【０１１７】
なお、均一性に優れるとは最終的にアクティブマトリクス型の電気光学装置を構成した場合に表示ムラや縞模様が発生しないレベルまたはロット毎の特性ばらつきが実用上問題とならないレベルとなっていることを意味している。
【０１１８】
また、結晶性珪素膜２０４の内部のＣ元素やＮ元素はレーザーアニールを行う際に徹底的に排除されているので、その界面付近濃度は２×１０¹⁹ｃｍ^-3以下、バルク内濃度は５×１０¹⁸ｃｍ^-3以下となっている。
【０１１９】
この濃度はＳＩＭＳ分析（二次イオン質量分析）の最小値でもって求められる値である。また、ここでいうバルクとは界面付近以外の膜の内部を指す。
【０１２０】
次に得られた結晶性珪素膜２０４に対してパターニングを行い、薄膜トランジスタの活性層となる島状半導体層２０５を形成する。（図２（Ｃ））
【０１２１】
なお、本実施例では、レーザーアニールを行った後に活性層を形成する例を示すが、活性層を形成した後にレーザー光の照射を行ってもよい。
【０１２２】
この場合、微小な面積に対するアニールとなるので、所定の効果を得るために必要とされるレーザー光の出力を下げることができる。即ち、レーザー出力のマージンに余裕を持たせることでばらつきを抑制することができる。
【０１２３】
活性層（島状半導体層）２０５を得たら、活性層２０５を覆ってゲイト絶縁膜２０６として機能する酸化珪素膜を成膜する。ここではゲイト絶縁膜２０６として、プラズマＣＶＤ法によって1000Å厚の酸化珪素膜を成膜するが、窒化珪素膜やＳｉＯ_X Ｎ_Y で示される酸化窒化珪素膜であっても良い。
【０１２４】
次にゲイト電極を構成するための図示しないアルミニウム膜を3000Åの厚さに成膜する。このアルミニウム膜中には、後の工程においてヒロックやウィスカーの発生を抑制する目的でスカンジウムを0.2 重量％含有させる。
【０１２５】
ヒロックやウィスカーは、加熱が行われる工程において、アルミニウムの異常成長によって形成される針状あるいは刺状の突起物のことである。これらは、電極や配線のショート（短絡）を招く原因となり好ましくない。
【０１２６】
また、ゲイト電極を構成する材料として、他の導電性材料を用いることも可能である。
【０１２７】
次に図示しないレジストマスクを配置し、このマスクを用いて図示しないアルミニウム膜をパターニングする。こうして、ゲイト電極２０７を構成する基となるパターンを形成する。ゲイト電極を構成するためのパターンを形成したら、先の図示しないレジストマスクを配置した状態で陽極酸化膜の形成を行なう。
【０１２８】
ここでは、電解溶液として３％のショウ酸を含んだ水溶液を用いる。この陽極酸化工程は、上記水溶液中において、図示しないアルミニウム膜のパターンを陽極とし、白金を陰極として電極間に電流を流して行う。このようにすることにより、アルミニウム膜のパターンの露呈した表面に陽極酸化膜２０８を形成する。
【０１２９】
この工程で形成される陽極酸化膜２０８は、多孔質状（ポーラス状）を有している。またここでは、図示しないレジストマスクが存在するためにパターンの側面に２０８で示されるようにこの多孔質状の陽極酸化膜が形成される。
【０１３０】
この多孔質状の陽極酸化膜２０８の膜厚（成長距離）は、3000Åとする。この多孔質状の陽極酸化膜の膜厚でもってオフセットゲイト領域を形成することができる。なお陽極酸化膜２０８の膜厚の制御は、陽極酸化時間によって制御することができる。
【０１３１】
次に図示しないレジストマスクを除去し、再度の陽極酸化を行なう。この工程においては、３％の酒石酸を含んだエチレングリコール溶液をアンモニアで中和したものを電解溶液として用いる。
【０１３２】
ここでは、多孔質状の陽極酸化膜２０８の内部に電界溶液が侵入するので、２０９で示されるようにゲイト電極２０７に接する状態で緻密で強固な膜質を有する陽極酸化膜２０９が形成される。
【０１３３】
この工程で形成される陽極酸化膜２０９は、陽極酸化時の印加電圧を調整することにより、その厚さを制御することができる。ここでは、陽極酸化膜２０９の膜厚は900 Å厚とする。
【０１３４】
この緻密な膜質を有する陽極酸化膜２０９の膜厚を厚くすると、その厚さの分で後にオフセットゲイト領域を形成を行うことができる。しかし、ここではその厚さが薄いので、オフセットゲイト領域の形成に際する寄与は無視する。
【０１３５】
こうして、図２（Ｃ）に示す状態を得る。図２（Ｃ）に示す状態を得たら、ソース及びドレイン領域を構成するための不純物イオンの注入を行なう。ここでは、Ｎチャネル型の薄膜トランジスタを作製するためにＰ（リン）イオンの注入を行なう。また、そのドーズ量は１×１０¹⁵原子／ｃｍ² とする。
【０１３６】
なお、Ｐチャネル型の薄膜トランジスタを作製する場合には、Ｂ（ボロン）イオンの注入を行う。
【０１３７】
図２（Ｃ）の状態で不純物イオンの注入を行なうと、２１０と２１１の領域に不純物イオンが注入される。また２１２と２１３の領域には不純物イオンの注入がされない。この２１２と２１３の領域は、ゲイト電極２０７による電圧印加が行われないため、チャネル形成領域として機能しないオフセットゲイト領域として機能する。
【０１３８】
また、２１４で示される領域がチャネル形成領域として機能する領域となる。このようにして、図２（Ｄ）に示す状態を得る。
【０１３９】
上記不純物イオンの注入が終了したら、レーザー光の照射を行い、不純物イオンの注入された領域の活性化とイオンの衝撃によって損傷した領域のアニール（以下、レーザー活性化と呼ぶ）を行う。
【０１４０】
このレーザー活性化工程もレーザー結晶化工程と同じ装置で同様の精密な制御を施すことで均一性の高いアニール効果を得ることができる。ただし、レーザー照射の際の被処理基体の加熱温度はアルミニウム膜でなるゲイト電極２０７の耐熱性を考慮して決定しなくてはならない。
【０１４１】
従って、本実施例では基体温度を200 ℃に加熱してレーザー活性化工程を行なうこととする。勿論、ゲイト電極２０７が他の耐熱性の高い材料であれば、その耐熱性に応じて基体温度を上げることは可能である。
【０１４２】
また、活性層２０５の結晶性および不純物イオンの注入量によってレーザー活性化におけるレーザー照射条件も変化するため、予め実験的な条件出しを重ねて最適値を求めておく必要がある。本実施例では、160mJ/cm² のエネルギー密度でレーザー照射を行なうこととする。
【０１４３】
図２（Ｄ）に示す状態を得たら、層間絶縁膜２１５として、窒化珪素膜や酸化珪素膜を成膜する。層間絶縁膜２１５としては、窒化珪素膜と酸化珪素膜との積層膜を利用してもよい。また窒化珪素膜と樹脂膜との積層膜を利用してもよい。
【０１４４】
層間絶縁膜２１５を成膜したら、コンタクトホールの形成を行う。そして、ソース電極２１６とドレイン電極２１７の形成を行なう。このようにして図２（Ｅ）に示す薄膜トランジスタを完成させる。
【０１４５】
以上の様にして作製された薄膜トランジスタは、その心臓部である活性層の結晶性が極めて均一性に優れたものであるため、安定した動作を実現する高性能なものとなる。
【０１４６】
また、このようにして作製されたＮチャネル型薄膜トランジスタは、ドレイン電圧Vd＝14V 、ゲイト電圧Vg＝10V の駆動条件化下において、しきい値が1.5V程度であり、オン電流が10〜15μA の良好な電気特性を示すものであった。
【０１４７】
〔実施例２〕
本実施例では、実施例１における非晶質珪素膜の結晶化を加熱処理により行なう例を示す。また、その際、結晶化を助長する金属元素を利用する例を示す。勿論、金属元素を用いずに結晶化させるのであっても構わない。
【０１４８】
従って、本実施例ではレーザーアニールを行なうことで加熱処理により形成した結晶珪素膜の結晶性をさらに改善することを目的とする。
【０１４９】
なお、結晶化方法以外の構成は実施例１と同様であるので本実施例においては図３を用いて実施例１と異なる点のみを記載する。
【０１５０】
まず、３０１で示される基体上に下地膜３０２として酸化珪素膜をスパッタ法またはプラズマＣＶＤ法により、2000Åの厚さに成膜する。
【０１５１】
次に非晶質珪素膜３０３をプラズマＣＶＤ法または減圧熱ＣＶＤ法で200 〜500 Åの厚さに成膜する。この非晶質珪素膜３０３は実施例１同様、膜厚の基体面内におけるばらつき分布を±5%以内、好ましくは±2.5%以内とする。
【０１５２】
非晶質珪素膜３０３を成膜したら、酸素雰囲気中においてＵＶ光を照射し、非晶質珪素膜３０３の表面に極薄い酸化膜（図示せず）を形成する。この酸化膜は、後に金属元素を導入する際の溶液塗布工程で溶液の濡れ性を改善するためのものである。（図３（Ａ））
【０１５３】
次に非晶質珪素膜３０３の結晶化を助長する金属元素の導入を行なう。この技術についての詳細は、本発明者らによる特開平6-232059や同7-321339号公報に記載されている。
【０１５４】
本実施例では、この結晶化を助長する金属元素としてＮｉ（ニッケル）を利用する。Ｎｉ以外には、Ｆｅ、Ｃｏ、Ｃｕ、Ｐｄ、Ｐｔ、Ａｕ等を利用することができる。
【０１５５】
ここでは、ニッケル酢酸塩溶液を用いてＮｉ元素の導入を行なう。具体的には、まず所定のＮｉ濃度（ここでは１０ｐｐｍ（重量換算））に調整したニッケル酢酸塩溶液を非晶質珪素膜３０３の表面に滴下する。こうしてニッケル酢酸塩溶液の水膜３０４が形成された状態とする。（図３（Ｂ））
【０１５６】
次に図示しないスピンコーターを用いてスピンドライを行い、余分な溶液を吹き飛ばす。この溶液塗布工程により非晶質珪素膜３０３上の図示しない酸化膜上には極薄いニッケル層が形成された状態となる。
【０１５７】
そして、この状態で不活性雰囲気または水素を含有した不活性雰囲気において500 〜700 ℃、代表的には600 ℃の温度で４時間の加熱処理を行なうことにより結晶性珪素膜３０５を得る。（図３（Ｃ））
【０１５８】
この時、加熱処理の温度は基体面内において±5 ℃以内、好ましくは±2 ℃以内とすることが重要である。なぜならば、この加熱処理による結晶化が結晶性珪素膜の粒内の結晶性を決めることになるからである。
【０１５９】
この場合においても、実施例１同様、基体を支持するサセプターに熱電対等の温度測定用素子を設けて基体温度をモニタリングすることで精密な温度制御を行なうことが必要である。
【０１６０】
次に結晶性珪素膜３０５を得たら、結晶性を改善するためのレーザー光の照射を行う。このレーザーアニールは実施例１で説明したレーザー結晶化工程と同様の精密な制御を施す必要がある。また、実施例１同様に図７で示される構成を有するレーザー装置を用いて行なう。
【０１６１】
このレーザーアニール工程は結晶性珪素膜に対して紫外光領域のレーザー照射を行い、結晶性珪素膜を一旦溶融させた後、再結晶化させて結晶性の改善を図るものである。
【０１６２】
従って、結晶性珪素膜は非晶質珪素膜に比べて紫外光領域の波長の光を吸収しにくいため、より大きなエネルギーのレーザー光を照射する必要がある。このレーザーエネルギーは、結晶性珪素膜の結晶性が良い程大きな値とする必要があり、実験的な条件出しによって決定される。なお、本実施例では260mJ/cm² のエネルギー密度でレーザー照射を行なうこととする。（図３（Ｄ））
【０１６３】
以上のようにして、レーザー照射により結晶性を大幅に改善した結晶性珪素膜３０６を得ることができる。こうして得られた結晶性珪素膜３０６もまた、実施例１同様に均一性と再現性に優れたものとなる。
【０１６４】
〔実施例３〕
本実施例では、実施例１（図２参照）に示す薄膜トランジスタの作製工程を改良し、ＬＤＤ（ライトドープドレイン）領域を備えた薄膜トランジスタを作製する場合の例を示す。
【０１６５】
まず、実施例１に示した作製工程に従って、図２（Ｄ）に示す不純物の注入工程までを行う。
【０１６６】
次に多孔質状の陽極酸化膜２０８を除去する。そして、再度の不純物イオンの注入を行う。この不純物イオンの注入は、ソース領域２１０とドレイン領域２１１を形成するために行った先の不純物イオンと同一の不純物イオンを、そのドーズ量を下げて行う。
【０１６７】
この結果、２１２と２１３で示される領域に対してソース及びドレイン領域に比較して低濃度に不純物イオン（例えばＰイオン）が注入される。こうして２１２と２１３の領域に低濃度不純物領域が形成される。ここで、ドレイン領域２１１側の低濃度不純物領域２１３が一般的にＬＤＤ（ライトドープドレイン）領域と称される領域なる。
【０１６８】
各不純物注入領域を形成したら実施例１と同様なレーザー活性化を施すのであるが、本発明者らの研究により低濃度不純物領域（特にＬＤＤ領域）はレーザーエネルギーのばらつきの影響を反映しやすいことが判っている。
【０１６９】
従って、本発明を踏まえて精密な制御を施したレーザーアニールを行なうことは均一性に優れた低濃度不純物領域、延いては均一な電気特性を有する薄膜トランジスタを作製する上で極めて有効な手段である。
【０１７０】
この後、図２（Ｅ）に示す工程を経ることによって、薄膜トランジスタを完成させる。
【０１７１】
ＬＤＤ領域はオフセットゲイト領域と同じような機能を有している。即ち、チャネル形成領域とドレイン領域との間における強電界を緩和し、ＯＦＦ動作時におけるリーク電流の値を減少させる機能を有している。また、Ｎチャネル型の薄膜トランジスタであれば、ホットキャリアの発生を抑制し、ホットキャリアによる劣化の問題を抑制する機能を有している。
【０１７２】
〔実施例４〕
本実施例は本発明を利用して作製した薄膜トランジスタ（ＴＦＴ）を備えたアクティブマトリクス型液晶表示装置を構成した例を示すものである。画素領域に配置される画素ＴＦＴと周辺駆動回路に配置される回路ＴＦＴの作製工程の概略を図４を用いて説明する。
【０１７３】
なお、作製工程間における諸パラメータのばらつき等に関する制御は実施例１と同様であるので、本実施例では敢えて説明は行わない。本実施例では、実施例１で説明した本発明の構成をふまえて回路ＴＦＴおよび画素ＴＦＴの作製工程を示すこととする。
【０１７４】
まず、コーニング７０５９等に代表されるガラス基板４０１を用意する。勿論、石英基板や絶縁表面を有した半導体材料を用いても構わない。次に、酸化珪素膜でなる下地膜４０２を2000Åの厚さに成膜する。下地膜４０２の成膜はスパッタ法やプラズマＣＶＤ法によれば良い。
【０１７５】
その上に、図示しない100 〜1000Åの厚さの非晶質珪素膜をプラズマＣＶＤ法や減圧熱ＣＶＤ法により形成する。本実施例では、減圧熱ＣＶＤ法により500 Åの厚さに成膜する。
【０１７６】
次に、図示しない非晶質珪素膜を適当な結晶化方法により結晶化する。この結晶化は550 〜650 ℃、1 〜24hrの加熱処理や、248 、265 、308nm の波長を持つレーザー光の照射で行う。この時、両方法を併用しても良いし、結晶化の際に結晶化を助長する元素( 例えばＮｉ）を添加しても良い。
【０１７７】
次に、前記非晶質珪素膜を結晶化して得られた結晶性珪素膜をパターニングして、島状の半導体層でなる活性層４０３、４０４を形成する。
【０１７８】
その上に、1200Åの厚さのＳｉＯ_X Ｎ_Y で示される酸化窒化珪素膜４０５をプラズマＣＶＤ法により成膜する。この酸化窒化珪素膜４０５は後にゲイト絶縁膜として機能する。なお、酸化珪素膜や窒化珪素膜を用いても良い。
【０１７９】
次に、0.2 重量％のスカンジウムを添加したアルミニウム膜４０６をＤＣスパッタ法により4000Åの厚さに成膜する。スカンジウムの添加はアルミニウム膜表面にヒロックやウィスカーが発生するのを抑制する効果がある。このアルミニウム膜４０６は、後にゲイト電極として機能する。
【０１８０】
また、アルミニウム膜の代わりに他の金属系材料、例えば、Ｍｏ、Ｔｉ、Ｔａ、Ｃｒ等を用いても良いし、ポリシリコンやシリサイド系材料のような導電性を有する膜を用いても構わない。
【０１８１】
次に、電解溶液中でアルミニウム膜４０６を陽極として陽極酸化を行う。電解溶液としては、３％の酒石酸のエチレングリコール溶液をアンモニア水で中和して、ＰＨ＝６．９２に調整したものを使用する。
また、白金を陰極として化成電流５ｍＡ、到達電圧１０Ｖとして処理する。
【０１８２】
こうして形成される図示しない緻密な陽極酸化膜は、後にフォトレジストとの密着性を高める効果がある。また、電圧印加時間を制御することで膜厚を制御することができる。（図４（Ａ））
【０１８３】
こうして、図４（Ａ）の状態が得られたら、アルミニウム膜４０６をパターニングして、後のゲイト電極の原型を形成する。そして、２度目の陽極酸化を行い、多孔質の陽極酸化膜４０７、４０８を形成する。（図４（Ｂ））
電解溶液は３％のシュウ酸水溶液とし、白金を陰極として化成電流２〜３ｍＡ、到達電圧８Ｖとして処理する。
【０１８４】
この時陽極酸化は基体に対して平行な方向に進行する。また、電圧印加時間を制御することで多孔質の陽極酸化膜４０７、４０８の長さを制御できる。
【０１８５】
さらに、専用の剥離液でフォトレジストを除去した後、３度目の陽極酸化を行う。この時、電解溶液は３％の酒石酸のエチレングリコール溶液をアンモニア水で中和して、ＰＨ＝６．９２に調整したものを使用する。そして、白金を陰極として化成電流５〜６ｍＡ、到達電圧１００Ｖとして処理する。
【０１８６】
この際形成される陽極酸化膜４０９、４１０は、非常に緻密、かつ、強固である。そのため、ド−ピング工程などの後工程で生じるダメージからゲイト電極４１１、４１２を保護する効果を持つ。また、強固な陽極酸化膜４０９、４１０はエッチングされにくいため、コンタクトホールを形成する際にエッチング時間が長くなる問題がある。そのため、1000Å以下の厚さにするのが望ましい。
【０１８７】
次に、図４（Ｂ）に示す状態で、イオンドーピング法により活性層４０３、４０４に不純物を注入する。例えば、Ｎチャネル型ＴＦＴを作製するならば不純物としてＰ（リン）を、Ｐチャネル型ＴＦＴを作製するならば不純物としてＢ（ボロン）を用いれば良い。
【０１８８】
このイオン注入によって回路ＴＦＴのソース／ドレイン領域４１３、４１４および画素ＴＦＴのソース／ドレイン領域４１５、４１６が自己整合的に形成される。
【０１８９】
次に、多孔質の陽極酸化膜４０７、４０８を除去して再度イオン注入を行う。この時のドーズ量は前回のイオン注入よりも低いドーズ量で行う。
【０１９０】
このイオン注入によって回路ＴＦＴの低濃度不純物領域４１７、４１８、チャネル形成領域４２１および画素ＴＦＴの低濃度不純物領域４１９、４２０、チャネル形成領域４２２が自己整合的に形成される。
【０１９１】
図４（Ｃ）に示す状態が得られたら、次にＫｒＦエキシマレ−ザ−光の照射及び熱アニ−ルを行う。本実施例では、レ−ザ−光のエネルギ−密度は160 〜170mJ/cm² とし、熱アニ−ルは300 〜450 ℃１hrで行う。この工程により、イオンド−ピング工程で損傷を受けた活性層４０３、４０４の結晶性を改善することができる。
【０１９２】
次に、第１の層間絶縁膜４２３として窒化珪素膜（酸化珪素膜でもよい）をプラズマＣＶＤ法により3000〜5000Åの厚さに成膜する。この層間絶縁膜４２３は多層構造としても差し支えない。（図４（Ｄ））
【０１９３】
第１の層間絶縁膜４２３を成膜したら、回路ＴＦＴのソース領域４１３、ゲイト電極４１１、ドレイン領域４１４および画素ＴＦＴのソース領域４１５上の層間絶縁膜をエッチングしてコンタクトホールを形成する。
【０１９４】
そして、アルミニウムを主成分とする材料とチタンとの積層膜で回路ＴＦＴのソース電極４２４、ゲイト電極４２５、ドレイン電極４２６および画素ＴＦＴのソース電極４２７を形成する。
【０１９５】
次に、第２の層間絶縁膜４２８として窒化珪素膜（酸化珪素膜でもよい）をプラズマＣＶＤ法により3000〜5000Åの厚さに成膜する。この層間絶縁膜４２８は多層構造としても差し支えない。（図４（Ｅ））
【０１９６】
第２の層間絶縁膜４２８を成膜したら、画素ＴＦＴのドレイン領域４１６上の層間絶縁膜をエッチングしてコンタクトホールを形成し、透明導電性膜でなる画素電極４２９を形成する。このようにして、図４（Ｅ）に示すような回路ＴＦＴおよび画素ＴＦＴが形成される。
【０１９７】
以上で説明した回路ＴＦＴおよび画素ＴＦＴを配置したアクティブマトリクス型液晶表示装置の概略図を図５に示す。図５において５０１はガラス基板、５０２は水平走査回路、５０３は垂直走査回路である。
【０１９８】
画像信号は外部から入力端子５０４を通して取り込まれ、水平・垂直走査回路５０２、５０３により制御される画素ＴＦＴをスイッチング素子として画素電極に送られる。そして、画素電極と対向基板との間に挟み込まれた液晶の電気光学特性を変化させて画素領域５０４に画像表示を行う。なお、５０６は対向基板へ所定の電圧を印加するためのコモン電極である。
【０１９９】
従って、前述の図４で示したような回路ＴＦＴは、Ｎチャネル型とＰチャネル型とを相補型に組み合わせたＣＭＯＳ構造として水平・垂直走査回路５０２、５０３を構成することができる。
【０２００】
また、画素ＴＦＴは画素領域５０４の拡大図５０７に示す様に、マトリクス状に交差したゲイト配線およびソース配線の各交点に配置し、画素電極に出入りする電荷量を制御するスイッチング素子とすることができる。
【０２０１】
以上の構成でなる図５で示す装置は、概略上記説明したような動作で画像表示を行うものであり、周辺回路の動作周波数は３ＭＨｚ以上、表示部のコントラスト比は１００以上を示すコンパクトで高性能なパネルである。
【０２０２】
本実施例で示すアクティブマトリクス型液晶表示装置は、回路ＴＦＴおよび画素ＴＦＴの活性層が極めて均一性および再現性に優れた結晶性を有するものであるため、全ての薄膜トランジスタの特性が均一である。
【０２０３】
特に、画素ＴＦＴの特性が均一であることは画像表示の際に横縞模様が発生しなくなるため、工業上、非常に有益な効果を生むことになる。
【０２０４】
〔実施例５〕
実施例１〜実施例４では、プレーナ型薄膜トランジスタを作製する例を示したが本発明により構成される活性層は、プレーナ型に限らずあらゆるタイプの薄膜トランジスタに応用することが可能である。
【０２０５】
本実施例では、その一例として逆スタガ型薄膜トランジスタを構成した例を説明する。このような逆スタガ型薄膜トランジスタは特開平5-275452、または特開平7-99317 号公報に記載された技術により形成することができる。従って、本実施例の詳細な条件、被膜の厚さ等は上記公報を参考にすると良い。
【０２０６】
また、敢えて説明は行わないがレーザーアニールに影響を与える因子に対しては実施例１同様の制御を行うこととする。
【０２０７】
まず、図６（Ａ）において６０１は絶縁表面を有する基体である。その上には導電性材料でなるゲイト電極６０２が形成される。このゲイト電極６０２は後の珪素膜の結晶化を考慮して耐熱性に優れた材料であることが望ましい。
【０２０８】
また、耐圧を高めるために公知の技術である陽極酸化法によりゲイト電極６０２の表面および側面に陽極酸化膜を形成してもよい。さらに、この陽極酸化法により形成した陽極酸化膜を利用してＬＤＤ領域またはＨＲＤ領域を設ける構成としても良い。この技術に関しては本発明者らによる特開平7-169974号公報に記載されている。
【０２０９】
次に、ゲイト絶縁膜として機能する酸化珪素膜６０３をプラズマＣＶＤ法により形成し、その上に図示しない非晶質珪素膜を減圧熱ＣＶＤ法により形成する。この図示しない非晶質珪素膜は実施例１で示した手段により結晶化され、活性層を構成する結晶性珪素膜６０４となる。（図６（Ａ））
【０２１０】
次に、結晶性珪素膜６０４が得られたらパターニングを行い、活性層６０５を構成する島状半導体層を形成する。
【０２１１】
次に、活性層６０５を覆って図示しない窒化珪素膜を成膜する。そして、窒化珪素膜上に図示しないレジストマスクを設け、裏面露光法によりパターニングして選択的に窒化珪素膜をエッチング除去する。
【０２１２】
こうして形成された窒化珪素膜でなる島状パターン６０６は後のイオン注入工程においてマスク材として機能することになる。
【０２１３】
こうして図６（Ｂ）の状態が得られる。この状態が得られたら、一導電性を付与する不純物を露出した活性層６０５に対して注入する。この工程は公知のイオン注入法によればよい。イオン注入後はレーザーアニール等により不純物イオンの活性化を行う。このレーザーアニールも本発明を踏まえて行うことは言うまでもない。
【０２１４】
こうして、活性層にはソース領域６０７、ドレイン領域６０８が形成される。また、島状パターン６０６によってイオン注入されなかった領域はチャネル形成領域６０９となる。（図６（Ｃ））
【０２１５】
図６（Ｃ）の状態が得られたら、層間絶縁膜として酸化珪素膜６１０をプラズマＣＶＤ法により形成する。そして、ソース領域６０７およびドレイン領域６０８に達するコンタクトホールを形成する。
【０２１６】
そして、導電性材料でなるソース電極６１１およびドレイン電極６１２を形成して、図６（Ｄ）に示すような逆スタガ型薄膜トランジスタが完成する。
【０２１７】
以上の様に、逆スタガ型薄膜トランジスタに対しても本発明は十分応用することができる。逆スタガ型薄膜トランジスタは活性層の下方にゲイト電極６０２が配置されているため、不純物イオンの活性化等にレーザーアニールを用いる場合、ゲイト電極６０２に遮蔽されることなく活性層全域に渡って均一な処理を行うことができるという利点を持つ。
【０２１８】
また、その構造上に理由から基体６０１からの汚染等に強く、信頼性の高いトランジスタを構成できる利点がある。
【０２１９】
〔実施例６〕
実施例１〜実施例５で説明したような薄膜トランジスタにおけるゲイト電極およびゲイト線の材料は、何もアルミニウム膜のみに限ったものではない。
【０２２０】
ゲイト電極としては、Ｍｏ、Ｔｉ、Ｔａ、Ｃｒ、Ｗ等の他の導電性材料を用いても構わない。また、一導電性を付与した結晶性珪素膜をゲイト電極とすることも可能である。
【０２２１】
特に、結晶性珪素膜をゲイト電極とした場合、活性層と同等の耐熱性を有するため、製造工程における加熱処理の温度範囲のマージンが上がる点で有利である。
【０２２２】
例えば、逆スタガ構造において活性層を構成する結晶性珪素膜を形成するもしくはその結晶性を改善する際に、ゲイト電極の耐熱性が高いことはゲイト電極材料の拡散等の恐れがなく好ましい。
【０２２３】
〔実施例７〕
実施例１〜実施例６で説明したような薄膜トランジスタは絶縁体表面のみでなく、導電性被膜や半導体デバイス上に形成された層間絶縁膜の上に形成する構成であってもよい。
【０２２４】
例えば、シリコン基板上に形成されたＩＣのような集積化回路の上に本発明を利用した薄膜トランジスタを形成する三次元構造を有する集積化回路を構成することも可能である。
【０２２５】
このような三次元構造を有する集積化回路は、半導体デバイスを立体的に構築するため、占有面積を小さく抑えつつ大規模な集積化回路を構成できる利点がある。このことは、今後進められるデバイスサイズの微細化の中でますます重要性を増すことであろう。
【０２２６】
〔実施例８〕
本実施例では、レーザー照射の際に、レーザー光を走査する直前の領域と直後の領域に対して補助加熱を行なう例を示す。
【０２２７】
図９に示すのは、図７に示したレーザー装置の一部に視点を絞った概略図である。従って、図７に示す構成と異なる点以外の符号は図７と同様のものを用いることとする。
【０２２８】
まず、光学系により線状に加工されたレーザー照射光９０１は基板に対して概略垂直な方向に入射して、縁表面を有する基体９０２上に成膜された非晶質珪素膜９０３に照射される。
【０２２９】
そして、レーザー光９０１の照射はステージ７１１を９０４で示される方向に移動させながら行うことで非晶質珪素膜９０３の全面に対して行なわれる。この方法は、生産性を高くすることができ、極めて有用な方法である。
【０２３０】
実施例１と異なる点は、本実施例ではレーザー光９０１の照射が行われる領域（線状の領域を有する）の直前の領域（この領域も線状あるいは長方形を有する）と直後の領域（この領域も線状あるいは長方形を有する）が、補助加熱装置９０５、９０６によって加熱される点である。
【０２３１】
補助加熱装置９０５、９０６は、電源９０７から供給される電流によってジュール加熱が行われることによって発熱する。また、補助加熱装置９０５、９０６は可能な限り、レーザー光９０１が照射される領域領域に隣接して配置することが必要である。
【０２３２】
補助加熱装置９０５、９０６には、非晶質珪素膜９０３を所定の温度に加熱するように電流を流す。この温度は、できる限り高い温度とする必要があるが、基体９０２の耐熱性を考慮する必要がある。本発明者らの知見によれば、例えばガラス基板を用いる場合、その歪点以下の温度で可能な限り高い温度とするのが望ましい。
【０２３３】
また、この際、補助加熱装置９０５、９０６によって非晶質珪素膜９０３を加熱する温度は、ステージ下部に設けられている基体支持台７１０に内蔵されたヒーターの加熱温度よりも50〜100 ℃高い温度とする。
【０２３４】
また、この際、補助加熱装置９０５、９０６にも熱電対等を設置して精密な温度制御を行い、温度分布を基準値の±3 ℃( 好ましくは1 ℃) 以内とする。この温度制御は珪素膜が結晶化する過程において大きな影響を与えるため、慎重に行なう必要がある。
【０２３５】
レーザー光９０１が照射されるとレーザー光９０１の照射された領域の非晶質珪素膜９０３は瞬間的に溶融されるが、当該領域の周辺領域も補助装置９０５、９０６によって加熱されているため、レーザー光９０１が照射されてから固化するまでの時間を伸ばすことができる。
【０２３６】
従って、レーザー光９０１の照射がゆっくりと走査されながら行われることで急激な相変化がなくなるので、膜内における応力が緩和され、基体面内において均一性の高い結晶性珪素膜を得ることが可能となる。
【０２３７】
〔実施例９〕
本実施例は、実施例８に示した構成における補助加熱装置９０５、９０６を赤外光のランプ加熱による手段とした例を示す。図１０に本実施例に示すレーザー光の照射装置の概要を示す。なお、基本的な構成は図９と同様であるので同じ符号を用いることとする。
【０２３８】
本実施例では、レーザー光９０１が走査されながら照射される領域の前後には、ハロゲンランプ１１、１２からの赤外光が照射される。赤外光はガラス基板には吸収されにくく、珪素膜には吸収され易いので、珪素膜（この場合は非晶質珪素膜９０３）を選択的に加熱することができる。
【０２３９】
この赤外光ランプを用いた加熱は、基体９０２が耐熱性の比較的低いガラス基板であっても、非晶質珪素膜９０３のみを１０００℃程度の温度（表面温度）に加熱することが可能である。
【０２４０】
しかし、熱膨張の関係でガラス基板からの剥離やクラックの発生が存在するので、適性な加熱条件は実験的に得る必要がある。一般的には、赤外光ランプ１１、１２からの加熱は、非晶質珪素膜９０３の表面温度が700 〜900 ℃程度となるようにして行う。
【０２４１】
本実施例に示すような構成としても、実施例７同様、急激な相変化がなくなるので、膜内における応力が緩和され、基体面内において均一性の高い結晶性珪素膜を得ることが可能となる。
【０２４２】
〔実施例１０〕
本実施例では、実施例１においてレーザー照射の際に被処理基体７０９を加熱する手段としてランプアニールを用いる例を示す。
【０２４３】
即ち、図７において７１０で示される基体支持台の内部にヒーターではなく強光を発する光源を配置し、その強光により被処理基体７０９の加熱を行なう構成とする。
【０２４４】
上記光源としては、赤外光や紫外光を発するランプ光源を用いれば良い。このようなランプ照射による加熱は昇温・降温速度が速く、均一性の高いアニール効果を得られる点で有効な加熱手段である。
【０２４５】
また、昇温・降温速度が速いことはスループットを大幅に向上させることを意味しており、生産性の面からも非常に有効である。
【０２４６】
ただし、例えば赤外光ランプによる照射を行なう場合、ステージ７１１としてＳｉＣ被膜やＳｉ被膜で被覆したガラスまたは石英基板など、赤外光を吸収しやすいような工夫を施したものを用いることが必要である。
【０２４７】
また、当然ステージ７１１には熱電対等を設置して基体温度のモニタリングし、測定結果をフィードバックしてランプ光源から発する強光の強度を制御する構成とすることは言うまでもない。
【０２４８】
以上のように、基体温度を制御性と均一性に優れたランプアニールによって制御する構成とすると、より均一性および再現性に優れたレーザーアニールを行なうことが可能である。
【０２４９】
〔実施例１１〕
本実施例では図７に示すレーザー照射装置の光学系の構成例を示す。説明には図１２を用いる。図１２において、発振器（図示せず）から発振されたレーザー光は、ホモジナイザー２１に入射する。ホモジナイザー２１は、最終的に線状に形成されるレーザービームの幅方向における照射エネルギー密度の分布を補正する機能を有している。
【０２５０】
２２と２３で示されるのは、最終的に線状に形成されるレーザービームの長手方向における照射エネルギー密度の分布を補正する機能を有しているホモジナイザーである。また、２４で示されるホモジナイザーはホモジナイザー２１と同様の機能を有している。
【０２５１】
２１、２２、２３、２４で示されるホモジナイザーによって、照射エネルギー密度の分布を制御されたレーザー光は、２５、２６、２７で示されるレンズでなるレンズ系に入射する。このレンズ系においては、まずレンズ２５において、線状のレーザー光の長手方向へのビーム形成が行われる。即ち、レンズ２５においてレーザー光の拡大が行われる。
【０２５２】
またレンズ２６、２７において、線状のレーザー光の幅方向におけるビーム形成が行われる。即ち、レーザー光の収束が行われる。なお、２８で示されるのはレーザー光の進行方向を変えるためのミラーである。
【０２５３】
そしてミラー２８で進行方向を変えられたレーザー光はレンズ２９へと入射する。レンズ２９もまた線状のレーザー光の幅方向におけるビーム形成を行うために設けられている。レンズ２９を透過したレーザー光は、線状のレーザー光となって、被照射面３０に照射される。
【０２５４】
被照射面３０は、例えば非晶質珪素膜の表面や、結晶性の助長が行われる結晶性珪素膜の表面に相当する。本実施例に示す構成においてもレーザー光のパルス毎における照射エネルギー密度のばらつきを図１で示すような範囲内に納めることが重要となる。
【０２５５】
〔実施例１２〕
本実施例は、線状のレーザー光のビームの長手方向における照射エネルギー密度の均一性を高めた構成に関する。図１３に本実施例におけるレーザー照射装置の光学系の概要を示す。
【０２５６】
図１３に示す装置は、図８に示す光学系をさらに改良したものである。具体的にはビーム形状の異方性に対応させて、ホミジナイザの配置数を異ならせたことに特徴がある。なお、図１３において図８と同じ符号を付してある箇所の説明は図８と同一である。
【０２５７】
即ち、照射エネルギー密度の均一性がより求められる線状のレーザー光の長手方向においては、８０４と３１とで示される２つのホモジナイザーが配置されている。それに対して、照射エネルギー密度のそれほどの均一性が必要とされない線状レーザー光の幅方向における照射エネルギー密度を補正するホモジナイザーは８０３で示されるように１つしか配置されていない。
【０２５８】
一般に線状のレーザー光は、その長手方向における照射エネルギーの密度分布が問題となる。一方で線状のレーザー光の幅方向における密度分布は、その幅が数ｍｍ程度と圧縮されるのでそれ程大きな問題とはならない。
【０２５９】
従って、本実施例に示すように線状のレーザー光の長手方向における照射エネルギー密度を補正するホモジナイザーの数を増やし、その方向における照射エネルギー密度の分布をより均一化することは有用なものとなる。
【０２６０】
【発明の効果】
本明細書で開示する発明を実施することで、パルス発振型の線状のレーザー光を用いた大面積の半導体薄膜に対するアニールの効果をより均一で再現性の高いものとすることができる。
【０２６１】
例えば、アクティブマトリクス型の表示装置の作製においてエキシマレーザーによるレーザーアニールの効果のばらつきによる問題を解決することができる。即ち、画像表示の際に問題となっていた縞模様を改善し、高画質な液晶表示装置を作製することが可能となる。
【０２６２】
また、本明細書で開示する発明は、アクティブマトリクス型の液晶表示装置のみではなく、アクティブマトリクス型を有するＥＬ型の表示装置やその他フラットパネルディスプレイに利用することができる。
【図面の簡単な説明】
【図１】 レーザー照射エネルギー密度のパルス毎のばらつきを示す図。
【図２】 薄膜トランジスタの作製工程を示す図。
【図３】 結晶性珪素膜の形成工程を示す図。
【図４】 薄膜トランジスタの作製工程を示す図。
【図５】 アクティブマトリクス型液晶表示装置の概略を示す図。
【図６】 薄膜トランジスタの作製工程を示す図。
【図７】 レーザー照射室の概略を示す図。
【図８】 レーザー装置の光学系の概略を示す図。
【図９】 レーザー装置の一部の概略を示す図。
【図１０】 レーザー装置の一部の概略を示す図。
【図１１】 レーザーエネルギーとパルス幅の関係を示す図。
【図１２】 レーザー装置の光学系の概略を示す図。
【図１３】 レーザー装置の光学系の概略を示す図。
【符号の説明】
２０１ ガラス基板
２０２ 下地膜
２０３ 非晶質珪素膜
２０４ 結晶性珪素膜
２０５ 活性層
２０６ ゲイト絶縁膜
２０７ ゲイト電極
２０８ 多孔質状の陽極酸化膜
２０９ 緻密な陽極酸化膜
２１０ ソース領域
２１１ ドレイン領域
２１２、２１３ 低濃度不純物領域
２１４ チャネル形成領域
２１５ 層間絶縁膜
２１６ ソース電極
２１７ ドレイン電極
５０１ ガラス基板
５０２ 水平走査回路
５０３ 垂直走査回路
５０４ 入力端子
５０５ 画素領域
５０６ コモン電極
７０１ レーザー照射室
７０２ レーザー発振器
７０３ ガスプロセッサー
７０４ ハーフミラー
７０５ コントロールユニット
７０６ 光学系
７０７ ミラー
７０８ 石英窓
７０９ 被処理基体
７１０ 基体支持台
７１１ ステージ
７１２ 熱電対
７１３ 真空排気ポンプ
７１４、７１５ 気体供給管
７１６ 移動機構
７１７ ゲイトバルブ
８０１、８０２ 光学レンズ
８０３、８０４ ホモジナイザー
８０５、８０６ 光学レンズ
８０７ ミラー
８０８ 光学レンズ
９０５、９０６ 補助加熱装置
９０７ 電源
１１、１２ ランプ[0001]
BACKGROUND OF THE INVENTION
The invention disclosed in this specification relates to a method of performing annealing (laser annealing) on a semiconductor thin film by laser light irradiation. The purpose of laser annealing includes crystallization of an amorphous thin film, improvement of crystallinity of a crystalline thin film, activation of an impurity element imparting conductivity, and the like.
[0002]
[Prior art]
In recent years, a technique for forming a thin film transistor using a semiconductor thin film formed on a glass substrate is known. This technique is required to construct an active matrix liquid crystal display device.
[0003]
An active matrix type liquid crystal display device has a configuration in which a thin film transistor is provided for each of pixel electrodes arranged in a matrix, and charges entering and exiting the pixel electrode are controlled by the thin film transistor.
[0004]
In order to manufacture this active matrix type liquid crystal display device, it is necessary to integrate several hundred thousand or more thin film transistors in a matrix.
[0005]
As the thin film transistor, a thin film transistor using a crystalline silicon film capable of obtaining high characteristics is preferable. In particular, when a crystalline silicon film is used, the peripheral drive circuit can also be configured with a thin film transistor on the same glass substrate. With such a configuration, significance such as simplification of the manufacturing process, reduction in manufacturing cost, and downsizing of the entire apparatus can be obtained.
[0006]
However, the current active matrix type liquid crystal display device has a problem in that display is uneven or striped. In particular, this stripe pattern is a phenomenon that is remarkably seen in a liquid crystal display device formed through a laser annealing process, and extremely impairs the visual appearance during image display.
[0007]
Such a striped pattern is different from a point defect or a line defect, and may or may not be visually confirmed depending on the driving conditions of the liquid crystal display device. Therefore, the present inventors have considered that the phenomenon is not a permanent phenomenon due to, for example, destruction of a thin film transistor or a short circuit of wiring, but a phenomenon caused by another factor.
[0008]
As a result of analyzing the liquid crystal display device from various angles, it has been found that the variation in the on-state current (current flowing when selected) of the thin film transistor greatly affects the generation of the stripe pattern.
[0009]
For example, when a thin film transistor is selected in an active matrix liquid crystal display device, an on-current flows between the source region (connected to the data line) and the drain region (connected to the pixel electrode) of the active layer, and the liquid crystal A certain voltage is applied (charged state).
[0010]
Therefore, when the on-current is extremely small, the charge of the pixel electrode may be insufficiently charged. In such a state where the charging is not saturated, a desired gradation display is impossible, and such a pixel region is observed as a striped pattern.
[0011]
In addition, there is a phenomenon in which the voltage written to the pixel electrode slightly decreases immediately after the thin film transistor is switched from the on state to the off state (or from the off state to the on state). The voltage that has fluctuated at this time is called a feedthrough voltage.
[0012]
Since the amount of charge charged in the pixel electrode also varies depending on the feedthrough voltage, the feedthrough voltage can also be a factor that makes stripe patterns appear.
[0013]
However, normally, this feedthrough voltage is relaxed by a current that compensates for this (referred to herein as a feedthrough compensation current) flowing between the source and drain. This feedthrough compensation current is a current that flows for a short time when the thin film transistor switches from the on state to the off state (or vice versa).
[0014]
As a result of analyzing the prototyped thin film transistor, the present inventors have confirmed that the larger the on-current, the greater the feedthrough compensation current, that is, the feedthrough voltage is more easily relaxed.
[0015]
Summarizing the above analysis results, the stripe pattern in the liquid crystal display device, which has been regarded as a problem in the past, is caused by variations in the on-state current of the thin film transistor. It turned out to be.
[0016]
Furthermore, the present inventors performed a simulation on the generation of the stripe pattern due to the insufficient charging. The simulation was carried out by finding the time required to charge the pixel capacitance of about 0.2pF (added between the liquid crystal and auxiliary capacitance) to 99.6% or more.
[0017]
The determination of this result was based on whether or not charging can be performed in 2 μs considering the margin since the blanking period is 5 μs in the case of VGA.
[0018]
As a result, in the case of a thin film transistor having a threshold value of about 2 V, it was confirmed that the on-current (when the drain voltage Vd = 14 V and the gate voltage Vg = 10 V) needs to be 3 μA or more.
[0019]
Through the process as described above, the present inventors have come to the conclusion that it is essential to improve the crystallinity of the semiconductor layer (in this case, the crystalline silicon film) that greatly affects the on-current. became.
[0020]
The crystalline silicon film can be obtained by crystallizing an amorphous silicon film by heat treatment, laser light irradiation, or a combination of both. In particular, a method using laser light (hereinafter referred to as laser crystallization) as a means for crystallization or crystallinity improvement is effective in that a crystalline silicon film having excellent crystallinity can be obtained at a low temperature.
[0021]
The merit of obtaining a crystalline silicon film at this low temperature is that a high-performance thin film transistor can be formed on an inexpensive glass substrate, and there is no doubt that it will become an indispensable crystallization means in the future.
[0022]
In a method using laser light, a pulse oscillation type excimer laser is often used as the laser light. An excimer laser is a system in which a specific excitation state is created by performing high-frequency discharge on a predetermined type of gas, and laser oscillation having a wavelength in the ultraviolet region is performed.
[0023]
However, when a crystalline silicon film is formed by laser light irradiation, the crystalline silicon film formed is affected by various parameters included in the process from the formation of the amorphous silicon film to the end of the laser annealing treatment. The reproducibility of crystallinity is not necessarily good.
[0024]
The parameters included between the processes are factors that can influence the laser crystallization, and are uncertain factors that influence the crystallinity. There are indirect ones such as the film thickness of an amorphous silicon film and direct ones such as laser irradiation energy.
[0025]
For example, the excimer laser has a problem that the irradiation energy varies in the oscillation for each pulse. In addition, it is known that such a variation in laser irradiation energy and a variation in energy distribution when laser beams are superimposed cause crystallinity non-uniformity.
[0026]
For example, since the laser device used by the present inventors performs processing by superimposing the laser irradiated surfaces that have been processed into a linear beam, the non-uniformity of the energy distribution becomes the variation in on-current as it is, resulting in a horizontal stripe pattern. Appears in the image display area.
[0027]
As described above, the stripe pattern is a fatal problem in commercializing a liquid crystal display device, and an immediate solution is required. However, it is almost impossible to form a crystalline silicon film having crystallinity that causes no variation in on-state current, which is the cause, with the current laser apparatus.
[0028]
This is a major rate-limiting point for the development of liquid crystal display devices using low-temperature polysilicon technology by laser crystallization.
[0029]
[Problems to be solved by the invention]
An object of the invention disclosed in this specification is to provide a technique for performing laser annealing excellent in uniformity and reproducibility and an apparatus therefor in order to solve the above problems. It is another object of the present invention to provide a technique for manufacturing a high-quality liquid crystal display device that does not generate a stripe pattern by applying the technique.
[0030]
[Means for Solving the Problems]
The configuration of the invention disclosed in this specification is as follows.
A first step of forming an amorphous semiconductor thin film on a substrate having an insulating surface;
A second step of transforming the amorphous semiconductor thin film into a crystalline semiconductor thin film by performing irradiation with a pulsed laser beam and / or heat treatment;
A third step of injecting an impurity element imparting one conductivity to the crystalline semiconductor thin film;
A fourth step of activating the impurity element by laser light irradiation and / or heat treatment;
In the process of manufacturing a semiconductor device having at least
In the second and fourth steps, the peak value, the half-value width, and the threshold width of the laser energy of the laser light are all distributed within approximately ± 3% of the reference value.
[0031]
In view of the conventional problems, the present inventors have entangled many uncertain factors such as the thickness of the amorphous silicon film as described above. I thought that it will manifest in form.
[0032]
Therefore, the gist of the present invention is to minimize variations in parameters between processes that directly or indirectly affect the laser crystallization process. Moreover, it is to suppress these variations and to eliminate uncertain factors as much as possible.
[0033]
For example, in the manufacturing process of a crystalline silicon film by irradiation with a pulse oscillation type linear laser beam, a variation in irradiation energy (irradiation variation with respect to irradiation time) as shown in FIG. 1 is observed.
[0034]
The data shown in FIG. 1 shows the variation of the output (laser energy or irradiation energy) of the laser beam for each pulse oscillated from the laser oscillator (the fluctuation of the irradiation energy with respect to the irradiation elapsed time). Further, when appropriate beam formation is performed by the optical system, this variation directly corresponds to the variation in irradiation energy density on the irradiated surface for each shot.
[0035]
That is, here, the irradiation energy is directly used as the vertical axis, but it can also be expressed in terms of energy density. This laser output indicates the peak value (maximum value) of the laser energy.
[0036]
What is important in FIG. 1 is that the peak value of the laser output is distributed within approximately ± 3% around 640 mJ, that is, within ± 3% from a certain reference value (optimum value). In the laser device used by the inventors this time, when the laser output is 640 mJ, the energy density irradiated to the unit area is about 250 mJ / cm. ² It is.
[0037]
From the research results of the present inventors, it has been found that if laser annealing is performed with a variation exceeding the above range, the annealing effect varies and the uniformity in the surface deteriorates.
[0038]
If it is necessary to further improve the uniformity of laser annealing, the adjustment may be somewhat complicated and costly, but the laser output distribution should be kept within ± 2%, preferably within ± 1.5%. Becomes effective.
[0039]
Therefore, as shown in FIG. 1, it is preferable for annealing the semiconductor film to distribute the variation in laser output for each pulse oscillation within a range of ± 3%, preferably ± 2%, more preferably ± 1.5%. Become. It is particularly preferable when a large area is annealed by a linear laser beam.
[0040]
In addition to suppressing variations in peak values as described above, it is possible to suppress variations in parameters related to other laser crystallization processes, and to eliminate uncertain factors as much as possible during laser crystallization. It is necessary to eliminate the horizontal stripe pattern as described above.
[0041]
The configuration of another invention is as follows:
A laser irradiation apparatus for irradiating a pulsed oscillation type linear laser beam to a semiconductor thin film on a substrate having an insulating surface,
Means for oscillating the laser beam;
A gas processor connected to the means for oscillating the laser beam;
A control unit for detecting a part of the laser beam and feeding back the detection result to the means for oscillating the laser beam, and controlling the output of the laser beam;
Optical system means for processing the laser beam into a linear shape;
Means for heating the semiconductor thin film;
Having at least
The laser energy peak value, half-value width, and threshold width of the laser light are all distributed within about ± 3% of the reference value.
[0042]
The configuration of another invention is as follows:
A laser irradiation apparatus for irradiating a pulsed oscillation type linear laser beam to a semiconductor thin film on a substrate having an insulating surface,
Means for oscillating the laser beam;
A gas processor connected to the means for oscillating the laser beam;
A control unit for detecting a part of the laser beam and feeding back the detection result to the means for oscillating the laser beam, and controlling the output of the laser beam;
Optical system means for processing the laser beam into a linear shape;
Means for heating the semiconductor thin film;
An auxiliary heating device provided other than means for heating the semiconductor thin film;
Having at least
The laser energy peak value, half-value width, and threshold width of the laser light are all distributed within about ± 3% of the reference value.
[0043]
Here, the outline of the laser apparatus used in the present invention will be described with reference to FIG. The laser device shown in FIG. 7 is necessary to distribute the laser energy in the range shown in FIG.
[0044]
In FIG. 7, a laser irradiation chamber 701 is irradiated from a laser oscillator 702, and a pulse laser beam whose cross-sectional shape is processed into a linear shape by an optical system 706 is reflected by a mirror 707 and passed through a window 708 made of quartz. And has a function of irradiating the substrate 709 to be processed.
[0045]
Laser light oscillated from the laser oscillator 702 is an ultraviolet light region such as a KrF excimer laser (wavelength 248 nm), an XeCl excimer laser (wavelength 308 nm), or a fourth harmonic (wavelength 265 nm) of a Xenon lamp-excited Nd: YAG laser. Laser light having a wavelength can be used.
[0046]
A gas processor 703 is connected to the laser oscillator 702. This gas processor 703 corresponds to an excitation gas purifier for removing halides (fluoride in the case of KrF excimer laser and chloride in the case of XeCl excimer laser) generated in the laser oscillator 702.
[0047]
A half mirror 704 is installed between the laser oscillator 702 and the optical system 706, and a part of the laser output light is taken out and detected by the control unit 705. The control unit 705 controls the discharge power of the laser oscillator 702 in response to the detected change in laser energy.
[0048]
In addition, the substrate to be processed 709 is disposed on a stage 711 provided on the substrate support 710, and is maintained at a predetermined temperature (300 to 650 ° C.) by a heater installed in the substrate support 710. The stage 711 is provided with a thermocouple 712, and the measurement result is immediately fed back to control the heater.
[0049]
Further, the laser irradiation chamber 701 capable of atmospheric control has a vacuum exhaust pump 713 as a decompression and exhaust means. The vacuum exhaust pump 713 can cope with high vacuum such as a turbo molecular pump or a cryopump.
[0050]
Moreover, as a gas supply means, it is O through a valve. ₂ It has a gas supply pipe 714 connected to the (oxygen) gas cylinder and a gas supply pipe 715 connected to the He (helium) gas cylinder via a valve. The purity of the gas used here is desired to be 99.99999% (7N) or more.
[0051]
In the laser irradiation chamber 701 having the above-described configuration, the substrate support 710 is moved in a direction perpendicular to the linear direction of the linear laser beam by the moving mechanism 716 and irradiated while scanning the laser beam on the upper surface of the substrate 709 to be processed. It is possible to do.
[0052]
The gate valve 717 is an entrance for carrying in or out the substrate to be processed 709, and is connected to a substrate transfer chamber installed outside.
[0053]
Further, an outline of a process in which the pulse laser beam is processed into a linear shape inside the optical system 706 in FIG. 7 will be described below with reference to FIG.
[0054]
First, laser light oscillated from a laser oscillator is formed into laser light having a predetermined beam shape and a predetermined energy density distribution by an optical system including optical lenses 801 and 802.
[0055]
The laser beam has its energy density distribution corrected in the beam by two homogenizers 803 and 804.
[0056]
The homogenizer 803 has a role of correcting the energy density in the beam in the width direction of the laser beam finally formed into a linear shape.
[0057]
The homogenizer 804 plays a role of correcting the energy density in the beam in the longitudinal direction of the laser beam finally formed into a linear shape. Since the laser beam is stretched by 10 cm or more in the longitudinal direction, the optical parameters of the homogenizer 35 must be set carefully.
[0058]
Reference numerals 805, 806, and 808 denote optical lenses that play a role of shaping the laser beam into a linear shape, and 807 denotes a mirror.
[0059]
In the configuration shown in the present embodiment, the homogenizer 804 is configured by 12 cylindrical lenses (width 5 mm), and the incident laser light is divided into approximately 10 parts.
[0060]
That is, the homogenizer is arranged with a slight margin with respect to the laser beam so that the inner 10 cylindrical lenses are mainly used.
[0061]
In the present embodiment, the length of the linear laser beam finally irradiated is 12 cm in the longitudinal direction.
[0062]
By adopting the configuration as described above, the uneven energy density in the longitudinal direction of the linear laser beam can be corrected, and uniform annealing can be given to the semiconductor material.
[0063]
DETAILED DESCRIPTION OF THE INVENTION
When annealing a semiconductor film using a pulse oscillation type excimer laser, a variation distribution of various parameters that indirectly or directly affect the laser crystallization process is limited. By doing so, the uniformity of the obtained crystalline silicon film can be increased. Moreover, the reproducibility can be enhanced.
[0064]
【Example】
[Example 1]
In this example, a thin film transistor is manufactured based on the invention disclosed in this specification. FIG. 2 shows a manufacturing process of the thin film transistor described in this embodiment.
[0065]
The role of the laser annealing step in this embodiment is to promote the crystallization of the amorphous silicon film and the activation of impurity ions implanted into the active layer.
[0066]
First, a silicon oxide film is formed as a base film 202 on a glass substrate indicated by 201 to a thickness of 2000 mm by sputtering or plasma CVD. In particular, according to the sputtering method using an artificial quartz target, the crystal grain size of a crystalline silicon film to be formed later becomes large, and an active layer with good crystallinity can be formed.
[0067]
Next, an amorphous silicon film 203 is formed by plasma CVD or low pressure thermal CVD. The film thickness of the amorphous silicon film 203 may be 100 to 2000 mm (preferably 100 to 1000 mm, typically 200 to 500 mm), and the film thickness distribution within the substrate surface is within ± 5%, preferably Within ± 2.5%.
[0068]
The means for controlling the film thickness in the substrate surface cannot be generally described because it varies depending on various film forming conditions such as gas pressure and distance between substrates. However, for example, considering that the film thickness distribution deteriorates due to changes in gas flow at the edge of the substrate to be processed, a susceptor larger than the substrate is prepared in advance, and the film is formed only in the region with a good film thickness distribution. When the substrate is configured to be accommodated, an amorphous silicon film with high uniformity can be easily obtained.
[0069]
Variation in the thickness of the amorphous silicon film is not preferable because it directly leads to variation in crystallinity of the crystalline silicon film. Therefore, a crystalline silicon film with good uniformity can be obtained by keeping the variation within the above range.
[0070]
In consideration of the denseness of the film quality and the crystallinity of the crystalline silicon film obtained later, it is preferable to use a low pressure CVD method as a film forming means for the amorphous silicon film 203.
[0071]
In this case, disilane (Si ₂ H ₆ ) And trisilane (Si _Three H ₈ ) Etc. may be used. The film forming temperature is 420 to 500 ° C. In this embodiment, a 500-nm amorphous silicon film is formed at a film forming temperature of 450 ° C. using disilane. The film forming temperature (temperature in the substrate surface) is set within ± 1 ° C. in order to improve film quality and film thickness uniformity.
[0072]
Normally, this film forming temperature is performed by a heating means such as a heater. However, since the single wafer type becomes mainstream when the substrate to be processed is enlarged, the heating means by lamp annealing takes uniformity of temperature distribution in that case. Is effective.
[0073]
Whether using a heater or lamp annealing, a thermocouple may be installed on a stage (including a susceptor) that supports the substrate, and the temperature control may be performed by feeding back the measurement result.
[0074]
In this way, the state shown in FIG. When this state is obtained, a crystallization process is performed on the amorphous silicon film 203 by laser light irradiation. The laser crystallization process is performed using the laser apparatus having the configuration shown in FIG.
[0075]
As the laser light, an excimer laser using XeCl, KrF, ArF or the like as an excitation gas or the fourth harmonic of an Nd: YAG laser can be used. In this embodiment, a KrF excimer laser (wavelength: 248 nm). Is used. When it is necessary to further reduce the burden on the optical system and the oscillator, an XeCl excimer laser (wavelength 308 nm) having a longer wavelength than that of the KrF excimer laser and having a weak photon energy is effective.
[0076]
First, the atmosphere for laser annealing is an atmosphere containing helium. Helium has a small specific heat and is excellent in thermal conductivity. This is extremely effective for accurately controlling the substrate temperature later.
[0077]
Further, in the laser annealing in an atmosphere containing oxygen, a natural oxide film is formed during the processing to protect the silicon film surface, so that the roughness of the silicon film surface can be suppressed. Suppressing this roughness is very effective in forming a good MOS interface when a thin film transistor is completed.
[0078]
Therefore, in this embodiment, oxygen and helium are introduced from the gas supply pipes 714 and 715 at a ratio of 1: 1 to create an atmosphere in which oxygen gas and helium gas are mixed, and laser annealing is performed at a gas pressure of 1 to 760 torr.
[0079]
With such a configuration, it is possible to accurately control the in-plane temperature distribution of the substrate to be processed and minimize the roughness of the silicon film surface.
[0080]
In addition, it is preferable that the oxygen gas or helium gas introduced at this time has a purity exceeding 7 N in order to prevent impurities from being mixed into the film during laser irradiation.
[0081]
Further, during the laser irradiation, it is effective to circulate the atmospheric gas in order to ensure the gas purity in the laser irradiation chamber 701. For example, new gas may always be introduced and old gas may be exhausted, or a gas processor or the like may be installed to constantly purify the atmospheric gas.
[0082]
In forming the atmosphere, it is desirable to remove as much as possible C (carbon) element and N (nitrogen) element in the laser irradiation chamber 701 in advance. NH which is a compound such as C element or N element _Three , CO, CO ₂ This can be a factor that adversely affects semiconductor devices.
[0083]
Furthermore, C element and N element are SiC on the silicon film surface. _X And SiN _X Such a hard film may be formed, and there is a concern that a contact failure may be caused later in the source / drain region.
[0084]
For the above reason, the inside of the laser irradiation chamber 701 is first 10 ^-6 It is desirable to introduce oxygen gas and helium gas after pulling a high vacuum below torr. In this way, by preliminarily keeping the inside of the laser irradiation chamber 701 as clean as possible, the concentration of impurities containing C element and N element in the composition can be reduced to 1 ppm or less.
[0085]
Note that, as described above, the laser apparatus used in this embodiment evacuates the laser irradiation chamber 701 with a vacuum exhaust pump 713 corresponding to a high vacuum such as a turbo molecular pump or a cryopump. Can be formed.
[0086]
Next, the laser processing temperature (substrate temperature) is controlled in the temperature range of 300 to 650 ° C. by the heater built in the substrate support 710 together with the stage 711 holding the substrate 709 to be processed.
[0087]
In this embodiment, the substrate temperature is set within 450 ° C. ± 5 ° C. (preferably within ± 2 ° C.). When controlling the temperature, it is important to keep it within such a range in order to improve the uniformity of crystallinity. In addition, it has been confirmed that the crystallinity itself is improved in the study by the present inventors.
[0088]
The uniformity of crystallinity increases because the laser irradiation energy can gain a certain margin if the substrate temperature is raised, so in a laser device that becomes unstable in a high output state, the laser This is because variations in irradiation energy can be suppressed.
[0089]
This temperature control is performed while feeding back the measurement result obtained by the thermocouple 712 installed on the stage 711. Further, since the atmosphere contains helium as described above, the substrate temperature can be easily controlled.
[0090]
By the way, since the optimum value of the irradiation energy density of the laser beam varies depending on the crystallinity of the crystalline silicon film, the present inventors obtain the optimum value by conducting experimental conditions in advance.
[0091]
In this embodiment, 230 mJ / cm for crystallizing the amorphous silicon film 203. ² Irradiate laser beam with energy density of. The laser beam scanning speed is 2.4 mm / s and the frequency is 40 Hz.
[0092]
The laser beam used in this embodiment is emitted from a pulse oscillation type device, and scans the irradiated surface (in this case, the silicon film surface) while a plurality of pulses are superimposed.
[0093]
Here, the laser energy distribution for each pulse will be described with reference to FIG. FIG. 11 shows only an ideal laser waveform of one pulse, and other waveforms are omitted. The horizontal axis is the pulse width and the unit is time. The vertical axis represents laser energy (may be expressed by density), and the unit is arbitrary.
[0094]
In the present invention, it is most important to precisely control the laser energy, and directly affects the crystallinity of the crystalline silicon film from which this control can be obtained.
[0095]
Parameters that should be precisely controlled with laser energy include peak value, half-value width, and threshold width. These parameters will be described below with reference to FIG.
[0096]
First, the peak value Emax is the maximum value of the laser energy as shown in FIG. However, although FIG. 11 shows an ideal waveform, it is a general problem that the actual peak value varies greatly within the irradiation time. The variation in the peak value greatly affects the crystallinity as the variation in the energy density irradiated on the irradiated surface.
[0097]
Next, regarding the half width, the half width corresponds to a pulse width (unit: time) when the laser energy takes a value half of the peak value Emax (represented by 1/2 Emax). In other words, this corresponds to the average pulse width when one-pulse laser annealing is performed. Therefore, in general, the half width is often discussed as the pulse width.
[0098]
Next, the threshold width corresponds to a pulse width (unit is time) when the laser energy takes a threshold value (also referred to as a melting threshold, which is expressed as Eth here). This threshold width is 1/4 to 1/2 of the full width at half maximum.
[0099]
The threshold value (melting threshold value) is a threshold value at which melting of the irradiated surface starts when the irradiated surface (in this case, the silicon film surface) is irradiated with laser energy higher than that. Accordingly, laser light having an energy sufficient to melt the irradiated surface is always irradiated within the range of the threshold width.
[0100]
In the present specification, the range of the threshold width in FIG. 11 is referred to as an effective energy region for melting the silicon film, that is, an effective melting region. Therefore, in the present invention, precise control of this effective melting region is the most important factor for suppressing variations in the laser crystallization process.
[0101]
Therefore, in controlling the effective melting region, it is indispensable to control variations in the peak value Emax, the half-value width, and the threshold width. Therefore, as proposed in the present invention, it is important to control the peak value Emax, the half width, and the threshold width within ± 3%, preferably within ± 1.5%.
[0102]
In this embodiment, the variation of the peak value Emax is controlled based on the energy detected by the control unit 705 by extracting a part of the laser light oscillated from the laser oscillator 702 shown in FIG. .
[0103]
Further, as described above, it is very effective to raise the substrate temperature and to provide a margin for the laser energy necessary for crystallization in order to suppress the variation of the peak value Emax.
[0104]
Further, the purity of the excitation gas (Kr, F, Xe, Cl, etc.) in the laser oscillator indicated by 702 in FIG. 7 is very important for the control of the half width and the threshold width. This is because when the purity of the excitation gas falls, the oscillation of the laser light itself fluctuates, which affects the rise of the laser pulse.
[0105]
Therefore, normally, for example, gases such as Kr and F are diluted with an inert gas such as Ne and introduced into the laser oscillator 702. These gases have a purity of more than 7N, so that the fluctuation of the laser beam is eliminated. Desirable for.
[0106]
Even when an excitation gas having a high purity is used, halides are generated during long-term use, which causes the purity of the gas in the laser oscillator 702 to drop.
[0107]
Therefore, the purity of the excitation gas is maintained by connecting a gas processor 703 to the laser oscillator 702 in the laser apparatus used in this embodiment. The gas processor 703 corresponds to a purification apparatus that circulates the excitation gas in the laser oscillator 702 and captures and removes the halide using a cryogenic capture medium.
[0108]
As described above, the peak value Emax, the half-value width, and the threshold width are controlled within ± 3%, preferably within ± 1.5% by using the laser device having the configuration shown in FIG. 7 used in this embodiment. It becomes possible to do.
[0109]
By performing such precise control of the peak value Emax, the half-value width, and the threshold width, it is possible to precisely control the effective melting region. That is, laser annealing of the irradiated surface can always be performed with uniform laser energy, so that a crystalline silicon film having excellent uniformity with no variation in crystallinity can be obtained.
[0110]
In this embodiment, laser annealing with precise control as described above is performed for 100 to 5000 nsec within an arbitrary unit area on the surface of the silicon film. This time is a processing time for obtaining the required crystallinity, which the present inventors have clarified from experiments.
[0111]
However, since the present inventors consider only the time when laser annealing is performed in the effective melting region as the processing time, the integrated value of the threshold width is considered as the processing time. Therefore, when the threshold width is tn, the relationship with the processing time can be expressed as in Equation 1.
[0112]
[Expression 1]

[0113]
That is, the integrated value of the time during which laser annealing is performed in the effective melting region is the processing time. For example, the laser annealing according to the present example has a half width of 30 to 40 nsec, and a threshold width (time of irradiation in the effective melting region) is 10 to 20 nsec.
[0114]
In addition, since scanning is performed while superimposing a linear laser having a lateral width of 0.9 mm at a scanning speed of 2.4 mm / s, laser pulse irradiation is performed about 15 times per unit area (m = 15 in Equation 1 above). Become. Therefore, in this embodiment, the laser irradiation time in the effective melting region is 150 to 300 nsec.
[0115]
Note that it is possible to increase the number of irradiations per unit area by increasing the frequency of the laser pulse or slowing the scanning speed, and appropriately adjust the laser irradiation time in the effective melting region.
[0116]
By performing laser annealing as described above, a crystalline silicon film 204 as shown in FIG. 2B can be obtained. Since the crystalline silicon film 204 is formed by laser annealing with precise control, it is extremely excellent in uniformity and reproducibility.
[0117]
Note that excellent uniformity means a level at which display unevenness and stripes do not occur when an active matrix type electro-optical device is finally configured, or a level at which characteristic variations from lot to lot do not cause a problem in practice. Means.
[0118]
Further, since the C element and the N element inside the crystalline silicon film 204 are thoroughly eliminated during laser annealing, the concentration near the interface is 2 × 10. ¹⁹ cm ^-3 Hereinafter, the concentration in the bulk is 5 × 10 ¹⁸ cm ^-3 It is as follows.
[0119]
This concentration is a value determined by the minimum value of SIMS analysis (secondary ion mass spectrometry). Further, the term “bulk” here refers to the inside of the film other than the vicinity of the interface.
[0120]
Next, patterning is performed on the obtained crystalline silicon film 204 to form an island-shaped semiconductor layer 205 serving as an active layer of the thin film transistor. (Fig. 2 (C))
[0121]
Note that although an example in which the active layer is formed after laser annealing is described in this embodiment, laser light irradiation may be performed after the active layer is formed.
[0122]
In this case, since the annealing is performed on a minute area, the output of the laser beam required for obtaining a predetermined effect can be reduced. That is, variation can be suppressed by providing a margin for the laser output.
[0123]
When the active layer (island-like semiconductor layer) 205 is obtained, a silicon oxide film functioning as the gate insulating film 206 is formed so as to cover the active layer 205. Here, as the gate insulating film 206, a silicon oxide film having a thickness of 1000 mm is formed by a plasma CVD method. _X N _Y The silicon oxynitride film | membrane shown by may be sufficient.
[0124]
Next, an aluminum film (not shown) for forming the gate electrode is formed to a thickness of 3000 mm. In this aluminum film, 0.2% by weight of scandium is contained for the purpose of suppressing the generation of hillocks and whiskers in the subsequent process.
[0125]
Hillocks and whiskers are needle-like or stab-like projections formed by abnormal growth of aluminum in the process of heating. These cause undesirably causing a short circuit of the electrode and wiring.
[0126]
Also, other conductive materials can be used as the material constituting the gate electrode.
[0127]
Next, a resist mask (not shown) is arranged, and an aluminum film (not shown) is patterned using this mask. In this way, a pattern serving as a base constituting the gate electrode 207 is formed. After the pattern for forming the gate electrode is formed, an anodic oxide film is formed in a state where a resist mask (not shown) is disposed.
[0128]
Here, an aqueous solution containing 3% oxalic acid is used as the electrolytic solution. This anodic oxidation step is performed in the above aqueous solution by passing an electric current between the electrodes using an aluminum film pattern (not shown) as an anode and platinum as a cathode. In this way, an anodic oxide film 208 is formed on the exposed surface of the aluminum film pattern.
[0129]
The anodic oxide film 208 formed in this step has a porous shape (porous shape). Here, since a resist mask (not shown) exists, this porous anodic oxide film is formed on the side surface of the pattern as indicated by 208.
[0130]
The film thickness (growth distance) of the porous anodic oxide film 208 is 3000 mm. The offset gate region can be formed with the thickness of the porous anodic oxide film. The film thickness of the anodic oxide film 208 can be controlled by the anodic oxidation time.
[0131]
Next, the resist mask (not shown) is removed and anodic oxidation is performed again. In this step, an electrolytic solution obtained by neutralizing an ethylene glycol solution containing 3% tartaric acid with ammonia is used.
[0132]
Here, since the electric field solution penetrates into the porous anodic oxide film 208, an anodic oxide film 209 having a dense and strong film quality is formed in contact with the gate electrode 207 as indicated by 209.
[0133]
The thickness of the anodic oxide film 209 formed in this step can be controlled by adjusting the applied voltage during anodic oxidation. Here, the thickness of the anodic oxide film 209 is set to 900 mm.
[0134]
If the thickness of the anodic oxide film 209 having a dense film quality is increased, an offset gate region can be formed later by the thickness. However, since the thickness is thin here, the contribution in forming the offset gate region is ignored.
[0135]
In this way, the state shown in FIG. After obtaining the state shown in FIG. 2C, impurity ions are implanted to form the source and drain regions. Here, P (phosphorus) ions are implanted in order to manufacture an N-channel thin film transistor. The dose is 1 × 10 ¹⁵ Atom / cm ² And
[0136]
Note that in the case of manufacturing a P-channel thin film transistor, B (boron) ions are implanted.
[0137]
When impurity ions are implanted in the state of FIG. 2C, impurity ions are implanted into the regions 210 and 211. Impurity ions are not implanted into the regions 212 and 213. The regions 212 and 213 function as offset gate regions that do not function as channel formation regions because no voltage is applied by the gate electrode 207.
[0138]
In addition, a region 214 is a region functioning as a channel formation region. In this way, the state shown in FIG.
[0139]
When the impurity ion implantation is completed, laser light irradiation is performed to activate the region implanted with the impurity ions and anneal the region damaged by ion bombardment (hereinafter referred to as laser activation).
[0140]
In this laser activation process, a highly uniform annealing effect can be obtained by performing the same precise control with the same apparatus as the laser crystallization process. However, the heating temperature of the substrate to be processed at the time of laser irradiation must be determined in consideration of the heat resistance of the gate electrode 207 made of an aluminum film.
[0141]
Accordingly, in this embodiment, the laser activation step is performed by heating the substrate temperature to 200.degree. Of course, if the gate electrode 207 is another heat-resistant material, the substrate temperature can be raised according to the heat resistance.
[0142]
In addition, since the laser irradiation conditions for laser activation also change depending on the crystallinity of the active layer 205 and the amount of impurity ions implanted, it is necessary to obtain the optimum value by repeating experimental conditions in advance. In this example, 160 mJ / cm ² Laser irradiation is performed at an energy density of.
[0143]
After obtaining the state shown in FIG. 2D, a silicon nitride film or a silicon oxide film is formed as the interlayer insulating film 215. As the interlayer insulating film 215, a laminated film of a silicon nitride film and a silicon oxide film may be used. A laminated film of a silicon nitride film and a resin film may be used.
[0144]
After the interlayer insulating film 215 is formed, contact holes are formed. Then, the source electrode 216 and the drain electrode 217 are formed. In this manner, the thin film transistor shown in FIG. 2E is completed.
[0145]
The thin film transistor manufactured as described above has high performance that realizes stable operation because the crystallinity of the active layer which is the heart thereof is extremely uniform.
[0146]
The N-channel thin film transistor manufactured in this way has a threshold value of about 1.5 V and an on-current of 10 to 15 μA under the drive conditions of the drain voltage Vd = 14 V and the gate voltage Vg = 10 V. Good electrical characteristics were exhibited.
[0147]
[Example 2]
In this embodiment, an example in which the crystallization of the amorphous silicon film in Embodiment 1 is performed by heat treatment will be described. In this case, an example is shown in which a metal element that promotes crystallization is used. Of course, crystallization may be performed without using a metal element.
[0148]
Therefore, this embodiment aims to further improve the crystallinity of the crystalline silicon film formed by heat treatment by performing laser annealing.
[0149]
Since the configuration other than the crystallization method is the same as that of the first embodiment, only differences from the first embodiment will be described with reference to FIG.
[0150]
First, a silicon oxide film is formed as a base film 302 on a substrate indicated by 301 to a thickness of 2000 mm by sputtering or plasma CVD.
[0151]
Next, an amorphous silicon film 303 is formed to a thickness of 200 to 500 mm by plasma CVD or low pressure thermal CVD. As in the first embodiment, the amorphous silicon film 303 has a thickness distribution within ± 5%, preferably ± 2.5% within the substrate surface.
[0152]
After the amorphous silicon film 303 is formed, UV light is irradiated in an oxygen atmosphere to form an extremely thin oxide film (not shown) on the surface of the amorphous silicon film 303. This oxide film is for improving the wettability of the solution in the solution coating step when the metal element is introduced later. (Fig. 3 (A))
[0153]
Next, a metal element for promoting crystallization of the amorphous silicon film 303 is introduced. Details of this technique are described in Japanese Patent Laid-Open Nos. 6-232059 and 7-321339 by the present inventors.
[0154]
In this embodiment, Ni (nickel) is used as a metal element for promoting this crystallization. In addition to Ni, Fe, Co, Cu, Pd, Pt, Au, etc. can be used.
[0155]
Here, Ni element is introduced using a nickel acetate solution. Specifically, first, a nickel acetate solution adjusted to a predetermined Ni concentration (here, 10 ppm (weight conversion)) is dropped onto the surface of the amorphous silicon film 303. In this way, the water film 304 of the nickel acetate solution is formed. (Fig. 3 (B))
[0156]
Next, spin drying is performed using a spin coater (not shown), and excess solution is blown off. By this solution coating process, an extremely thin nickel layer is formed on an oxide film (not shown) on the amorphous silicon film 303.
[0157]
In this state, a crystalline silicon film 305 is obtained by performing a heat treatment at 500 to 700 ° C., typically 600 ° C. for 4 hours in an inert atmosphere or an inert atmosphere containing hydrogen. (Figure 3 (C))
[0158]
At this time, it is important that the temperature of the heat treatment is within ± 5 ° C., preferably within ± 2 ° C. within the substrate surface. This is because crystallization by this heat treatment determines the crystallinity in the grains of the crystalline silicon film.
[0159]
In this case as well, as in the first embodiment, it is necessary to perform precise temperature control by providing a temperature measuring element such as a thermocouple on the susceptor that supports the substrate and monitoring the substrate temperature.
[0160]
Next, when the crystalline silicon film 305 is obtained, laser light irradiation for improving crystallinity is performed. This laser annealing needs to be performed with the same precise control as the laser crystallization process described in the first embodiment. Further, the laser device having the configuration shown in FIG.
[0161]
In this laser annealing step, the crystalline silicon film is irradiated with laser in the ultraviolet region, and the crystalline silicon film is once melted and then recrystallized to improve the crystallinity.
[0162]
Accordingly, the crystalline silicon film is less likely to absorb light having a wavelength in the ultraviolet region than the amorphous silicon film, and thus it is necessary to irradiate laser light having a larger energy. This laser energy needs to be set to a larger value as the crystallinity of the crystalline silicon film is better, and is determined by experimental conditions. In this example, 260 mJ / cm ² Laser irradiation is performed at an energy density of. (Fig. 3 (D))
[0163]
As described above, the crystalline silicon film 306 with significantly improved crystallinity can be obtained by laser irradiation. The crystalline silicon film 306 thus obtained is also excellent in uniformity and reproducibility as in the first embodiment.
[0164]
Example 3
In this embodiment, an example in which a thin film transistor including an LDD (lightly doped drain) region is manufactured by improving the manufacturing process of the thin film transistor described in Embodiment 1 (see FIG. 2) will be described.
[0165]
First, in accordance with the manufacturing process shown in Embodiment 1, the process up to the impurity implantation process shown in FIG.
[0166]
Next, the porous anodic oxide film 208 is removed. Then, impurity ions are implanted again. This impurity ion implantation is performed by reducing the dose of the same impurity ion as the previous impurity ion formed for forming the source region 210 and the drain region 211.
[0167]
As a result, impurity ions (for example, P ions) are implanted into the regions indicated by 212 and 213 at a lower concentration than the source and drain regions. Thus, low concentration impurity regions are formed in the regions 212 and 213. Here, the low concentration impurity region 213 on the drain region 211 side is a region generally referred to as an LDD (lightly doped drain) region.
[0168]
When each impurity implantation region is formed, laser activation similar to that in Example 1 is performed. However, according to the study by the present inventors, the low concentration impurity region (especially the LDD region) is likely to reflect the influence of variation in laser energy. Is known.
[0169]
Therefore, performing laser annealing with precise control in accordance with the present invention is a very effective means for manufacturing a thin film transistor having a low concentration impurity region with excellent uniformity, and thus uniform electrical characteristics. .
[0170]
Thereafter, the thin film transistor is completed through the process shown in FIG.
[0171]
The LDD region has the same function as the offset gate region. That is, it has a function of relaxing a strong electric field between the channel formation region and the drain region and reducing the value of the leakage current during the OFF operation. An N-channel thin film transistor has a function of suppressing the generation of hot carriers and the problem of deterioration due to hot carriers.
[0172]
Example 4
This embodiment shows an example in which an active matrix liquid crystal display device including a thin film transistor (TFT) manufactured by using the present invention is configured. An outline of a manufacturing process of the pixel TFT disposed in the pixel region and the circuit TFT disposed in the peripheral driver circuit will be described with reference to FIGS.
[0173]
In addition, since the control regarding the dispersion | variation in various parameters between manufacturing processes is the same as that of Example 1, it does not dare explain in a present Example. In this embodiment, a manufacturing process of a circuit TFT and a pixel TFT will be described based on the structure of the present invention described in Embodiment 1.
[0174]
First, a glass substrate 401 represented by Corning 7059 or the like is prepared. Of course, a quartz substrate or a semiconductor material having an insulating surface may be used. Next, a base film 402 made of a silicon oxide film is formed to a thickness of 2000 mm. The base film 402 may be formed by sputtering or plasma CVD.
[0175]
An amorphous silicon film having a thickness of 100 to 1000 mm (not shown) is formed thereon by a plasma CVD method or a low pressure thermal CVD method. In this embodiment, the film is formed to a thickness of 500 mm by a low pressure thermal CVD method.
[0176]
Next, an amorphous silicon film (not shown) is crystallized by an appropriate crystallization method. This crystallization is performed by heat treatment at 550 to 650 ° C. for 1 to 24 hours, or irradiation with laser light having wavelengths of 248, 265, and 308 nm. At this time, both methods may be used in combination, or an element (for example, Ni) that promotes crystallization may be added during crystallization.
[0177]
Next, the crystalline silicon film obtained by crystallizing the amorphous silicon film is patterned to form active layers 403 and 404 made of island-like semiconductor layers.
[0178]
On top of that, a 1200 mm thick SiO _X N _Y Is formed by a plasma CVD method. This silicon oxynitride film 405 functions as a gate insulating film later. Note that a silicon oxide film or a silicon nitride film may be used.
[0179]
Next, an aluminum film 406 to which 0.2 wt% scandium is added is formed to a thickness of 4000 mm by DC sputtering. The addition of scandium has the effect of suppressing the generation of hillocks and whiskers on the aluminum film surface. This aluminum film 406 functions as a gate electrode later.
[0180]
Instead of the aluminum film, other metal materials such as Mo, Ti, Ta, Cr, etc. may be used, or a conductive film such as polysilicon or silicide material may be used. .
[0181]
Next, anodic oxidation is performed in the electrolytic solution using the aluminum film 406 as an anode. As the electrolytic solution, an ethylene glycol solution of 3% tartaric acid neutralized with aqueous ammonia and adjusted to PH = 6.92 is used.
Moreover, it processes as a formation current 5mA and the ultimate voltage 10V by using platinum as a cathode.
[0182]
The dense anodic oxide film (not shown) formed in this way has an effect of improving the adhesion to the photoresist later. Further, the film thickness can be controlled by controlling the voltage application time. (Fig. 4 (A))
[0183]
When the state of FIG. 4A is obtained in this way, the aluminum film 406 is patterned to form a prototype of a later gate electrode. Then, second anodic oxidation is performed to form porous anodic oxide films 407 and 408. (Fig. 4 (B))
The electrolytic solution is a 3% oxalic acid aqueous solution, which is treated with platinum as a cathode at a formation current of 2 to 3 mA and an ultimate voltage of 8V.
[0184]
At this time, anodic oxidation proceeds in a direction parallel to the substrate. Further, the length of the porous anodic oxide films 407 and 408 can be controlled by controlling the voltage application time.
[0185]
Further, after removing the photoresist with a special stripping solution, a third anodic oxidation is performed. At this time, an electrolytic solution is used in which 3% of an ethylene glycol solution of tartaric acid is neutralized with ammonia water and adjusted to PH = 6.92. And it processes as a formation current 5-6mA and the ultimate voltage 100V by using platinum as a cathode.
[0186]
The anodic oxide films 409 and 410 formed at this time are very dense and strong. Therefore, it has an effect of protecting the gate electrodes 411 and 412 from damage caused in a subsequent process such as a doping process. Further, since the strong anodic oxide films 409 and 410 are difficult to be etched, there is a problem that the etching time becomes long when the contact hole is formed. Therefore, it is desirable that the thickness is 1000 mm or less.
[0187]
Next, in the state shown in FIG. 4B, impurities are implanted into the active layers 403 and 404 by ion doping. For example, P (phosphorus) may be used as an impurity if an N-channel TFT is manufactured, and B (boron) may be used as an impurity if a P-channel TFT is manufactured.
[0188]
By this ion implantation, source / drain regions 413 and 414 of the circuit TFT and source / drain regions 415 and 416 of the pixel TFT are formed in a self-aligned manner.
[0189]
Next, the porous anodic oxide films 407 and 408 are removed and ion implantation is performed again. The dose amount at this time is a dose amount lower than the previous ion implantation.
[0190]
By this ion implantation, the low concentration impurity regions 417 and 418 of the circuit TFT, the channel formation region 421, the low concentration impurity regions 419 and 420 of the pixel TFT, and the channel formation region 422 are formed in a self-aligned manner.
[0191]
When the state shown in FIG. 4C is obtained, irradiation with KrF excimer laser light and thermal annealing are then performed. In this embodiment, the energy density of the laser light is 160 to 170 mJ / cm. ² The thermal annealing is performed at 300 to 450 ° C. for 1 hour. By this step, the crystallinity of the active layers 403 and 404 damaged by the ion doping step can be improved.
[0192]
Next, a silicon nitride film (or a silicon oxide film) may be formed as the first interlayer insulating film 423 to a thickness of 3000 to 5000 mm by plasma CVD. The interlayer insulating film 423 may have a multilayer structure. (Fig. 4 (D))
[0193]
After the first interlayer insulating film 423 is formed, a contact hole is formed by etching the interlayer insulating film on the source region 413 of the circuit TFT, the gate electrode 411, the drain region 414, and the source region 415 of the pixel TFT.
[0194]
Then, the source electrode 424 of the circuit TFT, the gate electrode 425, the drain electrode 426, and the source electrode 427 of the pixel TFT are formed using a laminated film of a material mainly containing aluminum and titanium.
[0195]
Next, a silicon nitride film (or a silicon oxide film) may be formed as the second interlayer insulating film 428 to a thickness of 3000 to 5000 mm by plasma CVD. The interlayer insulating film 428 may have a multilayer structure. (Fig. 4 (E))
[0196]
After the second interlayer insulating film 428 is formed, the interlayer insulating film on the drain region 416 of the pixel TFT is etched to form a contact hole, and a pixel electrode 429 made of a transparent conductive film is formed. In this way, circuit TFTs and pixel TFTs as shown in FIG. 4E are formed.
[0197]
FIG. 5 shows a schematic diagram of an active matrix type liquid crystal display device in which the circuit TFT and the pixel TFT described above are arranged. In FIG. 5, 501 is a glass substrate, 502 is a horizontal scanning circuit, and 503 is a vertical scanning circuit.
[0198]
The image signal is taken in from the outside through the input terminal 504 and sent to the pixel electrode using the pixel TFT controlled by the horizontal / vertical scanning circuits 502 and 503 as a switching element. Then, image display is performed in the pixel region 504 by changing the electro-optical characteristics of the liquid crystal sandwiched between the pixel electrode and the counter substrate. Reference numeral 506 denotes a common electrode for applying a predetermined voltage to the counter substrate.
[0199]
Therefore, the circuit TFT as shown in FIG. 4 can form the horizontal / vertical scanning circuits 502 and 503 as a CMOS structure in which the N channel type and the P channel type are combined in a complementary manner.
[0200]
In addition, as shown in an enlarged view 507 of the pixel region 504, the pixel TFT is disposed at each intersection of the gate wiring and the source wiring intersecting in a matrix form, and serves as a switching element that controls the amount of charge entering and exiting the pixel electrode. it can.
[0201]
The apparatus shown in FIG. 5 having the above-described configuration performs image display by the operation generally described above. The operating frequency of the peripheral circuit is 3 MHz or more, and the contrast ratio of the display unit is 100 or more. It is a performance panel.
[0202]
In the active matrix liquid crystal display device shown in this embodiment, since the active layers of the circuit TFT and the pixel TFT have crystallinity with extremely excellent uniformity and reproducibility, the characteristics of all thin film transistors are uniform.
[0203]
In particular, since the characteristics of the pixel TFTs are uniform, a horizontal stripe pattern is not generated during image display, and therefore, a very useful effect is produced in the industry.
[0204]
Example 5
In the first to fourth embodiments, an example in which a planar thin film transistor is manufactured has been described. However, the active layer configured according to the present invention is not limited to a planar type, and can be applied to all types of thin film transistors.
[0205]
In this embodiment, an example in which an inverted staggered thin film transistor is configured will be described as an example. Such an inverted staggered thin film transistor can be formed by the technique described in Japanese Patent Laid-Open No. 5-754252 or Japanese Patent Laid-Open No. 7-99317. Accordingly, the detailed conditions of the present embodiment, the thickness of the coating, etc. should be referred to the above publication.
[0206]
Further, although not described, control similar to that in the first embodiment is performed for factors that affect laser annealing.
[0207]
First, in FIG. 6A, reference numeral 601 denotes a substrate having an insulating surface. A gate electrode 602 made of a conductive material is formed thereon. The gate electrode 602 is preferably a material having excellent heat resistance in consideration of later crystallization of the silicon film.
[0208]
Further, an anodic oxide film may be formed on the surface and side surfaces of the gate electrode 602 by an anodic oxidation method which is a known technique in order to increase the breakdown voltage. Further, an LDD region or an HRD region may be provided using an anodized film formed by this anodizing method. This technique is described in Japanese Patent Laid-Open No. 7-169974 by the present inventors.
[0209]
Next, a silicon oxide film 603 functioning as a gate insulating film is formed by a plasma CVD method, and an amorphous silicon film (not shown) is formed thereon by a low pressure thermal CVD method. This amorphous silicon film (not shown) is crystallized by the means shown in the first embodiment, and becomes a crystalline silicon film 604 constituting an active layer. (Fig. 6 (A))
[0210]
Next, when the crystalline silicon film 604 is obtained, patterning is performed to form an island-shaped semiconductor layer constituting the active layer 605.
[0211]
Next, a silicon nitride film (not shown) is formed so as to cover the active layer 605. Then, a resist mask (not shown) is provided on the silicon nitride film, and the silicon nitride film is selectively etched away by patterning by a backside exposure method.
[0212]
The island pattern 606 made of the silicon nitride film thus formed functions as a mask material in a later ion implantation process.
[0213]
Thus, the state of FIG. 6B is obtained. When this state is obtained, an impurity imparting one conductivity is implanted into the exposed active layer 605. This step may be performed by a known ion implantation method. After ion implantation, impurity ions are activated by laser annealing or the like. Needless to say, this laser annealing is also performed based on the present invention.
[0214]
Thus, a source region 607 and a drain region 608 are formed in the active layer. Further, a region where ions are not implanted by the island pattern 606 becomes a channel formation region 609. (Fig. 6 (C))
[0215]
When the state of FIG. 6C is obtained, a silicon oxide film 610 is formed as an interlayer insulating film by a plasma CVD method. Then, contact holes reaching the source region 607 and the drain region 608 are formed.
[0216]
Then, a source electrode 611 and a drain electrode 612 made of a conductive material are formed, so that an inverted staggered thin film transistor as shown in FIG. 6D is completed.
[0217]
As described above, the present invention can be sufficiently applied to an inverted staggered thin film transistor. In the inverted staggered thin film transistor, the gate electrode 602 is disposed below the active layer. Therefore, when laser annealing is used for activation of impurity ions, the gate electrode 602 is not shielded by the gate electrode 602 and is uniform over the entire active layer. It has the advantage that it can be processed.
[0218]
Further, because of the structure, there is an advantage that a highly reliable transistor can be configured which is resistant to contamination from the base 601 and the like.
[0219]
Example 6
The materials of the gate electrode and the gate line in the thin film transistor as described in the first to fifth embodiments are not limited to the aluminum film.
[0220]
As the gate electrode, other conductive materials such as Mo, Ti, Ta, Cr, and W may be used. In addition, a crystalline silicon film imparted with one conductivity can be used as a gate electrode.
[0221]
In particular, when a crystalline silicon film is used as a gate electrode, it has heat resistance equivalent to that of the active layer, which is advantageous in that the margin of the temperature range of the heat treatment in the manufacturing process is increased.
[0222]
For example, when forming a crystalline silicon film constituting an active layer in an inverted staggered structure or improving its crystallinity, it is preferable that the gate electrode has high heat resistance because there is no fear of diffusion of the gate electrode material.
[0223]
Example 7
The thin film transistor as described in the first to sixth embodiments may be formed not only on the insulator surface but also on a conductive film or an interlayer insulating film formed on a semiconductor device.
[0224]
For example, an integrated circuit having a three-dimensional structure in which a thin film transistor using the present invention is formed on an integrated circuit such as an IC formed on a silicon substrate can be configured.
[0225]
An integrated circuit having such a three-dimensional structure has an advantage that a large-scale integrated circuit can be configured while keeping an occupied area small because a semiconductor device is three-dimensionally constructed. This will become increasingly important in the future miniaturization of device sizes.
[0226]
Example 8
In this embodiment, an example is shown in which auxiliary heating is performed on a region immediately before and after a laser beam is scanned during laser irradiation.
[0227]
FIG. 9 is a schematic view focusing on a part of the laser apparatus shown in FIG. Therefore, the same reference numerals as those in FIG. 7 are used except for the differences from the configuration shown in FIG.
[0228]
First, laser irradiation light 901 processed into a linear shape by an optical system is incident in a direction substantially perpendicular to the substrate, and is irradiated to an amorphous silicon film 903 formed on a substrate 902 having an edge surface. The
[0229]
The irradiation with the laser beam 901 is performed on the entire surface of the amorphous silicon film 903 by moving the stage 711 in the direction indicated by 904. This method can increase productivity and is a very useful method.
[0230]
The difference from the first embodiment is that, in this embodiment, the area immediately before the area where the laser beam 901 is irradiated (having a linear area) (this area also has a linear or rectangular shape) and the area immediately after this area (this area has a linear area) The area is also linear or rectangular), but is heated by the auxiliary heating devices 905 and 906.
[0231]
The auxiliary heating devices 905 and 906 generate heat when Joule heating is performed by a current supplied from the power source 907. In addition, it is necessary that the auxiliary heating devices 905 and 906 be arranged adjacent to the region to be irradiated with the laser light 901 as much as possible.
[0232]
A current is applied to the auxiliary heating devices 905 and 906 so as to heat the amorphous silicon film 903 to a predetermined temperature. This temperature needs to be as high as possible, but it is necessary to consider the heat resistance of the substrate 902. According to the knowledge of the present inventors, for example, when a glass substrate is used, it is desirable to set the temperature as high as possible below the strain point.
[0233]
At this time, the temperature at which the amorphous silicon film 903 is heated by the auxiliary heating devices 905 and 906 is 50 to 100 ° C. higher than the heating temperature of the heater built in the base support 710 provided at the lower part of the stage. Let it be temperature.
[0234]
At this time, thermocouples and the like are also installed in the auxiliary heating devices 905 and 906 to perform precise temperature control so that the temperature distribution is within ± 3 ° C. (preferably 1 ° C.) of the reference value. This temperature control has a great influence in the process of crystallizing the silicon film, so it must be carefully performed.
[0235]
When the laser beam 901 is irradiated, the amorphous silicon film 903 in the region irradiated with the laser beam 901 is instantaneously melted, but the peripheral region of the region is also heated by the auxiliary devices 905 and 906. The time from the irradiation of the laser beam 901 to the solidification can be extended.
[0236]
Therefore, since the rapid phase change is eliminated by performing the laser beam 901 irradiation while being slowly scanned, the stress in the film is relieved and a crystalline silicon film having high uniformity in the substrate surface can be obtained. It becomes.
[0237]
Example 9
This embodiment shows an example in which the auxiliary heating devices 905 and 906 in the configuration shown in Embodiment 8 are used as means by infrared lamp heating. FIG. 10 shows an outline of a laser beam irradiation apparatus shown in this embodiment. Since the basic configuration is the same as in FIG. 9, the same reference numerals are used.
[0238]
In the present embodiment, infrared light from the halogen lamps 11 and 12 is irradiated before and after the region irradiated with the laser light 901 while being scanned. Infrared light is not easily absorbed by the glass substrate and is easily absorbed by the silicon film, so that the silicon film (in this case, the amorphous silicon film 903) can be selectively heated.
[0239]
Heating using this infrared lamp can heat only the amorphous silicon film 903 to a temperature (surface temperature) of about 1000 ° C. even if the substrate 902 is a glass substrate having a relatively low heat resistance. It is.
[0240]
However, since peeling or cracking from the glass substrate exists due to thermal expansion, appropriate heating conditions must be obtained experimentally. In general, the heating from the infrared lamps 11 and 12 is performed so that the surface temperature of the amorphous silicon film 903 is about 700 to 900 ° C.
[0241]
Even in the configuration shown in this example, as in Example 7, there is no sudden phase change, so that the stress in the film is relieved and a crystalline silicon film having high uniformity in the substrate surface can be obtained. Become.
[0242]
Example 10
In this embodiment, an example in which lamp annealing is used as means for heating the substrate to be processed 709 during laser irradiation in the first embodiment will be described.
[0243]
That is, a light source that emits strong light is disposed inside the substrate support base indicated by 710 in FIG. 7 instead of a heater, and the substrate to be processed 709 is heated by the strong light.
[0244]
As the light source, a lamp light source emitting infrared light or ultraviolet light may be used. Heating by such lamp irradiation is an effective heating means in that the temperature rise / fall rate is fast and a highly uniform annealing effect can be obtained.
[0245]
In addition, a fast temperature rise / fall rate means that the throughput is greatly improved, which is very effective in terms of productivity.
[0246]
However, for example, when irradiation is performed with an infrared light lamp, it is necessary to use a stage 711 that has been devised to easily absorb infrared light, such as a SiC film, a glass coated with a Si film, or a quartz substrate. is there.
[0247]
Needless to say, the stage 711 is provided with a thermocouple or the like to monitor the substrate temperature, and feed back the measurement result to control the intensity of strong light emitted from the lamp light source.
[0248]
As described above, when the substrate temperature is controlled by the lamp annealing excellent in controllability and uniformity, laser annealing excellent in uniformity and reproducibility can be performed.
[0249]
Example 11
In this embodiment, a configuration example of an optical system of the laser irradiation apparatus shown in FIG. 7 is shown. FIG. 12 is used for the description. In FIG. 12, laser light oscillated from an oscillator (not shown) enters the homogenizer 21. The homogenizer 21 has a function of correcting the distribution of the irradiation energy density in the width direction of the laser beam that is finally formed in a linear shape.
[0250]
Reference numerals 22 and 23 denote homogenizers having a function of correcting the distribution of the irradiation energy density in the longitudinal direction of the laser beam finally formed in a linear shape. The homogenizer indicated by 24 has the same function as the homogenizer 21.
[0251]
Laser light whose distribution of irradiation energy density is controlled by a homogenizer indicated by 21, 22, 23, and 24 is incident on a lens system including lenses indicated by 25, 26, and 27. In this lens system, first, the lens 25 forms a beam of linear laser light in the longitudinal direction. That is, the laser light is magnified in the lens 25.
[0252]
Further, in the lenses 26 and 27, beam formation in the width direction of the linear laser beam is performed. That is, the laser beam is converged. Reference numeral 28 denotes a mirror for changing the traveling direction of the laser beam.
[0253]
The laser light whose traveling direction is changed by the mirror 28 enters the lens 29. The lens 29 is also provided for beam formation in the width direction of the linear laser beam. The laser light that has passed through the lens 29 becomes linear laser light and is irradiated onto the irradiated surface 30.
[0254]
The irradiated surface 30 corresponds to, for example, the surface of an amorphous silicon film or the surface of a crystalline silicon film on which crystallinity is promoted. Also in the configuration shown in this embodiment, it is important to keep the variation in irradiation energy density for each pulse of laser light within the range shown in FIG.
[0255]
Example 12
The present embodiment relates to a configuration in which the uniformity of irradiation energy density in the longitudinal direction of a linear laser beam is improved. FIG. 13 shows an outline of the optical system of the laser irradiation apparatus in the present embodiment.
[0256]
The apparatus shown in FIG. 13 is a further improvement of the optical system shown in FIG. Specifically, it is characterized in that the number of homogenizers arranged is changed in accordance with the anisotropy of the beam shape. In FIG. 13, the description of the parts denoted by the same reference numerals as those in FIG. 8 is the same as that in FIG.
[0257]
That is, two homogenizers indicated by 804 and 31 are arranged in the longitudinal direction of the linear laser beam that requires more uniform irradiation energy density. On the other hand, there is only one homogenizer, as indicated by 803, for correcting the irradiation energy density in the width direction of the linear laser light that does not require such a uniform uniformity of the irradiation energy density.
[0258]
In general, linear laser light has a problem of density distribution of irradiation energy in the longitudinal direction. On the other hand, the density distribution in the width direction of the linear laser beam is not a big problem because the width is compressed to about several mm.
[0259]
Therefore, as shown in this embodiment, it is useful to increase the number of homogenizers that correct the irradiation energy density in the longitudinal direction of the linear laser light and to make the distribution of the irradiation energy density in that direction more uniform. .
[0260]
【The invention's effect】
By implementing the invention disclosed in this specification, the effect of annealing on a large-area semiconductor thin film using a pulse oscillation type linear laser beam can be made more uniform and highly reproducible.
[0261]
For example, in manufacturing an active matrix display device, a problem caused by variation in the effect of laser annealing using an excimer laser can be solved. That is, it is possible to improve a striped pattern that has been a problem in displaying an image and to produce a high-quality liquid crystal display device.
[0262]
The invention disclosed in this specification can be used not only for an active matrix liquid crystal display device but also for an EL display device having an active matrix type and other flat panel displays.
[Brief description of the drawings]
FIG. 1 is a graph showing variations in laser irradiation energy density for each pulse.
FIGS. 2A and 2B illustrate a manufacturing process of a thin film transistor. FIGS.
FIG. 3 is a diagram showing a process for forming a crystalline silicon film.
4A and 4B illustrate a manufacturing process of a thin film transistor.
FIG. 5 is a diagram showing an outline of an active matrix liquid crystal display device.
6A and 6B illustrate a manufacturing process of a thin film transistor.
FIG. 7 is a schematic view of a laser irradiation chamber.
FIG. 8 is a diagram showing an outline of an optical system of a laser apparatus.
FIG. 9 is a diagram schematically showing a part of a laser device.
FIG. 10 is a diagram schematically showing a part of a laser device.
FIG. 11 is a graph showing the relationship between laser energy and pulse width.
FIG. 12 is a diagram showing an outline of an optical system of a laser apparatus.
FIG. 13 is a diagram showing an outline of an optical system of a laser apparatus.
[Explanation of symbols]
201 glass substrate
202 Base film
203 Amorphous silicon film
204 crystalline silicon film
205 active layer
206 Gate insulation film
207 Gate electrode
208 Porous anodic oxide film
209 Dense anodic oxide film
210 Source area
211 Drain region
212, 213 Low concentration impurity region
214 Channel formation region
215 Interlayer insulation film
216 source electrode
217 Drain electrode
501 glass substrate
502 Horizontal scanning circuit
503 Vertical scanning circuit
504 Input terminal
505 pixel area
506 Common electrode
701 Laser irradiation room
702 Laser oscillator
703 gas processor
704 half mirror
705 Control unit
706 Optical system
707 Mirror
708 quartz window
709 Substrate to be treated
710 Base support base
711 stage
712 Thermocouple
713 Vacuum pump
714, 715 Gas supply pipe
716 Movement mechanism
717 Gate valve
801, 802 Optical lens
803, 804 homogenizer
805, 806 Optical lens
807 mirror
808 optical lens
905, 906 Auxiliary heating device
907 power supply
11, 12 lamp

Claims (12)

Forming an amorphous semiconductor thin film on a substrate having an insulating surface;
In a method for manufacturing a semiconductor device, which includes a step of transforming the amorphous semiconductor thin film into a crystalline semiconductor thin film by irradiating pulsed oscillation type linear laser light,
Within the laser beam irradiation elapsed time, the variation of irradiation energy is distributed within ± 3% from the reference value,
And facilities for auxiliary heating against before and immediately after the region is irradiated with the laser light when performing irradiation of the laser beam,
The film thickness in the substrate surface of the amorphous semiconductor thin film is distributed within ± 5% of the reference value,
The laser beam irradiation is performed in an atmosphere containing oxygen and helium, and the concentration of impurities containing C element and N element present in the atmosphere in the composition is 1 ppm or less,
The concentration of C element and N element in the vicinity of the interface of the crystalline semiconductor thin film is 2 × 10 ¹⁹ cm ⁻³ or less, and the concentration of C element and N element in the bulk of the crystalline semiconductor thin film is 5 × 10 ¹⁸ cm. ^-3 or less, A method for manufacturing a semiconductor device. Forming an amorphous semiconductor thin film on a substrate having an insulating surface;
In a method for manufacturing a semiconductor device, including a step of transforming the amorphous semiconductor thin film into a crystalline semiconductor thin film by performing irradiation with a pulsed oscillation type linear laser beam and heat treatment,
Within the laser beam irradiation elapsed time, the variation of irradiation energy is distributed within ± 3% from the reference value,
And facilities for auxiliary heating against before and immediately after the region is irradiated with the laser light when performing irradiation of the laser beam,
The film thickness in the substrate surface of the amorphous semiconductor thin film is distributed within ± 5% of the reference value,
The laser beam irradiation is performed in an atmosphere containing oxygen and helium, and the concentration of impurities containing C element and N element present in the atmosphere in the composition is 1 ppm or less,
The concentration of C element and N element in the vicinity of the interface of the crystalline semiconductor thin film is 2 × 10 ¹⁹ cm ⁻³ or less, and the concentration of C element and N element in the bulk of the crystalline semiconductor thin film is 5 × 10 ¹⁸ cm. ^-3 or less, A method for manufacturing a semiconductor device. According to claim 1 or claim 2, further injecting an impurity element imparting one conductivity to the crystalline semiconductor thin film, comprising the step of activating the laser irradiation the impurity element,
Within the laser beam irradiation elapsed time, the variation of irradiation energy is distributed within ± 3% from the reference value,
A method for manufacturing a semiconductor device, wherein auxiliary heating is performed on a region immediately before and after irradiation with the laser beam when the laser beam irradiation is performed. According to claim 1 or claim 2, further injecting an impurity element imparting one conductivity to the crystalline semiconductor thin film, comprising the step of activating the irradiation and heat treatment of the impurity element laser beam ,
Within the laser beam irradiation elapsed time, the variation of irradiation energy is distributed within ± 3% from the reference value,
A method for manufacturing a semiconductor device, wherein auxiliary heating is performed on a region immediately before and after irradiation with the laser beam when the laser beam irradiation is performed. In any one of claims 1 to 4, the peak value of the irradiation energy in the irradiation time elapsed of the laser beam, the variation of the half-width and threshold width is distributed within ± 3% of any reference value A method for manufacturing a semiconductor device. In any one of claims 1 to 5, a method for manufacturing a semiconductor device, wherein the semiconductor thin film is a silicon film. In any one of Claims 1 thru | or 6 , the fluctuation | variation of the peak value of the irradiation energy, the half value width, and the threshold width is all distributed within ± 1.5% of the reference value within the irradiation elapsed time of the laser beam. A method for manufacturing a semiconductor device. In any one of claims 1 to 7, the amorphous semiconductor thin film is formed by low pressure thermal CVD method, and wherein the the distribution of the film formation temperature is within ± 1 ° C. of the reference values within the substrate plane A method for manufacturing a semiconductor device. In any one of claims 1 to 8, a method for manufacturing a semiconductor device, wherein the temperature distribution within the substrate surface when performing laser beam irradiation is within ± 5 ℃ reference value. In any one of claims 1 to 9, the method for manufacturing a semiconductor device, wherein the temperature distribution in the area for receiving a said supplemental heating is within ± 3 ° C. of the reference value. According to claim 2 or claim 4, the method for manufacturing a semiconductor device, wherein the temperature distribution within the substrate surface when performing the heat treatment is within ± 5 ℃ reference value. In any one of Claims 1 thru | or 11 , irradiation of a laser beam is intermittently performed in multiple times per unit area of the to-be-irradiated surface within the irradiation time,
The method of manufacturing a semiconductor device, wherein the irradiation time is represented by an integration of the threshold width of the laser light.

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