JP3797638B2 - Exposure apparatus, method for obtaining distortion of projection optical system, and device manufacturing method - Google Patents

Description

この各マーク中心間のずれ量からディストーションを求める。計測結果から得られる１ｓｔ露光レイアウトの第ｉショットの（ｍ，ｎ）における計測データを
【００３８】
【数２】

とおけば、計測データは、図８のように表記できる。
ここで、Ｘ方向、Ｙ方向の最小二乗倍率は、次式により算出することができる。
【００３９】
【数３】

【００４０】
データ数が少ないときなどのように１次関数でしか近似できない場合は、これを用いて補正することになる。本実施例の場合、計測ポジションが１００個あり、対称ディストーションを求めることができる。
対称ディストーション（１次成分、３次成分）については、ｘデータに対するｙデータのバラツキに当てはめる３次（奇数）関数曲線を
【００４１】
【数４】

とおき、観測データと求める曲線との差をεとすると、
【００４２】
【数５】

とおける。
【００４３】
【数６】

【００４４】
【数７】

なるａ，ｂをもとめれば、対称ディストーションが求まる。以後、上記により求まった対称ディストーションの１次成分、３次成分をそれぞれ
【００４５】
【数８】

と表記する。
【００４６】
次に前記により算出された対称ディストーションの補正について説明する。
レンズＧ１、Ｇ２は、それぞれある一定の敏感度をもっている。これは、あらかじめわかっている値であり、本実施例の場合は、表１のような場合を考える。
【００４７】
【表１】

つまり、前記算出された対称ディストーションを補正するのに、レンズＧ１をｘ［ｕｍ］、Ｇ２をｙ［ｕｍ］アップさせたとすると、
【００４８】
【数９】

の連立方程式を解くことによってレンズＧ１、Ｇ２の補正量が求まり、補正することができる。
【００４９】
［実施例２］
重ね焼き露光を行なわない検査用ウエハで、ディストーションの自動計測補正を行なう装置について、図１０を用いて説明する。
第１ステップ（Ｓ１０１〜Ｓ１０３）の自動検査補正工程は、上述実施例と同一思想で実行できるので説明を省略する。
【００５０】
第２ステップ（Ｓ１０４〜Ｓ１０５）は、レチクルＲＴに描かれたパターンをウエハ上に塗布されたレジストに露光する工程である。ここでは、上述実施例１とは異なり１ｓｔ露光のみ行なう。つまり、ＸＹステージＸＹＳを、ｌｓｔ露光レイアウトの第１ショットが縮小投射レンズＬＮの下になるように移動し、露光用シャッタＳＨＴを開く。これにより、レチクルパターンＲＴに照射された露光光源ＩＬの光が、縮小投射レンズＬＮを通して１／５に縮小され、ウエハＷＦの上に塗布されているレジストを感光しｌｓｔ露光が行なわれる。１ｓｔ露光ではレンズＬＮ全面を用いて４ショット露光する。
【００５１】
第３ステップ（Ｓ１０６）の自動検査補正工程は、上述実施例１と同一思想で実行できるので説明を省略する。
【００５２】
第４ステップ（Ｓ１０７〜Ｓ１１１）では、上述実施例１と同様にＴＶＰＡ（ステップＳ００８）およびＡＧＡ（ステップＳ００９）を行なった後、計測を行なう。すなわち、図１１で示すレイアウトで、ウエハ第１ショットから最終ショットまで順にＸＹステージを一定の間隔（２．６２３５ｍｍ）で、ステップアンドリピートさせながら、ステージがステップした時の座標と検査マークのある位置との差でディストーション（ずれ量）を計測し（マークの本来の設計位置と計測した時のマーク位置のずれを計る）、測定値を制御装置ＣＵ内部に蓄積する。
【００５３】
第５ステップ（Ｓ１１２〜Ｓ１１３）の自動検査補正工程は、上述実施例１と同一思想で実行できるので説明を省略する。
つまり、本発明においてディストーション（ずれ量）計測の算出の仕方は、どのように行なってもかまわない。また、実施例１、２では、最小二乗倍率および対称ディストーションにのみ説明したがその他のディストーション成分を計測補正してもかまわない。また、実施例１、２では、２枚のレンズＧ１、Ｇ２での補正例を述べたが、他の補正方法で補正を行なってもかまわない。また、実施例１、２では、図３、図１０のフローチャートに“現像”の処理が入っている（ステップＳ００６、Ｓ１０６）。
【００５４】
しかし、ディストーション（ずれ量）検査の場合などは、現像処理を行なわなず、露光によるレジストの変化を計測することによって、ずれ量検査を行なう“潜像”とよばれる処理も実施されている。“潜像”の場合、図３や図１０の現像処理がなくなることになる。本発明はこれらフローの処理やシーケンスに限定されない。
なお、実施例１、２では触れなかったが、ウエハをレジスト現像装置に自動搬送する際、コータＣＯ、ステッパＳＴ及びディベロッパＤＥを直列に結合して備えていてもよい。例えば、図１２に示すようなステッパＳＴ、コータＣＯ、ディベロッパＤＥ間で搬送経路１２０を経てウエハをロボット搬送させてもよい。
【００５５】
以上説明したように、上述実施例によれば、半導体製造装置において、ウエハ位置ずれの自動計測システムを露光装置であるステッパと、コータ、デベロッパを含む周辺装置とで構成するようにしたため、ウエハプロセスごとのディストーション計測補正ができる。また、人によって行なわれていた従来のディストーション計測およびレンズの補正動作に比べて、計測精度が向上し、かつ検査時間が短縮され、しかも検査条件や精度の安定性を良好に維持することができる。
【００５６】
次に、この露光装置を利用することができるデバイス製造例を説明する。図１３は微小デバイス（ＩＣやＬＳＩ等の半導体チップ、液晶パネル、ＣＣＤ、薄膜磁気ヘッド、マイクロマシン等）の製造のフローを示す。ステップ１（回路設計）では半導体デバイスの回路設計を行なう。ステップ２（マスク製作）では設計した回路パターンを形成したマスクを製作する。一方、ステップ３（ウエハ製造）ではシリコン等の材料を用いてウエハを製造する。ステップ４（ウエハプロセス）は前工程と呼ばれ、上記用意したマスクとウエハを用いて、リソグラフィ技術によってウエハ上に実際の回路を形成する。次のステップ５（組み立て）は後工程と呼ばれ、ステップ４によって作製されたウエハを用いて半導体チップ化する工程であり、アッセンブリ工程（ダイシング、ボンディング）、パッケージング工程（チップ封入）等の工程を含む。ステップ６（検査）では、ステップ５で作製された半導体デバイスの動作確認テスト、耐久性テスト等の検査を行なう。こうした工程を経て半導体デバイスが完成し、これを出荷（ステップ７）する。
【００５７】
図１４は上記ウエハプロセスの詳細なフローを示す。ステップ１１（酸化）ではウエハの表面を酸化させる。ステップ１２（ＣＶＤ）ではウエハ表面に絶縁膜を形成する。ステップ１３（電極形成）ではウエハ上に電極を蒸着によって形成する。ステップ１４（イオン打込み）ではウエハにイオンを打ち込む。ステップ１５（レジスト処理）ではウエハに感光剤を塗布する。ステップ１６（露光）では、上記説明した露光装置によってマスクの回路パターンをウエハに焼付露光する。ステップ１７（現像）では露光したウエハを現像する。ステップ１８（エッチング）では現像したレジスト像以外の部分を削り取る。ステップ１９（レジスト剥離）では、エッチングが済んで不要となったレジストを取り除く。これらのステップを繰り返し行なうことによってウエハ上に多重に回路パターンを形成する。
本実施形態の製造方法を用いれば、従来は製造が難しかった高集積度の半導体デバイスを低コストで製造することができる。
【００５８】
【発明の効果】
本発明によれば、投影光学系の歪曲収差を簡便に求めることができる技術を提供することができる。
【図面の簡単な説明】
【図１】 本発明の実施例１における半導体製造ライン（装置）の構成を示す斜視図である。
【図２】 本発明の実施例１におけるフローチャートである。
【図３】 図２のフローチャートの１部の処理を示すフローチャートである。
【図４】 図３のフローチャートの１部の処理を示すフローチャートである。
【図５】 本発明の実施例１で使用するレチクルおよびこれによって形成される検査用マークを示す図である。
【図６】 本発明の実施例１で使用するウエハのレイアウトおよびウエハとレチクルの斜視図である。
【図７】 本発明の実施例１で使用するマークの形成方法を示す説明図である。
【図８】 本発明の実施例１で説明するディストーション計測データのレイアウトを示す図である。
【図９】 本発明の実施例１で使用する装置に設置しているレンズの概略的な構成を示す図である。
【図１０】 本発明の実施例２を示すフローチャートである。
【図１１】 本発明の実施例２のウエハのレイアウトを示す図である。
【図１２】 本発明に適用可能なロボットによるウエハの搬送の様子を示す図である。
【図１３】 図１の装置により製造し得る微小デバイスの製造の流れを示すフローチャートである。
【図１４】 図１３におけるウエハプロセスの詳細な流れを示すフローチャートである。
【符号の説明】
ＷＦ：ウエハ、ＣＯ：コータ、ＤＥ：ディベロッパ、ＳＴ：ステッパ、ＲＴ：レチクル、ＷＰ：ずれ量計測用（アライメント）マーク、ＣＵ：制御装置、ＬＮ：投影レンズ、ＨＡＳ：オートハンド、ＸＹＳ：ＸＹステージ、ＷＳ：ウエハチャック、ＩＦＸ，ＭＲＸ：Ｘ方向レーザ干渉計、ＩＦＹ，ＭＲＹ：Ｘ方向レーザ干渉計、ＭＸ，ＭＹ：モータ、ＩＬ：露光光源、ＨＡＲ：回収ハンド、Ｇ１，Ｇ２：レンズ、１２０：搬送経路。[0001]
BACKGROUND OF THE INVENTION
  The present inventionDewOptical device,TheIn exposure equipmentDistortion aberration of projection optical systemTheAskThe present invention relates to a method and a device manufacturing method.
[0002]
[Prior art]
In a lens used in a semiconductor exposure apparatus, it is desirable that distortion (distortion aberration) is corrected satisfactorily in order to expose a reticle on a wafer with a faithful shape. An integrated circuit manufactured using a lens having a large distortion is not preferable. Therefore, conventionally, in the semiconductor manufacturing process, when the semiconductor exposure apparatus is installed, the lens distortion is measured in advance, and the semiconductor is manufactured after correcting the distortion.
[0003]
At that time, in order to measure the distortion, a distortion measurement pattern (vernier) is drawn on the wafer, and the inspection operator measures it with a dedicated inspection device or performs a visual inspection. . The measured distortion is expressed as a function of the image height (including azimuth) by the difference between the object shape (reticle pattern) and the image shape (resist pattern on the wafer). Among the represented distortion components, there are one represented by a linear function with respect to the image height (least square magnification) and one represented by a cubic (odd) function with respect to the image height (symmetric distortion). As a means for measuring the least square magnification, one disclosed in Japanese Patent Publication No. 6-66244 can be used, and by using this, other distortion components (symmetric distortion, etc.) can be measured.
[0004]
In a semiconductor exposure apparatus, the most accurate illumination system (ND filter, aperture, etc.) and exposure conditions can be selected in each wafer process depending on the resist applied on the wafer and the shape of alignment marks. . Each time these conditions change, the lens distortion changes. Conventionally, distortion caused by temperature changes during each wafer process, illumination system (ND filter, squeezing) changes, etc., is calculated as the least squares magnification (without dividing the components) of the measurement data required in the alignment process. Originally, only the lens magnification can be corrected. Further, the aforementioned least square magnification and symmetrical distortion can be corrected within the semiconductor manufacturing apparatus, and are actually corrected only when the semiconductor exposure apparatus is installed. However, the distortion that has been divided into components is corrected only when the semiconductor manufacturing apparatus is installed. In each wafer process, such as when a wafer is baked, the distortion corrected at the time of installation is corrected except for the correction of the least squares magnification. Other offset corrections are made so as not to change.
[0005]
[Problems to be solved by the invention]
In general, for inspection of alignment offset, it is common to use one or two wafers called a preceding wafer among several tens to several hundred wafers of one lot. In the inspection with the preceding wafer, the operator performs all of the resist coating, exposure, development, and inspection (or eye inspection) with the dedicated measuring device, and after checking the inspection result, inputting the result into the exposure device and correcting it, Wafers are sent to the manufacturing process line. Further, as described above, correction of lens distortion is normally performed only when the semiconductor exposure apparatus is installed, and inspection / correction work is not performed for each lot.
[0006]
However, in the wafer process in which each lot is run, the illumination system (ND filter, squeezing, etc.) and other exposure conditions are changed according to conditions such as the thickness of the resist applied to the wafer and the width of the mark line formed during exposure. Yes. And it is known that the lens distortion also changes with these changes. Therefore, in the exposure apparatus, it is necessary to measure and correct the lens distortion corresponding to the lens distortion change accompanying the change for each wafer process. In other words, a distortion inspection wafer is flowed together with the inspection of the preceding wafer of the alignment offset, the distortion is inspected, the inspection result is confirmed, the result is input to the exposure apparatus, the result is corrected, and then the wafer is flowed to the manufacturing process line. The exposure must be performed in the state.
[0007]
However, when inspecting the distortion, according to the visual inspection, since the inspection time is long, the production line is stopped for a long time, and the production efficiency is lowered. Further, when the inspection amount increases, a measurement error occurs due to operator fatigue. Also, when calculating and inputting a statistical result as a measurement result for correction, the efficiency decreases due to an increase in the inspection amount. Furthermore, when the inspection worker changes, a large difference appears in the result of the visual inspection.
[0008]
In addition, when the distortion inspection is performed by a dedicated measuring apparatus, these dedicated measuring apparatuses are placed offline and separately from the semiconductor exposure apparatus, and the wafer exposed by the semiconductor exposure apparatus is developed into an automatic measurement inspection apparatus after development. Will carry. In such a case, while the inspection result is fed back to the exposure apparatus, the exposure apparatus itself is not used and is often in a waiting state. However, the exposure apparatus is equipped with a highly accurate measurement mechanism for measuring lens distortion. Such waste is extremely bad in terms of efficiency as a system.
[0009]
That is, in the conventional distortion inspection method and correction method, inspection and correction are performed only when the apparatus is installed. Further, the inspection method is performed only by a dedicated measuring device or visual inspection, and correction can only be performed by the apparatus installer. Also, it cannot cope with the distortion change in the wafer process.
[0010]
On the other hand, it is conceivable to measure and manage lens distortion under all illumination system conditions and exposure conditions first, but there are many parameters to be changed. Data must be managed and is inefficient. Further, even if the lens distortion can be measured for each wafer process, it is very laborious to manually calculate parameters related to the correction of the distortion and to input the correction parameters by a human.
[0011]
  Therefore, the object of the present invention is toDistortion aberration of projection optical systemEasilyAskIt is to provide a technology that can.
[0013]
[Means for Solving the Problems]
  To achieve the above object, the present inventionexposureapparatusIsThe original versionThroughsubstrateTheA projection optical system for exposing; positioning means for positioning the substrate with respect to the original;in frontFormed on the substratealignmentDetect marksRuDetection means;By the detection meansBased on the detection resultalignmentObtain the position of the mark and control the positioning meanscontrolWith meansexposureIn the device
  Projecting alignment marks and inspection marks formed on the original plate onto the substrate via the projection optical system,
  An alignment mark generated on the substrate by the projection is detected by the detection means;
  Based on the detection result of the alignment mark by the detection means, the inspection mark generated on the substrate by the projection is positioned by the control means and the positioning means,
  The detected inspection mark is detected by the detection means,
  The control means obtains the position of the inspection mark based on the detection result of the inspection mark by the detection means,Of the projection optical systemDistortionTheAskIt is characterized by that.
[0014]
  The original versionThroughsubstrateTheA projection optical system for exposing; positioning means for positioning the substrate with respect to the original;in frontFormed on the substratealignmentDetect marksRuDetection means;By the detection meansBased on the detection resultalignmentObtain the position of the mark and control the positioning meanscontrolWith meansexposureUsing equipmentThus, the method of obtaining the distortion aberration of the projection optical system is,
  Projecting alignment marks and inspection marks formed on the original plate onto the substrate via the projection optical system,
  An alignment mark generated on the substrate by the projection is detected by the detection means;
  Based on the detection result of the alignment mark by the detection means, the inspection mark generated on the substrate by the projection is positioned by the control means and the positioning means,
  The detected inspection mark is detected by the detection means,
  Obtaining the position of the inspection mark based on the detection result of the inspection mark by the detection means;Of the projection optical systemDistortionTheAskIt is characterized byRu.
[0015]
  Also, the device manufacturing method of the present inventionComprises the step of exposing the substrate through the original using the exposure apparatus..
  Furthermore, the device manufacturing method of the present inventionIncludes a first step of determining distortion of the projection optical system of the exposure apparatus using the method, and,A second step of correcting the distortion of the projection optical system based on the information of the distortion obtained in the first step; and the distortion of the projection optical system is corrected in the second step. And a third step of exposing the substrate through the original using the exposure apparatus.It is characterized by that.
[0016]
DETAILED DESCRIPTION OF THE INVENTION
In a preferred embodiment of the present invention, when obtaining the distortion value, the positioning is sequentially performed according to the position of each mark in the design so that the image of each mark is positioned at the detection position of the mark detection means under the control of the information processing means. Thus, the position of each mark image is obtained, and a distortion value is obtained based on the position and the design position.
[0017]
Alternatively, under the control of the information processing means, only the central part of the projection optical system is used, and one image of a plurality of marks on the original is exposed to be superimposed on the image of each mark formed on the substrate. A deviation between two overlapping mark images is detected by the mark detection means, and a distortion value is obtained based on the result.
[0018]
Further, the semiconductor manufacturing apparatus includes a means for applying a resist, a means for developing the substrate, and a means for transporting the substrate between the means and the positioning means, and these means are controlled by the information processing means, The substrate is transported between these means, a resist is applied onto the substrate before the exposure, and the substrate is developed after the exposure.
[0019]
In addition, the semiconductor manufacturing apparatus includes a correcting unit that corrects the distortion of the projection optical system, and the information processing unit corrects the distortion by the correcting unit based on the obtained distortion value. The distortion value may be acquired and corrected when an operation that changes the distortion is performed in the semiconductor manufacturing apparatus.
[0020]
The mark detection means is usually an image pickup means for picking up a mark image, and the information processing means can obtain the position of the mark image by performing image processing on the picked-up data.
[0021]
As described above, by configuring the exposure apparatus and the peripheral apparatus included in the semiconductor manufacturing apparatus as one distortion inspection system, the process distortion can be measured at high speed. That is, a coater (resist coating device), a developing device (developer), and a stepper having an exposure and inspection mechanism (exposure device for reducing and projecting by a lens) are controlled on-line, and thereby a preceding wafer which is a wafer for inspection is coated. The process is automatically sent to the stepper and developed by the developer, and then sent again to the stepper to measure the distortion and feed back the result to the stepper. Further, since the deviation amount measuring method by image processing is used, the measurement is performed with the minimum measurement error. Further, the distortion can be automatically corrected based on the obtained measurement result.
[0022]
【Example】
[Example 1]
Embodiments of the present invention will be described below with reference to the drawings.
FIG. 1 is a perspective view showing the configuration of a semiconductor production line (apparatus) according to a first embodiment of the present invention, FIGS. 2 to 4 are flowcharts showing the flow of an automatic inspection process in this apparatus, and FIG. 6 is a plan view of the reticle used in the example, FIG. 6 is a perspective view of the layout of the wafer and the wafer and reticle used in the present embodiment, FIG. 7 is an explanatory view showing a method of forming a mark used for inspection, and FIG. 8 is a distortion measurement. FIG. 9 is a schematic diagram showing data in matrix form, and FIG. 9 is a diagram showing a schematic configuration of a projection lens installed in the apparatus used in this embodiment. By moving the lens driving mechanisms K1 and K2 in FIG. 9 to the left and right, the lenses G1 and G2 are driven up and down to correct the lens distortion.
[0023]
As shown in FIG. 1, the semiconductor manufacturing apparatus includes a coater CO, a stepper ST, and a developer DE that are connected in series in order to automate the inspection of distortion during exposure of the wafer WF. The coater CO has a mechanism for applying a resist to a wafer to be inspected. The stepper ST has a mechanism for overlaying and exposing the pattern of the reticle RT on the inspection wafer, and a mechanism for measuring the deviation amount measurement mark WP (FIG. 6E) formed on the wafer. The developer DE has a mechanism for developing the inspection wafer exposed by the stepper ST.
[0024]
The inspection is automatically performed by moving the inspection wafer placed at the entrance of the coater CO between the mechanisms in accordance with a command from the control unit CU. The lens distortion calculated from the measured deviation amount is input to the control unit CU of the stepper ST and used as a distortion correction value for the product wafer. The inspection wafer is a wafer that has undergone the same process as the product wafer. The calculated distortion correction value is automatically used for distortion correction of the projection lens LN.
[0025]
Next, a detailed automatic inspection correction process will be described with reference to FIGS. However, control of the following steps is performed by the stepper control mechanism CU, and each device and the stepper control unit CU are connected by a communication cable.
The semiconductor exposure apparatus (stepper) first measures and corrects lens distortion when the apparatus is installed (step SS1).
[0026]
Next, the illumination system parameters (ND filter and squeeze) for performing exposure of the product wafer performed in step SS5 described later are set, and unit driving for that is performed (step SS2). Here, it is determined whether or not there is a factor causing the lens distortion to change (step SS3). If there is, a lens distortion automatic measurement / correction described later is performed (step SS4 (steps S001 to S013 in FIG. 3). ).
If the parameter set in step SS2 and its driving do not affect the lens distortion change, step SS4 is not executed.
After performing automatic lens distortion measurement / correction at SS4, the product wafer is exposed (step SS5).
[0027]
Next, it is determined whether or not the exposure of all wafers has been completed (step SS6). If not completed, the process returns to step SS2 for the exposure of the next wafer. If the exposure of all the wafers has been completed, the exposure process is terminated.
In this way, until all exposure of the product wafer is completed, the optimum parameters are set for each wafer process (step SS2) and exposure is performed.
[0028]
Next, step SS4 which is an automatic lens distortion measurement / correction operation will be described.
In the first step (S001 to S003), the wafer to be inspected is placed on the wafer set table WST (S001), and the wafer passes through the transport path R1 and is coated with a resist by a resist coating device (coater) CO (S002). ), Sent to the stepper ST via the transfer path R2, and mounted on the wafer chuck WS on the XY stage XYS by the auto hand HAS and vacuum-sucked (S003).
[0029]
The second step (S004 to S005) is a step of exposing a pattern drawn on the reticle RT to a resist applied on the wafer. Here, the pattern area exposed at a time is called a shot. The XY stage XYS is precisely positioned by the laser interferometers IFX and MRX in the X-axis direction and further by the laser interferometers IFY and MRY in the Y-axis direction, and controls any rotation of the motors MX and MY. The position can be moved below the reduction projection lens LN.
[0030]
In this step, first, the XY stage XYS is moved so that the first shot of the 1st (first) exposure layout (FIG. 6A) is under the reduction projection lens LN (FIG. 6C), and alignment is performed. Then, the exposure shutter SHT is opened. As a result, the light from the exposure light source IL irradiated onto the reticle pattern RT is reduced to 1/5 through the reduction projection lens LN, and the resist applied on the wafer WF is exposed to perform the first exposure. In the first exposure, the entire surface of the lens LN is exposed for four shots.
[0031]
After the lst exposure, the XY stage XYS is moved again so that the first shot of the 2nd (second) exposure layout (FIG. 6B) is under the reduction projection lens LN, and the wafer is moved to the position of 0. Shifting by 348 mm and using only the center portion of the lens LN (reducing the opening of the exposure shutter SHT) is performed 100-shot overprint exposure (FIG. 6D) (step S004). The repetition of stage movement, alignment, exposure, and stage movement described here is called step-and-repeat. When all the overprint exposures are completed, the wafer is sent from the wafer chuck to the carry-in passage R3 of the developing device by the collection hand HAR (step S005), and the process proceeds to the third step.
[0032]
In the third step (S006), the wafer sent to the carry-in passage R3 is sent to the developing device DE for development. When the development is completed, the wafer is sent to the carry-in passage R5 via the carry-in passage R4, and the process proceeds to the fourth step which is an inspection process.
[0033]
In the fourth step (S007 to S011), the coater CO does not apply the resist via the carry-in path R1 used in the first step, but directly feeds the wafer to the carry-in path R2, and again on the wafer chuck by the supply hand HAS. (Step S007), and the wafer is aligned by the off-axis optical system OE (Step S008). Then, the alignment accuracy is inspected using the alignment mark WP on the wafer that has been baked in advance with the lst exposure layout (not crushed by the overprint exposure) (step S009). After the alignment is completed, the distortion inspection mark DM (FIG. 5B) exposed in the second step is used for inspection (step S010). That is, as shown in FIG. 4, the distortion measurement mark is measured while stepping and repeating the XY stage in the 2nd exposure layout in order from the first shot to the last shot of the wafer, and the measured value is controlled by the control device. Accumulate in the CU (steps SB001 to SB004). The wafer for which measurement has been completed is sent from the wafer chuck by the collection hand HAR to the developing device loading passage R3 from the developing device loading, and the developing device DE is sent to R4 without performing the developing operation, and is transferred to the wafer receiving table WEN. The wafer is taken out (step S011), and the process proceeds to the fifth step which is distortion correction.
[0034]
In the fifth step (S012 to S013), the stepper control unit CU divides the distortion components from the measured deviation amount (distortion) value, and calculates the least square magnification, the symmetric distortion (primary component, third order). Component) is calculated and output. The calculated distortion value is automatically set in the semiconductor manufacturing apparatus as the distortion value of the lens LN (step S012). Here, the lens LN has lens driving mechanisms K1 and K2 shown in FIG. 9, and the lenses G1 and G2 can be driven up and down by driving them left and right. By driving the lenses G1 and G2 up and down, the distortion of the lens LN can be corrected. The stepper control unit CU calculates the optimum driving amount of the lenses G1 and G2 from the set magnification distortion value and symmetrical distortion (primary component and tertiary component). Then, the lens LN is corrected for distortion by driving the lenses G1 and G2 in accordance with the calculated driving amount (step S0013).
[0035]
The automatic inspection correction process has been described above. Next, a method for forming the above-described distortion amount measurement mark DM will be described with reference to FIG.
The wafer to be inspected is formed as shown in FIG. That is, four shots (FIGS. 7A and 7C) in which measurement marks that are not overlaid by 5 × 5 are placed on the wafer by lst exposure can be obtained. In one shot on the wafer, a reticle pattern shown in FIG. 5A is formed. In the 2nd exposure, as shown in FIGS. 7B and 7D, 10 × 10 = 100 shots of the mark formed by the 1st exposure are used as shown in FIG. Expose in layout. Thereby, a distortion amount measurement mark DM (FIG. 5B) is formed. In other words, if only the distortion inspection mark is considered, it is formed with a layout as shown in FIG.
[0036]
Next, the detection of the mark position DM thus formed and the calculation of distortion (deviation amount) will be described.
As shown in FIG. 5B, if the center coordinates of the 1st exposure mark are (R1X, R1Y) and the center coordinates of the 2nd exposure mark are (R2X, R2Y), the shift amounts Cx and Cy between these marks are as follows. It is calculated by the formula.
[0037]
[Expression 1]

The distortion is obtained from the amount of deviation between the mark centers. Measurement data at (m, n) of the i-th shot of the first exposure layout obtained from the measurement result
[0038]
[Expression 2]

Then, the measurement data can be expressed as shown in FIG.
Here, the minimum square magnification in the X direction and the Y direction can be calculated by the following equation.
[0039]
[Equation 3]

[0040]
When approximation is possible only with a linear function, such as when the number of data is small, correction is performed using this. In this embodiment, there are 100 measurement positions, and symmetrical distortion can be obtained.
For symmetric distortion (primary component, cubic component), a cubic (odd) function curve is applied to the variation of y data with respect to x data.
[0041]
[Expression 4]

If the difference between the observed data and the curve to be obtained is ε,
[0042]
[Equation 5]

You can.
[0043]
[Formula 6]

[0044]
[Expression 7]

If a and b are obtained, a symmetric distortion is obtained. Thereafter, the first-order component and the third-order component of the symmetric distortion obtained as described above are respectively obtained.
[0045]
[Equation 8]

Is written.
[0046]
Next, correction of the symmetric distortion calculated as described above will be described.
Each of the lenses G1 and G2 has a certain sensitivity. This is a value known in advance, and in the case of the present embodiment, a case as shown in Table 1 is considered.
[0047]
[Table 1]

That is, to correct the calculated symmetrical distortion, if the lens G1 is increased by x [um] and G2 is increased by y [um],
[0048]
[Equation 9]

By solving the simultaneous equations, the correction amounts of the lenses G1 and G2 can be obtained and corrected.
[0049]
[Example 2]
An apparatus for performing automatic measurement correction of distortion on an inspection wafer that is not subjected to overprinting exposure will be described with reference to FIG.
Since the automatic inspection correction process of the first step (S101 to S103) can be executed in the same idea as the above-described embodiment, the description is omitted.
[0050]
The second step (S104 to S105) is a step of exposing a pattern drawn on the reticle RT to a resist applied on the wafer. Here, unlike the first embodiment, only the first exposure is performed. That is, the XY stage XYS is moved so that the first shot of the 1st exposure layout is below the reduction projection lens LN, and the exposure shutter SHT is opened. Thereby, the light of the exposure light source IL irradiated to the reticle pattern RT is reduced to 1/5 through the reduction projection lens LN, the resist applied on the wafer WF is exposed, and lst exposure is performed. In the first exposure, the entire surface of the lens LN is exposed for four shots.
[0051]
Since the automatic inspection correction process in the third step (S106) can be executed in the same way as the first embodiment, the description is omitted.
[0052]
In the fourth step (S107 to S111), the TVPA (step S008) and the AGA (step S009) are performed and the measurement is performed in the same manner as in the first embodiment. That is, in the layout shown in FIG. 11, the coordinates and inspection mark positions when the stage is stepped while stepping and repeating the XY stage at a constant interval (2.6235 mm) in order from the first shot to the last shot of the wafer. And the distortion (deviation amount) is measured (measurement of deviation between the original design position of the mark and the mark position at the time of measurement), and the measured value is accumulated in the control unit CU.
[0053]
The automatic inspection correction process of the fifth step (S112 to S113) can be executed with the same idea as that of the first embodiment, and the description thereof will be omitted.
That is, in the present invention, any method for calculating distortion (deviation amount) may be used. In the first and second embodiments, only the least square magnification and the symmetric distortion have been described. However, other distortion components may be measured and corrected. In the first and second embodiments, the correction example using the two lenses G1 and G2 is described. However, the correction may be performed by other correction methods. In the first and second embodiments, the “development” process is included in the flowcharts of FIGS. 3 and 10 (steps S006 and S106).
[0054]
However, in the case of a distortion (deviation amount) inspection or the like, a process called “latent image” in which a deviation amount inspection is performed by measuring a change in the resist due to exposure without performing development processing is also performed. In the case of a “latent image”, the development processing in FIGS. 3 and 10 is eliminated. The present invention is not limited to the processing and sequence of these flows.
Although not described in the first and second embodiments, the coater CO, the stepper ST, and the developer DE may be connected in series when the wafer is automatically transferred to the resist developing device. For example, the wafer may be transferred by a robot via the transfer path 120 between the stepper ST, the coater CO, and the developer DE as shown in FIG.
[0055]
As described above, according to the above-described embodiment, in the semiconductor manufacturing apparatus, the wafer position shift automatic measurement system is configured by the stepper as the exposure apparatus and the peripheral apparatus including the coater and the developer. Each distortion measurement can be corrected. Compared to conventional distortion measurement and lens correction operations performed by humans, the measurement accuracy is improved, the inspection time is shortened, and the stability of inspection conditions and accuracy can be maintained well. .
[0056]
Next, a device manufacturing example that can utilize this exposure apparatus will be described. FIG. 13 shows a flow of manufacturing a microdevice (a semiconductor chip such as an IC or LSI, a liquid crystal panel, a CCD, a thin film magnetic head, a micromachine, etc.). In step 1 (circuit design), a semiconductor device circuit is designed. In step 2 (mask production), a mask on which the designed circuit pattern is formed is produced. On the other hand, in step 3 (wafer manufacture), a wafer is manufactured using a material such as silicon. Step 4 (wafer process) is called a pre-process, and an actual circuit is formed on the wafer by lithography using the prepared mask and wafer. The next step 5 (assembly) is referred to as a post-process, and is a process for forming a semiconductor chip using the wafer produced in step 4, such as an assembly process (dicing, bonding), a packaging process (chip encapsulation), and the like. including. In step 6 (inspection), the semiconductor device manufactured in step 5 undergoes inspections such as an operation confirmation test and a durability test. Through these steps, the semiconductor device is completed and shipped (step 7).
[0057]
FIG. 14 shows a detailed flow of the wafer process. In step 11 (oxidation), the wafer surface is oxidized. In step 12 (CVD), an insulating film is formed on the wafer surface. In step 13 (electrode formation), an electrode is formed on the wafer by vapor deposition. In step 14 (ion implantation), ions are implanted into the wafer. In step 15 (resist process), a photosensitive agent is applied to the wafer. In step 16 (exposure), the circuit pattern of the mask is printed onto the wafer by exposure using the exposure apparatus described above. In step 17 (development), the exposed wafer is developed. In step 18 (etching), portions other than the developed resist image are removed. In step 19 (resist stripping), the resist that has become unnecessary after the etching is removed. By repeating these steps, multiple circuit patterns are formed on the wafer.
By using the manufacturing method of the present embodiment, a highly integrated semiconductor device that has been difficult to manufacture can be manufactured at low cost.
[0058]
【The invention's effect】
  BookAccording to the invention,Providing technology that can easily determine distortion of projection optical systemsbe able to.
[Brief description of the drawings]
FIG. 1 is a perspective view showing a configuration of a semiconductor production line (apparatus) according to Embodiment 1 of the present invention.
FIG. 2 is a flowchart in Embodiment 1 of the present invention.
FIG. 3 is a flowchart showing processing of a part of the flowchart of FIG. 2;
4 is a flowchart showing processing of a part of the flowchart of FIG. 3. FIG.
FIG. 5 is a view showing a reticle used in Example 1 of the present invention and an inspection mark formed thereby.
6 is a perspective view of a wafer layout and a wafer and a reticle used in Example 1 of the present invention. FIG.
FIG. 7 is an explanatory diagram showing a mark forming method used in Embodiment 1 of the present invention.
FIG. 8 is a diagram showing a layout of distortion measurement data described in the first embodiment of the present invention.
FIG. 9 is a diagram showing a schematic configuration of a lens installed in an apparatus used in Example 1 of the present invention.
FIG. 10 is a flowchart showing Example 2 of the present invention.
FIG. 11 is a view showing a layout of a wafer according to a second embodiment of the present invention.
FIG. 12 is a diagram showing a state of wafer transfer by a robot applicable to the present invention.
FIG. 13 is a flowchart showing a flow of manufacturing a micro device that can be manufactured by the apparatus of FIG. 1;
FIG. 14 is a flowchart showing a detailed flow of the wafer process in FIG. 13;
[Explanation of symbols]
WF: Wafer, CO: Coater, DE: Developer, ST: Stepper, RT: Reticle, WP: Deviation measurement (alignment) mark, CU: Control device, LN: Projection lens, HAS: Auto hand, XYS: XY stage WS: Wafer chuck, IFX, MRX: X direction laser interferometer, IFY, MRY: X direction laser interferometer, MX, MY: Motor, IL: Exposure light source, HAR: Collection hand, G1, G2: Lens, 120: Transport route.

Claims (9)

A projection optical system for exposing a substrate via an original, and positioning means for positioning the substrate relative to the original, a detecting unit that detect the alignment mark formed before Symbol substrate, by the detection means In an exposure apparatus comprising a control means for obtaining a position of the alignment mark based on a detection result and controlling the positioning means,
Projecting alignment marks and inspection marks formed on the original plate onto the substrate via the projection optical system,
An alignment mark generated on the substrate by the projection is detected by the detection means;
Based on the detection result of the alignment mark by the detection means, the inspection mark generated on the substrate by the projection is positioned by the control means and the positioning means,
The detected inspection mark is detected by the detection means,
The exposure apparatus characterized in that the control means obtains the position of the inspection mark based on the detection result of the inspection mark by the detection means, and obtains distortion aberration of the projection optical system. It said control means, so that the test mark is located at the detection position before Symbol detection means, and controlling said positioning means according to the position of the inspection mark on design, and the the position of the test mark obtained the exposure apparatus according to claim 1, wherein the determining the distortion based on the position of the design. 3. The exposure apparatus according to claim 1, wherein the inspection mark generated on the substrate is one of a mark obtained by development and a latent image mark . Based on the information of the distortion determined by the control means, the exposure apparatus according to any one of claims 1 to 3, characterized in that Ru comprising a correction means for correcting the distortion of the projection optical system. A projection optical system for exposing a substrate via an original, and positioning means for positioning the substrate relative to the original, a detecting unit that detect the alignment mark formed before Symbol substrate, by the detection means In the method of obtaining the distortion of the projection optical system using an exposure apparatus provided with a control means for obtaining the position of the alignment mark based on a detection result and controlling the positioning means,
Projecting alignment marks and inspection marks formed on the original plate onto the substrate via the projection optical system,
An alignment mark generated on the substrate by the projection is detected by the detection means;
Based on the detection result of the alignment mark by the detection means, the inspection mark generated on the substrate by the projection is positioned by the control means and the positioning means,
The detected inspection mark is detected by the detection means,
Method on the basis of the detection result of the inspection mark by the detectors to give the position of the test mark, characterized <br/> obtaining distortion of the projection optical system. As before Symbol inspection mark is located at the detection position before Symbol detection means, and controlling said positioning means according to the position of the inspection mark on design, and the resulting position of the inspection mark and a position on the design 6. The method according to claim 5, wherein the distortion is determined based on: The method according to claim 5 or 6, wherein the inspection mark generated on the substrate is one of a mark obtained by development and a latent image mark . 5. A device manufacturing method comprising the step of exposing a substrate through an original plate using the exposure apparatus according to claim 1 . Said projection based on the first step and the first of said distortion information obtained in the step of obtaining the distortion aberration of the projection optical system of the exposure apparatus using the method according to any one of claims 5-7 A second step of correcting distortion of the optical system; and a third step of exposing the substrate through the original using the exposure apparatus in which the distortion of the projection optical system is corrected in the second step. device manufacturing method characterized by having a.

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