JP3756726B2 - Ultrasonic transducer drive - Google Patents

Ultrasonic transducer drive Download PDF

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Publication number
JP3756726B2
JP3756726B2 JP2000167809A JP2000167809A JP3756726B2 JP 3756726 B2 JP3756726 B2 JP 3756726B2 JP 2000167809 A JP2000167809 A JP 2000167809A JP 2000167809 A JP2000167809 A JP 2000167809A JP 3756726 B2 JP3756726 B2 JP 3756726B2
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signal
frequency
drive
phase
phase difference
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JP2000167809A
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JP2001340809A (en
Inventor
一恵 田中
友尚 櫻井
裕之 ▲高▼橋
寛生 小野
吉隆 本田
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Olympus Corp
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Olympus Corp
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Priority to JP2000167809A priority Critical patent/JP3756726B2/en
Priority to US09/774,920 priority patent/US6569109B2/en
Priority to US10/414,984 priority patent/US6761690B2/en
Publication of JP2001340809A publication Critical patent/JP2001340809A/en
Priority to US10/774,914 priority patent/US7270646B2/en
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Description

【0001】
【発明の属する技術分野】
本発明は超音波振動子駆動装置、更に詳しくは超音波振動子の共振周波数への追従駆動の制御部分に特徴のある超音波振動子駆動装置に関する。
【0002】
【従来の技術】
一般に、外科手術用の超音波メスや超音波加工装置等に使用されている超音波振動子は、その基本共振周波数もしくはその近傍において駆動することが望ましい。また、超音波振動子の共振周波数が、負荷条件、温度、振動子の破損等により存在しなくなった場合、超音波振動子の駆動を禁止し、術者に対する警告を行う必要がある。
【0003】
そこで、例えば特開平7−313937号公報に示されるように、超音波振動子の駆動装置で、振動子の駆動周波数を共振周波数と一致させるように制御するアナログ回路で構成されたPLL(位相制御ループ)方式による振動子駆動と、駆動周波数が所定の範囲にあるか否かを確認して、異常の場合には駆動を停止するとともに異常を告知する方法が開示されている。
【0004】
しかし、アナログ回路で構成されたPLL方式は、複数の種類の共振周波数の振動子を駆動するためには、複数の発信源が必要であること、またアナログ回路で構成されているため温度変化により特性が変化すること、さらに回路を可変抵抗等で調整する必要があること等の問題があった。
【0005】
そのため、近年では、上記問題に対して、DDS(ダイレクト・デジタル・シンセサイザ)とUP/DOWNカウンタを用い、デジタル回路で構成されたPLL方式(以下、デジタル式PLL)で共振周波数追尾が行われている。
【0006】
図6は、従来の超音波凝固切開装置91でのデジタル式PLL92におけるフィードバック回路のブロック図であって、超音波出力信号を検出回路101により、電圧、電流を検出して、その位相信号θv(電圧位相信号)、θI(電流位相信号)を位相比較器102へ入力している。
【0007】
位相比較器102では、電圧位相信号、電流位相信号の位相差を検知して、出力周波数を上下させる制御信号(以下、位相差+/-信号)を出力し、UP/DOWNカウンタ103に、その制御信号を入力する。
【0008】
UP/DOWNカウンタ103は、CPU104からの初期設定周波数信号、位相比較器102からの位相差+/-信号に基づき、実際に出力する周波数(以下、駆動周波数設定信号)を出力する。
【0009】
DDS105では、駆動周波数設定信号に基づいて、実際に正弦波を出力する。この正弦波は、電力増幅器106、検出回路101を介して、ハンドピース108内の振動子109に伝達され、ハンドピース108の先端が超音波振動を行い、組織の凝固切開を行う。
【0010】
また、監視回路110は、駆動周波数設定信号のモニタを行い、初期設定周波数信号との差が所定の範囲にあるか否かを確認して、所定の範囲外にある場合は、PLL非ロック信号をCPU104へ送信し、超音波凝固切開装置91の駆動を停止する。
【0011】
図7は、一般的な振動子と超音波凝固切開装置1の出力回路のインダクタLbの等価回路を示している。振動子の等価回路は、Ca、La、Rの直列回路とCbの並列回路で表される。また、通常、発振回路には、前記振動子の制動容量成分をキャンセルするためのマツチング用のコイルLbがある。
【0012】
図8は、図7の等価回路の電気的特性を示したものである。縦軸がインピーダンスZと位相θ、横軸が周波数である。
【0013】
図8のF1は第1の反共振周波数、Frは共振周波数、F2は第2の反共振周波数である。
【0014】
通常、振動子を超音波駆動させるときには、駆動周波数を共振周波数Frに周波数追尾させるようにPLL駆動を行う。
【0015】
また、振動子の異常により、共振周波数Frが存在しなくなった場合、駆動周波数が所定の範囲(PLLロック可能範囲)から外れる。従来、これを監視し、超音波凝固切開装置91の駆動停止を行っていた。
【0016】
【発明が解決しようとする課題】
しかしながら、このような超音波振動子の駆動においては、一瞬発生するインピーダンスZが高くなったような状況では、電流位相信号が検知出来なくなり、一瞬のうちに駆動周波数が変化し、所定の範囲外へ夥ってしまうため、CPU104は、異常と認識、装置が停止してしまうという問題点があった。
【0017】
つまり、ハンドピース108で組織を把持すると、インピーダンスZ、位相θ特性は、図9に示すように、インピーダンスが高く、その変化は鈍くなることが分かっている。
【0018】
従来、UP/DOWNカウンタ103では、位相比較器102からの出力に対して、1対1の割合で駆動周波数設定信号を上下させていたため、このようにインピーダンスZが高く、変化が鈍い状態が一瞬でも発生すると、上記のように電流位相信号が検知できなくなるため、共振周波数を追尾出来ず、駆動周波数が所定変位外へ変化し異常と認識、装置停止となるといった問題がある。
【0019】
本発明は、上記事情に鑑みてなされたものであり、インピーダンスZが高くなることが一瞬でも発生するような状況においても駆動信号を共振周波数に確実に追尾させると共に、超音波振動子の破損等による異常時には異常を認識し装置の停止を行うことのできる超音波振動子駆動装置を提供することを目的としている。
【0020】
【課題を解決するための手段】
本発明の第1の超音波振動子駆動装置は、駆動周波数設定信号に応じて超音波振動子を駆動するための駆動信号を生成する超音波振動子駆動信号生成手段と、前記超音波振動子駆動信号生成手段より前記超音波振動子に供給される前記駆動信号の電圧位相信号と電流位相信号とを検出する位相信号検出手段と、前記位相信号検出手段で検出した前記電圧位相信号と前記電流位相信号とに基づいて当該駆動信号の電圧位相と電流位相との位相差の大きさを所定クロックに応じて検知する位相差大きさ検知手段と、前記位相差大きさ検知手段で検知した、所定クロックに応じた前記位相差の大きさに係る位相差データを過去所定回数分保管する位相差データ保管手段と、前記位相差データ保管手段に保管された過去所定回数分の前記位相差データの平均値と所定の初期設定周波数信号とに基づいて、前記超音波振動子をPLL駆動による周波数制御をするための周波数可変データを生成し、当該周波数可変データに基づいて、前記駆動周波数設定信号を生成して前記超音波振動子をPLL駆動する駆動周波数設定信号生成手段と、前記駆動周波数設定信号生成手段より出力される当該駆動周波数設定信号と所定の初期設定周波数信号との差を検出し、当該差が所定の範囲外に達した際は、前記駆動周波数設定信号生成手段によるPLL駆動を解除するための信号を出力する監視手段と、を具備したことを特徴とする。
【0021】
本発明の第2の超音波振動子駆動装置は、駆動周波数設定信号に応じて超音波振動子を駆動するための駆動信号を生成する超音波振動子駆動信号生成手段と、前記超音波振動子駆動信号生成手段より前記超音波振動子に供給される前記駆動信号の電圧位相信号と電流位相信号とを検出する位相信号検出手段と、前記位相信号検出手段で検出した前記電圧位相信号と前記電流位相信号との位相差信号に所定の分周処理を施す位相差信号分周手段と、前記位相差信号分周手段において分周処理が施された前記位相差信号と所定の初期設定周波数信号とに基づいて、前記超音波振動子をPLL駆動による周波数制御をするための周波数可変データを生成し、当該周波数可変データに基づいて、前記駆動周波数設定信号を生成して前記超音波振動子をPLL駆動する駆動周波数設定信号生成手段と、前記駆動周波数設定信号生成手段より出力される当該駆動周波数設定信号と所定の初期設定周波数信号との差を検出し、当該差が所定の範囲外に達した際は、前記駆動周波数設定信号生成手段によるPLL駆動を解除するための信号を出力する監視手段と、前記監視手段の検出結果に基づいて、前記PLL駆動時と前記PLL駆動解除時とで前記位相差分周手段における分周比を変化させる位相差分周比変化手段と、を具備したことを特徴とする。
【0022】
【発明の実施の形態】
以下、図面を参照しながら本発明の実施の形態について述べる。
【0023】
図1ないし図3は本発明の第1の実施の形態に係わり、図1は超音波手術装置の構成を示す構成図、図2は図1の超音波凝固切開装置の構成を示すブロック図、図3は図2の周波数変化設定回路の作用を説明する説明図である。
【0024】
本実施の形態の超音波手術装置は、図1に示すように、超音波出力を行う超音波凝固切開装置1と、処置を行うハンドピース2と、超音波凝固切開装置1の超音波出力を制御するフットスイッチ3とから構成される。
【0025】
図2に示すように、ハンドピース2には振動子4を設けており、振動子4は、超音波凝固切開装置1のデジタル式PLL11の出力に基づいた駆動周波数の、電力増幅器12において増幅された駆動信号により検知回路13を介して駆動されるようになっている。
【0026】
また、検出回路13は、振動子4に供給されている電圧、電流を検出して、その位相信号θv(電圧位相信号)、θI(電流位相信号)を生成している。
【0027】
デジタル式PLL11は、θvとθIの位相差の方向(+/-)とその大きさを検出し位相差+/-信号を生成するための、位相比較器21、周波数変化設定回路22、UP/DOWNカウンタ23、DDS(ダイレクト・デジタル・シンセサイザ)24で構成されている。
【0028】
周波数変化設定回路22はDSP(デジタル・シグナル・プロセッサ)によって構成され、位相比較器21からの出力である位相差+/-信号をイネーブルとして入力しクロックをカウントすることにより位相差の大きさを検知する位相差信号大きさ検知部22aと、位相差信号大きさ検知部113aの結果過去3回分を保管する第1〜第3データ保管部22b、22c、22dと、上記第1〜第3データ保管部22b、22c、22dの値を平均することにより起動周波数の変化値の演算を行い演算結果に応じたパルス信号(UP/DOWNカウント信号)を出力する変化値演算部22eからなる。
【0029】
UP/DOWNカウンタ23は、CPU25から送信された初期設定周波数信号を基とし、周波数変化設定回路22からの出力(UP/DOWNカウント信号)のエッジを検出し、UP/DOWNカウント信号1パルスに対して、駆動周波数を所定の周波数変化分変化させることにより駆動周波数設定信号を生成する。
【0030】
また、DDS24は、駆動周波数設定信号に応じた正弦波形を出力する。
【0031】
つまり、デジタル式PLL11は、位相比較器21の出力を基とし、周波数変化設定回路22に於いて、駆動周波数設定信号を変化させるUP/DOWNカウント信号を生成し、UP/DOWNカウンタ23を介してDDS24から出力される駆動周波数が共振周波数の追尾を行うように制御するようにしている。
【0032】
また、監視回路26は、振動子4に加わっている駆動周波数信号と、初期設定周波数信号の差が所定の範囲内であるか否かを監視し、その差が所定の範囲外となった場合、CPU25へPLL非ロック信号を送信する。
【0033】
図3に、本実施実施の形態のデジタル式PLL11内の周波数変化設定回路22における動作を示す。
【0034】
周波数変化設定回路22は、上述したようにDSPで構成されており、クロック、CPU25からの初期設定周波数信号、位相比較器21からの位相差+/-信号が入力されている。
【0035】
周波数変化設定回路22内の位相差大きさ検知部13aでは、図3(b)に示した位相差−(+)信号をイネーブルとして入力し、図3(a)に示したクロックをカウントすることにより、位相差−信号の大きさを検知する(カウント結果は、図3(b)に示したCn)。
【0036】
検知したデータCnは、第1データ保管部22bへ保管され、それまで第1及び第2データ保管部22b、22cに保管されていたデータ(Cn-1、Cn-2)は、それぞれ第2及び第3データ保管部22c、22dにおいてストックされる。
【0037】
変化値演算部22eでは、当該回路内において、ストックされている3回分の位相差大きさ検知部結果(Cn、Cn-1、Cn-2)の平均を行い、平均分のパルス信号を生成することにより出力UP(DOWN)カウント信号とする。
【0038】
UP(DOWN)カウント信号=(Cn+Cn-1+Cn-2)/3
Cn:位相差+/-信号が”L”の間のクロックカウント数
UP/DOWNカウンタ23では、CPU25から送信された初期設定周波数信号を基とし、上述のUP/DOWNカウント信号1パルスに対して駆動周波数設定信号を所定変化分変化させる(図3(c))。
【0039】
前述を基に、DDS24は、出力の正弦波形の周波数を変化させ、周波数追尾を行っている。
【0040】
上記演算で、過去のデータとの平均をとることにより、一瞬のインピーダンスの変化によって、非PLLロックとなるような駆動周波数の大きな周波数の変化が発生しない。
【0041】
また、振動子4の破損等により、インピーダンスの高い状態が常時起きていた場合には、非PLLロック状態となる。
【0042】
つまり、超音波振動子使用時、共振周波数付近で駆動しているときには、一瞬発生するするインピーダンスZが高くなった様な状況においても一瞬のうちに周波数が変化せず、超音波振動子の破損等による異常時には異常を認識し装置の停止ができるよう適切に構成した超音波凝固切開装置が実現できる。
【0043】
図4は本発明の第2の実施の形態に係る超音波凝固切開装置の構成を示すブロック図である。
【0044】
第2の実施の形態は、第1の実施の形態とほとんど同じであるので、異なる点のみ説明し、同一の構成には同じ符号をつけ説明は省略する。
【0045】
図4に示すように、第2の実施の形態では、周波数変化設定回路22の入力に、監視回路26の出力であるPLLロック/非ロック信号を加える。
【0046】
そして、共振周波数追尾時(PLLロック時)と、非追尾時(非PLLロック時)において、変化値演算部22eにおける、平均値をとるデータ数を変化させる。
【0047】
PLLロック時には、第1〜第3データ保管部22b〜22dの3データ(Cn、Cn-1、Cn-2)の平均をとることにより、駆動周波数の変化値演算を行う。
【0048】
しかし、非PLLロック時には、第1データ保管部22bのデータCnを、そのまま、駆動周波数設定信号の変化値とする。
【0049】
これにより、PLLロック時には、一瞬のインピーダンスの高い状態が起きても、PLLロックは安定している。一方、非PLLロック時には、より早い周波数の変化を生じさせることができ、CPU25へ早急に異常状態を検知させることができる。
【0050】
図5は本発明の第3の実施の形態に係る超音波凝固切開装置の構成を示すブロック図である。
【0051】
第3の実施の形態は、第1の実施の形態とほとんど同じであるので、異なる点のみ説明し、同一の構成には同じ符号をつけ説明は省略する。
【0052】
第1及び第2の実施の形態では、位相差+/-信号をイネーブルとし、クロックをカウントし、DSPを用いた演算を行い、演算結果の数のUP/DOWNカウント信号のパルスをUP/DOWNカウンタに出力することにより周波数追尾制御を行っていたが、本実施の形態では、図5に示すように、周波数変化設定回路22の代わりにカウンタ31を用い、位相差+/-信号を分周し、UP/DOWNカウント信号を生成する。
【0053】
本実施の形態の場合、第1及び第2の実施の形態のように、位相差+/-信号の大きさは、UP/DOWNカウント信号に反映されない(位相差が大きくても小さくても結果に周波数追尾に影響しない)が、位相差+/-信号を分周することにより、位相差+/-信号パルス数に対するUP/DOWNカウント信号のパルス数を少なくできる。そのため、θv、θIにノイズが生じた場合でも駆動周波数の変化への影響を小さくすることができる。
【0054】
また、PLLロック/非ロック時に応じて分周比を4分周から2分周へ変化させることにより、PLLロック時には、位相差+/-信号4パルス数に対してUP/DOWNカウント信号を1パルス、PLL非ロック時には、位相差+/-信号2パルス数に対してUP/DOWNカウント信号を1パルス出力する。
【0055】
そして、UP/DOWNカウンタ23では、UP/DOWNカウント信号1パルスに対して、駆動周波数設定信号を1Hz変化させる。これにより、第1及び第2の実施の形態と同等の効果を安価に得るにことができる。
【0056】
また、超音波凝固切開装置1内部回路全体の応答を遅らせ、当該回路全体の発振防止にも役立つ。
【0057】
【発明の効果】
以上説明したように本発明によれば、インピーダンスZが一瞬高くなったような状況においても駆動信号を共振周波数に確実に追尾させると共に、超音波振動子の破損等による異常時には異常を認識し装置の停止を行うことができるという効果がある。
【図面の簡単な説明】
【図1】本発明の第1の実施の形態に係る超音波手術装置の構成を示す構成図
【図2】図1の超音波凝固切開装置の構成を示すブロック図
【図3】図2の周波数変化設定回路の作用を説明する説明図
【図4】本発明の第2の実施の形態に係る超音波凝固切開装置の構成を示すブロック図
【図5】本発明の第3の実施の形態に係る超音波凝固切開装置の構成を示すブロック図
【図6】従来の超音波凝固切開装置の構成を示す構成図
【図7】一般的な負荷(振動子)と出力回路の等価回路を示す図
【図8】図7の等価回路の特性を示す第1の特性図
【図9】図7の等価回路の特性を示す第2の特性図
【符号の説明】
1…超音波凝固切開装置
2…ハンドピース
3…フットスイッチ
11…デジタル式PLL
12…電力増幅器
13…検知回路
21…位相比較器
22…周波数変化設定回路
22a…位相差信号大きさ検知部
22b…第1データ保管部
22c…第2データ保管部
22d…第3データ保管部
22e…変化値演算部
23…UP/DOWNカウンタ
24…DDS
25…CPU
26…監視回路
[0001]
BACKGROUND OF THE INVENTION
The present invention relates to an ultrasonic transducer driving device, and more particularly to an ultrasonic transducer driving device characterized by a control portion for driving to follow the resonance frequency of the ultrasonic transducer.
[0002]
[Prior art]
In general, it is desirable to drive an ultrasonic transducer used in an ultrasonic scalpel for surgical operation, an ultrasonic processing apparatus, or the like at or near its fundamental resonance frequency. Further, when the resonance frequency of the ultrasonic transducer is no longer present due to load conditions, temperature, damage to the transducer, etc., it is necessary to prohibit driving the ultrasonic transducer and to warn the operator.
[0003]
Therefore, as shown in, for example, Japanese Patent Laid-Open No. 7-313937, a PLL (phase control) configured with an analog circuit that controls the drive frequency of the vibrator to coincide with the resonance frequency in an ultrasonic vibrator drive device. (Loop) method of vibrator driving and a method of confirming whether or not the driving frequency is within a predetermined range, and stopping the drive in the case of an abnormality and notifying the abnormality are disclosed.
[0004]
However, the PLL system configured with an analog circuit requires a plurality of transmission sources in order to drive a vibrator having a plurality of types of resonance frequencies, and is configured with an analog circuit. There have been problems such as changes in characteristics and the need to adjust the circuit with a variable resistor or the like.
[0005]
Therefore, in recent years, resonance frequency tracking has been performed with a PLL system (hereinafter referred to as a digital PLL) configured by a digital circuit using a DDS (direct digital synthesizer) and an UP / DOWN counter to solve the above problem. Yes.
[0006]
FIG. 6 is a block diagram of a feedback circuit in the digital PLL 92 in the conventional ultrasonic coagulation / cutting device 91. The detection circuit 101 detects the voltage and current of the ultrasonic output signal, and the phase signal θv ( Voltage phase signal) and θI (current phase signal) are input to the phase comparator 102.
[0007]
The phase comparator 102 detects the phase difference between the voltage phase signal and the current phase signal, and outputs a control signal (hereinafter referred to as a phase difference +/− signal) for raising and lowering the output frequency, and the UP / DOWN counter 103 receives the control signal. Input a control signal.
[0008]
The UP / DOWN counter 103 outputs an actually output frequency (hereinafter referred to as a drive frequency setting signal) based on the initial setting frequency signal from the CPU 104 and the phase difference +/− signal from the phase comparator 102.
[0009]
The DDS 105 actually outputs a sine wave based on the drive frequency setting signal. This sine wave is transmitted to the vibrator 109 in the handpiece 108 via the power amplifier 106 and the detection circuit 101, and the tip of the handpiece 108 performs ultrasonic vibration to make a coagulation incision of the tissue.
[0010]
Further, the monitoring circuit 110 monitors the drive frequency setting signal, checks whether the difference from the initial setting frequency signal is within a predetermined range, and if it is outside the predetermined range, the PLL unlock signal Is transmitted to the CPU 104, and the driving of the ultrasonic coagulation / cutting device 91 is stopped.
[0011]
FIG. 7 shows an equivalent circuit of a general vibrator and an inductor Lb of the output circuit of the ultrasonic coagulation / cutting device 1. An equivalent circuit of the vibrator is represented by a series circuit of Ca, La, and R and a parallel circuit of Cb. Usually, the oscillation circuit includes a matching coil Lb for canceling the braking capacity component of the vibrator.
[0012]
FIG. 8 shows the electrical characteristics of the equivalent circuit of FIG. The vertical axis represents impedance Z and phase θ, and the horizontal axis represents frequency.
[0013]
In FIG. 8, F1 is a first anti-resonance frequency, Fr is a resonance frequency, and F2 is a second anti-resonance frequency.
[0014]
Usually, when the vibrator is ultrasonically driven, PLL driving is performed so that the driving frequency is tracked to the resonance frequency Fr.
[0015]
In addition, when the resonance frequency Fr no longer exists due to the abnormality of the vibrator, the drive frequency deviates from a predetermined range (PLL lockable range). Conventionally, this has been monitored and the driving of the ultrasonic coagulation / cutting device 91 has been stopped.
[0016]
[Problems to be solved by the invention]
However, in the driving of such an ultrasonic transducer, the current phase signal cannot be detected in a situation where the impedance Z generated for a moment becomes high, and the driving frequency changes instantaneously, and is out of a predetermined range. Therefore, there is a problem that the CPU 104 is recognized as abnormal and the apparatus stops.
[0017]
In other words, it is known that when the tissue is grasped by the handpiece 108, the impedance Z and phase θ characteristics have high impedance and the change becomes dull as shown in FIG.
[0018]
Conventionally, in the UP / DOWN counter 103, since the drive frequency setting signal is raised and lowered at a ratio of 1: 1 with respect to the output from the phase comparator 102, the state in which the impedance Z is high and the change is slow is instantaneous. However, if it occurs, the current phase signal cannot be detected as described above, so that there is a problem that the resonance frequency cannot be tracked, the drive frequency is changed outside a predetermined displacement, the abnormality is recognized, and the apparatus is stopped.
[0019]
The present invention has been made in view of the above circumstances, and even in a situation where the impedance Z increases even for a moment, the drive signal is reliably tracked to the resonance frequency, and the ultrasonic transducer is damaged. An object of the present invention is to provide an ultrasonic transducer driving apparatus that can recognize an abnormality and stop the apparatus when an abnormality occurs due to the above.
[0020]
[Means for Solving the Problems]
The first ultrasonic transducer driving apparatus of the present invention includes an ultrasonic transducer drive signal generating means for generating a drive signal for driving the ultrasonic transducer in accordance with a drive frequency setting signal, and the ultrasonic transducer Phase signal detection means for detecting the voltage phase signal and current phase signal of the drive signal supplied to the ultrasonic transducer from the drive signal generation means, and the voltage phase signal and current detected by the phase signal detection means A phase difference magnitude detecting means for detecting the magnitude of the phase difference between the voltage phase and the current phase of the drive signal based on the phase signal in accordance with a predetermined clock; and a predetermined value detected by the phase difference magnitude detecting means. Phase difference data storage means for storing the phase difference data related to the magnitude of the phase difference according to the clock for the past predetermined number of times, and the phase difference data for the past predetermined number of times stored in the phase difference data storage means Based on the average value and a predetermined initialization frequency signals, the ultrasonic transducer generates a frequency variable data for the frequency control by the PLL drive, on the basis of the frequency variable data, the drive frequency setting signal Driving frequency setting signal generating means for generating and PLL driving the ultrasonic transducer, and detecting a difference between the driving frequency setting signal output from the driving frequency setting signal generating means and a predetermined initial setting frequency signal, And a monitoring unit that outputs a signal for canceling the PLL driving by the driving frequency setting signal generating unit when the difference reaches a predetermined range.
[0021]
The second ultrasonic transducer driving apparatus of the present invention includes an ultrasonic transducer drive signal generating means for generating a drive signal for driving the ultrasonic transducer in accordance with a drive frequency setting signal, and the ultrasonic transducer Phase signal detection means for detecting the voltage phase signal and current phase signal of the drive signal supplied to the ultrasonic transducer from the drive signal generation means, and the voltage phase signal and current detected by the phase signal detection means A phase difference signal frequency dividing means for performing a predetermined frequency dividing process on the phase difference signal with respect to the phase signal, the phase difference signal subjected to the frequency dividing process in the phase difference signal frequency dividing means, and a predetermined initial setting frequency signal; based on the ultrasonic transducer to generate a frequency variable data for the frequency control by the PLL drive, on the basis of the frequency variable data, the ultrasonic transducer to generate the drive frequency setting signal The difference between the drive frequency setting signal generating means for LL driving and the drive frequency setting signal output from the drive frequency setting signal generating means and a predetermined initial set frequency signal is detected, and the difference reaches outside the predetermined range. The monitoring means for outputting a signal for releasing the PLL drive by the drive frequency setting signal generating means, and at the time of the PLL drive and when the PLL drive is released based on the detection result of the monitor means Phase difference frequency ratio changing means for changing the frequency division ratio in the phase difference frequency means.
[0022]
DETAILED DESCRIPTION OF THE INVENTION
Embodiments of the present invention will be described below with reference to the drawings.
[0023]
1 to 3 relate to the first embodiment of the present invention, FIG. 1 is a block diagram showing the configuration of the ultrasonic surgical apparatus, FIG. 2 is a block diagram showing the configuration of the ultrasonic coagulation / cutting apparatus of FIG. FIG. 3 is an explanatory diagram for explaining the operation of the frequency change setting circuit of FIG.
[0024]
As shown in FIG. 1, the ultrasonic surgical apparatus according to the present embodiment provides ultrasonic output from the ultrasonic coagulation / cutting apparatus 1 that performs ultrasonic output, the handpiece 2 that performs treatment, and the ultrasonic coagulation / cutting apparatus 1. And a foot switch 3 to be controlled.
[0025]
As shown in FIG. 2, the handpiece 2 is provided with a vibrator 4, and the vibrator 4 is amplified by a power amplifier 12 having a driving frequency based on the output of the digital PLL 11 of the ultrasonic coagulation / cutting device 1. The drive signal is driven through the detection circuit 13.
[0026]
The detection circuit 13 detects the voltage and current supplied to the vibrator 4 and generates phase signals θv (voltage phase signal) and θI (current phase signal).
[0027]
The digital PLL 11 detects the direction (+/−) and the magnitude of the phase difference between θv and θI and generates a phase difference +/− signal, a phase comparator 21, a frequency change setting circuit 22, UP / A DOWN counter 23 and a DDS (Direct Digital Synthesizer) 24 are included.
[0028]
The frequency change setting circuit 22 is configured by a DSP (digital signal processor), and receives the phase difference +/− signal output from the phase comparator 21 as an enable signal and counts the clock to thereby determine the magnitude of the phase difference. The phase difference signal magnitude detection unit 22a to detect, the first to third data storage units 22b, 22c, and 22d that store the past three results of the phase difference signal magnitude detection unit 113a, and the first to third data It comprises a change value calculation unit 22e that calculates the change value of the startup frequency by averaging the values of the storage units 22b, 22c, and 22d and outputs a pulse signal (UP / DOWN count signal) according to the calculation result.
[0029]
The UP / DOWN counter 23 detects the edge of the output (UP / DOWN count signal) from the frequency change setting circuit 22 based on the initial set frequency signal transmitted from the CPU 25, and for one pulse of the UP / DOWN count signal. Then, the drive frequency setting signal is generated by changing the drive frequency by a predetermined frequency change.
[0030]
The DDS 24 outputs a sine waveform corresponding to the drive frequency setting signal.
[0031]
That is, the digital PLL 11 generates an UP / DOWN count signal for changing the drive frequency setting signal in the frequency change setting circuit 22 based on the output of the phase comparator 21, and passes through the UP / DOWN counter 23. Control is performed so that the drive frequency output from the DDS 24 tracks the resonance frequency.
[0032]
In addition, the monitoring circuit 26 monitors whether or not the difference between the drive frequency signal applied to the vibrator 4 and the initial setting frequency signal is within a predetermined range, and the difference is outside the predetermined range. Then, a PLL non-lock signal is transmitted to the CPU 25.
[0033]
FIG. 3 shows the operation in the frequency change setting circuit 22 in the digital PLL 11 of the present embodiment.
[0034]
As described above, the frequency change setting circuit 22 is configured by a DSP, and receives a clock, an initial setting frequency signal from the CPU 25, and a phase difference +/− signal from the phase comparator 21.
[0035]
The phase difference magnitude detection unit 13a in the frequency change setting circuit 22 inputs the phase difference − (+) signal shown in FIG. 3B as an enable, and counts the clock shown in FIG. Thus, the magnitude of the phase difference-signal is detected (the count result is Cn shown in FIG. 3B).
[0036]
The detected data Cn is stored in the first data storage unit 22b, and the data (Cn-1, Cn-2) stored in the first and second data storage units 22b, 22c until then is stored in the second and second data storage units 22b, 22c, respectively. The third data storage units 22c and 22d are stocked.
[0037]
The change value calculation unit 22e averages the three phase difference magnitude detection unit results (Cn, Cn-1, Cn-2) that are stored in the circuit, and generates a pulse signal for the average. As a result, an output UP (DOWN) count signal is obtained.
[0038]
UP (DOWN) count signal = (Cn + Cn-1 + Cn-2) / 3
Cn: The clock count number UP / DOWN counter 23 while the phase difference +/− signal is “L” is based on the initial setting frequency signal transmitted from the CPU 25, and with respect to one pulse of the above UP / DOWN count signal. The drive frequency setting signal is changed by a predetermined change (FIG. 3C).
[0039]
Based on the above, the DDS 24 performs frequency tracking by changing the frequency of the output sine waveform.
[0040]
By taking the average with the past data in the above calculation, a large frequency change of the drive frequency that causes a non-PLL lock does not occur due to an instantaneous impedance change.
[0041]
In addition, when a high impedance state has always occurred due to breakage of the vibrator 4 or the like, a non-PLL lock state is established.
[0042]
In other words, when using an ultrasonic transducer, when driving near the resonance frequency, even if the instantaneous impedance Z is high, the frequency does not change instantaneously and the ultrasonic transducer is damaged. An ultrasonic coagulation / cutting device appropriately configured to recognize an abnormality and to stop the apparatus in the event of an abnormality due to, for example, can be realized.
[0043]
FIG. 4 is a block diagram showing a configuration of an ultrasonic coagulation / cutting device according to the second embodiment of the present invention.
[0044]
Since the second embodiment is almost the same as the first embodiment, only different points will be described, and the same components are denoted by the same reference numerals and description thereof will be omitted.
[0045]
As shown in FIG. 4, in the second embodiment, a PLL lock / unlock signal that is an output of the monitoring circuit 26 is added to the input of the frequency change setting circuit 22.
[0046]
Then, during the resonance frequency tracking (at the time of PLL locking) and at the time of non-tracking (at the time of non-PLL locking), the number of data that takes the average value in the change value calculation unit 22e is changed.
[0047]
When the PLL is locked, the change value of the drive frequency is calculated by taking the average of the three data (Cn, Cn-1, Cn-2) of the first to third data storage units 22b-22d.
[0048]
However, when the PLL is not locked, the data Cn of the first data storage unit 22b is used as the change value of the drive frequency setting signal as it is.
[0049]
Thereby, at the time of PLL lock, even if a state with a high instantaneous impedance occurs, the PLL lock is stable. On the other hand, at the time of non-PLL lock, a faster frequency change can be caused, and the abnormal state can be detected immediately by the CPU 25.
[0050]
FIG. 5 is a block diagram showing a configuration of an ultrasonic coagulation / cutting device according to the third embodiment of the present invention.
[0051]
Since the third embodiment is almost the same as the first embodiment, only different points will be described, and the same components are denoted by the same reference numerals and description thereof will be omitted.
[0052]
In the first and second embodiments, the phase difference +/− signal is enabled, the clock is counted, an operation using the DSP is performed, and the number of UP / DOWN count signal pulses of the operation result is UP / DOWN. The frequency tracking control is performed by outputting to the counter. In this embodiment, as shown in FIG. 5, the counter 31 is used instead of the frequency change setting circuit 22, and the phase difference +/− signal is divided. Then, an UP / DOWN count signal is generated.
[0053]
In the case of the present embodiment, as in the first and second embodiments, the magnitude of the phase difference +/− signal is not reflected in the UP / DOWN count signal (the result is obtained regardless of whether the phase difference is large or small). However, by dividing the phase difference +/− signal, the number of pulses of the UP / DOWN count signal with respect to the phase difference +/− signal pulse number can be reduced. For this reason, even when noise occurs in θv and θI, the influence on the change in the driving frequency can be reduced.
[0054]
Further, by changing the frequency dividing ratio from 4 frequency division to 2 frequency division according to the PLL locked / non-locked state, when the PLL is locked, the UP / DOWN count signal is set to 1 with respect to the number of 4 pulses of the phase difference +/− signal. When the pulse or PLL is not locked, one UP / DOWN count signal is output for the number of phase difference +/- 2 pulses.
[0055]
Then, the UP / DOWN counter 23 changes the drive frequency setting signal by 1 Hz with respect to one pulse of the UP / DOWN count signal. Thereby, the effect equivalent to 1st and 2nd embodiment can be acquired cheaply.
[0056]
In addition, the response of the entire internal circuit of the ultrasonic coagulation / cutting device 1 is delayed, which is useful for preventing oscillation of the entire circuit.
[0057]
【The invention's effect】
As described above, according to the present invention, even when the impedance Z increases momentarily, the drive signal is reliably tracked to the resonance frequency, and an abnormality is recognized in the event of an abnormality due to damage to the ultrasonic transducer. There is an effect that can be stopped.
[Brief description of the drawings]
FIG. 1 is a block diagram showing a configuration of an ultrasonic surgical apparatus according to a first embodiment of the present invention. FIG. 2 is a block diagram showing a configuration of an ultrasonic coagulation / cutting apparatus of FIG. Explanatory drawing explaining the effect | action of a frequency change setting circuit [FIG. 4] The block diagram which shows the structure of the ultrasonic coagulation incision apparatus based on the 2nd Embodiment of this invention [FIG. 5] 3rd Embodiment of this invention FIG. 6 is a block diagram showing the configuration of a conventional ultrasonic coagulation / cutting device. FIG. 7 shows an equivalent circuit of a general load (vibrator) and an output circuit. 8 is a first characteristic diagram showing the characteristics of the equivalent circuit of FIG. 7. FIG. 9 is a second characteristic chart showing the characteristics of the equivalent circuit of FIG.
DESCRIPTION OF SYMBOLS 1 ... Ultrasonic coagulation incision apparatus 2 ... Handpiece 3 ... Foot switch 11 ... Digital type PLL
DESCRIPTION OF SYMBOLS 12 ... Power amplifier 13 ... Detection circuit 21 ... Phase comparator 22 ... Frequency change setting circuit 22a ... Phase difference signal magnitude detection part 22b ... 1st data storage part 22c ... 2nd data storage part 22d ... 3rd data storage part 22e ... Change value calculation unit 23 ... UP / DOWN counter 24 ... DDS
25 ... CPU
26. Monitoring circuit

Claims (2)

駆動周波数設定信号に応じて超音波振動子を駆動するための駆動信号を生成する超音波振動子駆動信号生成手段と、
前記超音波振動子駆動信号生成手段より前記超音波振動子に供給される前記駆動信号の電圧位相信号と電流位相信号とを検出する位相信号検出手段と、
前記位相信号検出手段で検出した前記電圧位相信号と前記電流位相信号とに基づいて当該駆動信号の電圧位相と電流位相との位相差の大きさを所定クロックに応じて検知する位相差大きさ検知手段と、
前記位相差大きさ検知手段で検知した、所定クロックに応じた前記位相差の大きさに係る位相差データを過去所定回数分保管する位相差データ保管手段と、
前記位相差データ保管手段に保管された過去所定回数分の前記位相差データの平均値と所定の初期設定周波数信号とに基づいて、前記超音波振動子をPLL駆動による周波数制御をするための周波数可変データを生成し、当該周波数可変データに基づいて、前記駆動周波数設定信号を生成して前記超音波振動子をPLL駆動する駆動周波数設定信号生成手段と、
前記駆動周波数設定信号生成手段より出力される当該駆動周波数設定信号と所定の初期設定周波数信号との差を検出し、当該差が所定の範囲外に達した際は、前記駆動周波数設定信号生成手段によるPLL駆動を解除するための信号を出力する監視手段と、
を具備したことを特徴とする超音波振動子駆動装置。
An ultrasonic transducer drive signal generating means for generating a drive signal for driving the ultrasonic transducer in accordance with the drive frequency setting signal;
Phase signal detection means for detecting a voltage phase signal and a current phase signal of the drive signal supplied to the ultrasonic vibrator from the ultrasonic vibrator drive signal generation means ;
Phase difference magnitude detection for detecting the magnitude of the phase difference between the voltage phase and the current phase of the drive signal in accordance with a predetermined clock based on the voltage phase signal and the current phase signal detected by the phase signal detection means. Means,
Phase difference data storage means for storing the phase difference data relating to the magnitude of the phase difference according to a predetermined clock detected by the phase difference magnitude detection means for the past predetermined number of times;
A frequency for performing frequency control by PLL driving of the ultrasonic transducer based on an average value of the phase difference data for a predetermined number of times stored in the phase difference data storage means and a predetermined initial setting frequency signal generates variable data, and the frequency variable data on the basis of, the drive frequency setting signal generating means for generating the drive frequency setting signal to PLL drives the ultrasonic vibrator,
A difference between the drive frequency setting signal output from the drive frequency setting signal generation means and a predetermined initial setting frequency signal is detected, and when the difference reaches outside a predetermined range, the drive frequency setting signal generation means Monitoring means for outputting a signal for releasing the PLL drive by
An ultrasonic transducer driving device comprising:
駆動周波数設定信号に応じて超音波振動子を駆動するための駆動信号を生成する超音波振動子駆動信号生成手段と、
前記超音波振動子駆動信号生成手段より前記超音波振動子に供給される前記駆動信号の電圧位相信号と電流位相信号とを検出する位相信号検出手段と、
前記位相信号検出手段で検出した前記電圧位相信号と前記電流位相信号との位相差信号に所定の分周処理を施す位相差信号分周手段と、
前記位相差信号分周手段において分周処理が施された前記位相差信号と所定の初期設定周波数信号とに基づいて、前記超音波振動子をPLL駆動による周波数制御をするための周波数可変データを生成し、当該周波数可変データに基づいて、前記駆動周波数設定信号を生成して前記超音波振動子をPLL駆動する駆動周波数設定信号生成手段と、
前記駆動周波数設定信号生成手段より出力される当該駆動周波数設定信号と所定の初期設定周波数信号との差を検出し、当該差が所定の範囲外に達した際は、前記駆動周波数設定信号生成手段によるPLL駆動を解除するための信号を出力する監視手段と、
前記監視手段の検出結果に基づいて、前記PLL駆動時と前記PLL駆動解除時とで前記位相差分周手段における分周比を変化させる位相差分周比変化手段と、
を具備したことを特徴とする超音波振動子駆動装置。
An ultrasonic transducer drive signal generating means for generating a drive signal for driving the ultrasonic transducer in accordance with the drive frequency setting signal;
Phase signal detection means for detecting a voltage phase signal and a current phase signal of the drive signal supplied to the ultrasonic vibrator from the ultrasonic vibrator drive signal generation means ;
Phase difference signal frequency dividing means for performing a predetermined frequency division process on the phase difference signal between the voltage phase signal and the current phase signal detected by the phase signal detecting means;
Based on the phase difference signal subjected to frequency division processing by the phase difference signal frequency dividing means and a predetermined initial setting frequency signal , frequency variable data for performing frequency control by PLL driving of the ultrasonic transducer is obtained. generated, and the frequency variable data on the basis of, the drive frequency setting signal generating means for generating the drive frequency setting signal to PLL drives the ultrasonic vibrator,
A difference between the drive frequency setting signal output from the drive frequency setting signal generation means and a predetermined initial setting frequency signal is detected, and when the difference reaches outside a predetermined range, the drive frequency setting signal generation means Monitoring means for outputting a signal for releasing the PLL drive by
Based on the detection result of the monitoring means, a phase difference frequency ratio changing means for changing a frequency dividing ratio in the phase difference frequency means at the time of PLL driving and at the time of releasing the PLL drive;
An ultrasonic transducer driving device comprising:
JP2000167809A 2000-02-04 2000-06-05 Ultrasonic transducer drive Expired - Fee Related JP3756726B2 (en)

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Application Number Priority Date Filing Date Title
JP2000167809A JP3756726B2 (en) 2000-06-05 2000-06-05 Ultrasonic transducer drive
US09/774,920 US6569109B2 (en) 2000-02-04 2001-01-31 Ultrasonic operation apparatus for performing follow-up control of resonance frequency drive of ultrasonic oscillator by digital PLL system using DDS (direct digital synthesizer)
US10/414,984 US6761690B2 (en) 2000-02-04 2001-06-18 Ultrasonic operation apparatus for performing follow-up control of resonance frequency drive of ultrasonic oscillator by digital PLL system using DDS (direct digital synthesizer)
US10/774,914 US7270646B2 (en) 2000-02-04 2004-02-09 Ultrasonic operation apparatus for performing follow-up control of resonance frequency drive of ultrasonic oscillator by digital PLL system using DDS (direct digital synthesizer)

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JP2000167809A JP3756726B2 (en) 2000-06-05 2000-06-05 Ultrasonic transducer drive

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KR101348663B1 (en) 2012-01-27 2014-01-08 주식회사 제이엠씨파트너 Method for Regulating the Output of a Ultrasound Probe and Medical Apparatus for Generating Ultrasound having Frequency Approximate to Resonance Frequency of Ultrasound Probe
KR101512686B1 (en) * 2013-02-27 2015-04-16 김동수 Ultrasound therapy device having a resonant frequency of the auto-matching capabilities
US9872698B2 (en) 2013-09-25 2018-01-23 Covidien Lp Ultrasonic dissector and sealer
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US9943326B2 (en) 2015-01-21 2018-04-17 Covidien Lp Ultrasonic surgical instruments and methods of compensating for transducer aging
US10603065B2 (en) 2016-02-18 2020-03-31 Covidien Lp Surgical instruments and jaw members thereof
US11571237B2 (en) 2016-02-18 2023-02-07 Covidien Lp Surgical instruments and jaw members thereof

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