JP3753670B2 - Burst signal amplifying device and burst optical signal receiving device using the same - Google Patents

Description

[0001]
BACKGROUND OF THE INVENTION
The present invention relates to an optical receiver that receives an optical signal and converts it into an electrical signal, and more particularly to a burst signal amplifier that constitutes the optical receiver and a burst optical signal receiver using the same.
[0002]
[Prior art]
As a conventional burst signal amplifying apparatus, for example, one described in Japanese Patent Laid-Open No. 2001-196957 is known. FIG. 8 is a block circuit diagram showing the configuration of the burst signal amplifying apparatus described in this publication. In the figure, a burst signal amplifying device 90 includes a constant gain amplifying circuit (in this specification, a constant gain amplifying circuit is simply abbreviated as an amplifying circuit) 91 having an input terminal connected to the input terminal 1, and the amplifying circuit 91. The input terminal is connected to the output terminal, the output terminal is connected to the output terminal 2, the input terminal is connected to the output terminal of the amplifier circuit 91, and the output terminal is connected to the input terminal of the amplifier circuit 92. And a connected peak detection circuit 93.
[0003]
With this configuration, the burst signal input from the input terminal 1 is amplified by the amplifier circuit 91 and then branched into two. One branched signal is applied to the amplifier circuit 92, and the other branched signal is applied to the peak detection circuit 93. The peak detection circuit 93 detects the peak level of the burst signal and adds it as a reference level signal for the amplification circuit 92. The amplifying circuit 92 amplifies the difference of the input signal with respect to this reference level and outputs it to the output terminal 2. When it is necessary to increase the amplification degree, one or a plurality of amplifier circuits are connected between the amplifier circuit 91 and the amplifier circuit 92, and a known multistage amplifier circuit is used. In this case, the amplifier circuits are DC (direct current) coupled.
[0004]
[Problems to be solved by the invention]
The above-described DC-coupled burst signal amplifying device has been made into a monolithic microwave integrated circuit (MMIC), which makes it possible to reduce the size and weight of the device, and to achieve high accuracy and excellent reproducibility. It is suitable for the ultra-high frequency region such as a belt, and the reliability of the device is also improved. However, since the burst signal amplifying device described above is configured with a resistance bias and a resistance load, there is a problem that when a high gain is realized in the MMIC space, the amount of heat generation increases.
Further, when the amplifier circuits are connected in multiple stages, there is a problem that a DC level fluctuation easily occurs due to a mark ratio fluctuation, and a compensation circuit is necessary.
[0005]
The present invention has been made to solve the above problems, and a burst signal amplifying apparatus capable of suppressing power consumption and reducing a calorific value and suppressing a DC level fluctuation accompanying a mark ratio fluctuation and the same. An object of the present invention is to provide a burst optical signal receiving apparatus using the above.
[0006]
[Means for Solving the Problems]
According to the first aspect of the present invention, a plurality of amplifier circuits that amplify the burst signal in multiple stages and the amplifier circuits are capacitively coupled to each other, and the input terminal of the first stage amplifier circuit and the output terminal of the last stage amplifier circuit are connected to each other. A plurality of capacitors that are capacitively coupled to the target and an output signal of any one of the amplifier circuits are branched and input, and a positive peak value and a negative peak value of the burst signal generated at the output terminal of the final stage amplifier circuit DC level adjustment circuit that generates a DC voltage signal of negative (or positive) polarity corresponding to a DC voltage that is 1/2 of the sum of the DC voltage, and the DC voltage generated by the DC level adjustment circuit in the output signal of the final stage amplifier circuit Means for adding (or subtracting) signals.
With this configuration, since the capacitively coupled multi-stage amplifier circuit amplifies only the alternating current of the burst signal, the power consumption is kept low and the heat generation amount is reduced. In addition, since the voltage whose DC level has been adjusted is superimposed on the AC component of the burst signal, it is possible to suppress DC level fluctuations resulting from burst signal mark rate fluctuations.
[0007]
According to the second aspect of the present invention, a plurality of amplifier circuits including at least one variable gain amplifier circuit for amplifying a burst signal in multiple stages, and the amplifier circuits are capacitively coupled to each other. A plurality of capacitors that capacitively couple the output terminals of the final stage amplifier circuit to the connection target and the output signal of any one of the amplifier circuits are branched and input, and the positive of the burst signal generated at the output terminal of the final stage amplifier circuit is detected. A DC level adjustment circuit that generates a DC voltage signal of negative (or positive) polarity corresponding to a DC voltage that is ½ of the sum of the peak value in the direction and the peak value in the negative direction, and the output signal of the variable gain amplifier circuit A peak detection circuit that performs branch input, detects the amplitude of the burst signal, and adjusts the gain of the variable gain amplifier circuit so that the amplitude of the burst signal generated at the output terminal of the final stage amplifier circuit is constant, And means for adding (or subtracting) a DC voltage signal generated by the DC level adjustment circuit to an output signal of the amplifier circuit stages.
With this configuration, since a function of keeping the amplitude of the burst signal constant is added, the effect of suppressing the DC level fluctuation caused by the mark rate fluctuation of the burst signal is further enhanced.
[0008]
In the invention according to claim 3, the DC level adjusting circuit includes a signal input circuit in which a capacitor and a resistor are connected in series, a burst signal branched to one end on the capacitor side is applied, and the other end on the resistor side is grounded. A first diode having an anode connected to an interconnection point between the capacitor and the resistor of the signal input circuit and a second diode having a cathode connected thereto, a voltage signal generated at the cathode of the first diode, and a second diode the voltage signal generated in the anode of the diode type, respectively, a peak hold circuit for generating and outputting a voltage signal corresponding to the peak value of the positive and negative sides of the burst signal with respect to the ground potential, the positive peak hold circuit the voltage dividing resistors for generating a voltage of 1/2 of the sum of the peak voltage and negative peak voltage, a voltage signal divided by dividing resistors, amplifier final stage Inverted level corresponding to 1/2 of the DC voltage of the sum of the positive peak value and negative peak value of the burst signal of the road (or regular) was amplified, addition (or subtraction) to the means for outputting Circuit.
With this configuration, it is possible to detect the median value of the amplitude of the burst signal, that is, the DC level in the signal existence section, and keep the DC voltage level superimposed on the AC component constant.
[0009]
In the invention according to claim 4, the peak detection circuit includes a signal input circuit in which a capacitor and a resistor are connected in series, a burst signal branched to one end on the capacitor side is applied, and the other end on the resistor side is grounded; A first diode having an anode connected to an interconnection point between a capacitor and a resistor of a signal input circuit, a second diode having a cathode connected thereto, a voltage signal generated at the cathode of the first diode, and a second diode A peak hold circuit that inputs and outputs a voltage signal corresponding to each of the positive and negative peak values of the burst signal relative to the ground potential, and a positive side of the peak hold circuit and And a differential amplifier circuit that amplifies the differential voltage of the negative peak voltage signal and outputs a gain control signal of the variable gain amplifier circuit.
With this configuration, the peak level can be maintained for a certain period of time, so that the gain of the variable gain amplifier circuit can be stabilized even in the non-signal period.
[0010]
According to a fifth aspect of the present invention, a plurality of amplifier circuits including at least one variable gain amplifier circuit for amplifying a burst signal in multiple stages, and the amplifier circuits are capacitively coupled to each other. A plurality of capacitors that capacitively couple the output terminals of the final stage amplifier circuit to the connection target and the output signal of any one of the amplifier circuits are branched and input, and the positive of the burst signal generated at the output terminal of the final stage amplifier circuit is detected. Generates a negative (or positive) DC voltage signal equivalent to a DC voltage that is half the sum of the peak value in the direction and the peak value in the negative direction, detects the amplitude of the burst signal, and amplifies the final stage. A peak detection / DC level adjustment circuit that outputs the gain control signal of the variable gain amplifier circuit and a peak detection / output signal of the final stage amplification circuit so that the amplitude of the burst signal generated at the output terminal of the circuit is constant. And means for adding a DC voltage signal generated by the flow level adjusting circuit (or subtraction).
With this configuration, the median value of the amplitude of the burst signal, that is, the DC voltage level superimposed on the AC component can be kept constant, and furthermore, since the peak level is kept constant, the power consumption is kept low and heat is generated. The amount is reduced, and the effect of suppressing the DC level fluctuation caused by the mark rate fluctuation of the burst signal is enhanced.
[0011]
In the invention according to claim 6, in the peak detection / DC level adjustment circuit, a capacitor and a resistor are connected in series, a burst signal branched to one end of the capacitor is applied, and the other end of the resistor is grounded A first diode having an anode connected to an interconnection point between a capacitor and a resistor of the signal input circuit, a second diode having a cathode connected thereto, a voltage signal generated at the cathode of the first diode, and A peak hold circuit for inputting a voltage signal generated at the anode of the second diode, generating a voltage signal corresponding to each of the positive and negative peak values of the burst signal with respect to the ground potential, and a peak hold circuit; the voltage dividing resistors for generating a voltage of 1/2 of the sum of the peak voltage and negative peak voltage of the positive side, a voltage signal divided by dividing resistors Inverted level corresponding to 1/2 of the DC voltage of the sum of the positive peak value and negative peak value of the burst signal of the amplifier circuit in the final stage (or regular) was amplified, addition (or subtraction) to means And a differential amplifier circuit that amplifies the DC voltage signal of the peak hold circuit and outputs a gain control signal of the amplifier circuit having a variable gain.
This configuration simplifies the configuration for keeping the median amplitude of the burst signal, that is, the DC voltage level superimposed on the AC component constant, and keeping the peak level constant.
[0012]
The invention according to claim 7 is a light-receiving element that receives burst signal light and converts it into an electrical signal, and a burst signal according to any one of claims 1 to 6 that amplifies and outputs the electrical signal of the light-receiving element. A burst optical signal receiving device including an amplifying device.
With this configuration, it is possible to suppress power consumption to a low level and to reduce the amount of heat generated, and to suppress DC level fluctuations associated with mark rate fluctuations.
[0013]
DETAILED DESCRIPTION OF THE INVENTION
Hereinafter, the present invention will be described in detail based on preferred embodiments shown in the drawings. FIG. 1 is a circuit diagram partially showing in block form the configuration of a first embodiment of a burst signal amplifier according to the present invention. In the figure, a burst signal amplifying apparatus 10A has an amplifier circuit 11, 12,... 1n (n is a positive integer) connected in series between an input terminal 1 and an output terminal 2 to form a multistage amplifier circuit. Yes. In this case, capacitors 21, 22, 23, respectively, are connected to a connection path between the input terminal 1 and the amplifier circuit 11, a path where the amplifier circuits 11, 12,... 1n are sequentially connected, and a connection path between the amplifier circuit 1n and the output terminal 2, respectively. .. 2n are connected, whereby the amplifier circuits 11, 12,... 1n are sequentially capacitively coupled, and the input terminal of the first stage amplifier circuit 11 and the output terminal of the last stage amplifier circuit 1n are also not shown in the figure. Capacitively coupled to the subject. Among these, a voltage adder 32 for superimposing a DC signal is connected between the capacitor 2 n and the output terminal 2. The input terminal of the DC level adjusting circuit 40 is connected to the output terminal of the amplifier circuit 11 via the capacitor 31 for capacitive coupling. The output terminal of the DC level adjusting circuit 40 is connected to the signal adding terminal of the voltage adder 32. It is connected to the.
[0014]
FIG. 2 is a circuit diagram showing a detailed configuration of the direct current level adjustment circuit 40. Here, one end of the capacitor 41 serves as a signal input terminal, the other end of the capacitor 41 is connected to one end of the resistor 42, and the other end of the resistor 42 is grounded, and these constitute a signal input circuit. An anode of a diode 43 for detecting the maximum amplitude MAX of the burst signal is connected to an interconnection point between the capacitor 41 and the resistor 42, and further for detecting the minimum amplitude MIN of the burst signal. The cathode of the diode 44 is connected. A series connection circuit of resistors 46 and 47 and a series connection circuit of capacitors 48 and 49 are connected in parallel between the cathode of the diode 43 and the anode of the diode 44, and an interconnection point of the resistors 46 and 47 and the capacitor The interconnection points 48 and 49 are grounded in common.
[0015]
Further, the input terminal of the buffer amplifier circuit 51 is connected to the cathode of the diode 43, and the input terminal of the buffer amplifier circuit 52 is connected to the anode of the diode 44. A series connection circuit of resistors 53 and 54 is connected between the output terminals of the buffer amplifier circuits 51 and 52. The input terminal of the inverting amplifier circuit 55 is connected to the connection point between the resistors 53 and 54. Further, a resistor 57 and an inductor 58 are connected in series to the other end of the capacitor 56 grounded at one end, and by connecting the output terminal of the inverting amplifier circuit 55 to the interconnection point between the capacitor 56 and the resistor 57, A DC level correction voltage is output from the inductor 58. Here, the resistors 46 and 47, the capacitors 48 and 49, and the buffer amplifier circuits 51 and 52 constitute a peak hold circuit 45.
[0016]
With respect to the operation of the first embodiment configured as described above, the overall operation of the burst signal amplifying apparatus 10A shown in FIG. 1 will be described with reference to the waveform diagram of FIG. The operation of the DC level adjustment circuit 40 shown in FIG. 2 will be described.
[0017]
First, a burst signal with a small mark rate is input from the input terminal 1 as shown in FIG. 3A, or a burst signal with a high mark rate is input as shown in FIG. 3C. To do. These burst signals have DC components removed by capacitors 21, 22, 23,... Are amplified in multiple stages by amplifier circuits 11, 12,..., 1n, and further, DC components in amplifier circuit 1n are also removed by capacitors 2n. Then, a low level corresponding to the space part is the ground potential, and a high level corresponding to the mark part is added as a burst signal having a predetermined magnitude as an input to be added to the voltage adder 32.
[0018]
On the other hand, a part of the output signal of the first stage amplifier circuit 11 is branched and added to the DC level adjusting circuit 40. At this time, as shown in FIG. 3 (a) or (c), due to the difference in mark ratio, a difference occurs between the peak value Va in the positive direction and the peak value Vb in the negative direction with respect to 0V, that is, the ground potential. The DC level adjustment circuit 40 generates a DC level correction voltage corresponding to the median value of the amplitude of the burst signal output from the final stage amplifier circuit 1n, and uses it as the addition input of the voltage adder 32.
As a result, as shown in FIG. 3B or 3D, even if the mark ratio of the burst signal fluctuates, the burst signal oscillating around 0 V from the final stage amplifier circuit 1n is applied to the output terminal 2. Can be generated.
[0019]
Next, the operation of the DC level adjustment circuit 40 will be described. For example, as shown in FIG. 3A, when a burst signal having a small mark ratio is applied to the series connection circuit of the capacitor 41 and the resistor 42, the position of 0 V is placed between the interconnection points of the capacitor 41 and the resistor 42. A burst signal deviating from the center of the amplitude is generated. At this time, a voltage signal component exceeding 0V is generated at both ends of the resistor 46 via the diode 43, and the capacitor 48 is charged. Therefore, a positive peak voltage based on 0V is applied to the buffer amplifier circuit 51. Similarly, a voltage signal component lower than 0V is generated at both ends of the resistor 47 through the diode 44 and charges the capacitor 49. Therefore, a negative peak voltage based on 0V is applied to the buffer amplifier circuit 52. It is done.
[0020]
A resistor 53 and a resistor 54 having the same resistance value are connected in series between the output terminal of the buffer amplifier circuit 51 and the output terminal of the buffer amplifier circuit 52, and the voltage Va shown in FIG. , A voltage obtained by adding the voltage Vb, that is, (Va + Vb) is generated. Therefore, a DC voltage of Vc = (Va + Vb) / 2 is generated at the interconnection point between the resistors 53 and 54. This voltage is inverted and amplified by the inverting amplifier circuit 55, and a voltage of − (Va + Vb) / 2 is generated at the interconnection point of the subsequent capacitor 56 and resistor 57. In this case, the burst signal is sequentially amplified by the amplifier circuits 11, 12,..., 1n and added to the added input terminal of the voltage adder 32, while the inverting amplifier circuit 55 is connected to the burst signal amplification path, that is, the main signal. Since it is configured to have an amplification degree equal to that of the signal line, a DC voltage signal having a half of the amplitude of the burst signal generated at the output terminal of the amplifier circuit 1 n is applied to the addition input terminal of the voltage adder 32. As a result, as shown in FIG. 3B, the DC level of the burst signal generated at the output terminal 2 can be kept at 0V.
[0021]
The DC level adjustment of the burst signal having a small mark rate has been described above. However, as shown in FIG. 3C, the case where a burst signal having a large mark rate is input is similarly shown in FIG. As shown, the DC level of the burst signal generated at the output terminal 2 can be kept at 0V.
As described above, according to the first embodiment of the present invention, the connection path between the input terminal 1 and the amplifier circuit 11, the path that sequentially connects the amplifier circuits 11, 12,... 1n, and the amplifier circuit 1n and the output terminal. .., 2n are connected to the two connection paths, respectively, whereby the amplifier circuits 11, 12,... 1n are sequentially capacitively coupled, so that power consumption can be kept low. Further, by maintaining the DC level constant regardless of the mark rate by the DC level adjustment circuit 40, it is possible to suppress the DC level variation accompanying the mark rate variation.
[0022]
The burst signal amplifying apparatus 10A using FIG. 1 and FIG. 2 is based on the premise that the amplifying circuits 11, 12,... 1n always output a positive polarity burst signal. When the level correction voltage is output, but the amplifier circuit 1n always outputs a negative burst signal, the DC level adjustment circuit 40 is configured to output a positive DC level correction voltage as described above. The same effect can be obtained.
[0023]
In the first embodiment, the DC level correction voltage signal is generated using the output signal of the first-stage amplifier circuit. However, the output signal of any one of the other amplifier circuits is used as described above. Similar operations can be performed.
FIG. 4 is a circuit diagram partially showing in block form the configuration of the second embodiment of the burst signal amplifier according to the present invention. In the figure, the same elements as those shown in FIG. The burst signal amplifying apparatus 10B according to the second embodiment uses a variable gain amplifying circuit 11a in place of the amplifying circuit 11 constituting the first embodiment, and is output from the amplifying circuit 1n at the final stage. The only difference from FIG. 1 is that the peak detection circuit 60 adjusts the gain of the variable gain amplifier circuit 11a so that the amplitude of the burst signal is kept constant. It is configured in exactly the same way.
[0024]
FIG. 5 is a circuit diagram showing a detailed configuration of the peak detection circuit 60. This has a configuration similar to the DC level adjustment circuit 40 shown in FIG. 2, and the configuration of the signal output path of the peak hold circuit 45 is different. Here, a differential amplifier circuit 59 is provided to generate a signal corresponding to the difference between the positive peak voltage Va and the negative peak voltage Vb output from the peak hold circuit 45, that is, the amplitude of the burst signal. The voltage Va is applied to the positive input terminal (+), the voltage Vb is applied to the negative input terminal (−), and the output signal is used as the gain control signal of the variable gain amplifier circuit 11a. As a result, even when the amplitude of the burst signal input from the input terminal 1 fluctuates, the amplitude of the burst signal generated at the output terminal 2 can always be kept constant.
[0025]
In the second embodiment, the gain of the first stage amplifier circuit is adjusted as the variable gain amplifier circuit 11a, but the gain is adjusted. Similar actions and effects can be obtained.
[0026]
FIG. 6 is a circuit diagram showing the configuration of the third embodiment of the burst signal amplifying apparatus according to the present invention. In this embodiment, the functions of the DC level adjustment circuit 40 and the peak detection circuit 60 constituting the second embodiment shown in FIG. 4 are combined into one, and a main amplifier circuit including a variable gain amplifier circuit 11a. The peak detection / DC level adjustment circuit 70 for generating the DC level correction voltage and the gain control voltage is shown. This peak detection / DC level adjustment circuit 70 differs from the DC level adjustment circuit 40 shown in FIG. 2 only in that a differential amplifier circuit 59 is added. In other words, the positive input terminal of the differential amplifier circuit 59 (in order to generate a signal corresponding to the difference between the positive polarity peak voltage Va and the negative polarity peak voltage Vb output from the peak hold circuit 45 constituting the DC level adjustment circuit). The voltage Va is added to (+), the voltage Vb is added to the negative input terminal (−), and the output signal is used as the gain control signal of the variable gain amplifier circuit 11a.
[0027]
With this configuration, the median amplitude of the burst signal, that is, the DC voltage level superimposed on the AC component is kept constant, and the configuration for keeping the peak level constant is simplified. Can also be obtained.
FIG. 7 is a block diagram showing a configuration of an embodiment of a burst optical signal receiving apparatus according to the present invention. This is a burst optical signal receiving device 80 comprising a photodiode 81 as a light receiving element that receives a burst optical signal and converts it into an electrical signal, a preamplifier 82 that amplifies the output, and a burst signal amplifying device 83. is there. In this case, the burst signal amplifier 83 uses any one of the above-described embodiments.
[0028]
The operation of the burst optical signal receiving apparatus configured as described above will be described.
A burst signal incident from another, such as an optical fiber, is converted into an electric signal by a photodiode 81 and then amplified by a preamplifier 82. Then, it is amplified by the burst signal amplifying device 83 having a DC level adjustment function and a gain control function, and the DC level is adjusted regardless of the mark rate and input level of the input burst light, and the amplitude is also adjusted to be constant. As a result, the 2R reproduced burst signal is output.
[0029]
As described above, according to this embodiment, it is possible to obtain a burst optical signal receiving apparatus capable of reducing power generation by reducing power consumption and reducing DC level fluctuation accompanying mark ratio fluctuation.
[0030]
【The invention's effect】
As is apparent from the above description, according to the present invention, since the capacitively coupled multi-stage amplifier circuit amplifies only the AC component of the burst signal, the power consumption is kept low, the heat generation amount is reduced, and the DC level is further reduced. Since the voltage adjusted is superimposed on the AC component of the burst signal, a burst signal amplifying device and a burst optical signal receiving device using the burst signal amplifying device capable of suppressing the DC level variation caused by the mark rate variation of the burst signal are provided. Can be provided.
[Brief description of the drawings]
1 is a circuit diagram partially showing in block form the configuration of a first embodiment of a burst signal amplifying apparatus according to the present invention; FIG. 2 is a first embodiment of a burst signal amplifying apparatus shown in FIG. FIG. 3 is a waveform diagram for explaining the operation of the first embodiment of the burst signal amplifying apparatus according to the present invention. FIG. 5 is a circuit diagram partially showing a block diagram of a configuration of a second embodiment of a burst signal amplifying device according to the invention. FIG. 5 illustrates a second embodiment of the burst signal amplifying device shown in FIG. FIG. 6 is a circuit diagram showing a detailed configuration of a peak detection circuit. FIG. 6 is a circuit diagram showing a configuration of a third embodiment of a burst signal amplifying device according to the present invention. FIG. 8 is a block diagram showing a configuration of an embodiment. Block diagram showing the configuration of a paste optical signal amplifying device [Description of symbols]
DESCRIPTION OF SYMBOLS 1 Input terminal 2 Output terminal 10A, 10B Burst signal amplification apparatus 11-1n Amplification circuit 11a Variable gain amplification circuit 21-2n, 31, 41, 48, 49, 56 Capacitor 32 Voltage adder 40 DC level adjustment circuit 42, 46, 47, 53, 54, 57 Resistor 43, 44 Diode 45 Peak hold circuit 51, 52 Buffer amplifier circuit 55 Inverting amplifier circuit 58 Inductor 59 Differential amplifier circuit 60 Peak detection circuit 70 Peak detection / DC level adjustment circuit 80 Burst optical signal reception Device 81 photodiode 82 preamplifier 83 burst signal amplifier

Claims (7)

A plurality of amplifier circuits for amplifying the burst signal in multiple stages;
A plurality of capacitors for capacitively coupling the amplifier circuits to each other, and further capacitively coupling the input end of the amplifier circuit at the first stage and the output terminal of the amplifier circuit at the final stage to a connection target, respectively;
One of the output signals of the amplifier circuit is branched and input, and a direct current that is ½ of the sum of the positive peak value and the negative peak value of the burst signal generated at the output terminal of the final stage amplifier circuit a DC level adjusting circuit for generating a negative or positive polarity DC voltage signal corresponding to the voltage,
A burst signal amplifying apparatus comprising: means for adding (or subtracting) the DC voltage signal generated by the DC level adjusting circuit to the output signal of the amplifier circuit at the final stage. A plurality of amplifying circuits including at least one variable gain amplifying circuit for amplifying a burst signal in multiple stages;
A plurality of capacitors for capacitively coupling the amplifier circuits to each other, and further capacitively coupling the input end of the amplifier circuit at the first stage and the output terminal of the amplifier circuit at the final stage to a connection target, respectively;
One of the output signals of the amplifier circuit is branched and input, and a direct current that is ½ of the sum of the positive peak value and the negative peak value of the burst signal generated at the output terminal of the final stage amplifier circuit a DC level adjusting circuit for generating a negative or positive polarity DC voltage signal corresponding to the voltage,
The variable gain amplifier circuit is configured to branch-input the output signal of the variable gain amplifier circuit, detect the amplitude of the burst signal, and make the amplitude of the burst signal generated at the output terminal of the final stage amplifier circuit constant. A peak detection circuit for adjusting the gain of
A burst signal amplifying apparatus comprising: means for adding (or subtracting) the DC voltage signal generated by the DC level adjusting circuit to the output signal of the amplifier circuit at the final stage. The DC level adjusting circuit is
A signal input circuit in which a capacitor and a resistor are connected in series, a branched burst signal is applied to one end on the capacitor side, and the other end on the resistor side is grounded;
A first diode having an anode connected to an interconnection point between a capacitor and a resistor of the signal input circuit and a second diode having a cathode connected thereto;
A voltage signal generated at the cathode of the first diode and a voltage signal generated at the anode of the second diode are inputted, respectively, and voltage signals corresponding to respective positive and negative peak values of the burst signal with respect to the ground potential. A peak hold circuit that generates and outputs
A voltage dividing resistor that generates a voltage that is ½ of the sum of the positive peak voltage and the negative peak voltage of the peak hold circuit;
The voltage signal divided by the voltage dividing resistor is inverted to a level corresponding to a DC voltage that is ½ of the sum of the peak value in the positive direction and the peak value in the negative direction of the burst signal of the amplifier circuit at the final stage. The burst signal amplifying apparatus according to claim 1, further comprising: an output circuit that amplifies (or normal) and supplies to the means for adding (or subtracting). The peak detection circuit includes:
A signal input circuit in which a capacitor and a resistor are connected in series, a branched burst signal is applied to one end on the capacitor side, and the other end on the resistor side is grounded;
A first diode having an anode connected to an interconnection point between a capacitor and a resistor of the signal input circuit and a second diode having a cathode connected thereto;
A voltage signal generated at the cathode of the first diode and a voltage signal generated at the anode of the second diode are inputted, respectively, and voltage signals corresponding to respective positive and negative peak values of the burst signal with respect to the ground potential. A peak hold circuit that generates and outputs
4. A differential amplifier circuit that amplifies a differential voltage between positive and negative peak voltage signals of the peak hold circuit and outputs a gain control signal of the variable gain amplifier circuit. 5. The burst signal amplifying device described in 1. A plurality of amplifying circuits including at least one variable gain amplifying circuit for amplifying a burst signal in multiple stages;
A plurality of capacitors for capacitively coupling the amplifier circuits to each other, and further capacitively coupling the input end of the amplifier circuit at the first stage and the output terminal of the amplifier circuit at the final stage to the connection targets,
One of the output signals of the amplifier circuit is branched and input, and a direct current that is ½ of the sum of the positive peak value and the negative peak value of the burst signal generated at the output terminal of the final stage amplifier circuit The gain is generated so that a negative or positive direct current voltage signal corresponding to the voltage is generated, the amplitude of the burst signal is detected, and the amplitude of the burst signal generated at the output terminal of the amplifier circuit at the final stage is constant. A peak detection / DC level adjustment circuit that outputs a gain control signal of the variable amplifier circuit;
A burst signal amplifying apparatus comprising: means for adding (or subtracting) the DC voltage signal generated by the peak detection / DC level adjusting circuit to the output signal of the amplifier circuit at the final stage. The peak detection / DC level adjustment circuit is:
A signal input circuit in which a capacitor and a resistor are connected in series, a branched burst signal is applied to one end on the capacitor side, and the other end on the resistor side is grounded;
A first diode having an anode connected to an interconnection point between a capacitor and a resistor of the signal input circuit and a second diode having a cathode connected thereto;
A voltage signal generated at the cathode of the first diode and a voltage signal generated at the anode of the second diode are inputted, respectively, and voltage signals corresponding to respective positive and negative peak values of the burst signal with respect to the ground potential. A peak hold circuit that generates and outputs
A voltage dividing resistor that generates a voltage that is ½ of the sum of the positive peak voltage and the negative peak voltage of the peak hold circuit;
The voltage signal divided by the voltage dividing resistor is inverted to a level corresponding to a DC voltage that is ½ of the sum of the peak value in the positive direction and the peak value in the negative direction of the burst signal of the amplifier circuit at the final stage. An output circuit for (or regular) amplifying and supplying to the means for addition (or subtraction);
6. The burst signal amplifying device according to claim 5, further comprising: a differential amplifier circuit that amplifies a DC voltage signal of the peak hold circuit and outputs a gain control signal of the amplifier circuit having a variable gain. A light receiving element that receives burst signal light and converts it into an electrical signal;
A burst optical signal receiving apparatus comprising: the burst signal amplifying apparatus according to claim 1, which amplifies and outputs an electric signal of the light receiving element.

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