JP3740374B2 - Multiple wiring board - Google Patents

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Publication number
JP3740374B2
JP3740374B2 JP2001050984A JP2001050984A JP3740374B2 JP 3740374 B2 JP3740374 B2 JP 3740374B2 JP 2001050984 A JP2001050984 A JP 2001050984A JP 2001050984 A JP2001050984 A JP 2001050984A JP 3740374 B2 JP3740374 B2 JP 3740374B2
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Prior art keywords
conductor layer
wiring conductor
wiring
layer
insulating coating
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JP2002252444A (en
Inventor
拓 松寺
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Kyocera Corp
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Kyocera Corp
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Description

【0001】
【発明の属する技術分野】
本発明は半導体素子や容量素子・抵抗素子等の電子部品が搭載される配線基板となる領域を多数個配列するとともに各配線基板領域を分割線で区画してなる多数個取り配線基板に関するものであり、詳細には、セラミック材料から成る母基板に縦横に配列された多数個の略四角形状の配線基板領域間に形成された配線導体層および絶縁コート層を切断して分割溝が形成され、切断部分における配線導体層の母基板への機械的接合強度が良好で信頼性に優れた多数個取り配線基板に関するものである。
【0002】
【従来の技術】
多数個取り配線基板は、酸化アルミニウム質焼結体・ムライト質焼結体・窒化アルミニウム質焼結体・窒化珪素質焼結体・ガラスセラミックス焼結体等の絶縁材料から成る母基板に、多数個の略四角形状の配線基板領域を縦横に配列し、各配線基板領域の表面および内部に銅・銀・パラジウム・タングステン・モリブデン・マンガン等の金属材料から成る配線導体層を形成し、隣接する配線基板領域間には分割溝を形成するとともに、必要に応じて隣接する前記配線基板領域間にも配線導体層を設けることにより構成されている。この多数個取り配線基板を分割溝に沿って分割することにより、配線導体層を有する配線基板が得られ、配線基板上に半導体素子や容量素子・抵抗素子等の電子部品を搭載するとともに各電子部品の電極を配線導体層に電気的に接続することにより電子装置となる。
【0003】
このような多数個取り配線基板は、一般にセラミック材料の粉末を有機溶媒・バインダとともにシート状に成形してなる広面積のグリーンシートを準備するとともに、各配線基板となる領域および各領域間に、銅・銀・パラジウム・タングステン・モリブデン・マンガン等の金属材料の粉末に溶剤・バインダ等を添加して得た金属ペーストを印刷し、その後、各配線基板領域間に金型等により溝加工を施して分割溝を形成し、高温で焼成することにより製作される。
【0004】
併せて、配線導体層の母基板に対する機械的接合強度を高めるため、母基板表面と配線導体層の外周部とを絶縁コート層で連続的に被覆することが多用されるようになっている。これは、母基板表面と配線導体層の外周部とを絶縁コート層で覆うことにより、配線導体層の母基板に対する機械的接合強度を向上させ、配線導体層の微細化が可能となるとともに、絶縁コート層の形状を工夫することによりその開口部を利用して部品実装用の電極等を容易に形成することも可能となることによる。このような絶縁コート層は、グリーンシートに金属ペーストを印刷した後、例えば酸化アルミニウムなどのセラミック材料の粉末に有機溶剤等を添加してなるセラミックペーストを印刷することにより形成される。
【0005】
【発明が解決しようとする課題】
このようにして、絶縁コート層により配線導体層の母基板への機械的接合の強度向上が図られている。
【0006】
しかしながら、このような絶縁コート層を有する多数個取り配線基板を製作する場合、隣接する配線基板領域間では、焼成前の分割溝形成過程において配線基板領域を区画する分割溝が形成される際に、配線基板領域間に形成された絶縁コート層および配線導体層が金型の押し込み時に切断されるとともに、金型の引き上げ時に絶縁コート層と金型との接触抵抗が大きいため、金型の引き上げとともに持ち上がることとなる。その際、絶縁コート層と配線導体層との接合強度は配線導体層と母基板との接合強度に比べて高く、加えて配線導体となる金属ペーストは金属粉末を多量に含むため脆いことから、配線導体層と母基板間で剥離が生じたり、配線導体層の変形に伴い内部に空隙が発生し、電気抵抗の上昇や断線等が発生し、電気的接続信頼性が低下するという問題点があった。
【0007】
この場合、単に金型と絶縁コート層との接触面積を減らす、あるいは単に絶縁コート層による配線導体層の被覆面積を減らすだけでは、分割溝の形成による配線導体層の母基板からの剥離や配線導体層内部の空隙の発生を抑制することは可能であるが、配線導体層に被覆される絶縁コート層の厚みが低下し、配線導体層と母基板の機械的接合強度の低下が生じるという問題点があった。
【0008】
【課題を解決するための手段】
本発明者は、上記課題について種々検討した結果、分割溝で切断された部位における配線導体層の厚みをTm(mm)、絶縁コート層の厚みをTc(mm)、絶縁コート層による配線導体層の外周部の被覆幅をLo(mm)としたとき、LoとTc/Tmの範囲と分割溝の形成による配線導体層の母基板からの剥離や配線導体層内部の空隙の発生との間に相互作用的な関係があることを見出し、LoとTc/Tmの範囲を定めることによって配線導体層の剥離の発生を抑えることが可能であることを見出したことから、本発明を考案するに至ったものである。
【0009】
即ち、本発明の多数個取り配線基板は、セラミック材料から成る平板状の母基板に縦横に配列された多数個の略四角形状の配線基板領域を形成して成り、隣接する前記配線基板領域間に、配線導体層および前記母基板の表面と前記配線導体層の外周部とを連続的に被覆する絶縁コート層が形成されるとともに、前記配線導体層および前記絶縁コート層を切断して前記配線基板領域を区画する分割溝が形成された多数個取り配線基板であって、前記配線導体層および前記絶縁コート層は、前記分割溝で切断された部位において、配線導体層の厚みをTm(mm)、絶縁コート層の厚みをTc(mm)、絶縁コート層による配線導体層の外周部の被覆幅をLo(mm)としたとき、以下の関係
0.4≦Tc/Tm≦2.0
かつ
0.1≦Lo≦−0.4375×(Tc/Tm)+1.275
を満足するものであることを特徴とするものである。
【0010】
また、本発明の多数個取り配線基板は、上記構成において、さらに下記の関係
Lo≦−0.4375×(Tc/Tm)+0.975
を満足することを特徴とするものである。
【0011】
本発明の多数個取り配線基板によれば、隣接する配線基板領域間に、配線導体層および母基板の表面と配線導体層の外周部とを連続的に被覆する絶縁コート層が形成されるとともに、配線導体層および前記絶縁コート層を切断して前記配線基板領域を区画する分割溝が形成された多数個取り配線基板の、分割溝で切断された部位において、配線導体層の厚みTmと、絶縁コート層の厚みTcと、絶縁コート層による配線導体層の外周部の被覆幅Loとの関係を上記のように定めたことにより、配線導体層の母基板への機械的接合強度の低下を発生させない範囲で絶縁コート層と金型との接触抵抗を前述の問題点を発生させない程度にまで低下させることができるので、配線導体層の母基板への機械的接合強度が良好で、かつ、金型加工において分割溝形成後の引き上げ時における配線導体層内の剥離の発生が抑制され、高い電気的接続信頼性を得ることが可能となる。
【0012】
【発明の実施の形態】
次に、本発明を添付の図面に基づき説明する。
【0013】
図1(a)は本発明の多数個取り配線基板の実施の形態の一例を示す斜視図であり、1は母基板、2は配線導体層、3は絶縁コート層を示す。各配線導体層2および絶縁コート層3は、母基板1の表面で、配線基板領域4および領域4間に形成される。領域4間には母基板1を個々の配線基板領域4に区画するため分割溝1aが形成されており、配線基板領域4間に配線導体層2および絶縁コート層3が形成されている部位においては配線導体層2および絶縁コート層3を切断して分割溝1aが形成される。この分割溝1aに沿って母基板1を分割することで図1(b)に斜視図で示す配線基板5を得る。
【0014】
母基板1は、分割後の配線基板5において半導体素子や容量素子・抵抗素子等の電子部品を搭載するための絶縁基体となるものであり、ガラスセラミックス焼結体・酸化アルミニウム質焼結体・ムライト質焼結体・窒化アルミニウム質焼結体等のセラミック材料から成る平板状の基板である。ガラスセラミックス焼結体から成る場合であれば、硼珪酸ガラス・酸化アルミニウム等の粉末に、有機溶剤・バインダ・可塑剤等を添加してスラリーとなし、これをドクターブレード法等でシート状に成形して得たグリーンシートを必要に応じて複数枚積層するとともに約1000℃で焼成することにより製作される。
【0015】
配線導体層2は、配線基板5に搭載される電子部品(図手せず)の電極を半田またはボンディングワイヤ等の導電性接続材を介して配線基板5に電気的接続を行なうものである。ガラスセラミックス焼結体等の1000℃前後で焼成可能なセラミック材料を母基板1とする場合は、銅・銀・パラジウム等の金属材料により形成し、また、酸化アルミニウム質焼結体等の1500℃以上で焼成するセラミック材料を母基板1とする場合は、タングステン・モリブデン等の高融点金属材料により形成される。配線導体層2は、例えばガラスセラミックス焼結体を母基板1として用いる際には、銅・銀・パラジウム等の金属粉末に有機溶剤・バインダ等を添加して金属ペーストを作製し、この金属ペーストを母基板1となるグリーンシートにスクリーン印刷法等で所定パターンに印刷塗布しておくことにより形成される。
【0016】
なお、配線導体層2は、金属ペーストを塗布する際に、周辺部が中央部よりも薄くなる横断面形状とすることが好ましい。こうすることで、配線導体層2の周辺部と母基板1の段差を少なくすることができ、後述する絶縁コート層3を形成するセラミックペーストやガラスペーストの塗布において、塗布ムラおよび空隙の発生を抑制することができる。
【0017】
配線導体層2は、一般に、回路設計等の設計上の都合、あるいはその表面にめっき層を被着させる際の導通を容易とする等の理由から、配線基板5となる各配線基板領域4間で導通するようにして形成する必要があり、そのために各配線基板領域4間にも形成される。
【0018】
絶縁コート層3は、配線導体層2の周辺部と母基板1とを共に被覆することで、配線導体層2の母基板1への機械的接合強度を向上させるものである。このような絶縁コート層3を形成する材料は、母基板1を形成するセラミック材料の焼成条件に合わせて適当なものを選択して用いる。例えば、1000℃前後で焼成可能なガラスセラミックス焼結体であれば硼珪酸ガラス等のガラス粉末を主成分として用い、1500℃以上で焼成を行なう酸化アルミニウム質焼結体であれば酸化アルミニウム等のセラミック粉末を主成分として用いる。これらの粉末に有機溶剤・バインダ等を添加して得たガラスペーストやセラミックペーストを、母基板1となるグリーンシートの表面から母基板1に印刷塗布された配線導体層2となる金属ペーストの表面の外周部にかけて連続的に被覆するようにして印刷塗布することにより形成される。
【0019】
なお、絶縁コート層3は、母基板1と接する外縁部の母基板1に対する接触角度を60度以下としておくと、電子部品実装後の配線基板5を使用する際の温度変化による、配線基板5と電子部品との熱膨張係数の差により生じる熱応力の応力集中を緩和でき、絶縁コート層3が母基板1より剥離することを効果的に防止することができる。
【0020】
分割溝1aは、母基板1の各配線基板領域4を個々の配線基板5に分割するためのものであり、例えば、形成しようとする分割溝1aに対応して切り込み用の刃を配置した金型を、母基板1となるグリーンシートに押圧することにより形成される。
【0021】
本発明においては、図2(a)に図1のA部詳細図で、また図2(b)に(a)のB−B’断面における要部断面図で示すように、分割溝1a形成時に切断された部位における配線導体層2の厚みをTm(mm)、絶縁コート層3の厚みをTc(mm)、絶縁コート層3による配線導体層2の外周部被覆幅をLo(mm)としたとき、以下の関係
0.4≦Tc/Tm≦2.0
かつ
0.1≦Lo≦−0.4375×(Tc/Tm)+1.275
を満足することが重要である。
【0022】
すなわち、横軸にTc/Tm、縦軸にLo(単位:mm)を示した図3に示す線図において、領域1と領域2とを包括する範囲を満足することが重要である。
【0023】
ここで、Tc/Tm>2.0もしくはLo>−0.4375×(Tc/Tm)+1.275の場合は、分割溝1a形成時に、配線導体層2の厚みおよび幅に対して、絶縁コート層3が金型と接する断面積が大きくなることで、絶縁コート層3と金型の接触抵抗が大きくなり、金型引き上げとともに絶縁コート層が上方に持ち上がり、配線導体層2の母基板1からの剥離や配線導体層2内の空洞が生じることで、配線導体層2の電気抵抗が上昇し電気的特性不良となる傾向がある。また、Lo<0.1もしくはTc/Tm<0.4の場合は、配線導体層2の周辺部を被覆するには十分な絶縁コート層3の被覆幅もしくは厚みに満たないため、配線導体層2と母基板1の機械的接合強度の低下が発生する傾向がある。
【0024】
特に、ガラスセラミックス焼結体を母基板1として用いる場合は、
0.4≦Tc/Tm≦2.0
かつ
0.1≦Lo≦−0.4375×(Tc/Tm)+0.975
すなわち、図3において、領域2の範囲を満たすことが重要である。これは、焼結温度の制約から、硼珪酸ガラス等のガラス質を主成分とするセラミックペーストもしくはガラスペーストにより絶縁コート層3を形成するため、他の高温焼結材料に用いる絶縁コート層3の材質に比べ金型との接触抵抗が高いことによる。
【0025】
また、配線導体層2の厚みTmは、電気抵抗特性の点から、0.015mm〜0.075mmの範囲で形成することが好ましい。また、絶縁コート層3の厚みTcは、配線導体層2と母基板1の機械的接合強度の補強の点から、配線導体層2の厚みTmとの関係において、0.4≦Tc/Tmを満たすことが重要である。
【0026】
また、配線導体層2は、その露出する表面に、ニッケル・銅・金・パラジウム等の耐食性および半田濡れ性・ボンディングワイヤのボンディング性の良好な金属またはその合金から成るめっき層(図示せず)を、1μm〜20μm、例えば、ニッケルめっき層を0.5μm〜15μm、金めっき層を0.5μm〜5μmの厚みで被着させておくことが好ましい。
【0027】
絶縁コート層3は、一般に母基板1を構成するセラミック材料と同系色である場合が多く、ガラス粉末を主成分とする場合は無色で略透明であるが、絶縁コート層3が確実に形成されているか否かを、実体顕微鏡等を用いて確認するために、酸化クロム等の金属酸化物等の着色剤を3重量%〜7重量%の範囲で添加することにより、母基板1および配線導体層2との明確な色調の差により視認性を高めることも可能である。
【0028】
また、絶縁コート層3を上面視したときに、各コーナーとなる部分に、曲率半径0.040mm〜0.120mmの範囲で丸みをつけておくと、絶縁コート層3を母基板1に対してより一層確実、強固に被着させておくことができ、配線導体層2の母基板1に対する機械的接合強度をより一層向上させることができる。
【0029】
なお、本発明は上述の実施の形態の例に限定されるものではなく、本発明の要旨を逸脱しない範囲であれば種々の変更は可能である。例えば、図4に図2(a)と同様の詳細図で示すように、分割溝1aにより区画される部分の配線導体層2内に、母基板1を貫通する貫通穴6もしくは途中までの非貫通穴(図示せず)が存在する場合でも適応することが可能である。
【0030】
【発明の効果】
本発明の多数個取り配線基板によれば、配線導体層および絶縁コート層の分割溝で切断される部位において、配線導体層の厚みと、絶縁コート層の厚みと、絶縁コート層による配線導体層の外周部の被覆幅の範囲とを定めることにより、分割溝形成時の配線導体層内部の剥離の発生を抑え、かつ配線導体層の母基板への機械的接合強度を確保することができ、これによって、高い電気的かつ機械的接合信頼性を得ることが可能となる。
【図面の簡単な説明】
【図1】(a)は本発明の多数個取り配線基板の実施の形態の一例を示す斜視図であり、(b)は母基板を分割して得られる配線基板の例を示す斜視図である。
【図2】(a)は図1(a)のA部詳細図、(b)は図2(a)のB−B’断面における要部断面図である。
【図3】本発明において、絶縁コート層の厚みTcおよび配線導体層の厚みTmの比と、絶縁コート層による配線導体層の外周部の被覆幅Loとが満足すべき領域を示す線図である。
【図4】本発明の多数個取り配線基板の実施の形態の他の例を示す図2(a)と同様の詳細図である。
【符号の説明】
1…母基板
1a…分割溝
2…配線導体層
3…絶縁コート層
4…配線基板領域
5…配線基板
6…貫通穴
[0001]
BACKGROUND OF THE INVENTION
The present invention relates to a multi-piece wiring board in which a large number of areas serving as wiring boards on which electronic components such as semiconductor elements, capacitive elements, and resistance elements are mounted are arranged and each wiring board area is partitioned by dividing lines. In detail, the dividing conductor is formed by cutting the wiring conductor layer and the insulating coating layer formed between a large number of substantially rectangular wiring board regions arranged vertically and horizontally on a mother board made of a ceramic material, The present invention relates to a multi-cavity wiring board having excellent mechanical bonding strength of a wiring conductor layer to a mother board at a cut portion and excellent reliability.
[0002]
[Prior art]
A large number of wiring boards are provided on a mother board made of an insulating material such as an aluminum oxide sintered body, a mullite sintered body, an aluminum nitride sintered body, a silicon nitride sintered body, and a glass ceramic sintered body. Arranging approximately square wiring board areas vertically and horizontally, forming a wiring conductor layer made of a metal material such as copper, silver, palladium, tungsten, molybdenum, manganese on the surface and inside of each wiring board area, and adjacent to each other A dividing groove is formed between the wiring board regions, and a wiring conductor layer is provided between the adjacent wiring board regions as necessary. By dividing this multi-cavity wiring board along the dividing groove, a wiring board having a wiring conductor layer is obtained. On the wiring board, electronic components such as a semiconductor element, a capacitor element, and a resistance element are mounted, and each electron An electronic device is obtained by electrically connecting the electrode of the component to the wiring conductor layer.
[0003]
Such a multi-piece wiring board generally prepares a large area green sheet formed by forming a ceramic material powder into a sheet shape together with an organic solvent / binder, and between each area to be each wiring board and each area, Metal paste obtained by adding solvent, binder, etc. to powder of metal material such as copper, silver, palladium, tungsten, molybdenum, manganese, etc. is printed, and then groove processing is performed between each wiring board area with a mold etc. It is manufactured by forming divided grooves and firing at a high temperature.
[0004]
At the same time, in order to increase the mechanical bonding strength of the wiring conductor layer to the mother board, it is often used to continuously cover the surface of the mother board and the outer periphery of the wiring conductor layer with an insulating coating layer. By covering the mother board surface and the outer periphery of the wiring conductor layer with an insulating coat layer, the mechanical bonding strength of the wiring conductor layer to the mother board is improved, and the wiring conductor layer can be miniaturized. This is because by devising the shape of the insulating coat layer, it is possible to easily form an electrode for component mounting using the opening. Such an insulating coating layer is formed by printing a metal paste on a green sheet and then printing a ceramic paste obtained by adding an organic solvent or the like to a powder of a ceramic material such as aluminum oxide.
[0005]
[Problems to be solved by the invention]
In this way, the strength of mechanical bonding of the wiring conductor layer to the mother board is improved by the insulating coat layer.
[0006]
However, when manufacturing a multi-piece wiring board having such an insulating coat layer, when the divided grooves that partition the wiring board area are formed between adjacent wiring board areas in the process of forming the divided grooves before firing. The insulation coating layer and the wiring conductor layer formed between the wiring board regions are cut when the mold is pushed in, and the contact resistance between the insulation coating layer and the mold is large when the mold is pulled up, so that the mold is lifted up. It will be lifted with. At that time, the bonding strength between the insulating coat layer and the wiring conductor layer is higher than the bonding strength between the wiring conductor layer and the mother board, and in addition, the metal paste that becomes the wiring conductor is brittle because it contains a large amount of metal powder, There is a problem that separation occurs between the wiring conductor layer and the mother board, or voids are generated inside the wiring conductor layer due to deformation of the wiring conductor layer, resulting in an increase in electrical resistance, disconnection, etc., resulting in a decrease in electrical connection reliability. there were.
[0007]
In this case, simply reducing the contact area between the mold and the insulation coating layer, or simply reducing the coverage area of the wiring conductor layer with the insulation coating layer, the separation of the wiring conductor layer from the mother substrate by the formation of the dividing grooves and wiring It is possible to suppress the generation of voids inside the conductor layer, but the problem is that the thickness of the insulation coating layer that covers the wiring conductor layer decreases, and the mechanical bonding strength between the wiring conductor layer and the mother board decreases. There was a point.
[0008]
[Means for Solving the Problems]
As a result of various studies on the above problems, the present inventor has found that the thickness of the wiring conductor layer at the portion cut by the dividing groove is Tm (mm), the thickness of the insulating coating layer is Tc (mm), and the wiring conductor layer by the insulating coating layer. Between the range of Lo and Tc / Tm and the separation of the wiring conductor layer from the mother substrate and the generation of voids inside the wiring conductor layer when the covering width of the outer peripheral portion is Lo (mm) It was found that there is an interactive relationship, and it was found that it is possible to suppress the occurrence of peeling of the wiring conductor layer by determining the range of Lo and Tc / Tm, and thus the present invention was devised. It is a thing.
[0009]
That is, the multi-cavity wiring board of the present invention is formed by forming a plurality of substantially square wiring board regions arranged vertically and horizontally on a flat mother board made of a ceramic material, and between adjacent wiring board areas. And an insulating coat layer that continuously covers the surface of the wiring conductor layer and the mother board and the outer periphery of the wiring conductor layer, and the wiring conductor layer and the insulating coating layer are cut to form the wiring A multi-piece wiring board in which a dividing groove for partitioning a substrate region is formed, wherein the wiring conductor layer and the insulating coating layer have a thickness Tm (mm) of the wiring conductor layer at a portion cut by the dividing groove. ), When the thickness of the insulating coating layer is Tc (mm) and the coating width of the outer periphery of the wiring conductor layer by the insulating coating layer is Lo (mm), the following relationship:
0.4 ≦ Tc / Tm ≦ 2.0
And
0.1 ≦ Lo ≦ −0.4375 × (Tc / Tm) +1.275
It is characterized by satisfying.
[0010]
Further, the multi-piece wiring board of the present invention has the following relationship Lo ≦ −0.4375 × (Tc / Tm) +0.975 in the above configuration.
It is characterized by satisfying.
[0011]
According to the multi-cavity wiring board of the present invention, the insulating coating layer that continuously covers the wiring conductor layer and the surface of the mother board and the outer periphery of the wiring conductor layer is formed between adjacent wiring board regions. A thickness Tm of the wiring conductor layer in a portion cut by the dividing groove of the multi-piece wiring board in which the dividing groove for dividing the wiring board region is formed by cutting the wiring conductor layer and the insulating coating layer; By determining the relationship between the thickness Tc of the insulating coat layer and the covering width Lo of the outer peripheral portion of the wiring conductor layer by the insulating coating layer as described above, the mechanical bonding strength of the wiring conductor layer to the mother board is reduced. Since the contact resistance between the insulating coating layer and the mold can be lowered to the extent that the above-mentioned problems are not generated within the range where it does not occur, the mechanical bonding strength of the wiring conductor layer to the mother board is good, and Odor processing Occurrence of peeling of the wiring conductor layer when pulling the divided grooves formed can be suppressed, it is possible to obtain a high electrical connection reliability.
[0012]
DETAILED DESCRIPTION OF THE INVENTION
Next, the present invention will be described with reference to the accompanying drawings.
[0013]
FIG. 1A is a perspective view showing an example of an embodiment of a multi-cavity wiring board according to the present invention, wherein 1 is a mother board, 2 is a wiring conductor layer, and 3 is an insulating coating layer. Each wiring conductor layer 2 and insulating coat layer 3 are formed between the wiring board region 4 and the region 4 on the surface of the mother substrate 1. Dividing grooves 1 a are formed between the regions 4 to divide the mother board 1 into the individual wiring substrate regions 4, and the wiring conductor layer 2 and the insulating coat layer 3 are formed between the wiring substrate regions 4. The wiring conductor layer 2 and the insulating coating layer 3 are cut to form the division grooves 1a. By dividing the mother board 1 along the dividing grooves 1a, a wiring board 5 shown in a perspective view in FIG. 1B is obtained.
[0014]
The mother board 1 serves as an insulating base for mounting electronic components such as semiconductor elements, capacitive elements, and resistance elements on the divided wiring board 5, and includes a glass ceramic sintered body, an aluminum oxide sintered body, A flat substrate made of a ceramic material such as a mullite sintered body or an aluminum nitride sintered body. In the case of a glass ceramic sintered body, an organic solvent, binder, plasticizer, etc. are added to a powder of borosilicate glass / aluminum oxide to form a slurry, which is formed into a sheet by the doctor blade method or the like. A plurality of green sheets obtained as described above are laminated as necessary and fired at about 1000 ° C.
[0015]
The wiring conductor layer 2 electrically connects the electrodes of electronic components (not shown) mounted on the wiring board 5 to the wiring board 5 via a conductive connecting material such as solder or bonding wires. When the base material 1 is a ceramic material that can be fired at around 1000 ° C. such as a glass ceramic sintered body, it is made of a metal material such as copper, silver, palladium, etc., and 1500 ° C. such as an aluminum oxide sintered body. When the ceramic material fired as described above is used as the mother substrate 1, it is formed of a refractory metal material such as tungsten or molybdenum. For example, when the glass ceramic sintered body is used as the base substrate 1, the wiring conductor layer 2 is prepared by adding an organic solvent, a binder, etc. to a metal powder such as copper, silver, palladium, etc. Is formed on a green sheet to be the mother substrate 1 by printing it in a predetermined pattern by a screen printing method or the like.
[0016]
The wiring conductor layer 2 preferably has a cross-sectional shape in which the peripheral portion is thinner than the central portion when the metal paste is applied. By doing so, the step between the peripheral portion of the wiring conductor layer 2 and the mother substrate 1 can be reduced, and in the application of a ceramic paste or glass paste forming the insulating coating layer 3 described later, uneven coating and voids are generated. Can be suppressed.
[0017]
In general, the wiring conductor layer 2 is formed between the wiring board regions 4 to be the wiring board 5 for reasons of design such as circuit design or for facilitating conduction when a plating layer is deposited on the surface thereof. Therefore, it is necessary to form the wiring board regions 4 between the wiring board regions 4.
[0018]
The insulating coat layer 3 covers the peripheral portion of the wiring conductor layer 2 and the mother board 1 together to improve the mechanical bonding strength of the wiring conductor layer 2 to the mother board 1. As the material for forming such an insulating coat layer 3, an appropriate material is selected and used in accordance with the firing conditions of the ceramic material forming the mother substrate 1. For example, a glass ceramic sintered body that can be fired at around 1000 ° C. uses glass powder such as borosilicate glass as a main component, and an aluminum oxide sintered body that is fired at 1500 ° C. or higher, such as aluminum oxide. Ceramic powder is used as the main component. A glass paste or ceramic paste obtained by adding an organic solvent or a binder to these powders is printed on the mother substrate 1 from the surface of the green sheet serving as the mother substrate 1, and the surface of the metal paste serving as the wiring conductor layer 2 It is formed by printing and coating so as to continuously cover the outer periphery of the film.
[0019]
If the contact angle of the outer edge portion contacting the mother board 1 with respect to the mother board 1 is set to 60 degrees or less, the insulating coat layer 3 is caused by a temperature change when using the wiring board 5 after mounting electronic components. It is possible to alleviate the stress concentration of the thermal stress caused by the difference in thermal expansion coefficient between the electronic component and the electronic component, and to effectively prevent the insulating coat layer 3 from being peeled off from the mother substrate 1.
[0020]
The dividing groove 1a is used to divide each wiring board region 4 of the mother board 1 into individual wiring boards 5. For example, a gold in which cutting blades are arranged corresponding to the dividing grooves 1a to be formed. It is formed by pressing the mold against a green sheet to be the mother substrate 1.
[0021]
In the present invention, as shown in FIG. 2A, which is a detailed view of a portion A in FIG. 1, and in FIG. The thickness of the wiring conductor layer 2 at the part that is sometimes cut is Tm (mm), the thickness of the insulating coating layer 3 is Tc (mm), and the coating width of the outer peripheral portion of the wiring conductor layer 2 by the insulating coating layer 3 is Lo (mm). The following relationship
0.4 ≦ Tc / Tm ≦ 2.0
And
0.1 ≦ Lo ≦ −0.4375 × (Tc / Tm) +1.275
It is important to satisfy
[0022]
That is, in the diagram shown in FIG. 3 in which Tc / Tm is shown on the horizontal axis and Lo (unit: mm) is shown on the vertical axis, it is important to satisfy the range including the region 1 and the region 2.
[0023]
Here, when Tc / Tm> 2.0 or Lo> −0.4375 × (Tc / Tm) +1.275, the insulating coat layer 3 is made of gold with respect to the thickness and width of the wiring conductor layer 2 when the dividing groove 1a is formed. By increasing the cross-sectional area in contact with the mold, the contact resistance between the insulating coat layer 3 and the mold increases, and when the mold is lifted, the insulating coat layer is lifted upward. Due to the formation of cavities in the conductor layer 2, the electrical resistance of the wiring conductor layer 2 tends to increase, resulting in poor electrical characteristics. In addition, when Lo <0.1 or Tc / Tm <0.4, since the coating width or thickness of the insulating coating layer 3 sufficient to cover the peripheral portion of the wiring conductor layer 2 is not reached, the wiring conductor layer 2 and the mother board 1 tends to cause a decrease in the mechanical joint strength.
[0024]
In particular, when a glass ceramic sintered body is used as the mother substrate 1,
0.4 ≦ Tc / Tm ≦ 2.0
And
0.1 ≦ Lo ≦ −0.4375 × (Tc / Tm) +0.975
That is, it is important to satisfy the range of region 2 in FIG. This is because the insulating coating layer 3 is formed of a ceramic paste or glass paste mainly composed of glass such as borosilicate glass due to the limitation of the sintering temperature, and therefore the insulating coating layer 3 used for other high-temperature sintering materials is used. This is because the contact resistance with the mold is higher than the material.
[0025]
Further, the thickness Tm of the wiring conductor layer 2 is preferably formed in the range of 0.015 mm to 0.075 mm from the viewpoint of electrical resistance characteristics. Further, the thickness Tc of the insulating coat layer 3 satisfies 0.4 ≦ Tc / Tm in relation to the thickness Tm of the wiring conductor layer 2 from the viewpoint of reinforcing the mechanical joint strength between the wiring conductor layer 2 and the mother board 1. is important.
[0026]
Further, the wiring conductor layer 2 has a plating layer (not shown) made of a metal or an alloy thereof having good corrosion resistance such as nickel, copper, gold, palladium, solder wettability and bonding wire bonding property on the exposed surface. 1 μm to 20 μm, for example, it is preferable to deposit a nickel plating layer with a thickness of 0.5 μm to 15 μm and a gold plating layer with a thickness of 0.5 μm to 5 μm.
[0027]
Insulating coat layer 3 generally has the same color as the ceramic material constituting base substrate 1 and is colorless and substantially transparent when glass powder is the main component, but insulating coat layer 3 is reliably formed. In order to check whether or not the metal substrate has been used, a coloring agent such as a metal oxide such as chromium oxide is added in the range of 3 wt% to 7 wt%, so that the mother board 1 and the wiring conductor Visibility can also be improved by a clear color difference from the layer 2.
[0028]
Further, when the insulating coating layer 3 is viewed from above, the corner coating portions are rounded in a radius of curvature range of 0.040 mm to 0.120 mm, so that the insulating coating layer 3 is further layered on the mother substrate 1. It can be reliably and firmly attached, and the mechanical bonding strength of the wiring conductor layer 2 to the mother substrate 1 can be further improved.
[0029]
Note that the present invention is not limited to the above-described embodiments, and various modifications can be made without departing from the scope of the present invention. For example, as shown in a detailed view similar to FIG. 2A in FIG. 4, a through-hole 6 penetrating the mother board 1 or a part of the wiring conductor layer 2 defined by the dividing groove 1a is not present. It is possible to adapt even when a through hole (not shown) exists.
[0030]
【The invention's effect】
According to the multi-cavity wiring board of the present invention, the thickness of the wiring conductor layer, the thickness of the insulating coating layer, and the wiring conductor layer by the insulating coating layer at the portion cut by the dividing groove of the wiring conductor layer and the insulating coating layer. By defining the range of the coating width of the outer peripheral portion of the wire, it is possible to suppress the occurrence of peeling inside the wiring conductor layer at the time of dividing groove formation, and to ensure the mechanical bonding strength of the wiring conductor layer to the mother board, This makes it possible to obtain high electrical and mechanical joint reliability.
[Brief description of the drawings]
FIG. 1A is a perspective view showing an example of an embodiment of a multi-cavity wiring board according to the present invention, and FIG. 1B is a perspective view showing an example of a wiring board obtained by dividing a mother board. is there.
2A is a detailed view of a portion A in FIG. 1A, and FIG. 2B is a cross-sectional view of a main part in a BB ′ cross section in FIG.
FIG. 3 is a diagram showing a region where the ratio of the thickness Tc of the insulating coat layer and the thickness Tm of the wiring conductor layer and the covering width Lo of the outer periphery of the wiring conductor layer by the insulating coating layer should be satisfied in the present invention. is there.
4 is a detailed view similar to FIG. 2 (a) showing another example of the embodiment of the multi-cavity wiring board of the present invention. FIG.
[Explanation of symbols]
DESCRIPTION OF SYMBOLS 1 ... Mother board | substrate 1a ... Dividing groove 2 ... Wiring conductor layer 3 ... Insulation coat layer 4 ... Wiring board area | region 5 ... Wiring board 6 ... Through-hole

Claims (2)

セラミック材料から成る平板状の母基板に縦横に配列された多数個の略四角形状の配線基板領域を形成して成り、隣接する前記配線基板領域間に、配線導体層および前記母基板の表面と前記配線導体層の外周部とを連続的に被覆する絶縁コート層が形成されるとともに、前記配線導体層および前記絶縁コート層を切断して前記配線基板領域を区画する分割溝が形成された多数個取り配線基板であって、前記配線導体層および前記絶縁コート層は、前記分割溝で切断された部位において、配線導体層の厚みをTm(mm)、絶縁コート層の厚みをTc(mm)、絶縁コート層による配線導体層の外周部の被覆幅をLo(mm)としたとき、以下の関係を満足するものであることを特徴とする多数個取り配線基板。
0.4≦Tc/Tm≦2.0
かつ
0.1≦Lo≦−0.4375×(Tc/Tm)+1.275
A plurality of substantially rectangular wiring board regions arranged vertically and horizontally are formed on a flat mother board made of a ceramic material. Between adjacent wiring board areas, a wiring conductor layer and a surface of the mother board are formed. An insulating coat layer that continuously covers the outer peripheral portion of the wiring conductor layer is formed, and a plurality of dividing grooves that divide the wiring board region by cutting the wiring conductor layer and the insulating coating layer are formed. The wiring conductor layer and the insulating coating layer are individual wiring boards, and the wiring conductor layer and the insulating coating layer have a thickness Tm (mm) and a thickness of the insulating coating layer Tc (mm) at the portion cut by the dividing groove. A multi-cavity wiring board characterized by satisfying the following relationship when the coating width of the outer peripheral portion of the wiring conductor layer by the insulating coating layer is Lo (mm).
0.4 ≦ Tc / Tm ≦ 2.0
And
0.1 ≦ Lo ≦ −0.4375 × (Tc / Tm) +1.275
前記配線導体層の厚みTm、前記絶縁コート層の厚みTc、前記絶縁コート層による前記配線導体層の被覆幅Lo(mm)が、以下の関係を満足することを特徴とする請求項1記載の多数個取り配線基板。
Lo≦−0.4375×(Tc/Tm)+0.975
The thickness Tm of the wiring conductor layer, the thickness Tc of the insulating coating layer, and the covering width Lo (mm) of the wiring conductor layer by the insulating coating layer satisfy the following relationship. Multi-piece wiring board.
Lo ≦ −0.4375 × (Tc / Tm) +0.975
JP2001050984A 2001-02-26 2001-02-26 Multiple wiring board Expired - Fee Related JP3740374B2 (en)

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Application Number Priority Date Filing Date Title
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CN109156080B (en) * 2016-05-16 2021-10-08 株式会社村田制作所 Ceramic electronic component
CN105828518A (en) * 2016-05-18 2016-08-03 浪潮电子信息产业股份有限公司 PCB wiring method and PCB
CN106376175A (en) * 2016-08-31 2017-02-01 深圳天珑无线科技有限公司 Printed circuit board and mobile terminal
CN106455346B (en) * 2016-09-06 2020-01-14 深圳崇达多层线路板有限公司 Method for improving biting of non-electric gold PAD during lead etching

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