JP3676189B2 - Shockproof control device - Google Patents

Description

[0001]
BACKGROUND OF THE INVENTION
The present invention relates to a shock proof control device that enables data read from a disk medium to be continuously reproduced without being affected by vibration.
[0002]
[Prior art]
In a CD player that reproduces a compact disc (CD), the rotation of the disc and the control of the pickup position with respect to the disc are performed so that the data recorded on the disc can be read at a constant speed. Since these controls are performed mechanically precisely, they are easily affected by vibration, and the pickup position may be shifted by slight vibration. When such a positional shift occurs, the continuity of data read from the disk is lost, and sound skip occurs in the audio signal generated based on the data. Therefore, a CD player for a specific application that often receives vibrations requires a so-called shock proof function that allows data to be continuously extracted even if the pickup position is shifted due to vibrations.
[0003]
FIG. 7 is a block diagram showing a configuration of an audio CD player having a shock proof function.
[0004]
The CD pickup unit 1 receives the reflected light of the light irradiated on the disk 2 and extracts the intensity of the light as a change in voltage value. The pickup control unit 3 controls the pickup position of the CD pickup unit 1 with respect to the disc 2 so that the pickup unit 1 can read the data stored on the disc 2 in the correct order. The analog signal processing unit 4 reads a change in voltage value extracted by the CD pickup unit 1 and shapes the waveform to generate an EFM (Eight to Fourteen Modulation) signal. The digital signal processing unit 5 receives the EFM signal generated by the analog signal processing unit 4, performs signal processing based on a predetermined CD format such as EFM demodulation and CIRC (Cross-Interleave Reed-Solomon Code) decoding, and performs audio processing. Generate data.
[0005]
The shock proof control unit 6 receives the audio data generated by the digital signal processing unit 5, temporarily writes the audio data to the buffer RAM 7, and then continuously reads out the audio data at a constant cycle, and sends it to the next stage circuit. Supply. The audio data output from the shock proof control unit 6 is converted into an audio signal by a D / A conversion circuit and reproduced, for example. The control microcomputer 8 is constituted by a one-chip microcomputer having a built-in memory, and synchronizes the operations of the respective units according to a control program stored in the memory. At the same time, if a shift in the pickup position of the CD pickup unit 1 is detected, the shock proof control unit 6 is instructed to stop writing audio data, and the pickup control unit 3 is deviated from the pickup position. Give instructions to return to the previous position.
[0006]
The speed at which the CD pickup unit 1 reads data from the disk 2 is set to be several times the speed at which audio data is read from the buffer RAM 7. As a result, the data read from the disk 2 to the CD pickup unit 1 precedes the audio data output from the shock proof control unit by the amount of data stored in the buffer RAM 6. Therefore, when the data read from the disc 2 becomes discontinuous due to the deviation of the pickup position of the CD pickup unit 1, the CD pickup unit 1 is returned to the correct position while the reading operation of the CD pickup unit 1 is stopped. Control is performed as follows. Meanwhile, since the audio reproduction circuit continues to read the audio data from the buffer RAM 7, the audio data is output from the shock proof control unit 6 without interruption.
[0007]
[Problems to be solved by the invention]
By the way, when the CD pickup unit 1 resumes reading data from the disc 2, the shock proof control unit 6 must resume writing the next audio data so as to be continuous with the audio data for which writing has been stopped. Don't be. The timing of resuming writing of audio data is not possible only by controlling the pickup position of the CD pickup unit 1, and is determined by checking the audio data with the shock proof control unit 6. That is, the last audio data when the writing of the audio data to the buffer RAM 7 is stopped is held in the shock proof control unit 6, and if the audio data matching the contents is input again, the next audio data is stored. The writing from the data to the buffer RAM 7 is resumed. In this case, since audio data with the same content may be input many times, the audio data for a certain period is held, and by confirming the coincidence of all the audio data for that period, the timing of resuming writing can be set. I try to decide.
[0008]
However, in order to confirm the coincidence with the audio data that is input again while holding the audio data for a certain period, a circuit for determining the coincidence of each audio data is required in addition to the holding circuit for many audio data It is. Therefore, there arises a problem that the scale of a circuit for controlling writing of audio data is increased and the operation speed thereof is reduced. Further, if the amount of audio data held by the shock proof control unit 6 is reduced, an increase in circuit scale and a decrease in operation speed can be prevented, but there is a risk that an error may occur in the determination of the timing of writing the audio data. Sex is reduced.
[0009]
Therefore, an object of the present invention is to accurately control the timing of writing audio data while preventing an increase in circuit scale.
[0010]
[Means for Solving the Problems]
The present invention has been made in order to solve the above-mentioned problems. The feature of the present invention is that it has a predetermined format and temporarily stores data read from a rotationally driven disk medium in a buffer memory. Then, a shock proof control device that reads out and reproduces data from the buffer memory at a constant cycle, and receives the data and writes the data to the buffer memory; and reads out the data from the buffer memory at a constant cycle. A reproduction circuit that outputs the data stored in the buffer memory, an error correction circuit that performs a code error correction process on the data stored in the buffer memory, an output interface circuit that reads and outputs the data from the buffer memory, and the input interface write address of the data from the circuit to the buffer memory And an address management circuit for controlling reading of the stop and resumption of data from the disk medium on the basis of the fine the buffer memory to the read address of the data to the reproduction circuit, the address management circuit of the data The write address of the data from the input interface circuit to the buffer memory is determined based on subcode data generated accompanying the generation , and the output interface circuit or the reproduction circuit is switched to operate .
[0011]
According to the present invention, when the buffer memory is full, reading of data from the disk medium can be stopped, and reading of data from the disk medium can be performed when a predetermined free space is generated in the buffer memory. You can resume. Further, when resuming the reading of data, the timing of writing data into the buffer memory based on the subcode data generated with the data are determined.
[0012]
DETAILED DESCRIPTION OF THE INVENTION
FIG. 1 is a block diagram showing an embodiment of the shock proof control device of the present invention, and shows a disk reproducing device.
[0013]
The CD pickup unit 11 receives the reflected light from the disk 12 and extracts the intensity of the light as a change in voltage value. The pickup position of the CD pickup unit 11 with respect to the disk 12 is controlled by the pickup control unit 13. The disk 12 is rotationally driven at a predetermined speed by a drive circuit that receives servo control. The analog signal processing unit 14 reads a change in voltage value extracted from the CD pickup unit 11 and generates an EFM signal. As shown in FIG. 2, the EFM signal is composed of 588 bits as one frame, the 24 bits at the beginning of each frame are assigned to the synchronization signal, and then repeated 14 bits at a time with 3 bits between the connection bits. Assigned. The configuration from the CD pickup unit 11 to the analog signal processing unit 14 is the same as that of the disc reproducing apparatus shown in FIG.
[0014]
The digital signal processing unit 15 includes an EFM demodulation circuit 15a, a separation circuit 15b, a CIRC decoding circuit 15c, a PLL circuit 15d, and a subcode reading circuit 15e. The EFM demodulation circuit 15a performs EFM demodulation on the EFM signal input from the analog signal processing unit 14, thereby converting 14-bit data into 8 bits as shown in FIG. In this EFM demodulation, 1-byte (8-bit) subcode data is generated from the first data bit following the synchronization signal, and 32-byte main data is generated from the remaining data bits.
[0015]
The separation circuit 15b distributes the subcode data and main data output from the EFM demodulation circuit 15a to each other, supplies the main data to the CIRC decoding circuit 15c, and supplies the subcode data to the subcode reading circuit 15e. The sorting operation by the separation circuit 15b is controlled by a subcode synchronization signal SB-SYNC generated by the PLL circuit 15d. The CIRC decoding circuit 15c performs CIRC decoding on the 32-byte main data according to the Reed-Solomon code, and generates 12-word audio data as shown in FIG.
[0016]
The PLL circuit 15d forms a phase-locked loop with respect to the synchronization signal extracted from the EFM signal, and generates a subcode synchronization signal SB-SYNC synchronized with the frame period of the EFM signal, as shown in FIG. In the PLL circuit 15d, in addition to the subcode synchronization signal SB-SYNC, a synchronization signal used for servo control of the rotational drive of the disk 12 is also generated. Then, the subcode reading circuit 15e takes in the 8-bit subcode data distributed by the separation circuit 15b for each frame and supplies it to the shock proof control unit 16. The 8-bit subcode data is composed of P, Q, R,... W signals, and only the Q signal is used. In this subcode Q signal, 98 frames (98 bits) are handled as one unit, and for the 98 bits, as shown in FIG. 4, a synchronization signal (2 bits), a control code (4 bits), An address (4 bits), a song number (8 bits), an index (8 bits), each song time (24 bits), an absolute time (24 bits), and an error detection parity (16 bits) are assigned.
[0017]
The shock proof control unit 16 as a shock proof control device includes a DSP interface circuit 16a, a sound reproduction circuit 16b, and an address management circuit 16c. The DSP interface circuit 16 a forms an interface with the digital signal processing unit 15 and sequentially takes audio data output from the CIRC decoding circuit 15 c and writes it in the buffer RAM 17. This writing operation is synchronized with the signal processing operation of the digital signal processing unit 15 and the reading operation of the analog signal processing unit 14.
[0018]
The sound reproduction circuit 16b reads out and outputs the audio data written in the buffer RAM 17 from the DSP interface circuit 16a at a constant cycle. This read operation is synchronized with a fixed cycle clock supplied from the outside irrespective of the write operation of the DSP interface circuit 16a. It is also possible to incorporate a clock source with a constant period in the shock proof control unit 16.
[0019]
The address management circuit 16c maintains the amount of audio data stored in the buffer RAM 17 within a certain range by managing the write address of the DSP interface circuit 16a and the read address of the audio reproduction circuit 16b with respect to the buffer RAM 17. That is, when the buffer RAM 17 is full, the control microcomputer 18 is instructed to stop reading data from the disk 12, and when the audio data stored in the buffer RAM 17 becomes smaller than a predetermined amount. An instruction is provided to resume reading data.
[0020]
The address management circuit 16c receives subcode data from the subcode reading circuit 15e, and obtains time information of audio data currently written in the buffer RAM 17 from the DSP interface circuit 16a. This time information is used to detect the start timing when writing of audio data to the buffer RAM 17 temporarily stopped is resumed. For example, when the writing of the audio data to the buffer RAM 17 is stopped, the time information of the last written audio data is read from the subcode data and held, and then held when the writing of the audio data is resumed. The system is configured to start after the subcode data following the time information is input. The determination of the subcode data may be performed by the control microcomputer 18 by giving the subcode data to the control microcomputer 18 in addition to being performed by the address management circuit 16c.
[0021]
The control microcomputer 18 sets the operation timing of each unit according to a built-in processing program, and controls the processing timing of each unit to synchronize with each other. When the information read by the CD pickup unit 11 becomes discontinuous, the reading is temporarily stopped, and an instruction is given to the pickup control unit 13 to return the CD pickup unit 11 to the correct position. At the same time, the shock proof control unit 16 is instructed to stop writing audio data from the DSP interface circuit 16a to the buffer RAM 17. At this time, the time information of the audio data is read from the subcode data and held in the shock proof control unit 16 or the control microcomputer 18.
[0022]
Here, since the audio data written from the DSP interface circuit 16a to the buffer RAM 17 precedes the audio data read from the buffer RAM 17 to the sound reproduction circuit 16b , the CD pickup unit 11 is returned to the correct position. Even if the writing of the audio data is stopped, the audio reproduction circuit 16b continues to read the audio data from the buffer RAM 17. After the CD pickup unit 11 is returned to the correct position, the timing for starting the writing of the audio data is determined based on the time information held when the writing of the audio data is stopped. Therefore, the audio data can be obtained seamlessly on the output side of the shock proof control unit 16, and the timing for starting the writing of the audio data can be accurately determined by a small scale circuit.
[0023]
Incidentally, in the case of a CD-ROM system in which the disk 12 is used as a read-only memory (ROM) for a computer, the configuration from the CD pickup unit 11 to the digital signal processing unit 15 is common. Therefore, if a function of a CD-ROM decoder is added to the shock proof control unit 16, an audio system from which audio data is extracted and a CD-ROM system from which CD-ROM data are extracted can be realized by a common disk reproducing device. It becomes possible.
[0024]
FIG. 5 is a block diagram showing another embodiment of the shock proof control device of the present invention.
[0025]
The shock proof control unit 20 as a shock proof control device includes a DSP interface circuit 20a, an error correction circuit 20b, a host interface circuit 20c, an audio reproduction circuit 20d, and an address management circuit 20e. The shock proof control unit 20 is replaced with the shock proof control unit 16 of FIG. 1 and is connected to the disc reproducing apparatus.
[0026]
The DSP interface circuit 20a forms an interface with the digital signal processing unit 15, and generates a system clock for detecting the synchronization signal of the captured data and determining the operation timing of each unit. Further, when the data input from the digital signal processing unit 15 is CD-ROM data, the descrambling process is performed to restore the original state, and then the data is written into the buffer RAM 17 and input from the digital signal processing unit 15. When the data is audio data, it is written in the buffer RAM 17 as it is. The digital signal processing unit 15 generates audio data and CD-ROM data according to the type of information stored in the disk 12 at the CIRC decoding stage.
[0027]
That is, in CIRC decoding, as shown in FIG. 2, audio data of 12 words for one sector or CD-ROM data of 24 bytes is generated from main data in which one sector is 32 bytes. In the case of CD-ROM data (mode 1), as shown in FIG. 6, a total of 2352 bytes of 24 bytes × 98 frames are handled as one block, and a synchronization signal (12 bytes), header (4 bytes) , User data (2048 bytes), error detection code EDC (4 bytes) and error correction code ECC (276 bytes) are respectively allocated. Further, the CD-ROM data is scrambled to 2340 bytes of the data of one block excluding the synchronization signal 12 bytes, and is descrambled at the time of reproduction to be returned to the original state.
[0028]
The error correction circuit 20b takes in the CD-ROM data written in the buffer RAM 17 from the DSP interface circuit 20a for each block (98 frames), performs correction processing based on the error detection code EDC and the error correction code ECC, and performs the buffer RAM 17 Of the data stored in the data, the erroneous data is rewritten with correct data. The error correction circuit 20b stops operating when audio data is input from the digital signal processing unit 15.
[0029]
The host interface circuit 20 c reads out the CD-ROM data that has been subjected to the error correction processing by the error correction circuit 20 b from the buffer RAM 17 and outputs it to the host computer, and takes in various commands from the host computer and supplies them to the control microcomputer 18. The audio reproduction circuit 20d continuously reads out audio data from the buffer RAM 17 at a constant period, and outputs the audio data to the reproduction apparatus including the D / A converter.
[0030]
The address management circuit 20e manages the write address of the DSP interface circuit 20a with respect to the buffer RAM 17 and the read address of the audio reproduction circuit 20d , and maintains the data amount stored in the buffer RAM 17 within a certain range. The voice reproduction circuit 20d and the address management circuit 20e are the same as the voice reproduction circuit 16b and the address management circuit 16c of the shock proof control unit 16 in FIG.
[0031]
Here, the control microcomputer 18 determines whether the control code attached to the subcode data read by the digital signal processing unit 15 is a shock proof control unit 20 depending on whether CD-ROM data is handled or audio data is handled. Cause different processes to be executed. That is, when CD-ROM data is input from the digital signal processing unit 15, the DSP interface circuit 20a, error correction circuit 20b, and host interface circuit 20c are operated, and the input CD-ROM data is sequentially input to the buffer RAM 17. In addition to writing, the CD-ROM data is subjected to code error correction processing and then output to the host computer. At this time, the control microcomputer 18 responds to an instruction from the host computer side taken into the host interface circuit 20c, and picks up the control unit 13 so as to selectively take out the CD-ROM data stored at the target position of the disk 12. Give instructions to.
[0032]
As a result, the desired CD-ROM data is read from the disk 12, subjected to a second code error correction process by the CD-ROM decoder 16, and transferred to the host computer. On the other hand, when audio data is input from the digital signal processing unit 15 to the shock proof control unit 20, the DSP interface circuit 20a and the reproduction circuit 20d are operated, and the audio data are sequentially written into the buffer RAM 17 and the audio data is buffered. It is read out from the RAM 17 at a constant cycle and output.
[0033]
In such a shock proof control unit 20, since the code error correction process and the shock proof control are not performed simultaneously, the buffer RAM 17 can be shared for the code error correction process and the shock proof control. .
[0034]
【The invention's effect】
According to the present invention, it is possible to control the writing of audio data to the buffer RAM based on the subcode data extracted in synchronization with the audio data. At this time, the shock proof control unit or the control microcomputer only needs to be able to hold several bits of subcode data as time information. Therefore, it is possible to reduce the scale of a circuit necessary for controlling the timing of writing audio data. it can. Further, since the timing of writing the audio data to the buffer RAM is controlled based on the time information obtained from the subcode data, high-speed and accurate operation is possible. Therefore, it is possible to improve the reliability while reducing the cost of the apparatus.
[Brief description of the drawings]
FIG. 1 is a block diagram showing an embodiment of a shock proof control device of the present invention.
FIG. 2 is a diagram illustrating a state of data read from a disk.
FIG. 3 is a timing diagram of a subcode synchronization signal.
FIG. 4 is a diagram illustrating a format of subcode data.
FIG. 5 is a block diagram showing another embodiment of the shock proof control device of the present invention.
FIG. 6 is a diagram showing a format of CD-ROM data.
FIG. 7 is a block diagram showing a configuration of a conventional disk reproducing apparatus.
[Explanation of symbols]
1, 11 CD pickup unit 2, 12 Disc 3, 13 Pickup control unit 4, 14 Analog signal processing unit 5, 15 Digital signal processing unit 6, 16 Shockproof control unit 7, 17 Buffer RAM
8, 18 Control microcomputer 15a EFM demodulation circuit 15b Separation circuit 15c CIRC decoding circuit 15d PLL circuit 15e Subcode reading circuit 16a, 20a DSP interface circuit 16b, 20d Audio reproduction circuit 16c, 20e Address management circuit 20b Error correction circuit 20c Host interface circuit

Claims (2)

Has a predetermined format, after storing the data read from the disk medium which is rotated once in the buffer memory, a shock-proof controller for reading out and reproducing at a constant period from the buffer memory, the data The input interface circuit for receiving and writing to the buffer memory, a reproduction circuit for reading the data from the buffer memory and outputting the data at a constant period, and correcting the code error for the data stored in the buffer memory. an error correction circuit which performs, and an output interface circuit for outputting from said buffer memory reads the data from the input interface circuit from the write address and the buffer memory of the data into the buffer memory of the data to the reproducing circuit Based on read address And an address management circuit for controlling reading of the stop and resumption of data from the disk medium Te,
The address management circuit determines a write address of the data from the input interface circuit to the buffer memory based on subcode data generated accompanying the generation of the data ;
A shock proof control device, wherein the output interface circuit or the regeneration circuit is switched and operated . 2. The shock proof control device according to claim 1 , wherein the operation of the output interface circuit and the reproduction circuit is selected in accordance with the format determination of the data.

Images