JP3546427B2 - Clock with calendar using binary counter - Google Patents

Description

[0001]
TECHNICAL FIELD OF THE INVENTION
The present invention relates to a clock with a calendar combining a simple binary counter and software.
[0002]
[Prior art]
As described in Japanese Patent Publication No. 58-3231, for example, a clock with a normal calendar is provided by a combination of counters that exclusively count seconds, minutes, hours, days, days of the week, months, and years using a dedicated IC. Be composed. In this case, since the day, month, and year are leap years, a considerably complicated correction circuit is required.
[0003]
JP-A-63-268058 discloses a one-chip microcomputer provided with a clock function circuit block to which backup power is supplied, and writes data indicating the date and time when the main power is cut off to a storage unit. There is described a clock function circuit incorporating a perpetual calendar function that reads out the power-off date and time data stored in the storage unit when the power supply is turned on, and calculates the current date and time by the arithmetic processing unit of the microcomputer. I have.
[0004]
[Problems to be solved by the invention]
According to the clock function circuit described in the above-mentioned Japanese Patent Application Laid-Open No. 63-268058, it is necessary to configure a clock with a calendar by a combination of counters for exclusively counting seconds, minutes, hours, days, days of the week, months, and years. However, the configuration can be simplified, but it is necessary to use a high-precision oscillator as a clock source input to the counter.
[0005]
That is, when configuring a timepiece, the accuracy of the source oscillation of the clock becomes a problem. For example, if an attempt is made to make a clock with a one-month error of less than one second, the accuracy of the source oscillation must be suppressed to within 0.3 ppm, and an expensive source oscillation is required.
[0006]
An object of the present invention is to eliminate the need for using a high-precision clock as the precision of the clock oscillation, and to use only a simple binary counter as hardware to count seconds, minutes, hours, days, days of the week, months, and years. An object of the present invention is to configure a clock with a calendar with high display accuracy.
[0007]
[Means for Solving the Problems]
The present invention provides a clock source, a binary counter for counting clocks from the clock source, a CPU, a ROM for storing a program executed by the CPU, a RAM for temporarily storing information, and a host device. A communication card for performing communication between the communication card and the binary counter, the ROM, the RAM, and a bus connecting the communication card and the CPU; Means for storing, in the RAM, the calibration time inputted by the user and the reference count value read from the binary counter at the time when the calibration time is inputted, when outputting the time information, The elapsed time from the calibration time is calculated by comparing the read count value of the binary counter with the reference count value, and the calendar based on the elapsed time is calculated. By executing the calculation program, second, minute, hour, day, week, characterized in that it comprises a means for outputting the time information to calculate the month and year.
[0008]
When the calendar clock of the present invention first starts operating, the binary counter indicates a certain value. When the current year, month, day of the week, day, hour, minute, and second (this calibration time is Y1) are input to the CPU from the host device via the communication card for clock calibration, the CPU Is read, and the calibration time Y1 and the count value T1 are stored in the RAM.
[0009]
Thereafter, the CPU calculates Yp = Y1 + (Tp-T1) from the current time (Yp) from the current binary counter value (Tp) and the calibration time Y1 and the count value T1 that can be stored in the RAM. Can be obtained.
[0010]
Then, when the read-out display time (this time is set to Y1a), the CPU reads the value (T1a) of the binary counter at that time, and can know the elapsed time (in seconds) from Y1 by the above calculation. By executing the calendar calculation program, the minute, hour, day, day of the week, month, and year are calculated to obtain and output Y1a.
[0011]
Further, the present invention reads the value T2 of the binary counter at the time of the second calibration time Y2, and if there is a difference between the value of Y2-Y1 and the value of T2-T1, this difference is read by the binary counter. It is characterized in that the error is corrected by reading out using the error information at the time of the subsequent time display.
[0012]
Particularly, in the communication system, the time can be calibrated periodically from the host device, so that the above error can be obtained every time calibration, and the clock is always corrected to the correct time even if the accuracy of the clock source vibration is poor. Can do things.
[0013]
The timepiece with calendar according to the present invention reads the time infrequently, and is effective for a device or the like in which the power of the circuit is always on. For example, when this device is a communication device, it is necessary to report a communication record to a higher-level device. In this case, the CPU needs to know the time at that time every time communication is performed. The communication contents and the time at that time are stored, and the communication is recorded at the upper station by reporting to the upper station later. be able to.
[0014]
When the frequency of reading the time is low in this manner, this complicated correction processing may be performed by software every time communication is performed, and by providing the CPU software with a calculation method such as a leap year, The hardware can be configured only with a simple binary counter without using complicated counters for minutes, hours, days, days of the week, months, and years, and an economical circuit configuration can be achieved.
[0015]
If the binary counter has 32 bits, and the clock unit is 1 second, it is possible to count 136 years, which indicates that the hardware can be simplified.
[0016]
As described above, according to the present invention, the minute, hour, day, day of the week, month, and year complex correction processes are performed by software, and the counter need only include a simple binary counter. Even if the accuracy is low, the accuracy can be maintained by the correction, so that the hardware cost can be kept low.
[0017]
BEST MODE FOR CARRYING OUT THE INVENTION
FIG. 1 is a block diagram showing a first embodiment of the present invention. In FIG. 1, a CPU 1 is connected via a CPU bus 7 to a ROM 3 for storing programs, a RAM 2 for temporarily storing information, and a simple binary counter 4 for counting time.
[0018]
The binary counter 4 receives a clock 8 in units of one second. Further, the CPU 1 can receive the time calibration signal transmitted from the host device 6 via the communication line 12 via the communication card 5. Further, the CPU 1 can report the time from the communication card 5 to the host device 6 via the communication line 12.
[0019]
Next, the operation of the present embodiment will be described with reference to FIG.
[0020]
When the circuit of FIG. 1 is turned on, the CPU 1 and the binary counter 4 are reset, the CPU 1 is initialized, and the binary counter 4 is cleared. A time setting signal is input from the host device 6 through the communication line 12. The value at this time indicates the current time (calibration time Y1).
[0021]
Upon receiving the calibration time Y1, the CPU 1 reads the value of the binary counter 4 immediately. The value of the binary counter 4 at this time is defined as T1. Then, the CPU 1 stores the calibration time Y1 and the count value T1 in the RAM 2.
[0022]
Next, when the time is reported to the host device 6 (the time at this time is Y1a), the count value of the binary counter 4 is read. The value of the binary counter 4 at this time is defined as T1a. The CPU 1 obtains T1a−T1 = a from the read count value T1a and the count value T1 stored in the RAM 2, adds a (second) to the stored calibration time Y1, and, based on the addition result, The minute, hour, day, day of the week, month, and year are calculated by the calendar calculation program, and the time (Y1a) is reported.
[0023]
The calendar calculation program or software uses 60 seconds for 1 minute, 60 minutes for 1 hour, 24 hours for 1 day, 7 days for 1 week, 30 days (for small months 4, 6, 9, November, February, leap year But 29 days, otherwise 28 days) or 31 days (Large months 1,3,5,6,7,8,10,12) for 1 month, 12 months for 1 year, 4 for leap year, A year that is divisible by 100 is not a leap year. However, a year that is divisible by 400 is a leap year, and the CPU 1 obtains minutes, hours, days, days of the week, months, and years using this software.
[0024]
Thereafter, when the CPU 1 receives the second time correction (calibration time Y2) from the host device 6, the CPU 1 immediately reads the value of the binary counter 4. The value of the binary counter 4 at this time is defined as T2.
[0025]
The CPU 1 obtains c = Y2-Y1 and b = T2-T1 from the calibration time Y2 received this time and the read count value T2, and the previous calibration time Y1 and count value T1 stored in the RAM2. A difference z (z = c−b) between c and b is obtained.
[0026]
Since the calibration times Y1 and Y2 are accurate times, if z is not 0, the binary counter 4 has an error of z seconds per b seconds. The CPU 1 uses this difference z as an error correction value per b seconds of the binary counter 4 in subsequent time calculations.
[0027]
It should be noted that since the second time correction is performed, the future time calculation is based on Y2 and T2, so that Y1 and T1 stored as the calibration time and the count value are updated to Y2 and T2.
[0028]
Further, when reporting the time thereafter, the time is obtained in the same manner as described above, but by performing the above-described error correction each time, a highly accurate time can be displayed.
[0029]
For example, the first calibration time Y1 is 13:00 on February 1, 2000, and the count value T1 of the binary counter 4 at that time is 10000, and the second calibration time Y2 is 13:00 on February 2, 2000. If the count value T2 of the binary counter 4 at that time is 96412, c = 24 hours (86400 seconds), b = 86412 seconds, and z = 12 seconds. That is, since the error of the clock 8 is advanced by 12 seconds to 24 hours, the CPU 1 reports a time delayed by 0.5 seconds per hour thereafter when reporting the time.
[0030]
FIG. 2 is a block diagram showing a second embodiment of the present invention. This embodiment is characterized in that a VCO (voltage controlled oscillator) 9 is used as a clock source.
[0031]
That is, in the present embodiment, the CPU 1 sets the error z obtained when the second calibration time is received in the register 11, and converts the value of the register 11 into an analog voltage by the D / A converter 10. The converted data is used for the frequency correction of the VCO 9.
[0032]
According to the present embodiment, the oscillation frequency of the clock oscillator of the source oscillation is calibrated by the VCO 9 to which the error voltage is input, and the accuracy of the clock frequency of the oscillation source can be improved. It is not necessary to make correction every time report.
[0033]
In the embodiment, the clock input to the binary counter is described in units of seconds. However, if the number of digits of the binary counter is increased and the unit of the clock is reduced, for example, if the clock is set to 10 mS, the clock has a resolution of 10 mS. be able to.
[0034]
【The invention's effect】
According to the present invention, it is not necessary to use a high-precision clock as the accuracy of the clock source oscillation, and the second, minute, hour, day, day of the week, month, and year are calculated using only a simple binary counter as hardware. A calendar-equipped watch with high display accuracy can be realized at low cost.
[Brief description of the drawings]
FIG. 1 is a block diagram showing a first embodiment of the present invention.
FIG. 2 is a block diagram showing a second embodiment of the present invention.
[Explanation of symbols]
1 CPU
2 RAM
3 ROM
4 Binary counter 5 Communication card 6 Host device 7 Bus 8 Clock 9 VCO (voltage controlled oscillator)
10 D / A converter 11 Register 12 Communication line

Claims (3)

A clock source, a binary counter for counting clocks from the clock source, a CPU, a ROM for storing a program executed by the CPU, a RAM for temporarily storing information, and communication between the host device A communication card for performing the above, a binary counter, ROM, RAM, and a bus connecting the communication card and the CPU,
Means for storing, in the RAM, a calibration time input from the host device via the communication card and a reference count value read from the binary counter at the time when the calibration time is input; When outputting information, the elapsed time from the calibration time is calculated by comparing the count value of the binary counter read at the time information output time point with the reference count value, and based on the elapsed time. Means for calculating seconds, minutes, hours, days, days of the week, months and years by executing a calendar calculation program, and outputting the same as time information; and when a second or subsequent calibration time is input from the higher-level device. Read the value of the binary counter at the time when the calibration time was input, and read the previous calibration time and the count value of the binary counter stored in the RAM and the current time. The difference between the calibration time and the count value of the binary counter is obtained. If the difference between the two does not match, the difference is detected as an error in the accuracy of the binary counter. Means for correcting the time information to be output using the calendar. A clock with a calendar using a binary counter. The CPU reads the value of the binary counter at the time when the calibration time is input when the second or subsequent calibration time is input from the higher-level device, and reads the previous calibration time stored in the RAM. 2. The clock with a calendar according to claim 1, further comprising means for updating the time and the count value of the binary counter with the current calibration time and the count value of the binary counter . A clock source constituted by a voltage controlled oscillator, a binary counter for counting clocks from the clock source, a CPU, a ROM for storing a program executed by the CPU, a RAM for temporarily storing information, A communication card for performing communication with a host device, a register, a D / A converter for converting data stored in the register into an analog voltage and outputting the analog voltage as a control voltage to the voltage controlled oscillator; A bus connecting the binary counter, the ROM, the RAM, a communication card, and a register to the CPU;
The CPU stores, in the RAM, a calibration time input from the higher-level device via the communication card, and a reference count value read from the binary counter at the time when the calibration time is input. When outputting information, the elapsed time from the calibration time is calculated by comparing the count value of the binary counter read at the time information output time point with the reference count value, and based on the elapsed time. Means for calculating seconds, minutes, hours, days, days of the week, months, and years by executing a calendar calculation program, and the calibration time and reference count value stored in the RAM from the host device to the calibration time. Means for updating every time a calibration time is input from the host device, and reading the value of the binary counter at that time each time a calibration time is input from the higher-level device, and A calibration time difference between the calibration times stored in the RAM and a count difference between the value of the binary counter at the input time and the reference count value stored in the RAM are obtained. A clock with a calendar using a binary counter, comprising means for detecting an error between the count and the count difference and outputting the error to the register .

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