JP3543806B2 - Television receiver - Google Patents

Description

[0001]
[Industrial applications]
The present invention relates to a television receiver, and more particularly to a technique for displaying a reduced image called a small screen on a screen.
[0002]
[Prior art]
2. Description of the Related Art Conventionally, a reduced image called a child screen or the like is displayed on a screen of a television receiver. As a display mode of such a reduced image, for example, as shown in FIG. 13, three child screens S1, S2, S3 are displayed so as to be superimposed on a part of a main screen M using the entire screen. Alternatively, as shown in FIG. 14, a plurality of child screens S11 to S19 are displayed side by side. By performing such display, images of a plurality of channels can be checked at the same time.
[0003]
Then, in a state where such a display is being performed, if an image displayed as any of the sub-screens is to be displayed as a parent screen, a remote control device attached to the television receiver is operated, and the like. By instructing replacement of the parent screen and the child screen or instructing that only the designated child screen be displayed as the parent screen, the display is switched to the corresponding display.
[0004]
[Problems to be solved by the invention]
By the way, when displaying a reduced image (hereinafter referred to as a reduced image) like a small screen, there is a disadvantage that the resolution of the reduced image is lower than that of an image displayed without being reduced. That is, for example, when displaying an image reduced to （(the reduction ratio here is a reduction ratio of the vertical and horizontal lengths of the image: the same applies hereinafter), the scanning used for displaying the reduced image is performed. There has been a problem that the number of lines is １ ／ compared to an image of a normal size and the vertical resolution is １ ／. When the vertical resolution is reduced in this manner, the image becomes very difficult to see, and it is particularly difficult to distinguish characters and the like displayed by superimposing in the image.
[0005]
An object of the present invention is to provide a television receiver that does not reduce the resolution of an image displayed in a reduced size.
[0006]
[Means for Solving the Problems]
The present inventionA television receiver capable of simultaneously reducing two video signals selected from a plurality of video signals to a main image and a sub-image as 1 / n (where 1 <n) on a display surface of a cathode ray tube. A frame memory that stores two video data obtained by converting two video signals into digital data, and two video data obtained by converting two video signals into digital data, are not subjected to vertical thinning processing, and are not subjected to vertical line reduction processing. Of the image data is compressed to 1 / n, and is continuously written into the frame memory as one composite video data at one field cycle, and the frame is used as video data for displaying the composite video data on the display surface. A frame memory controller that reads data continuously from the memory in one-field cycle, and a vertical controller that displays video data on the display surface of the cathode ray tube Characterized by comprising a vertical deflection means for countercurrent corner deflection angle of 1 / n of the normal, and control means for controlling the frame memory controller and vertical deflection meansThings.
[0007]
Also in this case,The selected two video signals are video signals of different broadcasting systems having different aspect ratios.
[0009]
[Action]
According to the present invention, by compressing the vertical deflection angle in proportion to the reduction ratio of the image displayed on the cathode ray tube, the number of horizontal lines of the displayed image does not change and the vertical resolution does not decrease.
[0010]
in this case,pluralBy storing the video signal in the memory and simultaneously displaying each image in a reduced size, a plurality of images are displayed at a high resolution.
[0012]
【Example】
Hereinafter, an embodiment of the present invention will be described with reference to FIGS.
[0013]
FIG. 1 is a diagram showing a configuration of a television receiver of the present embodiment. In FIG. 1, reference numeral 1 denotes an entire television receiver, and a plurality of antennas 2 and 3 are connected to the television receiver 1. The signals received by the antennas 2 and 3 are supplied to tuners 4 and 5, and the tuners 4 and 5 demodulate broadcast waves in a frequency band of a predetermined channel to generate a predetermined video signal. The receiving channels of the tuners 4 and 5 are controlled by a central control unit (CPU) 6 which controls various operations of the television receiver. The central control unit 6 is constituted by a microcomputer, and controls a receiving channel, various operation modes, and the like based on operation of operation keys 7 attached to the television receiver. Alternatively, it may be controlled by transmitting a remote control signal from a remote control device (not shown).
[0014]
Then, the video signals output from the tuners 4 and 5 are supplied to the switch circuit 8. Also, a plurality of external video signal input terminals 9a, 9b, 9c are attached to the television receiver 1, and video signal sources such as a VTR and a video disk playback device are connected to the respective input terminals 9a, 9b, 9c. You. Then, the video signals supplied from these video signal sources to the respective input terminals 9a, 9b, 9c are supplied to the switch circuit 8. Then, the switch circuit 8 selects one of the video signals based on the control of the central control device 6 and supplies the selected video signal to the image reception processing circuit 10. Then, the video signal (RGB signal) subjected to the image receiving process based on the control of the central control device 6 by the image receiving processing circuit 10 is supplied to the cathode ray tube 11 and the cathode ray tube 11 displays an image.
[0015]
In the present embodiment, the same image signal as the image signal supplied to the cathode ray tube 11 after the image receiving processing circuit 10 performs the image receiving process is output from the output terminal 10a. However, while the video signal supplied to the cathode ray tube 11 is an RGB signal, the video signal output from the output terminal 10a is a composite video signal or a luminance / chroma separation video signal. Therefore, in the image receiving processing circuit 10, a processing circuit for creating a composite video signal (or a luminance / chroma separated video signal) to be supplied to the output terminal 10a from a video signal such as an RGB signal is required.
[0016]
Further, the image processing circuit 10 extracts a horizontal synchronization signal and a vertical synchronization signal from the video signal, and supplies the horizontal synchronization signal and the vertical synchronization signal to the horizontal deflection circuit 12 and the vertical deflection circuit 13. Then, the horizontal deflection circuit 12 drives the horizontal deflection coil 14H attached to the cathode ray tube 11, and the vertical deflection circuit 13 drives the vertical deflection coil 14V attached to the cathode ray tube 11.
[0017]
In this example, a plurality of images are reduced and displayed on the cathode ray tube 11 simultaneously. The configuration for this will be described. Based on the control of the central controller 6, two systems are selected from the video signals (the outputs of the tuners 4 and 5 and the outputs of the terminals 9a, 9b and 9c) supplied to the switch circuit 8. The video signal is selected, and the selected video signal is supplied to the decoders 21a and 21b. In each of the decoders 21a and 21b, the supplied video signal is demodulated into a luminance signal and a chroma signal, and the demodulated luminance signal and the chroma signal are supplied to respective analog / digital converters 22a and 22b to be converted into digital data. The converted digital data is supplied to the memory controller 23. The synchronization signal extracted from the video signal supplied to each of the decoders 21a and 21b is supplied to the memory controller 23.
[0018]
The memory controller 23 is connected to a frame memory 24 for storing a video signal converted into digital data. Under the control of the memory controller 23 based on a command from the central controller 6, the analog / digital converters 22a and 22b The supplied two sets of video data are stored. In this case, when writing to the memory 24, it is assumed that the video data of each system is thinned out according to the reduction ratio of the display image and the data amount is compressed. The writing of the video data into the memory 24 is performed continuously in one field cycle.
[0019]
Further, in this example, when writing the data of the reduced image from the memory controller 23 to the memory 24, it is possible to simultaneously write data such as adding a frame with a certain color to each reduced image if necessary. is there. Further, in the case of a display mode in which a parent screen and a child screen described later are displayed in a state where they do not overlap, if a part of the display screen that is neither the parent screen nor the child screen occurs, a color of some background color is also applied to this part. Data to be written to the memory. The data of these frames and the data of the background are generated and written in the memory controller 23 based on a command from the central control device 6.
[0020]
Then, the video data stored in the memory 24 is continuously read out in one field cycle and supplied to the digital / analog converter 25 to be converted into analog luminance signals and chroma signals. Then, the read luminance signal and chroma signal are supplied to an image reception processing circuit 10, where the signals are subjected to image reception processing to be converted into RGB signals. The RGB signals are supplied to a cathode ray tube 11, and an image is displayed on the cathode ray tube 11. Let it.
[0021]
With this configuration, various display modes of the reduced image based on the processing state when the memory controller 23 writes the video data into the memory 24 by transmitting the command from the central control device 6 to the memory controller 23 Becomes possible. Hereinafter, the display modes prepared by the television receiver of this example will be described in order. First, the display shown in FIG. 2 can be performed.
[0022]
In FIG. 2, reference numeral 100 denotes an entire screen displayed by the cathode ray tube 11. A main screen 101 is displayed largely on the right side of the screen 100, and three child screens 102, 103, 104 are vertically arranged on the left side. Display. Then, frames 112, 113, and 114 are individually added to the three child screens 102, 103, and 104, respectively. Then, the colors of the frames 112, 113, and 114 are changed based on the control of the central controller 6 according to the selection state of the respective sub-screens 102, 103, and 104. For example, when replacing a child screen with a parent screen using a remote control device or the like, when instructing which child screen is to be replaced, the color of the frame of the specified child screen is changed from that of another child screen.
[0023]
The relationship between the input video data and each screen is as follows. As an image to be displayed on the main screen 101, the video signal of the channel received by the tuner 4 is transmitted to the memory controller 23 through processing by the decoder 21a and the analog / digital converter 22a. Assume that the image is based on the supplied signal. At this time, the receiving channel in the tuner 4 is fixed and written in each field to display the main screen 101 as a complete moving image. Then, as an image to be displayed on each of the small screens 102, 103, and 104, the video signal of the channel received by the tuner 5 is processed by the decoder 21b and the analog / digital converter 22b, and the image is supplied to the memory controller 23 by the signal. I do. In this case, the channel of the tuner 5 is changed at a predetermined period (for example, every several seconds), and the image of the individual channel is displayed on each of the child screens 102, 103, and 104. Therefore, the image displayed on each of the child screens 102, 103, and 104 is a pseudo moving image whose content changes every few seconds.
[0024]
Next, the display mode shown in FIG. 3 will be described. In FIG. 3, reference numeral 200 denotes the entire screen displayed by the cathode ray tube 11, and this screen 200 is divided into four equal parts, each having the same size as the parent screen 201. The child screens 202, 203, and 204 are displayed. Also at this time, a frame is added to each screen (including the parent screen here), and the display color of the frame is changed according to the selection state or the like. Also, the color of the frame is changed between the parent screen and each child screen. Then, as an image to be displayed on the main screen 201, a video signal of the channel received by the tuner 4 is converted into a complete moving image by a signal supplied to the memory controller 23 by processing by the decoder 21a and the analog / digital converter 22a. I do. In addition, as an image to be displayed on each of the small screens 202, 203, and 204, a video signal of a channel received by the tuner 5 is an image based on a signal supplied to the memory controller 23 through processing by the decoder 21b and the analog / digital converter 22b. The image displayed on each of the child screens 202, 203, and 204 by periodically changing the receiving channel of the tuner 5 is a pseudo moving image whose content changes every few seconds.
[0025]
Next, the display mode shown in FIG. 4 will be described. In FIG. 4, reference numeral 300 denotes the entire screen displayed by the cathode ray tube 11, and this screen 300 is divided into nine equal parts, each having the same size as the parent screen 301. The child screens 302, 303 ‥‥ 309 are displayed. In this case, the center is the main screen 301. Also at this time, a frame is added to each screen (including the parent screen here), and the display color of the frame is changed according to the selection state or the like. Also, the color of the frame is changed between the parent screen and each child screen. Then, as an image to be displayed on the main screen 301, a video signal of the channel received by the tuner 4 is converted into a complete moving image by a signal supplied to the memory controller 23 by processing by the decoder 21a and the analog / digital converter 22a. I do. In addition, as an image to be displayed on each of the child screens 302 to 309, a video signal of a channel received by the tuner 5 is an image based on a signal supplied to the memory controller 23 by processing by the decoder 21b and the analog / digital converter 22b. The image displayed on each of the child screens 302 to 309 by periodically changing the reception channel No. 5 is a pseudo moving image whose content changes every few seconds.
[0026]
Next, the display mode shown in FIG. 5 will be described. In FIG. 5, reference numeral 400 denotes the entire screen displayed by the cathode ray tube 11, and a relatively large parent screen 401 is displayed at the lower left of the screen 400. Display nine child screens 402, 403 ‥‥ 410. Also at this time, a frame is added to each child screen, and the display color of the frame is changed depending on the selection state or the like. Then, as an image to be displayed on the main screen 401, a video signal of the channel received by the tuner 4 is converted into a complete moving image by a signal supplied to the memory controller 23 through processing by the decoder 21a and the analog / digital converter 22a. I do. In addition, as an image to be displayed on each of the sub-screens 402 to 410, a video signal of a channel received by the tuner 5 is an image based on a signal supplied to the memory controller 23 through processing by the decoder 21b and the analog / digital converter 22b. The image displayed on each of the sub-screens 402 to 410 by periodically changing the reception channel No. 5 is a pseudo moving image whose content changes every few seconds.
[0027]
Next, the display mode shown in FIG. 6 will be described. In FIG. 6, reference numeral 500 denotes the entire screen displayed by the cathode ray tube 11, and a parent screen 501 is displayed on the entire surface of the screen 500; Are displayed, four sub-screens 502, 503, 504, and 505 are displayed. Also at this time, a frame is added to each child screen, and the display color of the frame is changed depending on the selection state or the like. Then, as an image to be displayed on the main screen 501, a video signal of the channel received by the tuner 4 is converted into a complete moving image by a signal supplied to the memory controller 23 by processing by the decoder 21a and the analog / digital converter 22a. I do. As an image to be displayed on each of the child screens 502 to 505, a video signal of a channel received by the tuner 5 is converted into an image based on a signal supplied to the memory controller 23 through processing by the decoder 21b and the analog / digital converter 22b. The image displayed on each of the child screens 502 to 505 by periodically changing the reception channels of No. 5 is a pseudo moving image whose content changes every few seconds.
[0028]
Next, the display mode shown in FIG. 7 will be described. In FIG. 7, reference numeral 600 denotes the entire screen displayed by the cathode ray tube 11, and a parent screen 601 is displayed on the entire surface of the screen 600. Are displayed, and nine child screens 602, 603 # 610 are displayed. Also at this time, a frame is added to each child screen, and the display color of the frame is changed depending on the selection state or the like. Then, as an image to be displayed on the main screen 601, a video signal of the channel received by the tuner 4 is converted into a complete moving image by a signal supplied to the memory controller 23 through processing by the decoder 21 a and the analog / digital converter 22 a. I do. As an image to be displayed on each of the child screens 602 to 610, a video signal of a channel received by the tuner 5 is converted into an image based on a signal supplied to the memory controller 23 through processing by the decoder 21b and the analog / digital converter 22b. The image displayed on each of the child screens 602 to 610 by periodically changing the number of reception channels 5 is a pseudo moving image whose content changes every few seconds.
[0029]
In the examples up to this point, an image having an aspect ratio of 4: 3 is displayed on both the parent screen and the child screen. However, as shown below, an image of an ordinary broadcast system having an aspect ratio of 4: 3, a high-definition broadcast, etc. And an image of a broadcast system having an aspect ratio of 16: 9 can be displayed in a mixed manner.
[0030]
First, the display mode shown in FIG. 8 will be described as an example in which images having different aspect ratios are mixed. In FIG. 8, reference numeral 700 denotes the entire screen displayed by the cathode ray tube 11, and a parent screen is displayed on the left side of the screen 700. A screen 701 is displayed, and a child screen 702 is displayed on the right side. Then, as an image to be displayed on the main screen 701, a video signal of the channel received by the tuner 4 is converted into a complete moving image by a signal supplied to the memory controller 23 by processing by the decoder 21a and the analog / digital converter 22a. I do. Further, as an image to be displayed on the child screen 702, a video signal of a channel received by the tuner 5 is converted into a complete moving image by a signal supplied to the memory controller 23 by processing by the decoder 21b and the analog / digital converter 22b. I do. In this case, the channel to be received by the tuner 5 is a channel of a broadcasting system (such as high-definition broadcasting) capable of obtaining an image having an image aspect ratio of 16: 9 (accordingly, in this case, a channel compatible with the tuner 5 is used). A), an image having an aspect ratio of 16: 9 is displayed as the child screen 702. Also, an image having a normal aspect ratio (that is, an aspect ratio of 4: 3) is displayed as the main screen 701.
[0031]
Next, the display mode shown in FIG. 9 will be described. In FIG. 9, reference numeral 800 denotes the entire screen displayed by the cathode ray tube 11 (here, the aspect ratio of the screen 800 is 16: 9). A parent screen 801 having an aspect ratio of 16: 9 is displayed on the left side of the screen, and a plurality of child screens 802, 803 ‥‥ 810 having an aspect ratio of 4: 3 are displayed on the right side. Then, an image as a complete moving image in which the receiving channel of the tuner is fixed is displayed on the main screen 801. Further, as an image to be displayed on each of the child screens 802 to 810, an image as a pseudo moving image in which the receiving channel of the tuner is sequentially changed is displayed. Then, a frame in which a color is individually set is added to each of the child screens 802 to 810.
[0032]
In the above description, a case has been described in which two systems (that is, two decoders 21a and 21b and two analog / digital converters 22a and 22b) supply video data to the memory controller 23. If there are more than one system, three sets of moving images can be displayed at the same time, or two sets of moving images and a plurality of pseudo moving images can be displayed simultaneously. Next, an example of this case will be described with reference to FIG. 10. In FIG. 10, reference numeral 900 denotes the entire screen displayed by the cathode ray tube 11, and a parent screen 901 having an aspect ratio of 4: 3 is displayed at the upper left of the screen 900. At the same time, a child screen 902 having an aspect ratio of 4: 3 is displayed on the upper right, and four child screens 903, 904, 905 and 906 having an aspect ratio of 16: 9 are displayed further below. Then, an image as a complete moving image in which the receiving channel of the tuner 4 is fixed is displayed on the main screen 901. In addition, an image based on a video signal obtained at any of the external input terminals 9a to 9c is displayed as a complete moving image on the child screen 902. Further, an image as a pseudo moving image in which the receiving channel of the tuner 5 is sequentially changed is displayed on the four child screens 903, 904, 905, and 906. Then, a frame in which a color is individually set is added to each of the child screens 902 to 906.
[0033]
Although the parent screen and the child screen in the display modes shown in the respective examples described above display the video received by the tuner (except for the example of FIG. 10), any one of the external input terminals 9a to 9a is used. An image based on the video signal obtained in 9c may be displayed as a parent screen or a child screen.
[0034]
Also, although the audio reproduction system in this television receiver has not been described, it is conceivable to normally reproduce the audio corresponding to the image displayed as the main screen. You may make it reproduce | regenerate.
[0035]
Further, in the above-described embodiment, when a frame is displayed on a child screen or the like, the frame is distinguished by the color of the frame. However, the frame may be distinguished by another factor such as a change in luminance. When a plurality of small screens are displayed side by side, the resolution of the small screen can be improved. Hereinafter, a configuration in a case where the resolution of the child screen is improved will be described.
[0036]
Here, a case will be described in which two sets of images are reduced and simultaneously displayed in parallel on the cathode ray tube 11. First, in the television receiver of FIG. 1, based on the control of the central control unit 6, the video signals (the outputs of the tuners 4 and 5 and the outputs of the terminals 9 a, 9 b and 9 c) supplied to the switch circuit 8 are obtained. Two video signals are selected, and the selected video signals are supplied to the decoders 21a and 21b. In each of the decoders 21a and 21b, the supplied video signal is demodulated into a luminance signal and a chroma signal, and the demodulated luminance signal and the chroma signal are supplied to respective analog / digital converters 22a and 22b to be converted into digital data. The converted digital data is supplied to the memory controller 23. The synchronization signal extracted from the video signal supplied to each of the decoders 21a and 21b is supplied to the memory controller 23.
[0037]
The memory controller 23 is connected to a frame memory 24 for storing a video signal converted into digital data. Under the control of the memory controller 23 based on a command from the central controller 6, the analog / digital converters 22a and 22b The supplied two sets of video data are stored. In this case, as video data of each system written in the memory 24, data constituting each horizontal line is thinned out one dot at a time to a half dot number, but the horizontal line number itself is not thinned out. (That is, data of all horizontal lines is stored). Note that the storage state of the two systems of video data is such that the video data supplied from one of the analog / digital converters 22a is stored in the left half of the area for storing one image prepared in the memory 24. And the video data supplied from the other analog / digital converter 22b is stored in the area where the right half image is stored. The writing of the video data into the memory 24 is performed continuously in one field cycle.
[0038]
Then, the two sets of video data stored in the memory 24 are continuously read out in one field cycle and supplied to the digital / analog converter 25, where they are converted into analog luminance signals and chroma signals. Then, the read luminance signal and chroma signal are supplied to an image reception processing circuit 10, where the signals are subjected to image reception processing to be converted into RGB signals. The RGB signals are supplied to a cathode ray tube 11, and an image is displayed on the cathode ray tube 11. Let it.
[0039]
At this time, a control signal is supplied from the central control unit 6 to the vertical deflection circuit 13 so that the vertical deflection angle of the image received by the vertical deflection coil 14V is reduced to half the normal deflection angle. Further, the horizontal deflection angle is set to the normal angle.
[0040]
With this configuration, a display as shown in FIG. 11 is performed as a reduced image display using a circuit facing the memory 24. That is, an image based on one of the video signals selected by the switch circuit 8 is displayed on the left half 11L of the center of the screen 11a of the cathode ray tube 11 in a half size (1/4 in area) of a normal size. At the same time, in the right half 11R, an image based on the other video signal selected by the switch circuit 8 is displayed in a half size of a normal size.
[0041]
Here, in this example, the resolution in the vertical direction of the image to be reduced and displayed is almost the same as that of the image displayed on the entire screen. This point will be described with reference to FIG. 12. First, as a storage state of the video data in the memory 24, for example, as shown in FIG. 12A, one field by the video data output from the analog / digital converters 22a and 22b is used. Is assumed to be composed of 48 dots of 8 dots in the horizontal direction × 6 dots in the vertical direction (the number of dots is set to the minimum number for the sake of simplicity). At this time, the data stored in the memory 24 is data of a total of 24 dots (dot data indicated by A in FIG. 12) in which one dot of each horizontal line is thinned out.
[0042]
Then, a reduced image is displayed using the data of 24 dots. At the time of displaying the reduced image, the vertical deflection angle of the vertical deflection coil 14V is の of that in the normal state, and therefore, FIG. As shown in (1), the vertical interval between each horizontal line is halved, and all six horizontal lines are displayed with a width of の that of the normal display. Therefore, the resolution in the vertical direction is no different from the case where the image is displayed using the entire screen. FIG. 12C shows a case where a conventional television receiver performs reduced display at a size of 1/2. For reference, the deflection angle is not changed in the related art, so that the number of horizontal lines is reduced to 1/2. In other words, the display is performed by thinning out one horizontal line at a time, and the resolution in the vertical direction is reduced to half.
[0043]
In this example, since two sets of tuners 4 and 5 are provided, different channels are respectively selected by the two sets of tuners 4 and 5, and the video signals output by the two sets of tuners 4 and 5 are output. If the data is selected by the switch circuit 8 and supplied to the memory 24, images of two different channels can be displayed side by side as shown in FIG. It is needless to say that an image displayed on one or both of them can be an image based on a video signal obtained at the external input terminals 9a to 9c.
[0044]
Further, here, two sets of images are displayed in parallel by reducing the size to 1/2, but three or more sets of images may be displayed simultaneously. In this case, when the reduction ratio is changed to a value other than 1/2, the vertical deflection angle needs to be changed correspondingly.
[0045]
【The invention's effect】
According to the present invention, by compressing the vertical deflection angle in proportion to the reduction ratio of the image displayed on the cathode ray tube, the number of horizontal lines of the displayed image does not change, the vertical resolution does not decrease, and the reduced display is performed. It is possible to satisfactorily check characters and the like in the displayed image.
[0046]
in this case,pluralBy storing the video signal in the memory and simultaneously reducing and displaying each image, a plurality of images can be displayed at a high resolution.
[0047]
Further, by writing the video signal to the memory at a cycle of one field, the reduced image becomes a good moving image similar to a normal image that changes in real time.
[Brief description of the drawings]
FIG. 1 is a configuration diagram showing one embodiment of the present invention.
FIG. 2 is an explanatory diagram showing a display example according to one embodiment.
FIG. 3 is an explanatory diagram showing a display example according to one embodiment.
FIG. 4 is an explanatory diagram showing a display example according to one embodiment.
FIG. 5 is an explanatory diagram showing a display example according to one embodiment.
FIG. 6 is an explanatory diagram showing a display example according to one embodiment.
FIG. 7 is an explanatory diagram showing a display example according to one embodiment.
FIG. 8 is an explanatory diagram showing a display example according to one embodiment.
FIG. 9 is an explanatory diagram showing a display example according to one embodiment.
FIG. 10 is an explanatory diagram showing a display example according to one embodiment.
FIG. 11 is an explanatory diagram showing a display example according to one embodiment.
FIG. 12 is an explanatory diagram showing a data configuration of a reduced image according to one embodiment.
FIG. 13 is an explanatory diagram showing a conventional display example.
FIG. 14 is an explanatory diagram showing a conventional display example.
[Explanation of symbols]
1 television receiver
6. Central control unit (CPU)
9 Switch circuit
11 cathode ray tube
12. Horizontal deflection circuit
13 Vertical deflection circuit
14H horizontal deflection coil
14V vertical deflection coil
23 Memory Controller
24 memory
100,200,300 @ 900 screen
101,201,301 ‥‥ 901 Main screen
102 to 104, 202 to 204, 302 to 309, 402 to 409, 502 to 505, 602 to 610, 702, 802 to 810, 902 to 906
112, 113, 114 frames

Claims (2)

A television receiver capable of simultaneously reducing two video signals selected from a plurality of video signals to a main image and a sub-image as 1 / n (where 1 <n) on a display surface of a cathode ray tube. hand,
A frame memory for storing two video data obtained by converting the two video signals into digital data;
The two video data obtained by converting the two video signals into digital data are not subjected to the vertical decimation process, but are subjected to the decimation process for compressing the data of each horizontal line to 1 / n. A frame memory controller that continuously writes in the frame memory in one field cycle, and continuously reads out the composite video data in one field cycle from the frame memory as video data for displaying on the display surface;
When the video data is displayed on the display surface of the cathode ray tube, a vertical deflection unit that sets a vertical deflection angle to 1 / n of a normal deflection angle,
Control means for controlling the frame memory controller and vertical deflection means;
A television receiver comprising: 2. The television receiver according to claim 1, wherein the two selected video signals are video signals of different broadcasting systems having different aspect ratios .

Images