JP3529675B2 - Semiconductor device and inverter device - Google Patents
Semiconductor device and inverter deviceInfo
- Publication number
- JP3529675B2 JP3529675B2 JP24947699A JP24947699A JP3529675B2 JP 3529675 B2 JP3529675 B2 JP 3529675B2 JP 24947699 A JP24947699 A JP 24947699A JP 24947699 A JP24947699 A JP 24947699A JP 3529675 B2 JP3529675 B2 JP 3529675B2
- Authority
- JP
- Japan
- Prior art keywords
- semiconductor device
- power supply
- conductor
- electrode side
- smoothing capacitor
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/4805—Shape
- H01L2224/4809—Loop shape
- H01L2224/48091—Arched
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/4813—Connecting within a semiconductor or solid-state body, i.e. fly wire, bridge wire
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48135—Connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip
- H01L2224/48137—Connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip the bodies being arranged next to each other, e.g. on a common substrate
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/10—Details of semiconductor or other solid state devices to be connected
- H01L2924/11—Device type
- H01L2924/13—Discrete devices, e.g. 3 terminal devices
- H01L2924/1304—Transistor
- H01L2924/1305—Bipolar Junction Transistor [BJT]
- H01L2924/13055—Insulated gate bipolar transistor [IGBT]
Landscapes
- Rectifiers (AREA)
- Inverter Devices (AREA)
- Cooling Or The Like Of Semiconductors Or Solid State Devices (AREA)
Description
【０００１】[0001]
【発明の属する技術分野】本発明は、小型で冷却効率が
良く、かつ配線インダクタンスが小さい半導体装置及び
インバータ装置に関するものである。BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor device and an inverter device which are small in size, have good cooling efficiency, and have a small wiring inductance.
【０００２】[0002]
【従来の技術】電気自動車ではインバータ装置の小型
化、高信頼性が要求されている。インバータ装置の小型
化、高信頼性を図るためには、冷却効率が良くかつ配線
インダクタンスが小さい電力用半導体装置が必要とな
る。以下、従来のインバータ装置の電力用半導体装置の
構造を、図９及び図１０を参照して説明する。2. Description of the Related Art In electric vehicles, miniaturization and high reliability of inverter devices are required. In order to reduce the size and increase the reliability of the inverter device, a power semiconductor device having a high cooling efficiency and a small wiring inductance is required. Hereinafter, the structure of the conventional power semiconductor device of the inverter device will be described with reference to FIGS. 9 and 10.
【０００３】図９は、従来の電力用半導体装置の断面
図、図１０は、従来の電力用半導体装置の冷却器への搭
載図である。図９において、電力用半導体装置は、放熱
用金属板１の上部に半導体チップ４１及び１３１と放熱
用金属板１とを絶縁するための絶縁基板２、絶縁基板２
の上部に金属電極３、金属電極３の上部に半導体チップ
４１及び１３１が積層され且つ接合され、半導体チップ
４１及び１３１、金属電極３、絶縁基板２が絶縁性を有
する樹脂製パッケージ５に収納され、更に放熱用金属板
１と樹脂製パッケージ５は端部で接着されている。樹脂
製パッケージ５の内部には、絶縁性のゲル６が封入され
ている。FIG. 9 is a sectional view of a conventional power semiconductor device, and FIG. 10 is a diagram of mounting the conventional power semiconductor device on a cooler. In FIG. 9, the power semiconductor device includes an insulating substrate 2 and an insulating substrate 2 on the heat dissipation metal plate 1 for insulating the semiconductor chips 41 and 131 from the heat dissipation metal plate 1.
The metal electrode 3 is stacked on the upper part of the metal electrode 3, the semiconductor chips 41 and 131 are stacked and bonded on the metal electrode 3, and the semiconductor chips 41 and 131, the metal electrode 3, and the insulating substrate 2 are housed in a resin package 5 having an insulating property. Further, the heat-dissipating metal plate 1 and the resin package 5 are bonded at their ends. An insulating gel 6 is enclosed in the resin package 5.
【０００４】また、外部引き出し端子７及び８と半導体
チップ４１及び１３１はワイヤボンディング９により電
気的に接続されている。このように構成された電力用半
導体装置においては、半導体チップ４１及び１３１が通
電されたときに熱損失が発生する。半導体チップ４１及
び１３１の上部には断熱材である絶縁性のゲル６が封入
されているので、半導体チップ４１及び１３１で発生し
た熱損失の大部分は、下部の金属電極３に熱伝導する。
金属電極３に熱伝導した熱損失は、絶縁基板２を伝わり
放熱用金属板１に熱伝導する。放熱用金属板１は、図１
０に示すように取付けねじ１１により冷却器１２に加圧
接触され、熱損失が冷却器１２により放熱される。The external lead terminals 7 and 8 and the semiconductor chips 41 and 131 are electrically connected by wire bonding 9. In the power semiconductor device configured as described above, heat loss occurs when the semiconductor chips 41 and 131 are energized. Since the insulating gel 6 which is a heat insulating material is encapsulated in the upper portions of the semiconductor chips 41 and 131, most of the heat loss generated in the semiconductor chips 41 and 131 is conducted to the lower metal electrode 3.
The heat loss conducted to the metal electrode 3 propagates through the insulating substrate 2 and is conducted to the heat radiating metal plate 1. The heat radiating metal plate 1 is shown in FIG.
As shown in 0, the mounting screw 11 makes pressure contact with the cooler 12, and the heat loss is radiated by the cooler 12.
【０００５】[0005]
【発明が解決しようとする課題】上述した従来の電力用
半導体装置では、以下のような問題点がある。
（１）電力用半導体装置１０の周囲にある取付けねじ１
１により放熱用金属板１を冷却器１２に加圧接触させて
いるので、加圧力が放熱用金属板１全体に均等にかから
ない。そのため、接触熱抵抗は電力用半導体装置内部の
熱抵抗とほぼ同等と非常に大きくなり、冷却効率が悪
い。The conventional power semiconductor device described above has the following problems. (1) Mounting screw 1 around the power semiconductor device 10
Since the heat-dissipating metal plate 1 is brought into pressure contact with the cooler 12 by 1, the pressing force is not evenly applied to the whole heat-dissipating metal plate 1. Therefore, the contact thermal resistance becomes very large, which is almost equal to the thermal resistance inside the power semiconductor device, and the cooling efficiency is poor.
【０００６】（２）接触熱抵抗が大きく冷却効率が悪い
ため半導体チップ４１及び１３１を密集配置できず、電
力用半導体装置が大型化する。同様に、冷却器１２も大
型化する。(2) Since the contact heat resistance is large and the cooling efficiency is poor, the semiconductor chips 41 and 131 cannot be arranged densely, and the power semiconductor device becomes large. Similarly, the cooler 12 also increases in size.
【０００７】（３）半導体チップ４１及び１３１がワイ
ヤボンディング９により電気的に接続されているので、
ワイヤボンディング９の熱応力による切断なども考えら
れ信頼性が低い。(3) Since the semiconductor chips 41 and 131 are electrically connected by the wire bonding 9,
The reliability is low because the wire bonding 9 may be cut by thermal stress.
【０００８】（４）外部引出し端子７から半導体チップ
４１または１３１をへて外部引き出し端子８へ流れる電
流のループが広く電力用半導体装置内部の配線インダク
タンスが大きくなり、損失が増大する。更に、急峻な電
圧変化による破壊を防ぐためのスナバ回路も必要にな
る。(4) The loop of the current flowing from the external lead-out terminal 7 to the external lead-out terminal 8 through the semiconductor chip 41 or 131 is wide, and the wiring inductance inside the power semiconductor device becomes large, resulting in an increase in loss. Further, a snubber circuit for preventing destruction due to abrupt voltage change is also required.
【０００９】従って、本発明は、上記問題点を鑑み、冷
却効率を向上すると共に小型化した半導体装置及び冷却
効率を向上すると共に小型化し、半導体装置の損失を低
減し、スナバ回路を削減したインバータ装置を提供する
ことを目的とする。Therefore, in view of the above problems, the present invention improves the cooling efficiency and downsizes the semiconductor device, and improves the cooling efficiency and downsizing, reduces the loss of the semiconductor device and reduces the snubber circuit. The purpose is to provide a device.
【００１０】[0010]
【課題を解決するための手段】上記目的を達成するため
に、請求項１記載の発明は、冷媒が通るように中空構造
を形成した液冷式冷却器と、この液冷式冷却器に接合さ
れた絶縁基板と、この絶縁基板に接合された金属電極
と、この金属電極に接合された複数の半導体チップと、
この複数の半導体チップを電気的に接続する幅広導体
と、前記半導体チップと前記絶縁基板と前記金属電極と
前記幅広導体とを収納する絶縁性を有する樹脂製パッケ
ージとを備えたことを特徴とする。従って、接触熱抵抗
がなくなり冷却効率が向上すると共に、パッケージ内部
の配線インダクタンスが低減し、信頼性も向上する。 In order to achieve the above object, the invention according to claim 1 is a liquid cooling type cooler having a hollow structure through which a refrigerant passes, and a liquid cooling type cooler joined to the liquid cooling type cooler. An insulated substrate, a metal electrode joined to the insulated substrate, a plurality of semiconductor chips joined to the metal electrode,
A wide conductor that electrically connects the plurality of semiconductor chips
And the semiconductor chip, the insulating substrate, and the metal electrode
An insulating resin package that houses the wide conductor is provided. Therefore, contact thermal resistance
Inside the package as well as improving cooling efficiency
Wiring inductance is reduced and reliability is also improved.
【００１１】[0011]
【００１２】[0012]
【００１３】又、請求項２記載の発明は、直流電源と、
半導体装置と、直流電源平滑用コンデンサと、直流電源
と半導体装置を接続する正極側導体及び負極側導体と、
前記半導体装置を駆動制御する制御回路とを有したイン
バータ装置において、前記半導体装置は、冷媒が通るよ
うに中空構造を形成した液冷式冷却器と、この液冷式冷
却器に接合された絶縁基板と、この絶縁基板に接合され
た金属電極と、この金属電極に接合された複数の半導体
チップと、この複数の半導体チップを電気的に接続する
幅広導体と、前記半導体チップと前記絶縁基板と前記金
属電極と前記幅広導体とを収納する絶縁性を有する樹脂
製パッケージとを備えたことを特徴とする。 従って、接
触熱抵抗がなくなり冷却効率が向上すると共に、パッケ
ージ内部の配線インダクタンスが低減し、信頼性も向上
する。 The invention according to claim 2 is a DC power supply,
Semiconductor device, DC power supply smoothing capacitor, DC power supply
A conductor on the positive electrode side and a conductor on the negative electrode side that connect the semiconductor device to the semiconductor device,
An input circuit having a control circuit for driving and controlling the semiconductor device.
In the burner device, the semiconductor device allows the refrigerant to pass through.
And a liquid-cooled cooler with a hollow structure
Insulation board joined to the container and this insulation board
Metal electrode and multiple semiconductors bonded to this metal electrode
Electrically connect the chip and the semiconductor chips
Wide conductor, the semiconductor chip, the insulating substrate, and the gold
Insulating resin for housing the metal electrode and the wide conductor
And a package made by the manufacturer. Therefore,
The heat resistance is eliminated and the cooling efficiency is improved.
Wiring inductance inside the package is reduced and reliability is improved.
To do.
【００１４】[0014]
【００１５】[0015]
【００１６】更に、請求項３記載の発明は、直流電源
と、半導体装置と、直流電源平滑用コンデンサと、直流
電源と半導体装置を接続する正極側導体及び負極側導体
と、前記半導体装置を駆動制御する制御回路とを有した
インバータ装置において、前記直流電源平滑用コンデン
サを電解コンデンサとし、且つその内部が中空で冷媒が
通る液冷式コンデンサとし、前記半導体装置に近接配置
し前記正極側導体および負極側導体と電気的に接続した
ことを特徴とする。 Further, the invention according to claim 3 is a DC power supply.
, Semiconductor device, DC power supply smoothing capacitor, DC
Positive conductor and negative conductor that connect the power supply to the semiconductor device
And a control circuit for driving and controlling the semiconductor device.
In the inverter device, the DC power supply smoothing capacitor
Is used as an electrolytic capacitor, and the inside is hollow and the refrigerant
A liquid-cooled condenser that passes through and is placed close to the semiconductor device
Electrically connected to the positive electrode side conductor and the negative electrode side conductor
It is characterized by
【００１７】従って、パッケージ内部の配線インダクタ
ンスのみでなく、直流電源平滑用コンデンサまでの配線
インダクタンスも低減でき、また直流電源平滑用コンデ
ンサも小型化でき、スナバ回路が省略できる。Therefore, not only the wiring inductance inside the package but also the wiring inductance up to the DC power supply smoothing capacitor can be reduced, the DC power supply smoothing capacitor can be downsized, and the snubber circuit can be omitted.
【００１８】又、請求項４記載の発明は、直流電源と、
半導体装置と、直流電源平滑用コンデンサと、直流電源
と半導体装置を接続する正極側導体及び負極側導体と、
前記半導体装置を駆動制御する制御回路とを有したイン
バータ装置において、前記直流電源平滑用コンデンサを
電解コンデンサとし、且つ内部が中空で冷媒が通り、更
にその外周部も中空で冷媒が通る液冷式コンデンサと
し、前記半導体装置に近接配置し、前記正極側導体及び
負極側導体と電気的に接続したことを特徴とする。 The invention according to claim 4 is a DC power supply,
Semiconductor device, DC power supply smoothing capacitor, DC power supply
A conductor on the positive electrode side and a conductor on the negative electrode side that connect the semiconductor device to the semiconductor device,
An input circuit having a control circuit for driving and controlling the semiconductor device.
In the barter device, the DC power supply smoothing capacitor
It is an electrolytic capacitor, and the inside is hollow and the refrigerant passes through it.
In addition, a liquid-cooled condenser with a hollow outer periphery through which the refrigerant passes
And is arranged close to the semiconductor device, and the positive electrode side conductor and
It is characterized in that it is electrically connected to the negative electrode side conductor.
【００１９】従って、パッケージ内部の配線インダクタ
ンスのみでなく、直流電源平滑用コンデンサまでの配線
インダクタンスも低減でき、また直流電源平滑用コンデ
ンサも小型化でき、スナバ回路が省略できる。Therefore, not only the wiring inductance inside the package but also the wiring inductance up to the DC power supply smoothing capacitor can be reduced, the DC power supply smoothing capacitor can be downsized, and the snubber circuit can be omitted.
【００２０】更に、請求項５記載の発明は、直流電源
と、半導体装置と、直流電源平滑用コンデンサと、直流
電源と半導体装置を接続する正極側導体及び負極側導体
と、前記半導体装置を駆動制御する制御回路とを有した
インバータ装置において、前記直流電源平滑用コンデン
サをセラミックコンデンサとし、液冷式冷却器に絶縁シ
ートを介して取付け、前記半導体装置に近接配置し、前
記正極側導体及び負極側導体と電気的に接続したことを
特徴とする。 Further, the invention according to claim 5 is a DC power supply.
, Semiconductor device, DC power supply smoothing capacitor, DC
Positive conductor and negative conductor that connect the power supply to the semiconductor device
And a control circuit for driving and controlling the semiconductor device.
In the inverter device, the DC power supply smoothing capacitor
The ceramic capacitor is used as the
Mounted via a cable, placed close to the semiconductor device, and
Make sure that the positive and negative conductors are electrically connected.
Characterize.
【００２１】従って、パッケージ内部の配線インダクタ
ンスのみでなく、直流電源平滑用コンデンサまでの配線
インダクタンスも低減でき、また直流電源平滑用コンデ
ンサも小型化でき、スナバ回路が省略できる。Therefore, not only the wiring inductance inside the package but also the wiring inductance up to the DC power supply smoothing capacitor can be reduced, the DC power supply smoothing capacitor can be downsized, and the snubber circuit can be omitted.
【００２２】[0022]
【発明の実施の形態】以下、本発明の実施の形態を図面
を参照して説明する。BEST MODE FOR CARRYING OUT THE INVENTION Embodiments of the present invention will be described below with reference to the drawings.
【００２３】（第１の実施の形態）まず、本発明の第１
の実施の形態について、図１乃至図３を用いて説明す
る。図１は、本実施の形態の電力用半導体装置の縦断面
図、図２は、本実施の形態の電力用半導体装置の水平断
面図、図３は、本実施の形態のインバータ装置の回路図
である。(First Embodiment) First, the first embodiment of the present invention
Embodiments will be described with reference to FIGS. 1 to 3. 1 is a vertical cross-sectional view of a power semiconductor device according to this embodiment, FIG. 2 is a horizontal cross-sectional view of a power semiconductor device according to this embodiment, and FIG. 3 is a circuit diagram of an inverter device according to this embodiment. Is.
【００２４】図１及び図２において、電力用半導体装置
は、内部が中空で冷媒流路１９が構成されている冷却器
１２の上部に絶縁基板２が接台され、絶縁基板２の上部
に金属電極３が接台され、金属電極３の上部に半導体チ
ップであるＩＧＢＴ４１〜４６及びダイオード１３１〜
１３６が接合されている。1 and 2, in the power semiconductor device, an insulating substrate 2 is attached to the upper part of a cooler 12 having a hollow interior and a coolant passage 19 formed therein, and a metal is provided on the upper part of the insulating substrate 2. The electrodes 3 are brought into contact with each other, and the IGBTs 41 to 46 and the diodes 131 to 46, which are semiconductor chips, are provided on the metal electrodes 3.
136 is joined.
【００２５】更に、図１に示すように、ＩＧＢＴ４１，
４２及びダイオード１３１，１３２の上部には、熱応力
を緩衝する目的の緩衝板１４１〜１４４が接合されてい
る。緩衝板１４１〜１４４の材質は、例えばモリブデン
などである。同様に他のＩＧＢＴ４３〜４６及びダイオ
ード１３３〜１３６にも、緩衝板が接合されている。Further, as shown in FIG.
Buffer plates 141 to 144 for the purpose of buffering thermal stress are bonded to the upper portions of the diode 42 and the diodes 131 and 132. The material of the buffer plates 141 to 144 is, for example, molybdenum. Similarly, buffer plates are joined to the other IGBTs 43 to 46 and the diodes 133 to 136.
【００２６】ＩＧＢＴ４１、４３、４５及びダイオード
１３１、１３３、１３５は直流電源の正極側と接続する
第１の幅広導体１６と緩衝板を介し接続され、ＩＧＢＴ
４２、４４、４６及びダイオード１３２、１３４、１３
６は直流電源の負極側と接続する第２の幅広導体１７と
緩衝板を介し接続されている。更に、第１の幅広導体１
６と第２の幅広導体１７は、絶緑物１５を介して積層さ
れている。また、ＩＧＢＴ４１〜４６は、ゲートリード
１８により駆動される。The IGBTs 41, 43, 45 and the diodes 131, 133, 135 are connected via a buffer plate to the first wide conductor 16 connected to the positive electrode side of the DC power source, and the IGBTs are connected.
42, 44, 46 and diodes 132, 134, 13
Reference numeral 6 is connected to the second wide conductor 17 connected to the negative electrode side of the DC power source via a buffer plate. Furthermore, the first wide conductor 1
The sixth wide conductor 17 and the second wide conductor 17 are laminated with the insulating material 15 interposed therebetween. Further, the IGBTs 41 to 46 are driven by the gate lead 18.
【００２７】ＩＧＢＴ４１〜４６及びダイオード１３１
〜１３６、絶縁基板２、金属電極３、緩衝板、第１の幅
広導体１６、第２の幅広導体１７、絶縁物１５、ゲート
リード１８は絶縁性を有する樹脂製パッケージ５に収納
され、更に冷却器１２と樹脂製パッケージ５は端部で接
着されている。樹脂製パッケージ５の内部には、絶縁性
のゲル６が封入されている。The IGBTs 41 to 46 and the diode 131
To 136, the insulating substrate 2, the metal electrode 3, the buffer plate, the first wide conductor 16, the second wide conductor 17, the insulator 15, and the gate lead 18 are housed in a resin package 5 having an insulating property and further cooled. The container 12 and the resin package 5 are bonded at the ends. An insulating gel 6 is enclosed in the resin package 5.
【００２８】また、冷却器１２の材質は、絶縁基板２と
熱膨張係数の近い金属とセラミックスの複合材料である
金属基複合材料が望ましいが、冷却効率の向上や低コス
ト化のために材質を銅やアルミニウムなどの金属とした
場合には、絶縁基板２と冷却器１２を接合するはんだ層
の厚みを通常よりも厚くして熱応力を緩衝する。The material of the cooler 12 is preferably a metal-based composite material, which is a composite material of a metal and a ceramic having a coefficient of thermal expansion close to that of the insulating substrate 2. However, the material is used to improve cooling efficiency and reduce cost. When a metal such as copper or aluminum is used, the thermal stress is buffered by making the thickness of the solder layer joining the insulating substrate 2 and the cooler 12 thicker than usual.
【００２９】図１及び図２のように構成された本実施の
形態の電力用半導体装置においては、ＩＧＢＴ４１〜４
６及びダイオード１３１〜１３６と冷却器１２とが接合
されているため、従来の電力用半導体装置のような冷却
器との間の接触熱抵抗がなくなり、ＩＧＢＴ及びダイオ
ードから冷却器までの熱抵抗が半減し冷却効率が向上す
る。In the power semiconductor device of the present embodiment configured as shown in FIGS. 1 and 2, IGBTs 41 to 4 are used.
6 and the diodes 131 to 136 and the cooler 12 are joined together, the contact thermal resistance between the cooler and the conventional power semiconductor device is eliminated, and the thermal resistance from the IGBT and the diode to the cooler is reduced. It is halved and the cooling efficiency is improved.
【００３０】更に、第１の幅広導体１６と第２の幅広導
体１７が絶縁物１５を介し電流の流れの向きが対抗する
ように積層されているため、インダクタンスが相殺され
てパッケージ内部の配線インダクタンスが非常に小さく
なる。Further, since the first wide conductor 16 and the second wide conductor 17 are laminated so that the directions of the current flows through the insulator 15, the inductances are offset and the wiring inductance inside the package is increased. Becomes very small.
【００３１】また更に、ＩＧＢＴ４１〜４６及びダイオ
ード１３１〜１３６が、第１の幅広導体１６及び第２の
幅広導体１７により接続されているので、ワイヤボンデ
ィングにより接続されている場合に比べ切断の可能性が
ほとんどなく信頼性が向上する。また、ＩＧＢＴ４１〜
４６及びダイオード１３１〜１３６の過渡的な熱耐量も
向上する。Furthermore, since the IGBTs 41 to 46 and the diodes 131 to 136 are connected by the first wide conductor 16 and the second wide conductor 17, there is a possibility of disconnection as compared with the case where they are connected by wire bonding. There is almost no increase in reliability. Further, the IGBTs 41 to
The transient heat resistance of the diode 46 and the diodes 131 to 136 is also improved.
【００３２】図１及び図２に示した構造の電力用半導体
装置においては、接触熱抵抗がなくなり冷却効率が向上
するので、ＩＧＢＴ及びダイオードを密集配置でき、電
力用半導体装置及び冷却器を小型化しインバータ装置を
小型化することができる。In the power semiconductor device having the structure shown in FIGS. 1 and 2, the contact thermal resistance is eliminated and the cooling efficiency is improved, so that the IGBTs and diodes can be densely arranged, and the power semiconductor device and the cooler can be downsized. The inverter device can be downsized.
【００３３】また、電力用半導体装置の信頼性が向上
し、インバータ装置の信頻性も向上する。そして、更に
電力用半導体装置内部の配線インダクタンスを低減する
ことができるので、損失が低減し、インバータ装置を小
型化、低コスト化することができる。Further, the reliability of the power semiconductor device is improved, and the reliability of the inverter device is also improved. Further, since the wiring inductance inside the power semiconductor device can be further reduced, the loss can be reduced, and the inverter device can be downsized and the cost can be reduced.
【００３４】そして、図３に示すように、電力用半導体
装置を３相インバータに適用し、直流電源を入力とし、
負荷（図示せず）に３相（Ｕ，Ｖ，Ｗ）の交流電源を給
電している。Then, as shown in FIG. 3, the power semiconductor device is applied to a three-phase inverter, and a DC power source is used as an input,
A three-phase (U, V, W) AC power source is supplied to a load (not shown).
【００３５】（第２の実施の形態）次に、本発明の第２
の実施の形態を、図４を参照して説明する。図４は、本
発明の第２の実施の形態であるインバータ装置の縦断面
図である。(Second Embodiment) Next, the second embodiment of the present invention will be described.
The embodiment will be described with reference to FIG. FIG. 4 is a vertical cross-sectional view of the inverter device according to the second embodiment of the present invention.
【００３６】図４において、インバータ装置は、直流電
源と接続する正極側導体２１及び負極側導体２２を、電
流の流れる方向が対抗するように平行に近接配置し樹脂
製パッケージ５で固定する。樹脂製パッケージ５の外部
では、近接配置した正極側導体２１と負極側導体２２の
間には絶縁シートを挿入する。また、負荷と接続する３
相出力導体２４も樹脂製パッケージ５で固定する。更
に、直流電源平滑用コンデンサを電解コンデンサ２０Ａ
とし、樹脂製パッケージ５に近接配置し、且つ正極側導
体２１及び負極側導体２２と取付けねじ２７により電気
的に接続する。このとき、電解コンデンサ２０Ａは、半
導体装置と平行に配置される。その他の構造は、第１の
実施の形態と同様である。In FIG. 4, in the inverter device, the positive electrode side conductor 21 and the negative electrode side conductor 22 which are connected to the DC power source are arranged in parallel and close to each other so that the current flowing directions are opposed to each other, and are fixed by the resin package 5. On the outside of the resin package 5, an insulating sheet is inserted between the positive electrode side conductor 21 and the negative electrode side conductor 22 which are arranged close to each other. Also, connect to the load 3
The phase output conductor 24 is also fixed by the resin package 5. Further, a DC power supply smoothing capacitor is used as an electrolytic capacitor 20A.
And is arranged close to the resin package 5 and is electrically connected to the positive electrode side conductor 21 and the negative electrode side conductor 22 by the mounting screw 27. At this time, the electrolytic capacitor 20A is arranged in parallel with the semiconductor device. The other structure is similar to that of the first embodiment.
【００３７】図４のように構成された本実施の形態のイ
ンバータ装置においては、第１の実施の形態に加え、電
解コンデンサ２０Ａが樹脂製パッケージ５に近接配置さ
れているので、正極側導体２１及び負極側導体２２の配
線長が短く、更に正極側導体２１及び負極側導体２２が
電流の流れる向きが対抗するように近接配置されている
ので配線インダクタンスが相殺される。故に、パッケー
ジ内部の配線インダクタンスのみでなく、電源平滑用コ
ンデンサまでの配線インダクタンスも非常に小さくで
き、ＩＧＢＴ４１〜４６がターンオフする場合にＩＧＢ
Ｔかかるスパイク電圧が非常に小さくなり、急峻な電圧
変化を抑制するためのスナバ回路が省略できる。このと
き、第１の実施の形態と同様の効果に加え、更にインバ
ータ装置を小型化、低コスト化できる。In the inverter device of the present embodiment configured as shown in FIG. 4, in addition to the first embodiment, the electrolytic capacitor 20A is disposed close to the resin package 5, so that the positive electrode side conductor 21 is provided. The wiring lengths of the negative electrode side conductor 22 and the negative electrode side conductor 22 are short, and the positive electrode side conductor 21 and the negative electrode side conductor 22 are arranged close to each other so that the directions of current flow are opposed to each other. Therefore, not only the wiring inductance inside the package but also the wiring inductance up to the power smoothing capacitor can be made very small, and when the IGBTs 41 to 46 turn off, the IGBT
The spike voltage applied to T becomes very small, and a snubber circuit for suppressing a sharp voltage change can be omitted. At this time, in addition to the same effects as the first embodiment, the inverter device can be further downsized and the cost can be reduced.
【００３８】（第３の実施の形態）次に、本発明の第３
の実施の形態を、図５を参照して説明する。図５は、本
発明の第３の実施の形態であるインバータ装置の縦断面
図である。(Third Embodiment) Next, the third embodiment of the present invention will be described.
The embodiment will be described with reference to FIG. FIG. 5 is a vertical cross-sectional view of the inverter device according to the third embodiment of the present invention.
【００３９】図５に示すように、本実施の形態において
は、第２の実施の形態における電解コンデンサ２０Ａを
樹脂製パッケージ５に段詰みしたことを特徴とする。そ
の際、インバータ装置は、直流電源と接続する正極側導
体２１及び負極側導体２２を、電流の流れる方向が対抗
するように平行に近接配置し樹脂製パッケージ５で固定
する。樹脂製パッケージ５の外部では、近接配置した正
極側導体２１と負極側導体２２の間には絶縁シートを挿
入する。また、負荷と接続する３相出力導体２４も樹脂
製パッケージ５で固定する。更に、直流電源平滑用コン
デンサを電解コンデンサ２０Ａとし、樹脂製パッケージ
５に近接配置し、且つ正極側導体２１及び負極側導体２
２と取付けねじ２７により電気的に接続する。その他の
構造は、第１の実施の形態と同様である。As shown in FIG. 5, the present embodiment is characterized in that the electrolytic capacitor 20A according to the second embodiment is packed in a resin package 5. At that time, in the inverter device, the positive electrode side conductor 21 and the negative electrode side conductor 22 which are connected to the DC power source are arranged in parallel close to each other so that the current flowing directions oppose each other, and are fixed by the resin package 5. On the outside of the resin package 5, an insulating sheet is inserted between the positive electrode side conductor 21 and the negative electrode side conductor 22 which are arranged close to each other. The three-phase output conductor 24 connected to the load is also fixed by the resin package 5. Further, the DC power supply smoothing capacitor is the electrolytic capacitor 20A, which is disposed close to the resin package 5 and has the positive electrode side conductor 21 and the negative electrode side conductor 2.
2 and the mounting screw 27 for electrical connection. The other structure is similar to that of the first embodiment.
【００４０】図５のように構成された本実施の形態のイ
ンバータ装置においては、第１の実施の形態に加え、電
解コンデンサ２０Ａが樹脂製パッケージ５に近接配置さ
れているので、正極側導体２１及び負極側導体２２の配
線長が短く、更に正極側導体２１及び負極側導体２２が
電流の流れる向きが対抗するように近接配置されている
ので配線インダクタンスが相殺される。故に、パッケー
ジ内部の配線インダクタンスのみでなく、電源平滑用コ
ンデンサまでの配線インダクタンスも非常に小さくで
き、ＩＧＢＴ４１〜４６がターンオフする場合にＩＧＢ
Ｔかかるスパイク電圧が非常に小さくなり、急峻な電圧
変化を抑制するためのスナバ回路が省略できる。このと
き、第２の実施の形態と同様の効果を奏することができ
る。In the inverter device of the present embodiment configured as shown in FIG. 5, in addition to the first embodiment, the electrolytic capacitor 20A is disposed close to the resin package 5, so that the positive electrode side conductor 21 is provided. The wiring lengths of the negative electrode side conductor 22 and the negative electrode side conductor 22 are short, and the positive electrode side conductor 21 and the negative electrode side conductor 22 are arranged close to each other so that the directions of current flow are opposed to each other. Therefore, not only the wiring inductance inside the package but also the wiring inductance up to the power smoothing capacitor can be made very small, and when the IGBTs 41 to 46 turn off, the IGBT
The spike voltage applied to T becomes very small, and a snubber circuit for suppressing a sharp voltage change can be omitted. At this time, the same effect as that of the second embodiment can be obtained.
【００４１】（第４の実施の形態）次に、本発明の第４
の実施の形態を、図６を参照して説明する。図６は本発
明の第４の実施の形態であるインバータ装置の縦断面図
である。(Fourth Embodiment) Next, a fourth embodiment of the present invention will be described.
The embodiment will be described with reference to FIG. FIG. 6 is a vertical sectional view of an inverter device according to a fourth embodiment of the present invention.
【００４２】図６において、インバータ装置は、直流電
源平滑用コンデンサを電解コンデンサとし、且つ内部が
中空で冷媒流路１９が構成され冷媒３０が流れる液冷式
電解コンデンサ２０Ｂとし、樹脂製パッケージ５に近接
配置し正極側導体２１及び負極側導体２２と接続ねじ２
７により電気的に接続する。その他の構造は、上述した
実施の形態と同様である。In FIG. 6, in the inverter device, a DC power supply smoothing capacitor is used as an electrolytic capacitor, and a liquid-cooled electrolytic capacitor 20B having a hollow interior and having a refrigerant passage 19 and a refrigerant 30 flowing therein is provided in a resin package 5. Connected in close proximity to the positive electrode side conductor 21 and the negative electrode side conductor 22 and the connection screw 2
7 for electrical connection. The other structure is similar to that of the above-described embodiment.
【００４３】図６のように構成されたインバータ装置に
おいては、上述した実施の形態に加え、液冷式電解コン
デンサ２０Ｂの内部のコンデンサ素子が冷媒３０により
液冷されているので、自然空冷の場合に比べ同一体積で
もより多くのリップル電流を流すことができる。また、
同一リップル電流を流す場合には、液冷式電解コンデン
サ２０Ｂの体積を小さくすることができる。また、液冷
式電解コンデンサ２０Ｂの体積が小さくなるので、樹脂
製パッケージ５のより近くに配置することができ、配線
インダクタンスも更に小さくなる。更に、液冷されてい
るため、コンデンサ素子の動作温度が低く寿命も向上す
る。このとき、上述した実施の形態と同様の効果に加
え、更にインバータ装置を小型化、低コスト化できる。In the inverter device constructed as shown in FIG. 6, in addition to the above-described embodiment, since the capacitor element inside the liquid-cooled electrolytic capacitor 20B is liquid-cooled by the refrigerant 30, it is possible to cool it naturally. More ripple current can be made to flow even with the same volume as compared to. Also,
When the same ripple current flows, the volume of the liquid-cooled electrolytic capacitor 20B can be reduced. Further, since the liquid-cooled electrolytic capacitor 20B has a small volume, it can be arranged closer to the resin package 5, and the wiring inductance is further reduced. Further, since it is liquid-cooled, the operating temperature of the capacitor element is low and the life is improved. At this time, in addition to the effects similar to those of the above-described embodiment, the size and cost of the inverter device can be further reduced.
【００４４】（第５の実施の形態）次に、本発明の第５
の実施の形態を、図７を参照して説明する。図７は、本
発明の第５の実施の形態であるインバータ装置の縦断面
図である。(Fifth Embodiment) Next, the fifth embodiment of the present invention will be described.
The embodiment will be described with reference to FIG. FIG. 7 is a vertical cross-sectional view of the inverter device according to the fifth embodiment of the present invention.
【００４５】図７において、インバータ装置は、直流電
源平滑用コンデンサを液冷式電解コンデンサ２０Ｃと
し、コンデンサ素子３１を取り囲むように、内部及び外
周部が中空で冷媒流路１９が構成され冷媒３０が通る液
冷式電解コンデンサとし、樹脂製パッケージ５に近接配
置し正極側導体２１及び負極側導体２２と接続ねじ２７
に電気的に接続する。その他の構造は、上述した実施の
形態と同様である。図７のように構成されたインバータ
装置においては、第４の実施の形態以上にコンデンサ素
子３１が効率よく冷却される。In FIG. 7, in the inverter device, a DC power source smoothing capacitor is a liquid-cooled electrolytic capacitor 20C, and a refrigerant passage 19 is formed with a hollow inside and an outer peripheral portion so as to surround the capacitor element 31, and a refrigerant 30 is formed. A liquid-cooled electrolytic capacitor that passes through, is placed close to the resin package 5, and is connected to the positive electrode side conductor 21 and the negative electrode side conductor 22 and the connection screw 27.
Electrically connect to. The other structure is similar to that of the above-described embodiment. In the inverter device configured as shown in FIG. 7, the capacitor element 31 is cooled more efficiently than in the fourth embodiment.
【００４６】（第６の実施の形態）次に、本発明の第６
の実施の形態を、図８を参照して説明する。図８は、本
発明の第６の実施の形態であるインバータ装置の縦断面
図である。(Sixth Embodiment) Next, the sixth embodiment of the present invention will be described.
The embodiment will be described with reference to FIG. FIG. 8 is a vertical sectional view of an inverter device according to a sixth embodiment of the present invention.
【００４７】図８において、インバータ装置は、直流電
源平滑用コンデンサをセラミックコンデンサ２０Ｄと
し、内部が中空で冷媒流路１９が構成されている液冷式
冷却器１２に絶緑シート３２を介して取付け、樹脂製パ
ッケージ５に近接配置し正極側導体２１及び負極側導体
２２と接続ねじ２７により電気的に接続する。その他の
構造は、上述した実施の形態と同様である。In FIG. 8, in the inverter device, a DC power supply smoothing capacitor is a ceramic capacitor 20D, and it is attached to a liquid-cooled cooler 12 having a hollow interior and a refrigerant passageway 19 through a green sheet 32. , Is arranged close to the resin package 5 and is electrically connected to the positive electrode side conductor 21 and the negative electrode side conductor 22 by the connection screw 27. The other structure is similar to that of the above-described embodiment.
【００４８】図８のように構成されたインバータ装置に
おいては、電源平滑用コンデンサに同一容量で比較して
電解コンデンサよりも体積が小さいセラミックコンデン
サ２０Ｄを用いているので、樹脂製パッケージ５のより
近くに配置でき配線インダクタンスがより小さくなる。In the inverter device constructed as shown in FIG. 8, since the ceramic capacitor 20D having the same capacity and smaller in volume than the electrolytic capacitor is used as the power source smoothing capacitor, it is closer to the resin package 5. The wiring inductance can be reduced.
【００４９】[0049]
【発明の効果】以上説明したように、本発明によれば、
半導体装置及びインバータ装置において冷却効率を向上
させることができると共に、小型化することができる。
また、インバータ装置において、半導体装置の損失が低
減するので、スナバ回路を削減できる。As described above, according to the present invention,
In the semiconductor device and the inverter device, the cooling efficiency can be improved and the size can be reduced.
Further, in the inverter device, the loss of the semiconductor device is reduced, so that the snubber circuit can be reduced.
【図１】 本発明の第１の実施の形態である半導体装
置を示す縦断面図。FIG. 1 is a vertical sectional view showing a semiconductor device according to a first embodiment of the present invention.
【図２】 本発明の第１の実施の形態である半導体装
置を示す水平断面図。FIG. 2 is a horizontal cross-sectional view showing the semiconductor device according to the first embodiment of the present invention.
【図３】 本発明の第１の実施の形態であるインバー
タ装置を示す回路図。FIG. 3 is a circuit diagram showing an inverter device according to a first embodiment of the present invention.
【図４】 本発明の第２の実施の形態であるインバー
タ装置を示す縦断面図。FIG. 4 is a vertical sectional view showing an inverter device according to a second embodiment of the present invention.
【図５】 本発明の第３の実施の形態であるインバー
タ装置を示す縦断面図。FIG. 5 is a vertical sectional view showing an inverter device according to a third embodiment of the present invention.
【図６】 本発明の第４の実施の形態であるインバー
タ装置を示す縦断面図。FIG. 6 is a vertical sectional view showing an inverter device according to a fourth embodiment of the present invention.
【図７】 本発明の第５の実施の形態であるインバー
タ装置を示す縦断面図。FIG. 7 is a vertical sectional view showing an inverter device according to a fifth embodiment of the present invention.
【図８】 本発明の第６の実施の形態であるインバー
タ装置を示す縦断面図。FIG. 8 is a vertical sectional view showing an inverter device according to a sixth embodiment of the present invention.
【図９】 従来の半導体装置の縦断面図。FIG. 9 is a vertical cross-sectional view of a conventional semiconductor device.
【図１０】 従来の電力用半導体装置の冷却器への搭載
図。FIG. 10 is a diagram showing how a conventional power semiconductor device is mounted on a cooler.
２：絶縁基板、３：金属電極、４１〜４６：半導体チッ
プ、５：樹脂製パッケージ、１０：電力用半導体装置、
１２：冷却器、１３１〜１３６：半導体チップ、１４１
〜１４４：緩衝板、１５：絶縁物、１６：第１の幅広導
体、１７：第２の幅広導体、１８：ゲートリード、１
９：冷媒流路、２０：電源平滑用コンデンサ、２０Ａ：
電解コンデンサ、２０Ｂ：液冷式電解コンデンサ、２０
Ｃ：液冷式電解コンデンサ、２０Ｄ：セラミックコンデ
ンサ、２１：正極側導体、２２：負極側導体、２４〜２
６：３相出力導体、２９：駆動／制御回路、３０：冷
媒、３１：コンデンサ素子、３２：絶縁シート2: Insulating substrate, 3: Metal electrodes, 41 to 46: Semiconductor chip, 5: Resin package, 10: Power semiconductor device,
12: cooler, 131-136: semiconductor chip, 141
To 144: buffer plate, 15: insulator, 16: first wide conductor, 17: second wide conductor, 18: gate lead, 1
9: Refrigerant flow path, 20: Power source smoothing capacitor, 20A:
Electrolytic capacitor, 20B: Liquid-cooled electrolytic capacitor, 20
C: Liquid-cooled electrolytic capacitor, 20D: Ceramic capacitor, 21: Positive electrode side conductor, 22: Negative electrode side conductor, 24-2
6: three-phase output conductor, 29: drive / control circuit, 30: refrigerant, 31: capacitor element, 32: insulating sheet
───────────────────────────────────────────────────── フロントページの続き (51)Int.Cl.7 識別記号 ＦＩ Ｈ０２Ｍ 7/48 (56)参考文献 特開 平７−231071（ＪＰ，Ａ) 特開 平９−275170（ＪＰ，Ａ) 特開 平９−8224（ＪＰ，Ａ) 特開 平11−297906（ＪＰ，Ａ) 特開2001−35982（ＪＰ，Ａ) 特開 平９−36186（ＪＰ，Ａ) 特開2001−36001（ＪＰ，Ａ) 特開2000−77587（ＪＰ，Ａ) 特開 平11−274001（ＪＰ，Ａ) 実開 昭57−55946（ＪＰ，Ｕ) 実開 平３−50316（ＪＰ，Ｕ) (58)調査した分野(Int.Cl.7，ＤＢ名) H01G 2/08 H01G 9/00 H01L 23/473 H01L 25/07 H02M 7/48 ─────────────────────────────────────────────────── ─── Continuation of the front page (51) Int.Cl. 7 Identification code FI H02M 7/48 (56) References JP-A-7-231071 (JP, A) JP-A 9-275170 (JP, A) Special Kaihei 9-8224 (JP, A) JP 11-297906 (JP, A) JP 2001-35982 (JP, A) JP 9-36186 (JP, A) JP 2001-36001 (JP, A) JP 2000-77587 (JP, A) JP 11-274001 (JP, A) Actual exploitation Sho 57-55946 (JP, U) Actual exploitation 3-50316 (JP, U) (58) Field (Int.Cl. 7 , DB name) H01G 2/08 H01G 9/00 H01L 23/473 H01L 25/07 H02M 7/48
Claims (5)
液冷式冷却器と、この液冷式冷却器に接合された絶縁基
板と、この絶縁基板に接合された金属電極と、この金属
電極に接合された複数の半導体チップと、この複数の半
導体チップを電気的に接続する幅広導体と、前記半導体
チップと前記絶縁基板と前記金属電極と前記幅広導体と
を収納する絶縁性を有する樹脂製パッケージとを具備し
たことを特徴とする半導体装置。1. A liquid-cooled cooler having a hollow structure through which a refrigerant passes, an insulating substrate joined to this liquid-cooled cooler, a metal electrode joined to this insulating substrate, and this metal electrode. a plurality of semiconductor chips bonded to, the plurality of half
A wide conductor for electrically connecting the conductor chips, a resin package having an insulating property for housing the semiconductor chip, the insulating substrate, the metal electrode, and the wide conductor , Semiconductor device.
平滑用コンデンサと、直流電源と半導体装置を接続する
正極側導体及び負極側導体と、前記半導体装置を駆動制
御する制御回路とを有したインバータ装置において、 前記半導体装置は、冷媒が通るように中空構造を形成し
た液冷式冷却器と、この液冷式冷却器に接合された絶縁
基板と、この絶縁基板に接合された金属電極と、この金
属電極に接合された複数の半導体チップと、この複数の
半導体チップを電気的に接続する幅広導体と、前記半導
体チップと前記絶縁基板と前記金属電極と前記幅広導体
とを収納する絶縁性を有する樹脂製パッケージとを具備
したことを特徴とするインバータ装置。 2. A DC power supply, a semiconductor device, and a DC power supply.
Connect smoothing capacitor, DC power supply and semiconductor device
Drive control of the positive and negative conductors and the semiconductor device.
In the inverter device having a control circuit for controlling the semiconductor device, the semiconductor device has a hollow structure through which a refrigerant passes.
Liquid cooled cooler and insulation bonded to this liquid cooled cooler
The substrate, the metal electrodes bonded to this insulating substrate, and the gold
A plurality of semiconductor chips bonded to the metal electrode,
A wide conductor for electrically connecting a semiconductor chip and the semiconductor
Body chip, the insulating substrate, the metal electrode, and the wide conductor
And a resin package having an insulating property for housing
An inverter device characterized by the above.
平滑用コンデンサと、直流電源と半導体装置を接続する
正極側導体及び負極側導体と、前記半導体装置を駆動制
御する制御回路とを有したインバータ装置において、 前記直流電源平滑用コンデンサを電解コンデンサとし、
且つその内部が中空で冷媒が通る液冷式コンデンサと
し、前記半導体装置に近接配置し前記正極側導体および
負極側導体と電気的に接続したことを特徴とするインバ
ータ装置。 3. A DC power supply, a semiconductor device, and a DC power supply
Connect smoothing capacitor, DC power supply and semiconductor device
Drive control of the positive and negative conductors and the semiconductor device.
In an inverter device having a control circuit to control, the DC power supply smoothing capacitor is an electrolytic capacitor,
And a liquid-cooled condenser whose inside is hollow and through which the refrigerant passes
And is disposed close to the semiconductor device, and the positive electrode side conductor and
Inverter characterized by being electrically connected to the negative electrode side conductor
Data device.
平滑用コンデンサと、直流電源と半導体装置を接続する
正極側導体及び負極側導体と、前記半導体装置を駆動制
御する制御回路とを有したインバータ装置において、 前記直流電源平滑用コンデンサを電解コンデンサとし、
且つ内部が中空で冷媒が通り、更にその外周部も中空で
冷媒が通る液冷式コンデンサとし、前記半導体装置に近
接配置し、前記正極側導体及び負極側導体と電気的に接
続したことを特徴とするインバータ装置。 4. A DC power supply, a semiconductor device, and a DC power supply.
Connect smoothing capacitor, DC power supply and semiconductor device
Drive control of the positive and negative conductors and the semiconductor device.
In an inverter device having a control circuit to control, the DC power supply smoothing capacitor is an electrolytic capacitor,
In addition, the inside is hollow and the refrigerant passes through, and the outer periphery is also hollow.
A liquid-cooled condenser through which a refrigerant passes
Placed in contact with each other and electrically connected to the positive electrode side conductor and the negative electrode side conductor.
Inverter device characterized by continuing.
平滑用コンデンサと、直流電源と半導体装置を接続する
正極側導体及び負極側導体と、前記半導体装置を駆動制
御する制御回路とを有したインバータ装置において、 前記直流電源平滑用コンデンサをセラミックコンデンサ
とし、液冷式冷却器に絶縁シートを介して取付け、前記
半導体装置に近接配置し、前記正極側導体及び負極側導
体と電気的に接続したことを特徴とするインバータ装
置。 5. A DC power supply, a semiconductor device, and a DC power supply
Connect smoothing capacitor, DC power supply and semiconductor device
Drive control of the positive and negative conductors and the semiconductor device.
In the inverter device having a control circuit, the DC power supply smoothing capacitor is a ceramic capacitor.
And attach it to the liquid-cooled cooler via an insulating sheet.
It is placed close to the semiconductor device, and the positive electrode side conductor and the negative electrode side conductor are arranged.
Inverter device characterized by being electrically connected to the body
Place
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP24947699A JP3529675B2 (en) | 1999-09-03 | 1999-09-03 | Semiconductor device and inverter device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP24947699A JP3529675B2 (en) | 1999-09-03 | 1999-09-03 | Semiconductor device and inverter device |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JP2001077260A JP2001077260A (en) | 2001-03-23 |
| JP3529675B2 true JP3529675B2 (en) | 2004-05-24 |
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ID=17193542
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|---|---|---|---|
| JP24947699A Expired - Fee Related JP3529675B2 (en) | 1999-09-03 | 1999-09-03 | Semiconductor device and inverter device |
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| JP (1) | JP3529675B2 (en) |
Families Citing this family (11)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP3641232B2 (en) * | 2001-11-13 | 2005-04-20 | 本田技研工業株式会社 | Inverter device and manufacturing method thereof |
| JP4161589B2 (en) * | 2002-02-20 | 2008-10-08 | 株式会社日立製作所 | Low voltage capacitor |
| JP2005094842A (en) * | 2003-09-12 | 2005-04-07 | Toshiba Corp | Inverter arrangement and manufacturing method thereof |
| JP4674482B2 (en) * | 2005-03-28 | 2011-04-20 | パナソニック電工株式会社 | Power converter |
| JP2006318953A (en) * | 2005-05-10 | 2006-11-24 | Toyota Industries Corp | Terminal connection structure of semiconductor device |
| JP2008209341A (en) | 2007-02-28 | 2008-09-11 | Nippon Seiki Co Ltd | Pointer-type meter |
| JP4697475B2 (en) | 2007-05-21 | 2011-06-08 | トヨタ自動車株式会社 | Power module cooler and power module |
| JP5212088B2 (en) * | 2008-12-25 | 2013-06-19 | 株式会社デンソー | Semiconductor module cooling device |
| JP5017332B2 (en) * | 2009-08-24 | 2012-09-05 | 株式会社日立製作所 | Inverter |
| CN105849903B (en) * | 2013-12-24 | 2018-05-18 | 三菱电机株式会社 | Power inverter and power module |
| JP2016115900A (en) * | 2014-12-18 | 2016-06-23 | 三菱電機株式会社 | Semiconductor module and semiconductor device |
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1999
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