JP3528664B2 - Driving method of plasma display panel - Google Patents

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a driving method of a plasma display panel used for displaying images in computers and televisions.

[0002]

2. Description of the Related Art In recent years, it has been desired to increase the size of image display devices such as computer displays and televisions. Along with this, plasma display panels (hereinafter abbreviated as PDP) are used as thin and lightweight displays.
In the high-definition television that is currently being put into practical use, the number of pixels is 1920 with full specifications.
It has a high definition of × 1080, but like other displays, a driving technique capable of coping with such a high-definition display is desired in PDPs.

A conventional PDP generally has a structure as shown in FIG. In the figure, a strip-shaped scan electrode group 19a and a strip-shaped sustain electrode group 19 are provided on the front substrate 11.
b, the electrode groups 19a and 19b are covered with a dielectric glass layer 17 made of lead glass or the like, and the surface of the dielectric glass layer 17 is a protective layer 18 made of a MgO vapor deposition film or the like.
Is covered with.

A band-shaped data electrode group 1 is formed on the rear substrate 12.
4 and an insulating layer 13 made of lead glass or the like for covering the surface are provided, and partition walls 15 are provided thereon. The front substrate 11 and the rear substrate 12 are combined so that their electrode groups are orthogonal to each other. The partition wall 15 is adhered to the rear substrate 12 and is in contact with the front substrate 11. The front substrate 11 and the rear substrate 12 face each other and are sealed in parallel with each other by the partition wall 15 at intervals of about 100 to 200 μm.

By selectively applying a voltage between the electrode groups 19a and 19b on the front substrate 11 and the data electrode group 14 on the rear substrate 12, the electric charges generated by the gas discharge at the intersections of the selected electrodes are removed. By accumulating on the dielectric glass insulating film 17 and scanning the electrode to which a voltage is applied, 1
After the address operation of accumulating the information of pixels for the screen, the discharge cells selected in the address operation are simultaneously performed by the sustain discharge operation of applying the AC pulse voltage between the electrode group 19a and the electrode group 19b on the front substrate 11. The image is displayed by emitting light. Since the discharge occurs in the front substrate 11, the rear substrate 12, and the space separated by the partition wall 15, the emitted light does not diffuse. That is, the partition wall 15 has the purpose of defining the distance between the front substrate 11 and the rear substrate 12 and the purpose of performing high-resolution display.

Further, in the case of color display, the phosphor 16 is applied to the peripheral portion of the discharge space which is blocked by the barrier ribs. Since the phosphor is performed by converting the ultraviolet rays generated by the discharge into visible light, the phosphors of the three primary colors red (R), green (G), and blue (B) are used, and the emission intensity by each is changed. With proper adjustment, color display is possible.

As the discharge gas, in the case of a single color display, a mixed gas centered on neon, which emits light in the visible range during discharge, and in the case of a color display, the emission light during discharge is in the ultraviolet range. A mixed gas centered on xenon is selected. As for gas pressure, assuming the use of PDP under atmospheric pressure,
In order to reduce the pressure inside the substrate against the external pressure, normally 2
It is set in the range of about 00 Torr to 500 Torr. FIG. 7 shows an electrode matrix diagram of a conventional PDP.

Next, a conventional PDP driving method will be described with reference to FIG. In FIG. 8, first, an initialization pulse is applied to the scan electrode groups 19a1 to 19aN to initialize the wall charges in the discharge cells of the panel. At this time, a ramp waveform having a slope in a part of the rising edge and a part of the falling edge of the reset pulse is used to initialize by a weak discharge, thereby suppressing unnecessary light emission and improving the contrast ratio. It was

Next, a scan pulse is applied to the first electrode 19a1 of the scan electrode group 19a, and a write pulse is applied simultaneously to the lines 141 to 14M corresponding to the discharge cells of the data electrode group 44 for displaying, thereby performing write discharge and dielectric. Wall charges are accumulated on the surface of the body layer.

Next, the second line electrode 1 of the electrode group 19a
A scanning pulse is applied to 9a2, and a writing pulse is applied simultaneously to the lines 141 to 14M corresponding to the discharge cells for displaying the data electrode group 14 to perform writing discharge and accumulate wall charges on the surface of the dielectric layer. Then, a latent image for one screen is written by sequentially accumulating wall charges corresponding to cells to be displayed by the same continuous scanning on the surface of the dielectric layer.

Next, in order to perform the sustain discharge, the data electrode group 14 is grounded, and the sustain pulse is alternately applied to the scan electrode group 19a and the sustain electrode group 19b.
In a cell in which wall charges are accumulated on the surface of the dielectric layer, discharge occurs when the potential on the dielectric surface exceeds the discharge start voltage, and the sustain pulse is applied (sustain period) Display selected by the write pulse The main discharge of the cell is maintained. After that, by applying an erasing pulse having a narrow width, incomplete discharge occurs and wall charges disappear, so that erasing is performed.

Thus, in the conventional PDP driving method,
The display is performed by a series of sequences including an initialization period, a writing period, a sustaining period, and an erasing period.

When displaying a television image, in the NTSC system, the image is composed of 60 frames per second. Originally, a plasma display panel can express only two gradations of lighting or extinguishing, so in order to display an intermediate color, the lighting time of each color of red (R), green (G), and blue (B) is time-divided, A method is used in which one frame is divided into several sub-fields and the combination thereof is used to express an intermediate color.

FIG. 9 shows a subfield division method for expressing 256 gradations of each color in a conventional plasma display panel. The ratio of the number of sustain pulses applied during the sustain period of each subfield is 1, 2, 4, 8, 1
Binary weighting such as 6, 32, 64, and 128 is performed, and 256 gradations are expressed by the combination of 8 bits.

[0015]

However, in the above-mentioned conventional driving method, the address period is increased due to the increase in the number of scanning lines accompanying the high definition, and the address pulse is shortened and the address pulse is shortened in order to secure a necessary subfield. Although it is indispensable to speed up the drive waveform by shortening the initialization period, address failure due to a decrease in write discharge probability due to a shortened address pulse, and increase in initialization discharge light emission due to a shortened initialization period, that is, a decrease in contrast ratio. That is, there is a very big problem that the image quality is remarkably deteriorated.

In order to solve this, it is necessary to set the voltage of the driving pulse in each sequence to an optimum value, but in the conventional driving method, the voltage Vset1 of the first stage of the initialization pulse prior to the writing period is set. Since the voltage Vaddsus applied to the sustain electrode during the write period and the voltage Ver applied to the sustain electrode during the erase period are all supplied from the same power supply as the sustain voltage Vsus applied to the discharge cell during the sustain period. In addition, Vset1 = Vaddsus = Ver =
In the panel of Vsus, which has a different optimum drive voltage range in each sequence, the drive voltage margin becomes very narrow and the operation becomes unstable, so that there is a very serious problem that the display image quality is significantly deteriorated. It was

The present invention solves the above-mentioned conventional problems. By setting the optimum drive voltage in each sequence of the drive waveform, the drive voltage margin is widened even in the panel in which the optimum drive voltage range is different, and the discharge is performed. An object of the present invention is to provide a high-definition and high-quality PDP by drastically improving screen flickering and roughness due to defective writing and reduction of discharge probability in the first pulse of the sustain period by suppressing the delay to speed up driving. And

[0018]

In order to achieve the above object, the present invention provides a first panel substrate in which a first panel substrate and a second panel substrate are arranged in parallel with each other with a gap therebetween and which face the second panel substrate. A state in which a first electrode group including a plurality of electrode branches covered with a dielectric layer and a second electrode group including a plurality of electrode branches are adjacent to each other in parallel on the surface of the panel substrate of And a third electrode group including a plurality of electrode branches covered with a dielectric layer and arranged in a direction orthogonal to the first electrode group on the surface of the second panel substrate facing the first panel. And the gap is divided by a group of barrier ribs, and for a plasma display panel in which phosphors are disposed between the barrier ribs, a setup period, an address period, and a discharge sustain period for each subfield. In-field time division gray scale display system Therefore, in the driving method of the plasma display panel to be driven, a setup unit for applying a pulse voltage to the first electrode group to set up, and a pulse voltage is sequentially applied to the first electrode group while the third electrode group is operated. A pulse voltage is applied to a selected electrode in the inside of the dielectric layer to apply a pulse voltage between the first electrode group and the second electrode, and the address portion for accumulating wall charges at the selected location. The discharge maintaining unit for maintaining discharge and the erasing unit for applying a pulse voltage between the first electrode group and the second electrode to stop the discharge are provided, and the pulse waveform applied by the setup unit is the discharge maintaining unit. In the above, after the voltage Vst1 applied between the first electrode group and the second electrode is equal to or higher than the pulse voltage Vsus and lower than the discharge start voltage V1 for 10 μsec or less, the discharge is started at a gradient of 9 V / μsec or less. A period in which the voltage is raised to a voltage Vst2 that is equal to or higher than the start voltage V1 and then V
After lowering to st1 or less to 10μsec or less, 9 to 0V
100-250μ to be lowered at an inclination of V / μsec or less
and a drive waveform in which the setup period is set to 360 μsec or less.

Further, the falling portion of the pulse waveform applied in the setup section is lowered from Vst2 to Vsus at a time of 10 μsec or less and then to 0 V at a gradient of 9 V / μsec or less 100 to 250 μsec.
And a drive waveform whose setup period is set to 360 μsec or less.

Further, according to the present invention, the first and second panel substrates are arranged in parallel with each other with a gap, and a dielectric is formed on the surface of the first panel substrate facing the second panel substrate. A first electrode group composed of a plurality of electrode branches covered with a body layer and a second electrode group composed of a plurality of electrode branches are arranged with their electrode branches adjacent to each other in parallel, On the surface of the opposing second panel substrate, the first panel is covered with a dielectric layer.
Plasma in which a third electrode group including a plurality of electrode branches arranged in a direction orthogonal to the electrode group is disposed, the gap is partitioned by a partition group, and a phosphor is disposed between the partition walls. A driving method of a plasma display panel, wherein the display panel is driven by an in-field time division gray scale display method having a setup period, an address period, and a discharge sustain period for each subfield, wherein a pulse is applied to the first electrode group. A setup unit for applying a voltage to set up and a pulse voltage is sequentially applied to the first electrode group, and a pulse voltage is applied to a selected electrode in the third electrode group to select the dielectric layer. An address part for accumulating wall charges at a location, a discharge sustaining part for maintaining a discharge by applying a pulse voltage between the first electrode group and the second electrode, a first electrode group and a second electrode. And an erasing section for applying a pulse voltage to stop the discharge, and the pulse waveform applied in the setup section is a pulse voltage applied between the first electrode group and the second electrode in the discharge maintaining section. Is raised to Vst1 which has the same potential as Vsus, and then 4V / μsec or more and 15V / μse to a voltage Vst2 that is less than the discharge start voltage V1.
After rising at a slope of c or less, at a slope of less than 4 V / μsec, a section in which the voltage is raised to a voltage Vst3 that is equal to or higher than the discharge start voltage V1 and then dropped to 10 μsec or less to Vst1 and then 0 V to 9 V / μsec or less. And a drive waveform in which the setup period is set to 360 μsec or less.

Further, the falling portion of the pulse waveform applied in the setup section is lowered from Vst2 to Vsus in a time of 10 μsec or less, and then (V1-Vsus) with a gradient of 4 V / μsec or more and 15 V / μsec or less. After being lowered, the driving waveform has a slope of less than 4 V / μsec and a period of 100 to 250 μsec in which it is lowered to 0 V, and the setup period is set to 360 μsec or less.

[0022]

BEST MODE FOR CARRYING OUT THE INVENTION Embodiments of the present invention will be described below with reference to FIGS. PD used in the present invention
The structure of the P panel is the same as the conventional one. The change of the light emission efficiency depending on the driving waveform was driven by various waveforms by amplifying the output of the arbitrary waveform generator by the high-speed high-voltage amplifier and applying it to the discharge cell of the PDP.
At the same time, the emission peak waveform was observed using the photodiode PD. The contrast ratio was measured by lighting a part of the panel in white in a dark room and measuring the brightness ratio between the dark part and the bright part.

Specific drive waveforms will be described below with reference to the drawings (Embodiment 1). FIG. 1 is a timing chart showing a drive method according to Embodiment 1 of the present invention. The difference from the conventional PDP driving method is that the voltage Vst1 of the first stage is set to Vsus <Vst1 <V1 at the rising portion of the initialization pulse.
By setting the voltage higher than the sustain voltage Vsus applied to the discharge cells in the sustain period, the voltage rising period T1 due to the subsequent gradual slope to Vst2 is shortened to shorten the initialization period, and yet the initialization is performed. It is to drive by independent voltage for the period and the sustain period.

In the conventional driving method, Vst1 and Vsus
Are set to the same voltage, Vst must be set in order to perform high-contrast and sufficient initialization within a limited initialization period.
As shown in FIG. 2, when the voltage is increased, discharge is generated at the trailing edge of the pulse because the overvoltage is applied in the sustain period, and the wall voltage necessary to maintain the discharge in the next pulse is wasted. Due to self-erasing discharge, the discharge is not maintained stably and proper driving cannot be performed.

When Vsus is lowered to suppress the self-erasing discharge in the sustain period as described above, Vst1 is lowered, and time T1 for raising the voltage to Vst2 necessary for initialization is increased. Will increase. If the rate of increase of the voltage from Vst1 to Vst2 is increased in order to suppress the increase in the initialization period, the light emission due to the initialization discharge increases and the contrast ratio significantly decreases as shown in (Table 1).

[0026]

[Table 1]

As described above, in the conventional driving method, the optimum driving voltage range, that is, the driving margin is very narrow.

FIG. 3 shows a drive voltage waveform V and a light emission peak waveform L detected by a photodiode during a sustain period when driving is performed using the driving method according to the first embodiment of the present invention.
The time-axis trace of is shown.

From these figures, it is possible to suppress the occurrence of self-erasing discharge in the sustain period by driving Vst1 and Vsus with independent voltages, and since Vst1 can be set high, Vst2 can be set without extending the initialization period. It can be seen that sufficient initialization can be realized because the voltage can be increased with a gentle slope.

Table 2 shows a comparison of the contrast ratio and the Vsus margin when the conventional driving method and the driving method according to the first embodiment are used.

[0031]

[Table 2]

Although the Vsus margin, which has been only about 4V in the past, is expanded to 18V, which is 4.5 times as large as the driving method according to the first embodiment, it is increased.
The contrast is kept the same as before without lowering.

As is apparent from the above, the PDP driving method according to the first embodiment suppresses the self-erase discharge in the sustain period without extending the reset period and increasing the light emission due to the reset discharge. In addition, it is possible to realize a very excellent PDP in that the contrast is high and the operation margin is significantly improved.

In the first embodiment, as the drive circuit for driving the PDP, the method of applying the drive waveform obtained by voltage-amplifying the output of the arbitrary waveform generator by the high-speed high-voltage amplifier to each electrode is used. Is not limited to
A ramp pulse generator circuit that uses a Miller integrator circuit can be grounded in a floating manner to generate an initialization pulse waveform by a voltage addition method and a rectangular pulse generator circuit that generates a sustain pulse. It goes without saying that excellent image quality can be achieved.

The falling portion of the initialization waveform is V
After decreasing from st2 to Vsus in a time of 10 μsec or less, decrease to 0V with a slope of 9 V / μsec or less 1
And a section of 00 to 250 μsec,
It goes without saying that the same excellent image quality can be realized by the method using the drive waveform in which the setup period is set to 360 μsec or less.

(Second Embodiment) FIG. 4 is a timing chart of drive waveforms according to the second embodiment of the present invention. The difference from the first embodiment is that after rising to Vst1 which has the same potential as Vsus at the rising portion of the initialization pulse,
After rising up to a voltage Vst2 lower than the discharge start voltage V1 with a slope of 4 V / μsec or more and 15 V / μsec or less, 4
By increasing the voltage to the voltage Vst3 that is equal to or higher than the discharge start voltage V1 with a slope of less than V / μsec, the time until the initializing discharge starts is shortened, and the discharge start voltage V1
That is, it is possible to set the voltage increase speed in the vicinity more gently.

In the conventional driving method, if the voltage rising speed near V1 is made slow, the initialization period increases, and it is impossible to sufficiently speed up the driving by pressing other sequences.

Further, in the driving method of the first embodiment, Vst1 can be set independently of Vsus, so that by increasing Vst1 to a higher voltage than before, it is possible to moderate the rate of increase in voltage near V1. However, if the voltage is increased to about 350 V in one step, erroneous discharge is likely to occur depending on the variation of the discharge cells in the panel, and the image quality is deteriorated.

In order to raise the voltage to about 350 V in one step, the power M with a very high breakdown voltage and a high slew rate is used.
The OSFET is required, which increases the cost of the drive circuit.

FIG. 5 shows a driving voltage waveform V and a light emission peak waveform L detected by the photodiode during the sustain period when driving is performed using the driving method according to the second embodiment of the present invention.
The time-axis trace of is shown.

From these figures, it is possible to suppress the occurrence of self-erase discharge during the sustain period by driving with an initialization waveform having a two-step slope from Vst1 and to increase the vicinity of V1 without increasing the initialization period. It can be seen that it is possible to further suppress the light emission due to the initializing discharge by further slowing the rate of increase in voltage at.

Table 3 shows a comparison of the initialization time, the contrast ratio and the Vsus margin when the conventional driving method and the driving method according to the second embodiment are used.

[0043]

[Table 3]

Although the time required for initialization is shortened by using the driving method according to the second embodiment, the contrast ratio is improved to about 1.5 times and the Vsus margin is also 4.5. Has been doubled.

As is apparent from the above, the driving method of the PDP according to the second embodiment solves the conflicting problems of shortening the initialization period and improving the contrast ratio, and further increases the driving voltage margin in the sustain period. As a result, stable driving becomes possible, and a very high-definition PDP can be realized in that the deterioration of the image quality caused by the speeding up of the driving pulse accompanying the high definition is remarkably improved.

In the second embodiment, as the drive circuit for driving the PDP, the method of applying the drive waveform obtained by voltage-amplifying the output of the arbitrary waveform generator by the high-speed high-voltage amplifier to each electrode is used. Is not limited to
Floating the ground of the ramp waveform generating circuit using the Miller integrating circuit with different time constants,
It is needless to say that similarly excellent image quality can be realized by a method of generating and driving an initialization pulse waveform having a ramp waveform from Vst1 to Vst3 having the same voltage as Vsus with a two-step voltage rising speed by the voltage addition method.

The falling portion of the initialization waveform is V
After descending from st2 to Vsus in a time of 10 μsec or less, then descending to (V1-Vsus) at an inclination of 4 V / μsec or more and 15 V / μsec or less, then 4 V / μsec
100-250 μs with a slope of less than 0 V
It goes without saying that the same excellent image quality can be realized by a method using a drive waveform having a section of ec and having a setup period of 360 μsec or less.

[0048]

As described above, the present invention is unnecessary by using a pulse waveform having at least two stages of slope for the initialization pulse in the setup period and setting the voltage value independent of the drive voltage in the sustain period. It is possible to suppress light emission due to various discharges, shorten the setup period, and set the optimum drive voltage in each period. By suppressing the discharge delay and suppressing writing defects, it is possible to achieve high definition and very high image quality. The remarkable effect of realizing the PDP is obtained.

[Brief description of drawings]

FIG. 1 is a timing chart of a driving method of a plasma display panel according to a first embodiment of the present invention.

FIG. 2 is a diagram showing a time axis trace of a drive voltage waveform V and a light emission peak L during a conventional sustain period.

FIG. 3 is a characteristic diagram showing a time-axis trace of a drive voltage waveform V and a light emission peak L in a sustain period according to the driving method of the plasma display panel in the first embodiment.

FIG. 4 is a timing chart of a plasma display panel driving method according to a second embodiment of the present invention.

FIG. 5 is a characteristic diagram showing a time-axis trace of a drive voltage waveform V and a light emission peak L in a sustain period according to the plasma display panel drive method of the second embodiment.

FIG. 6 is a schematic diagram showing a configuration of a conventional plasma display panel.

FIG. 7 is an electrode matrix diagram of a conventional plasma display panel.

FIG. 8 is a timing chart of a driving method of a conventional plasma display panel.

FIG. 9 is a schematic view of a subfield of a conventional plasma display panel driving method.

[Explanation of symbols]

11 Front substrate 12 Back substrate 13 Insulator layer 14 Data electrode group 15 partitions 16 Phosphor 17 Dielectric glass layer 18 Protective film 19a electrode group 19b electrode group

─────────────────────────────────────────────────── ─── Continuation of front page (51) Int.Cl. ⁷ Identification code FI G09G 3/28 B J (56) References JP-A-9-237580 (JP, A) JP-A-8-212930 (JP, A) ) JP 63-192092 (JP, A) JP 2000-75835 (JP, A) JP 10-301529 (JP, A) JP 10-91116 (JP, A) JP 3394010 (JP, B2) ) (58) Fields investigated (Int.Cl. ⁷ , DB name) G09G 3/28 G09G 3/20 621 G09G 3/20 641 G09G 3/20 642 G09G 3/288

Claims (4)

(57) [Claims] 1. A first panel substrate and a second panel substrate are arranged in parallel with each other with a gap therebetween, and a dielectric is provided on a surface of the first panel substrate facing the second panel substrate. A first electrode group composed of a plurality of electrode branches covered with a body layer and a second electrode group composed of a plurality of electrode branches are arranged with the electrode branches adjacent to each other in parallel, and the first panel substrate A third electrode group composed of a plurality of electrode branches covered with a dielectric layer and arranged in a direction orthogonal to the first electrode group is arranged on the surface of the second panel substrate facing the second panel substrate, and the gap is , A time division gray scale within a field having a setup period, an address period and a discharge sustain period for each subfield for a plasma display panel which is partitioned by a group of barrier ribs and phosphors are arranged between the barrier ribs. Plastic driven by display method A method for driving a display panel, comprising: a setup unit configured to apply a pulse voltage to the first electrode group to set up; and a selection from the third electrode group while sequentially applying the pulse voltage to the first electrode group. A pulse voltage is applied to the selected electrode to apply the pulse voltage between the first electrode group and the second electrode, and the address portion for accumulating the wall charges at the selected location of the dielectric layer to maintain the discharge. A discharge sustaining section to perform,
There is an erasing unit that applies a pulse voltage between the first electrode group and the second electrode to stop the discharge, and the pulse waveform applied by the setup unit is the first electrode group and the second electrode in the discharge maintaining unit. A voltage Vst1 that is not less than the pulse voltage Vsus and less than the discharge start voltage V1 applied between
Up to 10Vsec and then 9V
/ Μsec or less, a section in which the voltage rises to the voltage Vst2 that is equal to or higher than the discharge start voltage V1 and then 10μ until Vst1
and a period of 100 to 250 μsec in which the voltage is lowered at a time of sec or less and then to 0 V at an inclination of 9 V / μsec or less, and the setup period is 3
A method of driving a plasma display panel, which is set to 60 μsec or less. 2. A trailing portion of a pulse waveform applied by the setup section includes a section from 100 to 250 .mu.sec which is lowered from Vst2 to Vsus at a time of 10 .mu.sec or less and then to 0 V at an inclination of 9 V / .mu.sec or less. Having a setup period of 360 μs
The driving method of the plasma display panel according to claim 1, wherein the driving speed is set to ec or less. 3. A first panel substrate and a second panel substrate are arranged in parallel with each other with a gap therebetween, and a dielectric is formed on a surface of the first panel substrate facing the second panel substrate. A first electrode group composed of a plurality of electrode branches covered with a body layer and a second electrode group composed of a plurality of electrode branches are arranged with their electrode branches adjacent to each other in parallel, A third electrode group including a plurality of electrode branches covered with a dielectric layer and arranged in a direction orthogonal to the first electrode group is arranged on the surface of the facing second panel substrate, and the gap is a partition wall. For a plasma display panel which is divided into groups and in which a phosphor is arranged between the barriers, an in-field time division gray scale display method having a setup period, an address period and a discharge sustain period for each subfield is used. Plasma Displacement A method for driving a lay panel, comprising: a setup unit configured to apply a pulse voltage to the first electrode group to set up; a pulse voltage is sequentially applied to the first electrode group while being selected from a third electrode group. Discharge in which a pulse voltage is applied between the first electrode group and the second electrode by applying a pulse voltage to the electrodes to accumulate wall charges at a selected location of the dielectric layer Maintenance department,
There is an erasing unit that applies a pulse voltage between the first electrode group and the second electrode to stop the discharge, and the pulse waveform applied by the setup unit is the first electrode group and the second electrode in the discharge maintaining unit. 4 V / μse up to a voltage Vst2 lower than the discharge start voltage V1 after the pulse voltage applied between the voltage rises to Vst1 which is the same potential as Vsus.
After rising at a slope of c or more and 15 V / μsec or less, at a slope of 4 V / μsec or less, a section in which the voltage is raised to a voltage Vst3 that is equal to or higher than the discharge start voltage V1 and then lowered to Vst1 to 10 μsec or less and then 9 V / 100 to 250 μsec to decrease to 0V with an inclination of μsec or less
The method for driving a plasma display panel, wherein the setup period is set to 360 μsec or less. 4. The falling portion of the pulse waveform applied in the setup section is lowered from Vst2 to Vsus in a time of 10 μsec or less, and then 4 V / μsec or more and 15 V /
After decreasing to (V1−Vsus) with a slope of μsec or less, and with a slope of less than 4V / μsec to 100V to 250 μsec, the setup period is set to 360 μsec or less. The method of driving a plasma display panel according to claim 3, wherein