JP3512788B2 - Method for manufacturing semiconductor device - Google Patents

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor device and a method of manufacturing the same, and more particularly to a semiconductor device having a structure including a thin film layer in which transistor elements are integrally formed and a supporting layer for supporting the thin film layer.

[0002]

2. Description of the Related Art FIG. 2 is a partial sectional view of a conventional semiconductor device. As shown, a semiconductor device is generally formed using a single crystal semiconductor substrate 101 made of silicon. That is, impurity elements are diffused or formed on the surface of the single crystal semiconductor substrate 101 to form transistor elements and the like in an integrated and high density. In the example shown in FIG. 2, an insulated gate field effect transistor is formed on the single crystal semiconductor substrate 101. The element region where the transistor is formed is surrounded by the field insulating film 102. A source region 103 and a drain region 104 formed by impurity doping are provided in the element region. A channel formation region 105 of the transistor is formed between the source region 103 and the drain region 104. A gate electrode 107 is provided on the channel forming region 105 with a gate oxide film 106 interposed therebetween.
A transistor element including the gate electrode 107, the source region 103, the drain region 104, etc. is covered with an interlayer insulating film 108. Interlayer insulating film 10
Source electrode 1 through the contact hole formed in 8
09 and the drain electrode 110 are provided and wiring between individual transistors is performed.

[0003]

In the above-described conventional semiconductor device, one surface of the single crystal semiconductor substrate 101 is sequentially subjected to the impurity doping process and the film forming process to form the transistor element. The processing is always performed only from one side, and the films are sequentially laminated. Therefore, once processing is performed on the lower layer and the upper layer is overlaid thereon, it is no longer possible to perform additional processing on the lower layer, and various restrictions are imposed on the process design. There is a problem that occurs.

Although the semiconductor substrate 101 has a front surface and a back surface facing each other, the conventional semiconductor device is formed by utilizing only the front surface side of the semiconductor substrate 101.
Therefore, the wiring of the integrated circuit is concentrated only on the front surface side, and the back surface side is not utilized at all. Therefore, there is a problem in that the wiring density is naturally limited in area, and further higher density of the integrated circuit cannot be expected. If the back side of the semiconductor substrate can be used as a wiring surface, it is possible to effectively double the integration density. However, such double-sided wiring is impossible in the conventional structure.

In order to increase the integration density, it has also been proposed to perform multilayer wiring on one surface of a semiconductor substrate. However, when the multi-layer wiring is repeatedly performed, the flatness of the surface of the semiconductor substrate deteriorates, so that there is a problem that open defects and other short defects in the step portion are likely to occur.

In the conventional structure, a transistor element is directly integrated on the surface of a single crystal semiconductor substrate. Therefore, the single crystal semiconductor substrate and the transistor element integratedly formed thereon have an inseparable relationship. In other words, the integrated circuit is always supported by the single crystal semiconductor substrate. However,
Depending on the intended use of the semiconductor device, it is not often appropriate to use a single crystal semiconductor substrate as a supporting substrate. In the conventional structure, since the supporting substrate cannot be freely selected, there is a problem that it is not flexible in the application range of the semiconductor device.

In view of the above-mentioned various problems of the prior art, the present invention is capable of processing from both sides, can perform wiring on both sides, has a flat surface, and can freely select a supporting substrate. It is an object of the present invention to provide a semiconductor device having a structure capable of achieving the above. At the same time, it is an object to provide a method of manufacturing a semiconductor device having such an improved structure.

[0008]

[Means for Solving the Problems] Means for solving the problems will be described with reference to FIG. FIG. 1 is a partial cross-sectional view showing the basic structure of a semiconductor device according to the present invention. As shown in the figure, the semiconductor device according to the present invention has a thin film stack 1 in which transistor elements are integrally formed, and a support layer 2 for supporting the thin film stack 1. The thin film stack 1 has a surface insulating film 3 having a flat surface on which electrodes can be formed. Below the surface insulating film 3, a single crystal semiconductor thin film 4 is formed.
Are arranged. In this single crystal semiconductor thin film 4, a channel forming region 5 of each transistor element is formed, and a source region 6 and a drain region 7 are also formed in contact with the channel forming region 5. Below the single crystal semiconductor thin film 4, an intermediate electrode film forming a gate electrode 9 of a transistor element is provided with a gate oxide film 8 interposed therebetween. Further, the back surface layer film 10 is disposed below the intermediate electrode film. Contact holes are formed in the back surface layer film 10 so as to be inserted into the source region 6 and the drain region 7, and the source electrode 11 and the drain electrode 12 are provided through the contact holes. The source electrode 11 and the drain electrode 12 are wiring-processed over one surface of the back surface layer film 10. The back surface layer film 10 is composed of a field insulating layer 13 surrounding an element region where a transistor element is formed, an insulating layer covering the gate electrode 9, and the like.
The thin film stack 1 described above is supported by the support layer 2. That is, the support layer 2 is surface-bonded and fixed to the back surface layer film 10.

Preferably, the support layer 2 has a two-layer structure comprising an adhesive film 14 applied to the back surface layer film 10 and a support substrate 15 fixed by surface adhesion by the adhesive film 14. There is. Alternatively, the support layer 2 may have a single-layer structure molded with an adhesive. As the adhesive used for the surface adhesive fixation, for example, a fluid material containing silicon dioxide as a main component can be used. Through holes may be formed in the support substrate 15 in advance in order to release gas generated during heat treatment of the adhesive. Further, as the material of the support substrate 15, an optically transparent material such as quartz glass can be freely selected in addition to the semiconductor such as silicon.

The individual transistor elements integrally formed in the thin film stack 1 have a source region 6 and a drain region 7 formed in the single crystal semiconductor thin film 4 in a self-aligned relationship with the gate electrode 9. Since the surface insulating film 3 located on the upper side of the single crystal semiconductor thin film 4 on which the channel forming region 5, the source region 6 and the drain region 7 are formed has a flat surface, various electrodes can be freely formed if necessary. It is possible to do For example, a capacitive element can be built by arranging the counter electrode facing the drain region 7 and forming a counter electrode on the surface insulating film 3. By doing so, a semiconductor device having a DRAM structure can be obtained. Alternatively, a transparent electrode can be formed on the surface insulating film 3 so as to be electrically connected to the drain region 7 and form a pixel. The semiconductor device having such a structure can be applied as a light valve drive substrate. Further, a wiring electrode may be formed on the surface insulating film 3 so as to be electrically connected to the terminal portion of each transistor element through a contact hole provided so as to pass through the surface insulating film 3. By doing so, the wiring of the integrated circuit can be performed on both sides of the thin film stack 1, and the effective wiring density can be improved. Alternatively, a light-shielding film for preventing light leakage may be formed on the surface insulating film 3 so as to cover at least the channel forming region 5 of each transistor element formed in the single crystal semiconductor thin film 4. Furthermore, an additional gate electrode can be formed on the surface insulating film 3 so as to be aligned with the channel forming region 5 of each transistor element formed on the single crystal semiconductor thin film 4.
By controlling the channel formation region 5 with a pair of gate electrodes facing each other, the performance of the transistor is improved. Further, a pad electrode for external connection can be formed on the surface insulating film 3. Since this pad electrode has a relatively large area, it is possible to substantially improve the packaging density of the integrated circuit by disposing the pad electrode on the front surface side separately from the integrated circuit wiring on the back surface side.

The channel forming region 5 formed in the single crystal semiconductor thin film 4 can be processed from the surface insulating film 3 side. For example, by selectively introducing an impurity into the channel forming region 5 through the surface insulating film 3, the conductivity of the channel forming region 5 can be selectively set individually. In this way, a semiconductor device having an MROM structure can be obtained.

Next, a method of manufacturing the semiconductor device having the basic structure shown in FIG. 1 will be described. First, an SOI having a single crystal semiconductor thin film stacked on a temporary substrate via an insulating film
The first step of forming a substrate is performed. Next, a second step of forming a semiconductor integrated circuit is performed on the single crystal semiconductor thin film. Subsequently, a third step of surface-bonding and fixing a support substrate on the side opposite to the temporary substrate with respect to the surface of the formed integrated circuit is performed. Further, the fourth step of removing the temporary substrate and exposing the flat insulating film is performed. Finally, a fifth step of performing a process including at least electrode formation on the exposed surface of the flat insulating film is performed.

Preferably, in the first step, first, a semiconductor substrate made of single crystal silicon is fixed by thermocompression bonding on a temporary substrate made of silicon via an insulating film made of silicon dioxide. Then, the semiconductor substrate is polished to be thinned to form an SOI substrate. When forming the insulating film, it is preferable to first deposit a silicon nitride layer on the temporary silicon substrate as a base treatment and then deposit a silicon dioxide layer by CVD. This CVD silicon dioxide layer has excellent adhesiveness to the semiconductor substrate, and the semiconductor substrate can be firmly thermocompression-bonded and fixed. The silicon nitride layer deposited as a base treatment serves as an etching stopper in a post process. That is, when performing the above-mentioned fourth step, the temporary substrate can be removed by etching using this silicon nitride layer as an etching stopper. As a result, the flat insulating film is exposed.

The above-described third step is performed by surface-bonding and fixing the support substrate to the surface of the semiconductor integrated circuit using, for example, a fluid adhesive containing silicon dioxide as a main component. Alternatively, a large amount of adhesive may be supplied to the surface of the semiconductor integrated circuit and solidified to provide a support substrate having a single layer structure.

[0015]

In the semiconductor device according to the present invention, the transistor elements are integrally formed on the thin film stack. The wiring pattern of the transistor element is formed on the back surface side of this thin film stack, and the front surface side is a flat exposed surface. Therefore, various electrodes can be additionally formed on the flat exposed surface according to design specifications. So-called double-sided wiring is possible and the integration density of semiconductor devices is increased. The channel formation region of each transistor element is provided in the single crystal semiconductor thin film, and the surface insulating film is formed so as to cover the single crystal semiconductor thin film. It is possible to perform additional processing on the single crystal semiconductor thin film through this surface insulating film. So-called double-sided processing becomes possible and the degree of freedom in process design of the semiconductor manufacturing process increases. A support substrate is surface-bonded and fixed to the back surface side of the thin film stack via an adhesive film.
Therefore, the material and shape of the support substrate can be freely selected according to the design specifications.

A semiconductor device having many such advantages is S
It is manufactured by using an OI substrate. First, SOI
A thin film transistor element group is formed on a substrate by using a normal semiconductor manufacturing process. The supporting substrate is surface-bonded and fixed to the surface of the SOI substrate on which this element group is formed using an adhesive. After that, the SOI substrate is removed to expose the flat insulating film surface. As described above, by transferring the thin film transistor element group from the SOI substrate to the supporting substrate, a semiconductor device capable of double-sided processing and double-sided wiring can be easily obtained.

By using the SOI substrate, it becomes possible to make full use of the LSI manufacturing technique as in the case of the conventional single crystal silicon wafer, and it is possible to form an extremely fine thin film transistor element. As described above, the SOI substrate has a structure in which a single crystal semiconductor thin film made of, for example, silicon is stacked on the temporary substrate with the insulating film interposed therebetween. This single crystal semiconductor thin film has excellent physical characteristics as compared with a polycrystalline semiconductor thin film or an amorphous semiconductor thin film, and is suitable for LSI manufacturing. If a polycrystalline silicon thin film is used,
Since the size of the crystal particles is about several μm, miniaturization of the thin film transistor element is necessarily limited. In addition, since the film forming temperature of the polycrystalline silicon thin film is about 600 ° C., it is difficult to make full use of the miniaturization technology or LSI manufacturing technology that requires a high temperature treatment of 1000 ° C. or higher. or,
When an amorphous silicon thin film is used, the film forming temperature is about 300 ° C., and therefore the high temperature processing required for LSI manufacturing technology cannot be performed. On the other hand, the single crystal silicon thin film has excellent crystal uniformity and is thermally stable, so that high temperature treatment can be freely performed to form a fine single crystal thin film transistor element. Since it has a larger charge mobility than that of the amorphous silicon thin film, it is possible to obtain a transistor element having excellent high-speed response.

[0018]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENT A preferred embodiment of the present invention will be described in detail below with reference to the drawings. FIG. 3 shows an embodiment in which integrated circuit wiring and pad electrodes for external connection are separately provided on the upper and lower surfaces. As shown in the figure, individual insulated gate field effect transistor elements are integrally formed on the thin film stack 1. The channel forming region 5, the source region 6 and the drain region 7 of the transistor element are formed in the common single crystal silicon thin film 4. The single crystal silicon thin film 4 is covered with the surface insulating film 3 having a flat surface. A gate electrode 9 is formed below the channel formation region 5 with a gate oxide film 8 interposed therebetween.
Is provided. On the lower side of the gate electrode 9, the back surface layer film 1
0 is provided. The back surface layer film 10 is composed of, for example, an interlayer insulating film for covering and protecting the gate electrode 9. Further, a field insulating film 13 is formed so as to surround the transistor element. A contact hole is opened in the back surface layer film 10, and a source electrode 11 electrically connected to the source region 6 and a drain electrode 12 electrically connected to the drain region 7 are formed through the contact hole. The source electrode 11 and the drain electrode 12 are wired according to a predetermined pattern, and the back surface layer film 1 is provided between individual transistor elements.
0 is connected along one side. A support substrate 15 is surface-bonded and fixed to one surface of the back surface layer film 10 via an adhesive film 14, and supports the thin film stack 1.

Through holes 21 are formed in a part of the thin film stack 1.
Are formed. The through hole 21 can be formed by selectively etching the field insulating film 13. A pad electrode 22 that is electrically connected to the drain electrode 12 through the through hole 21 is formed on the surface insulating film 3. The pad electrode 22 is for establishing electrical connection between the semiconductor device and an external circuit, and wire bonding is performed on the pad electrode 22, for example. Therefore, the size of the pad electrode is, for example, about 100 μm square, which is significantly larger than the size of the transistor element. As described above, by forming the pad electrode occupying a large area on the front surface side separately from the back surface side wiring of the integrated circuit, the area on the back surface side can be effectively utilized. Further, the pad electrode can be firmly formed on the surface insulating film 3 having extremely excellent flatness by using vacuum evaporation of metal aluminum or the like. Therefore, highly reliable wire bonding can be performed.

FIG. 4 shows a second embodiment of the semiconductor device according to the present invention. The same components as those in the embodiment shown in FIG. 3 are designated by the same reference numerals to facilitate understanding. In this embodiment, an additional gate electrode 23 is provided in addition to the gate electrode 9 previously formed. The additional gate electrode 23 is patterned on the surface insulating film 3 so as to be aligned with the channel forming region 5 formed in the single crystal silicon thin film 4. As a result, the conduction state of the channel formation region 5 is controlled by the pair of gate electrodes 9 and 23 from above and below. With such a structure, the threshold voltage of the transistor element is substantially determined only by the material characteristics of the single crystal silicon thin film 4, and is less susceptible to the influence of other dimensional and shape factors and the variations are reduced. or,
By simultaneously controlling the conduction state of the channel forming region from above and below, the on / off characteristics of the transistor element can be remarkably improved and a large current can be obtained. further,
It is possible to effectively prevent the back channel that has been conventionally observed when the gate electrode is provided only on one side, and the transistor characteristics are improved. As a result, the channel length of the channel formation region can be made smaller than in the conventional case, and miniaturization to the submicron order can be achieved.

In the present invention, after the thin film transistor element is formed using the SOI substrate, this thin film transistor element is transferred to the support substrate 15 to obtain a semiconductor device. As a result of the transfer, unlike the prior art, the gate electrode 9 is located below the channel formation region 5, and the upper side of the channel formation region 5 is open for additional processing. With such a structure, the additional gate electrode 23 can be formed extremely easily.

As described above, the present invention uses the SOI substrate and forms the transistor element on the single crystal silicon thin film. The single crystal silicon thin film is superior to the polycrystalline silicon thin film or the amorphous silicon thin film in terms of fine workability and high-speed response, but has a drawback that a relatively large amount of light leakage current flows in the channel formation region. ing. This light leakage current increases the offset current of the transistor element and deteriorates the on / off characteristics. An additional gate electrode 2 is provided to prevent the generation of this light leakage current.
It is preferable that 3 is a light-shielding film having a light-shielding property. For example, an effective light-shielding film can be obtained by depositing metallic aluminum over the flat surface of the surface insulating film 3 and then performing a predetermined patterning to form an additional gate electrode 23.

FIG. 5 shows a third embodiment of the semiconductor device according to the present invention. Similarly, in order to facilitate understanding of this embodiment, the same components as those in the previous embodiment are designated by the same reference numerals. This embodiment relates to a semiconductor device having a so-called DRAM structure. As shown in the figure, a counter electrode 24 is patterned on the surface insulating film 3 so as to face the drain regions 7 of the individual transistor elements formed in the single crystal silicon semiconductor thin film 4. A dielectric layer made of the surface insulating film 3 is interposed between the drain region 7 and the counter electrode 24 to form a capacitive element. That is, a DRAM is obtained in which capacitive elements for recording information are combined corresponding to the individual transistor elements formed in an integrated manner. According to the present invention, the DRAM can be easily obtained by simply patterning the counter electrode on the flat surface of the surface insulating film 3. After applying a voltage to the gate electrode 9 to bring the channel forming region 5 into a conductive state, electric charges are supplied from the source region 6 to the drain region 7 to subsequently bring the channel forming region 5 into a non-conducting state. The charges supplied as a result are temporarily stored in the capacitive element as stored information. Information is written in this manner. In order to read the written information, the channel formation region 5 is brought into a conductive state again, and the once accumulated charge is guided to the source region 6 to detect the amount of the charge.

FIG. 6 shows a fourth embodiment of the semiconductor device according to the present invention. In this embodiment, one of the terminal electrodes of the transistor element, that is, one of the source electrode and the drain electrode,
It is provided not on the back side but on the front side. In this way, by dividing the wiring of the transistor element into the upper and lower portions of the thin film stack 1, the wiring density on each surface can be improved. When the electrode wirings of the transistor elements are concentrated only on one surface as in the conventional case, the wiring density is naturally limited, and miniaturization of individual transistor elements is hindered. In the present embodiment, the wiring of the source electrode 11 is guided to the back surface side, while the drain electrode 25 is the surface insulating film 3
It is provided on the front surface side through a contact hole 26 opened in the. As described above, since the semiconductor device according to the present invention is obtained by transferring the thin film transistor element from the SOI substrate to the supporting substrate, the drain region 7 formed in the single crystal silicon thin film 4 has the surface side surface through the surface insulating film 3. Will be located in. Therefore, the electrodes can be connected very easily through the surface insulating film 3. Since the double-sided wiring of the integrated circuit can be performed in this manner, the capacity can be increased as compared with the conventional one.

FIG. 7 shows a fifth embodiment of the semiconductor device according to the present invention. Unlike the above-described examples, this example uses the support layer 2 having a single layer structure. The support layer 2 is a thin film stack 1 on which a semiconductor integrated circuit is formed.
It is possible to supply a large amount of an adhesive to the back surface side of and to solidify and mold it. Unlike the previous embodiment, in this embodiment, it is not necessary to use a separate support substrate, so that the manufacturing cost can be reduced and the thickness of the entire semiconductor device can be reduced. Since the semiconductor device having such a structure has a sheet shape, it is suitable for mounting on an IC card, for example.

FIG. 8 is a partial sectional view showing a sixth embodiment of the semiconductor device according to the present invention. In order to facilitate understanding of the present embodiment, FIG. 8 is drawn in a layout in which the vertical relationship is reversed from the previous figures. In addition, the state of the semi-finished product is shown for easy understanding. As shown in the figure, in the state of semi-finished product, S
The OI substrate 27 remains. The SOI substrate 27 is composed of a thin film stack 1 on which transistor element groups are formed, and a temporary substrate 28 that temporarily supports the thin film stack 1 via an insulating film 3. The single crystal silicon thin film 4 is deposited and formed on the temporary substrate 28 with the insulating film 3 interposed therebetween. A channel forming region 5, a source region 6 and a drain region 7 of a transistor element are formed on the silicon single crystal thin film 4. SO in which transistor element groups are integrated
The support substrate 15 is provided on the I substrate 27 with the adhesive layer 14 interposed therebetween.
Are fixed by surface adhesion. Through holes 29 are formed in the support substrate 15 in advance at predetermined intervals. The through holes 29 are for releasing gas generated during heat treatment of the adhesive film 14. If such a through hole is not provided, there is no escape area for the gas generated in the thermosetting process of the adhesive film 14, and it may be difficult to perform uniform and strong surface-bonding and fixing of the support substrate 15. . Further, when the generated gas is trapped in the adhesive film 14 and bubbles are generated, the reliability of the semiconductor device is impaired. Therefore, in the present embodiment, in order to eliminate such inconvenience, through holes for degassing are formed in the support substrate 15 in advance. After the support substrate 15 is surface-bonded and fixed using the adhesive film 14, S
The temporary substrate 28 forming the OI substrate 27 is removed by polishing etching, and the flat insulating film 3 is exposed.

FIG. 9 is a partial sectional view showing a seventh embodiment of the semiconductor device according to the present invention. In this embodiment, the so-called M
Regarding the ROM structure. The MROM, that is, the mask ROM, writes information in individual channel formation regions of transistor elements integrated in an array. Information is written by selectively setting the conductivity of the channel formation region. As shown in the figure, the present invention has a structure in which a semiconductor device is integratedly formed on an SOI substrate and then a semiconductor device is transferred to a supporting substrate 15. Therefore,
Unlike the conventional semiconductor device, the gate electrode 9 is located below the channel formation region 5 formed in the single crystal silicon thin film 4. The upper side of the channel forming region 5 is open.
With such a structure, the conductivity of the channel formation region 5 can be selectively set and controlled from the front surface side. Specifically, the resist film 30 is patterned on the surface insulating film 3 according to the information pattern to be stored. As a result,
The element regions of individual transistor elements are selectively masked. After that, when the surface of the semiconductor device is entirely ion-implanted, the impurity ions are selectively implanted only in the unmasked element region, and the conductivity of the channel forming region 5 increases. In this way, information is written in the transistor element array. To read this information, a predetermined voltage is applied to the gate voltage 9 and the source electrode 1
The potential difference generated between 1 and the drain electrode 12 may be detected.

According to this embodiment, writing of information is performed at the final stage of the semiconductor device manufacturing process. Therefore, it is possible to manufacture a large quantity of semi-finished products before writing information. By performing the information writing process at the end according to the required specifications, extremely efficient manufacturing management can be performed.

FIG. 10 shows an eighth semiconductor device according to the present invention.
It is a typical fragmentary sectional view showing the 2nd example. This embodiment relates to a semiconductor device used as a light valve substrate.
The light valve substrate 31 made of a semiconductor device includes a thin film stack 1 in which transistor element groups are integrally formed as shown in the figure,
It is composed of a transparent support substrate 15 and an adhesive film 14 for surface-adhering and fixing them to each other. Each transistor element is composed of an insulated gate field effect transistor, and includes a channel forming region 5, a source region 6 and a drain region 7 formed in the single crystal silicon thin film 4, and a gate oxide film 8 below the channel forming region 5. And a gate electrode 9 arranged via The surface insulating film 3 is provided so as to cover the single crystal silicon thin film 4. This surface insulating film has an extremely flat surface. On this flat surface, transparent electrodes 32 that form pixels corresponding to the individual transistor elements are provided. This transparent electrode 3
2 is electrically connected to the drain region 7 of the corresponding transistor element through a contact hole 33 opened in the surface insulating film 3. The transistor element functions as a switch for the transparent electrode 32, applies a predetermined voltage to the gate electrode 9 to bring the channel forming region 5 into a conductive state, and applies a predetermined drive voltage to the source electrode 11, thereby causing the transparent electrode 32. Drive. Since the transparent electrode 32 is formed on the extremely flat surface insulating film 3, it has excellent smoothness and dimensional accuracy. The thin film stack 1 on which the transparent electrode 32 and the corresponding transistor element or switching element are formed is supported by the transparent support substrate 15 via the adhesive film 14. When used as a light valve substrate, the semiconductor device needs to be optically transparent in order to control the transmission of incident light. Therefore, in this embodiment, the support substrate 15 is made of a transparent material such as quartz glass, and the adhesive film 14 is also made of a transparent material. Therefore, the transparent electrode 32, the adhesive film 14, and the transparent support substrate 1
The laminated structure composed of 5 is transparent as a whole, and can function as a light valve for each pixel.

The counter substrate 34 is arranged to face the light valve substrate 31 having such a structure with a predetermined gap. The counter substrate 34 is made of a glass material, and a common electrode 35 is formed on the inner surface thereof. An electro-optical material layer, for example, a liquid crystal layer 36 is filled between the light valve substrate 31 and the counter substrate 34 to perform optical modulation of incident light for each pixel. That is, the transmittance for incident light changes according to the magnitude of the driving voltage applied between the transparent electrode 32 and the common electrode 35 that form the pixel, and the light valve function is achieved. When the liquid crystal layer 36 is used as the electro-optical material layer, it is necessary to control the layer thickness of the liquid crystal layer 36 to be extremely uniform in order to obtain a uniform light valve function. In this case, since the surface insulating film 4 located on the uppermost part of the light valve substrate 31 has an extremely flat surface, it is easy to obtain a uniform layer thickness. In addition, when the liquid crystal layer 36 is used, it is generally necessary to perform alignment treatment, but since the surface of the light valve substrate 31 has excellent smoothness, uniform alignment treatment can be performed.

Finally, a method of manufacturing a semiconductor device according to the present invention will be described in detail with reference to FIGS. FIG. 11 is a process chart showing the first process of the semiconductor device manufacturing method. In this step, first, the SOI substrate 37 is prepared. This SOI substrate has a single crystal semiconductor thin film 4 laminated on a temporary substrate 38 with an insulating film 3 interposed therebetween. The thin film 4 is made of, for example, single crystal silicon.

In the SOI substrate 37 having such a structure, a polycrystalline silicon thin film is deposited on the surface of a temporary substrate 38 made of, for example, an insulating material or a semiconductor material by chemical vapor deposition or the like, and then laser beam irradiation or the like is performed. It can be obtained by performing heat treatment to recrystallize the polycrystalline film and convert it into a single crystal structure. However, generally, a single crystal obtained by recrystallization of a polycrystal does not always have a uniform crystal orientation, and has a relatively large lattice defect density. Due to these reasons, there is some limitation in applying the miniaturization technique or the LSI manufacturing technique to the SOI substrate manufactured by the recrystallization method as in the case of the silicon wafer. In view of this point, in the present embodiment, the single crystal silicon thin film 4 having the crystal orientation uniformity and the low density lattice defect, which are similar to those of the silicon wafer widely used in the semiconductor manufacturing process, is formed on the temporary substrate 38. To form. The method will be specifically described below.

First, a single crystal silicon plate and a temporary substrate 38 are prepared. The temporary substrate 38 is made of, for example, a silicon material. On the other hand, it is preferable to use, for example, a high-quality silicon wafer used for LSI manufacturing as the single crystal silicon plate, and the crystal orientation thereof has a uniformity in the range of <100> 0.0 ± 1.0. The crystal lattice defect density is 500 or less per cm 2. The back surface of this single crystal silicon plate is subjected to a flattening treatment. On the other hand, the insulating film 3 is formed on the surface of the temporary substrate 38. This insulating film 3 is formed by depositing silicon dioxide using, for example, chemical vapor deposition or CVD. Before depositing the silicon dioxide layer by CVD, it is preferable to deposit a silicon nitride layer on the surface of the temporary substrate 38 as a base treatment. The insulating film 3 formed by such a deposition process also has a flat surface.

Next, the single crystal silicon plate having a flat surface and the temporary substrate 38 are superposed on each other with the insulating film 3 interposed therebetween and heated, so that both plate members are thermocompression-bonded to each other. At this time, the thermocompression bonding process is performed on both plate members through the insulating film 3 made of silicon dioxide having excellent adhesiveness, so that both plate members are firmly fixed to each other.

Then, the surface of the single crystal silicon plate is polished. As a result, a single crystal silicon thin film 4 polished to a desired thickness is formed on the insulating film 3. Therefore, the SOI substrate 37 having the temporary substrate 38 made of silicon and the single crystal silicon thin film 4 is obtained as shown in FIG. Note that etching treatment may be used instead of polishing treatment for thinning the single crystal silicon plate. Since the single crystal silicon thin film 4 thus obtained retains the quality of the silicon wafer substantially as it is, it is possible to obtain a semiconductor substrate material extremely excellent in uniformity of crystal orientation and lattice defect density.

Next, the second step of the method for manufacturing a semiconductor device according to the present invention will be described with reference to FIG. In this step, a semiconductor integrated circuit is formed on the single crystal silicon thin film 4 to obtain the thin film stack 1. Specifically, first, the single crystal silicon thin film 4 is selectively thermally oxidized and converted into the field insulating layer 13 while leaving the individual element regions. As a result, the element region has a shape surrounded by the field insulating layer 13.
Then, the surface of the element region is thermally oxidized to form the gate insulating film 8. An intermediate electrode film is deposited on the gate insulating film 8 and subjected to predetermined patterning to form a gate electrode 9. Further, the source region 6 and the drain region 7 are formed by implanting impurities into the single crystal silicon thin film 4 by ion implantation using the gate electrode 9 as a mask. As a result, the source region 6 and the drain region 7 are formed in a self-aligned relationship with the gate electrode 9. Source region 6 and drain region 7 in which impurities are injected
The channel forming region 5 in which no impurity is injected is left between the and. After the ion implantation is completed, the entire surface of the element region is covered with the protective film 10. Further, the contact hole is opened in the protective film 10 and the source electrode 11 and the drain region 7 connected to the source region 6 are formed.
The drain electrode 12 is formed so as to be electrically connected to. As a result, the wiring of the integrated circuit including the transistor element group is formed on the surfaces of the protective film 10 and the field insulating layer 13. At the same time, wiring for the gate electrode 9 is performed at the same time.

Next, the third step of the method for manufacturing a semiconductor device according to the present invention will be described with reference to FIG. In the third step, the supporting substrate is surface-bonded and fixed to the opposite side of the temporary substrate 38. Therefore, first, an adhesive is applied to the surface of the thin film stack 1 on which the semiconductor integrated circuit is formed to form the adhesive layer 14. A polyimide resin or an epoxy resin can be used as the material of the adhesive. Polyimide resin is excellent in heat resistance and is low in the content of impurities. Further, the epoxy resin is excellent in workability and has a strong adhesive force. However, the linear expansion coefficient of these organic materials is significantly different from that of silicon materials, and it may be a problem in terms of reliability depending on the purpose of use of the semiconductor device. Further, these organic materials inevitably contain alkali ions, which may adversely affect the reliability of the semiconductor device. Therefore,
In this example, a fluid inorganic material having a composition in which silicon dioxide particles were dispersed in a solvent was used as the adhesive. Such a silicon dioxide adhesive can form a dense silicon dioxide film by heat treatment. Since this silicon dioxide film contains almost no alkali ions and is excellent in reliability, and its linear expansion coefficient is similar to that of the substrate material, thermal stress can be reduced.
This silicon dioxide adhesive can be applied to the surface of the integrated circuit by a simple method such as spinner treatment, dipping treatment or spray treatment. Has excellent smoothness due to fluidity.

Further, in the step shown in FIG. 14, the supporting substrate 15 is attached onto the applied adhesive film 14. The material of the support substrate 15 can be appropriately selected according to the purpose of use of the semiconductor device. For example, silicon or quartz glass is selected. By performing heat treatment in this state, the solvent contained in the adhesive film 14 is removed and the fusion of the silicon dioxide particles proceeds, so that the supporting substrate 15 and the SOI substrate 37 are firmly surface-bonded and fixed to each other. . The heat-treated adhesive film 14 constitutes a dense silicon dioxide film and has substantially the same quality as a thermal oxide film. The solvent contained in the adhesive includes an inorganic solvent and an organic solvent. Organic ones are particularly suitable for forming an adhesive film layer having a large film thickness. By increasing the film thickness to a considerable extent, it is possible to form the supporting substrate with the adhesive film itself. In this case, the completed semiconductor device has a sheet shape and can be applied to a particularly thin device.

Finally, with the support substrate 15 and the SOI substrate 37 bonded together, the temporary substrate 38 is removed to expose the insulating film 3 having a flat surface. This removal process is performed by etching the temporary substrate 38 made of, for example, silicon. At this time, since the silicon nitride layer is applied to the interface between the insulating film 3 and the temporary substrate 38 as a base treatment, this effectively functions as an etching stopper. That is, due to the difference in etching rate between silicon and silicon nitride, the etching removal of the temporary substrate 38 made of silicon is substantially completed when the silicon nitride film is reached. In this way, the semiconductor device shown in FIG. 1 can be finally obtained. Note that the arrangement shown in FIG. 14 is reversed in the vertical relation with the arrangement shown in FIG. 1 for easy understanding. The exposed insulating film 3 has extremely excellent flatness, and the single crystal silicon thin film 4 is located immediately below it.
Therefore, various additional processes including at least electrode formation can be extremely easily performed on the flat surface insulating film 3, and the single crystal silicon thin film 4 can be easily subjected to additional processes as desired. I can do it.

[0040]

As described above, according to the present invention, S
Since the structure is such that the integrated circuit formed on the OI substrate is transferred to the support substrate and then the SOI substrate is removed, the semiconductor device has not only one surface on which wiring or the like has been previously provided, but also the exposed other surface. is doing. The exposed other surface has a flat surface, and the single crystal semiconductor thin film is located immediately below it. Since an additional electrode forming process or wiring process can be performed on this exposed surface, the semiconductor device according to the present invention can have a double-sided wiring structure, and the mounting density thereof can be remarkably improved as compared with the conventional one. is there. For example, by dividing the wiring of the integrated circuit into upper and lower surfaces, the wiring density is substantially doubled, and the integrated circuit can be miniaturized. Alternatively, by forming a wiring pattern on the back surface of the thin film stack on which the integrated circuit is formed and forming a pad electrode for external connection on the front surface, it is possible to effectively utilize both front and back surfaces. Further, by additionally forming various electrodes on the exposed surface side according to the design specifications of the semiconductor device, there is an effect that it is possible to extremely easily manufacture semiconductor devices according to various uses.
For example, a semiconductor device substrate for driving a light valve can be obtained by forming a transparent electrode that defines a pixel. Further, by forming the capacitance electrode, the DRAM can be easily manufactured.
Furthermore, by forming an additional gate electrode, a semiconductor device having a transistor element having an excellent on / off ratio can be obtained. In addition, by forming the added gate electrode with a light-shielding material, it is possible to obtain a semiconductor device including a transistor element having a small offset current.

In the structure of the semiconductor device according to the present invention, the single crystal semiconductor thin film is arranged immediately below the surface insulating film. Therefore, it becomes possible to perform additional processing through the surface insulating film, and there is an effect that so-called double-sided processing can be performed. For example, by selectively implanting impurity ions into the channel formation region of the transistor element via the surface insulating film, an MROM can be made extremely easily.

According to the present invention, the thin film stack having the semiconductor integrated circuit formed thereon is supported by the supporting substrate through the adhesive film. For this reason, since the thin film stack and the supporting substrate are not inseparable from each other as in the conventional case, there is an effect that the supporting substrate material can be appropriately selected according to the purpose of use of the semiconductor device. For example, when the semiconductor device is used as a light valve driving substrate, a transparent material such as quartz glass can be selected as the supporting substrate. Alternatively, when the semiconductor device is incorporated in an IC card or the like, it is possible to easily obtain a sheet-shaped semiconductor device as a supporting substrate by increasing the thickness of the adhesive film itself.

According to the present invention, a semiconductor device capable of double-sided processing and double-sided wiring is manufactured by using the transfer technique. Therefore, there is an effect that a high-performance and high-density semiconductor device can be obtained without requiring any complicated processing. In particular, by forming an integrated circuit on an SOI substrate by using a normal LSI manufacturing technique and then transferring the integrated circuit to a supporting substrate, there is an effect that the normal LSI manufacturing technique can be fully utilized. In addition, the single crystal semiconductor thin film formed on the surface of the SOI substrate is formed by thermocompression bonding and polishing treatment of a silicon wafer, so that a substrate material excellent in crystal orientation uniformity and lattice defect density is used to form a semiconductor device. The effect is that can be manufactured.

[Brief description of drawings]

FIG. 1 is a schematic partial cross-sectional view showing a basic structure of a semiconductor device according to the present invention.

FIG. 2 is a schematic partial cross-sectional view showing an example of a conventional semiconductor device.

FIG. 3 is a schematic partial cross-sectional view showing a first embodiment of a semiconductor device according to the present invention, showing an example in which a pad electrode is formed on a surface opposite to a wiring pattern.

FIG. 4 is a schematic partial cross-sectional view showing a second embodiment of the semiconductor device according to the present invention, showing an example in which gate electrodes are arranged on both sides of a channel formation region.

FIG. 5 is a schematic partial cross-sectional view showing a third embodiment of the semiconductor device according to the present invention, showing an example of a DRAM structure.

FIG. 6 is a schematic partial sectional view showing a fourth embodiment of a semiconductor device according to the present invention, showing an example in which a wiring pattern of a semiconductor integrated circuit is divided into upper and lower surfaces.

FIG. 7 is a schematic partial sectional view showing a fifth embodiment of the semiconductor device according to the present invention, showing an example in which the support substrate has a single-layer structure.

FIG. 8 is a schematic partial cross-sectional view showing a sixth embodiment of a semiconductor device according to the present invention, showing an example in which a through hole for venting gas is formed in a supporting substrate.

FIG. 9 is a schematic partial cross-sectional view showing a seventh embodiment of a semiconductor device according to the present invention, showing an MROM structure.

FIG. 10 is a schematic partial cross-sectional view showing an eighth embodiment of the semiconductor device according to the present invention, showing an example of the semiconductor device used as the light valve driving substrate.

FIG. 11 is a first method of manufacturing a semiconductor device according to the present invention.
It is process drawing which shows a process.

FIG. 12 is a second method of manufacturing a semiconductor device according to the present invention.
It is process drawing which shows a process.

FIG. 13 is a third method of manufacturing a semiconductor device according to the present invention.
It is process drawing which shows a process.

FIG. 14 is a third method of manufacturing a semiconductor device according to the present invention.
FIG. 11 is a process drawing for explaining the fourth step.

[Explanation of symbols]

1 thin film stack 2 support layers 3 Surface insulation film 4 Single crystal semiconductor thin film 5 channel formation region 6 Source area 7 drain region 8 Gate oxide film 9 Gate electrode 10 Backside layer film 11 Source electrode 12 drain electrode 13 Field insulation layer 14 Adhesive film 15 Support substrate 22 Pad electrode 23 Additional gate electrode 24 Counter electrode 25 drain region 27 SOI substrate 28 Temporary substrate 29 through holes 31 Light valve substrate 32 transparent electrode

─────────────────────────────────────────────────── ─── Continuation of the front page (72) Inventor Nobuyoshi Matsuyama 1-8 Nakase, Mihama-ku, Chiba, Chiba Seiko Instruments Inc. (72) Inventor Hitoshi Niwa 1-8 Nakase, Mihama-ku, Chiba Seiko Instruments Incorporated (72) Inventor Tomoyuki Yoshino 1-8 Nakase, Mihama-ku, Chiba, Chiba Seiko Instruments Inc. (56) Reference JP-A-1-181570 (JP, A) JP-A-1-241176 (JP , A) JP-A-1-232750 (JP, A) JP-A 64-18248 (JP, A) JP-A-63-308386 (JP, A) (58) Fields investigated (Int.Cl. ⁷ , DB) Name) H01L 29/786 H01L 21/336 H01L 21/762 H01L 27/12

Claims (3)

(57) [Claims] 1. A step of forming an SOI substrate having a single crystal semiconductor thin film laminated on a temporary substrate via an insulating film, a step of forming a semiconductor integrated circuit on the single crystal semiconductor thin film, A step of fixing a supporting substrate to the surface of the semiconductor integrated circuit opposite to the temporary substrate; a step of removing the temporary substrate to expose the insulating film; and an electrode formation on the exposed surface of the insulating film. semiconductor and a step of performing processing including
In the method of manufacturing a body device, the step of forming the SOI substrate is performed by using a temporary silicon substrate.
After depositing a silicon nitride layer on the substrate as a base treatment,
To form the insulating film by depositing a silicon dioxide layer
After that, a method of manufacturing a semiconductor device, comprising the step of fixing the semiconductor substrate . 2. The temporary substrate is removed to expose the insulating film.
The process uses the silicon nitride layer as an etching stopper.
It is a step of removing the temporary substrate by etching.
The method for manufacturing a semiconductor device according to claim 1, wherein the method is for manufacturing a semiconductor device. 3. Laminated on a temporary substrate via an insulating film
Process of forming SOI substrate having single crystal semiconductor thin film
And forming a semiconductor integrated circuit on the single crystal semiconductor thin film
And the temporary substrate for the surface of the semiconductor integrated circuit
Step of fixing the support substrate on the side opposite to and removing the temporary substrate
And exposing the insulating film, and the surface of the exposed insulating film
A step of performing treatment including electrode formation on the semiconductor
In the method for manufacturing a body device, the semiconductor integrated circuit is provided on the side opposite to the temporary substrate with respect to the surface.
In the step of fixing the supporting substrate, an adhesive is supplied to the surface of the semiconductor integrated circuit to solidify it.
And a step of providing the supporting substrate
Body device manufacturing method.