JP3442619B2 - High frequency mixer and high frequency mixer integrated circuit - Google Patents

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a high frequency mixer and a high frequency mixer integrated circuit used for converting the frequency of a high frequency signal in mobile communication equipment, microwave communication equipment, satellite communication equipment, etc. The present invention relates to a high-frequency mixer and a high-frequency mixer integrated circuit which receive a high-frequency signal and a local signal, frequency-convert the high-frequency signal with the local signal to generate and output an intermediate frequency signal.

[0002]

2. Description of the Related Art FIG. 9 shows "1.0V Gallium arsenide receiver front end IC for mobile communication equipment (" A 1.0V GaAs R
eceiver Front-end IC for Mobile Communication Equi
pment ")" (IEE 1996 Microwave and Millimeter-Wave Monolithic Integrated Circuit Symposium Proceedings (IEEE 1996 Microwave and Millimeter-Wave
Monolithic Circuits Symposium Proceeding), 7th
It is a circuit diagram which shows the conventional high frequency mixer disclosed by (Page 7).

In the figure, reference numeral 40 is an input terminal of the high frequency signal to the high frequency mixer, 41 is an input terminal of the local signal to the high frequency mixer, and 42 is an output terminal of the intermediate frequency signal. A high voltage terminal (not shown) of a power source is connected to the terminal 42. Reference numeral 102 denotes a high-voltage side field effect transistor (hereinafter abbreviated as high-voltage side FET) whose drain terminal is connected to the output terminal.
Is a low-voltage side field effect transistor (hereinafter abbreviated as low-voltage side FET) in which the drain terminal is connected to the source terminal of the high-voltage side FET 102, and 9 is the low-voltage side FET
A resistor 9 for self-bias that connects the source terminal of 101 to the low-voltage terminal (ground plane) of the power source.
Is a bypass capacitor arranged in parallel with the self-biasing resistor 9.

In the high frequency mixer of the above document, the gate terminal of the high voltage side FET 102 is grounded to the ground plane via the high resistance 4 and the high frequency signal terminal 40 is connected to the high voltage side FET 102, and the low voltage side FET 10 is connected.
The first gate terminal is grounded to the ground plane through the high resistance 3 and is connected to the local signal terminal 41.

Next, the operation will be described. First, the bias state of each field effect transistor will be described. The gate terminal of the high-voltage side FET 102 and the low-voltage side FET 10 are described.
The gate terminal of 1 is grounded to 0V through high resistances 3 and 4, respectively. Therefore, when neither the high frequency signal nor the local signal is input, the low voltage side FET 101 is in a state where both the gate terminal and the source terminal are grounded, and the high voltage side FET 102 is in a state where the gate terminal is grounded. Further, since a voltage is applied to the drain terminal of the high-voltage side FET 102 from the power source, a constant bias current (Ids) corresponding to the characteristics of the two FETs is applied between the drain and the source of the two FETs 101 and 102. = Ids1 = Ids2) flows.

Under such a bias condition, the high frequency signal and the local signal are input from the input terminals 40 and 41. Then, each FET 101, 1
Since the gate terminal of 02 is grounded via the high resistances 3 and 4, the potential fluctuates according to the input signals. When the gate voltage of each of the FETs 101 and 102 changes, a channel corresponding to the change of the gate voltage is formed between the source terminal and the drain terminal, so that the magnitude of the bias current (Ids = Ids1 = Ids2) changes.

In this way, the current flowing through the output terminal of the intermediate frequency signal becomes an alternating current containing a component according to the voltage fluctuation of the high frequency signal and a component according to the voltage fluctuation of the local signal. Then, in the high frequency mixer, for example, by inserting a predetermined resistor between the power supply and the output terminal, the AC current can be output as an intermediate frequency signal having a predetermined voltage fluctuation.

[0008]

Since the conventional high-frequency mixer is constructed as described above, there is a problem that the high-frequency signal cannot be efficiently frequency-converted by the local signal.

The high frequency mixer described in the above document will be described in detail below as an example. In the high-frequency mixer, the low-voltage side FET 101 has a characteristic that the threshold voltage Vth1 is -1.0V in a deep depletion mode and the knee voltage Vknee1 is set to 0.25V. The characteristic of the high-voltage side FET 102 is that the threshold voltage Vth2 is -0.15V in the shallow enhancement mode and the knee voltage Vknee is high.
2 is set to 0.3V.

Therefore, the combination of the characteristics of the two field effect transistors in the high frequency mixer is as shown in FIG. In the figure, the horizontal axis is the low-voltage side FET 101
Is the inter-stage voltage VF between the drain terminal of the FET and the source terminal of the high-voltage side FET 102, and the vertical axis is the current Ids flowing between the drain and the source. 103 (solid line) is a characteristic line when the above-mentioned inter-stage voltage VF (that is, source-drain voltage Vds1) is increased in a state where the gate-source voltage of the low-voltage side FET 101 is controlled to a constant voltage,
When the interstage voltage VF is increased, the drain-source current Ids is almost linear up to a predetermined knee voltage.
Increases, and shows a characteristic that the drain-source current Ids is substantially constant at the knee voltage or higher. Further, the drain-source current Ids also changes according to the magnitude of the gate-source voltage Vgs1, and when the gate-source voltage Vgs1 is increased, the drain-source voltage Vgs1 increases.
The source-to-source current Ids also tends to increase. Reference numeral 104 (dotted line) is a characteristic line in the bias state of the high-voltage side FET 102, showing that the drain-source current Ids sharply decreases from the saturation current Idss2 when the inter-stage voltage VF increases from 0V. No current flows when the voltage VF reaches the threshold voltage Vth2. Note that the characteristics shown in the figure are those when the voltage of the power supply is sufficiently higher than the threshold voltage Vth and the knee voltage Vknee of the two FETs 101 and 102.

Then, as is clear from the characteristic diagram,
In the conventional high frequency mixer, the threshold voltage Vt on the higher voltage side than the knee voltage Vknee1 on the low voltage side FET 101 is used.
The characteristics of the two FETs 101 and 102 are set so that h2 becomes small.
The operating point 105 in the bias state of
The voltage is much lower than the knee voltage Vknee1 of the ET101. Therefore, in the conventional high frequency mixer,
When the local signal is input to the gate terminal of the low-voltage side FET 101, the moving range of the operating point due to this is the range shown by the arrow in FIG. 106, which is within a narrow range much lower than the knee voltage Vknee1 of the low-voltage side FET 101. Will be moved in.

As a result, in the conventional high frequency mixer, the local signal can be input only at an amplitude such that the interstage voltage VF is within the moving range of the operating point. On the other hand, the operating range of the operating point is lower than the knee voltage Vknee1 of the low-voltage side FET 101, and the drain-source current Ids does not change greatly even if the operating point moves. Therefore, in the conventional high-frequency mixer, a local signal with a small amplitude must be input, and moreover, the drain-source current Ids is efficiently supplied by the local signal.
Cannot be changed, so that the high frequency signal cannot be efficiently frequency-converted by the local signal.

In order to improve such frequency conversion efficiency, the knee voltage Vknee1 of the low-voltage side FET 101 is
Although it is conceivable to design the FET so as to be small, it is generally difficult to make the knee voltage of the FET very small, and conversion cannot be efficiently performed. In addition, the high-voltage side F to which a sufficient drain-source voltage Vds2 is applied
It is possible to input a high frequency signal to the low voltage side FET 101 while inputting a local signal to the ET 102. However, in this case, since the operating voltage of the low voltage side FET is low, the intermodulation distortion ( Another problem arises that the third-order distortion) characteristic deteriorates.

The present invention has been made to solve the above problems, and can efficiently perform frequency conversion of a high frequency signal by a local signal, and further, intermodulation distortion (third order distortion) with respect to the high frequency signal. The purpose is to realize a high-frequency mixer with good characteristics.

[0015]

According to a first aspect of the present invention, there is provided a high frequency mixer for a high voltage side FET so that the absolute value of the threshold voltage of the high voltage side FET is at least equal to or higher than the knee voltage of the low voltage side FET. The characteristics are set, a high frequency signal is input to the gate terminal of the high-voltage side FET, and a local signal is input to the gate terminal of the low-voltage side FET.

In the high frequency mixer according to the second aspect of the present invention, a DC bias voltage larger than 0 V is applied to the gate terminal of the high voltage side FET by a bias circuit, and a high frequency signal is input to the high voltage side mixer. The gate terminal of the side field effect transistor is grounded and receives a local signal.

According to a third aspect of the present invention, there is provided a high frequency mixer, wherein a setting circuit for outputting a set value of an interstage voltage between a drain terminal of the low voltage side FET and a source terminal of the high voltage side FET, and the interstage voltage is set. A DC bias voltage larger than 0V is output to the gate terminal of the high-voltage side FET so that the voltage difference between the detected value of the interstage voltage and the set value is detected and compared with the set value of the interstage voltage. And a bias circuit including an output adjusting circuit for

A high frequency mixer according to a fourth aspect of the present invention includes a setting FET having a source terminal and a gate terminal connected to a low voltage terminal of a power source, which are simultaneously formed in the same semiconductor process as the high voltage side FET, and the power source. Has a setting resistor connected between the high-voltage terminal and the drain terminal of the setting FET, and the voltage at the connection point between the drain terminal of the setting FET and the setting resistor is the gate of the high-voltage side FET. A bias circuit for outputting a DC bias voltage to the terminal is provided.

A high frequency mixer according to a fifth aspect of the present invention is a gate terminal of a high voltage side FET and / or a low voltage side F.
A matching circuit having a high pass filter characteristic is connected to the gate terminal of ET, and a high frequency signal and / or a local signal is input to a predetermined gate terminal via this high pass filter.

In a high frequency mixer integrated circuit according to a sixth aspect of the present invention, the matching circuit is formed by using a matching inductor, and all or part of the matching inductor is formed by a bonding wire and / or a lead. It is what

According to a seventh aspect of the present invention, there is provided a high frequency mixer in which a high voltage side FET has a drain terminal provided with a stabilizing circuit having a low pass filter characteristic.

According to an eighth aspect of the present invention, there is provided a high frequency mixer integrated circuit in which a stabilizing circuit has a stabilizing resistor having one end connected to a drain terminal of a high voltage side FET, the other end of the stabilizing resistor and a low voltage of a power source. From a stabilizing capacitor connected between the terminal or the ground plane and a stabilizing inductor, one end of which is connected to the connection point between the stabilizing resistor and the stabilizing capacitor and which outputs an intermediate frequency signal from the other end. That is, all or part of the stabilized inductor is composed of bonding wires and / or leads.

According to a ninth aspect of the present invention, there is provided a high frequency mixer integrated circuit, wherein a lead for a local signal for inputting a local signal and a lead for a high frequency signal for inputting a high frequency signal are in opposite directions of the package. Is assigned to.

[0024]

BEST MODE FOR CARRYING OUT THE INVENTION An embodiment of the present invention will be described below. Embodiment 1. 1 is a circuit diagram showing a configuration of a high frequency mixer according to Embodiment 1 of the present invention. In the figure, 4
Reference numeral 0 is an input terminal of the high frequency signal to the high frequency mixer, 41 is an input terminal of the local signal to the high frequency mixer, and 42 is an output terminal of the intermediate frequency signal. 2 is a high-voltage side FET whose drain terminal is connected to the output terminal, 1 is a low-voltage side FET whose drain terminal is connected to the source terminal of the high-voltage side FET 2, and 9 is a source terminal of the low-voltage side FET 1. A self-biasing resistor 9 is connected to the ground plane, and a bypass capacitor 10 is arranged in parallel with the self-biasing resistor 9 and bypasses a local signal, a high frequency signal, and an intermediate frequency signal.

Further, 3 is a high resistance whose one end is connected to the gate terminal of the low-voltage side FET 1 and the other end is grounded to the low-voltage terminal (ground plane) of the power source, and 4 is one end of the high-voltage side FET 2. The high resistance is connected to the gate terminal and the other end is grounded to the ground plane, and 5 is provided between the input terminal 41 for the local signal and the gate terminal of the low-voltage side FET 1 and has a high-pass filter characteristic. Matching circuit for local signals (matching circuit)
And 6 is a matching circuit for high frequency signals (matching circuit) provided between the input terminal 40 for the high frequency signal and the gate terminal of the high voltage side FET 2 and having a high pass filter characteristic.
Is. On the other hand, 7 is an intermediate frequency signal matching circuit in the intermediate frequency band provided between the drain terminal of the high-voltage side FET 2 and the output terminal of the intermediate frequency signal,
Reference numeral 8 is a power supply device in which the voltage of the high voltage terminal of the power source is applied to the drain terminal of the high voltage side FET 2 through the matching circuit for the intermediate frequency signal and the low voltage terminal is connected to the ground plane. The high-frequency mixer operates only with the power of the power supply device 8.

In the first embodiment, in particular, the threshold voltage Vth2 of the high voltage side FET2 is the low voltage side FE.
The characteristics of these two FETs 1 and 2 were designed so as to be larger than the knee voltage Vknee1 of T1. Therefore, this characteristic is as shown in FIG. In the figure, 1
Reference numeral 07 is the IV characteristic of the high-voltage side FET 2, and 103 is the IV characteristic of the low-voltage side FET 1. In the characteristic diagram of the drain-source current Ids generated when the gate-source voltage is kept constant and the source-drain voltage is changed, the knee voltage is a voltage line in which the current linearly increases according to the voltage. Is extended and the voltage change line that becomes a constant current regardless of the voltage is extended to obtain the voltage corresponding to the intersection.

The gate terminal of the high-voltage side FET 2 and the gate terminal of the low-voltage side FET 1 are grounded to 0V through the high resistances 3 and 4, respectively. Therefore, in the bias state in which neither the high frequency signal nor the local signal is input, the low voltage side FET1 is in a state in which both the gate terminal and the source terminal are grounded, and the high voltage side FET2 is in a state in which the gate terminal is grounded. A constant bias current (Ids = Ids1 = Id) corresponding to the characteristics of the two FETs is applied to the drain-source Ids of the two FETs 1 and 2.
s2) flows. The operating point at this time is shown by 108 in FIG.

Next, the operation will be described. The high frequency signal and the local signal are input from the input terminals 40 and 41 to the high frequency mixer in the bias state. Then, the gate terminals of the FETs 1 and 2 are grounded via the high resistances 3 and 4, respectively, so that the potential changes according to the input signals. And each FET
When the gate voltages of 1 and 2 change, a channel corresponding to the change is formed between the source terminal and the drain terminal, so that the magnitude of the bias current Ids changes.

In this way, the current flowing through the output terminal of the intermediate frequency signal becomes an alternating current containing a component according to the voltage fluctuation of the high frequency signal and a component according to the voltage fluctuation of the local signal. Then, the high-frequency mixer can output the AC current as an intermediate frequency signal having a predetermined voltage fluctuation, for example, by inserting a predetermined resistor between the power supply and the output terminal. For example,
Fig. 2 shows the fluctuation of the operating point when a local signal is input.
109 of the above.

As described above, according to the first embodiment, as is clear from FIG. 2, the local signal input to the low-voltage side FET1 has the interstage voltage VF higher than the knee voltage Vknee1 of the low-voltage side FET1. It is possible to input with a large amplitude that becomes large. In addition, the operating point at the time of bias can be set to a voltage that is approximately the same as the knee voltage, and the drain-source current Ids greatly changes in accordance with the change in the local signal. Therefore, in the first embodiment, it is possible to input a local signal having a large amplitude,
Moreover, since the drain-source current Ids can be efficiently changed by the local signal, the high frequency signal can be efficiently frequency-converted by the local signal, and the conversion gain as the mixer is significantly improved.

Further, since the high frequency signal is inputted to the FET 2 on the high voltage side, amplification modulation can be performed by the FET to which a sufficient drain-source voltage is applied, so that the intermodulation distortion becomes good.

Embodiment 2. 3 is a circuit diagram showing a configuration of a high frequency mixer according to Embodiment 2 of the present invention. In the figure, 14 is a bias circuit for applying a positive bias voltage to the gate terminal of the high-voltage side FET 2, 11 is a capacitor for preventing high-frequency signals from flowing into the bias circuit 14, and 8 is a predetermined voltage. Power supply, 1
Reference numerals 2 and 13 denote two voltage dividing resistors that divide the voltage of the power supply device at a predetermined division ratio to generate the positive bias voltage. Then, in the second embodiment, the positive bias voltage is adjusted so that the operation state shown in FIG. 2 of the first embodiment is obtained. The rest of the configuration is the same as that of the first embodiment, so the description is omitted.

In the second embodiment, two FEs are used.
Instead of changing the design of T1 and T2, a positive bias voltage is applied to the high-side FET 2 so that the operating points of the two FETs 1 and 2 are the same as in the first embodiment. As a result, similarly to the first embodiment, the high frequency signal is efficiently frequency-converted by the local signal to significantly improve the conversion gain as the mixer, and the high frequency signal is generated by the FET to which a sufficient drain-source voltage is applied. Amplification modulation can be performed to improve intermodulation distortion.

Embodiment 3. 4 is a circuit diagram showing a configuration of a high frequency mixer according to Embodiment 3 of the present invention. In the figure, 18 is a setting circuit for outputting the set value of the interstage voltage VF between the drain terminal of the low-voltage side FET 1 and the source terminal of the high-voltage side FET 2, and 16 and 17 divide the voltage of the power supply device to a predetermined value. Is a dividing resistor for generating the set value of the inter-stage voltage VF, and 15 is composed of an operational amplifier or the like, detects the inter-stage voltage VF and compares it with the set value of the inter-stage voltage VF, and In order to eliminate the voltage difference between the detected value of the voltage VF and the set value, the high voltage side FET 2
Is an output adjustment circuit that outputs a DC bias voltage greater than 0 V to the gate terminal of the. The rest of the configuration is the same as that of the second embodiment, and therefore its explanation is omitted.

In the third embodiment, the high pressure side FE is
Since the positive bias voltage is applied to T2, the same effect as that of the second embodiment can be obtained. Further, in the third embodiment, when the interstage voltage VF fluctuates or is deviated from a predetermined set value due to process variation of the high-voltage side FET 2 or the like or temperature change of the high-voltage side FET 2 or the like. Changes the output voltage so that the output adjustment circuit suppresses the change. Therefore, in the second embodiment, when the threshold voltage Vth2 of the high-voltage side FET2 becomes small due to variations in semiconductor process, etc., the low-voltage side FET1
The voltage VF applied to the input signal becomes small, and the high-frequency signal must be converted by relying on the local signal. However, in the fourth embodiment, even in such a case, a constant conversion efficiency is maintained and the high-frequency signal is efficiently converted. Can be done. In the above description, a combination with the second embodiment has been described, but a similar effect can be obtained with the combination with the first embodiment.

Fourth Embodiment 5 is a circuit diagram showing a configuration of a high frequency mixer according to Embodiment 4 of the present invention. In the figure, 21 is a bias circuit for applying a positive bias voltage to the gate terminal of the high-voltage side FET 2, 8 is a power supply device for generating a predetermined voltage, and 19 is a high-voltage formed simultaneously with the high-voltage side FET 2 in the same process. It is a setting FET created at the same time in the same semiconductor process as the side FET,
Reference numeral 20 is a resistor (voltage generating member) that generates a voltage according to the magnitude of the current. The source terminal and the gate terminal of the setting FET 19 are grounded, so that a predetermined current flows through the resistor. The rest of the configuration is the same as that of the second embodiment, and therefore its explanation is omitted. The current consumption by the bias circuit 21 is
And a much smaller current different from the drain current Ids flowing through the high voltage side FET 2 is flowing.

Therefore, in the fourth embodiment, the high pressure side FE is
Since the positive bias voltage is applied to T2, the same effect as that of the second embodiment can be obtained. Further, in the fourth embodiment, when the inter-stage voltage VF is changed from the predetermined set value or is deviated from the predetermined set value due to the process variation of the high voltage side FET 2 or the like, the temperature change of the high voltage side FET 2, or the like. Is a setting FET 19 formed in the same process.
Also changes similarly, so that the interstage voltage VF can be stabilized at a predetermined set value. Therefore, in the second embodiment, when the threshold voltage Vth2 of the high-voltage side FET2 becomes small due to variations in semiconductor process, etc., the low-voltage side FET1
The voltage VF applied to the input signal becomes small, and the high-frequency signal must be converted by relying on the local signal. However, in the fourth embodiment, even in such a case, a constant conversion efficiency is maintained and the high-frequency signal is efficiently converted. Can be done. Further, a specific setting F for generating the bias voltage
Since the ET 19 is used, the equivalent function can be realized with a circuit smaller than the circuit configuration shown in the third embodiment. In the above description, a combination with the second embodiment has been described, but a similar effect can be obtained with the combination with the first embodiment.

Embodiment 5. 6 is a circuit diagram showing a configuration of a high frequency mixer according to Embodiment 5 of the present invention. In the figure, reference numerals 23 and 25 denote matching inductors for cutting low-frequency components contained in the high-frequency signal, and the matching circuit 6 for the high-frequency signal is constituted by these. Further, 22 and 24 are matching inductors for cutting low-frequency components included in the local signal, and the matching circuit 5 for the local signal is constituted by these. The rest of the configuration is the same as that of the first embodiment, so the description is omitted.

Therefore, these input signals (high frequency signals,
Even if the local signal) includes noises of relatively low frequency components close to the intermediate frequency signal, they are not attenuated by the matching circuits 5 and 6 and input to the FETs 1 and 2. Therefore, in the fifth embodiment, in addition to the effects of the first embodiment, a local signal source (not shown) connected to the local terminal 41 and a high frequency signal source (not shown) connected to the high frequency signal terminal 40 are provided. Even if a noise signal in the intermediate frequency band is output from, the noise in the intermediate frequency band does not mix with the intermediate frequency signal, and the mixer has low noise. Although the above description has been made in combination with the first embodiment, the second embodiment is described.
The same effect can be obtained even in combination with.

Sixth Embodiment FIG. 7 is a circuit diagram showing a structure of a high frequency mixer according to a sixth embodiment of the present invention. In the figure, 26 is a stabilizing resistor connected to the drain terminal of the high-voltage side FET 2, 27 is a stabilizing capacitor 27 connected between the other end of the stabilizing resistor 26 and the ground plane, and 28 is The stabilizing inductor is connected between the connection point of the stabilizing resistor 26 and the stabilizing capacitor 27 and the intermediate frequency matching circuit 7, and the stabilizing inductor 44 having a low-pass filter characteristic is constituted by these. The stabilizing capacitor 27 has a sufficiently high impedance at the local frequency, the high frequency signal frequency, and the intermediate frequency and is set to a negligible capacitance value, and the stabilizing inductor 28 has an impedance at a frequency higher than the intermediate frequency. It is set to have a high value.

Therefore, noise or an unwanted signal having a frequency higher than the high frequency signal frequency or the local frequency is attenuated by the stabilizing resistor 26 and the stabilizing capacitor 27 to prevent instability such as oscillation. Further, since the stabilizing circuit 44 has a small loss at the local frequency, the high frequency signal frequency, and the intermediate frequency, the reduction of the conversion gain by this circuit is suppressed to the necessary minimum. The inductor 28 connected in series to the intermediate frequency matching circuit 7
May also be used as an input section of the intermediate frequency matching circuit 7.

As described above, in the sixth embodiment, in addition to the effects of the first embodiment, the stabilizing circuit is provided between the drain terminal of the high-voltage side FET 2 and the intermediate frequency matching circuit 7, so that the output is It does not oscillate and operates stably. In the above description, the combination with the first embodiment has been described, but the combination with the second embodiment also has the same effect.

Embodiment 7. 8 is a circuit diagram showing a structure of a high frequency mixer integrated circuit according to a seventh embodiment of the present invention. In the figure, 5 is a local signal matching circuit, 6 is a high frequency signal matching circuit, 7 is an intermediate frequency signal matching circuit, and 34 is a high frequency mixer integrated circuit. Further, the high frequency mixer integrated circuit 34 includes a mixer body circuit 29 and a plurality of pads 31 and 3 for signal connection.
A semiconductor chip 30 in which 2, 33 are molded, a package 43 covering the semiconductor chip 30, and a plurality of leads 35, 36, 37 arranged around the package.
And the leads 35, 36, 37 and the pads 31, 3 described above.
The bonding wire 38 connects the second and the second wires 33.

In the seventh embodiment, only the bonding wire 38 and the leads 35, 36 and 37 constitute the matching inductors 23 and 22 of the fifth embodiment and the stabilizing inductor 28 of the sixth embodiment.

Therefore, in the high frequency mixer integrated circuit of the seventh embodiment, it is not necessary to separately provide an element for forming the inductors 23, 22 and 28 on the semiconductor chip 30 or outside the integrated circuit 34. The size could be reduced accordingly. In the above description, the combination with the first embodiment has been described, but the combination with the second embodiment also has the same effect.

Embodiment 8. 8 is a circuit diagram showing a structure of a high frequency mixer integrated circuit according to an eighth embodiment of the present invention. Since each number has been described in the seventh embodiment, it will be omitted. Then, in the eighth embodiment, the local signal lead 35 is arranged on the opposite side of the package 43 from the high frequency signal lead 36 and the intermediate frequency signal lead 37, and they are allocated in opposite directions.

Therefore, in the eighth embodiment, it is possible to reduce the leakage of the local signal into the high frequency signal system circuit and the intermediate frequency signal system circuit, which is a problem in the high frequency mixer.

The mixer main circuit 29 on the semiconductor chip may have any of the circuit configurations of the first to sixth embodiments.

[0049]

As described above, according to the present invention, the two Fs are controlled so that the absolute value of the threshold voltage of the high voltage side FET is at least equal to or higher than the knee voltage of the low voltage side FET.
Since the ET characteristic is set, it is possible to set the operating point in the bias state near the knee voltage Vknee1 of the low-voltage side FET. Therefore, it is possible to input a local signal having an amplitude that fluctuates the operating point in a wide voltage range, and it is possible to efficiently change the drain-source current Ids with the local signal, and as a result, the local signal can be changed. Thus, the frequency of the high frequency signal can be efficiently converted. Further, since the high frequency signal is input to the high voltage side FET, there is an effect that a sufficient operating voltage can be secured and the intermodulation distortion (third order distortion) characteristic can be made good.

According to the present invention, since the DC bias voltage larger than 0 V is applied to the gate terminal of the high voltage side FET, the threshold voltage Vt of the high voltage side FET is applied.
Since h2 becomes high, the operating point in the bias state can be set near the knee voltage Vknee1 of the low voltage side FET. Therefore, it is possible to input a local signal having an amplitude that fluctuates the operating point in a wide voltage range, and it is possible to efficiently change the drain-source current Ids with the local signal, and as a result, the local signal can be changed. Thus, the frequency of the high frequency signal can be efficiently converted. Further, since the high frequency signal is input to the high-voltage side FET, it is possible to secure a sufficient operating voltage and improve the intermodulation distortion (third-order distortion) characteristic.
Furthermore, since no limitation is applied to the threshold voltage of the high-voltage side FET and the low-voltage side FET, the FET
The degree of freedom of selection is widened, and a high frequency mixer can be configured by using FETs that emphasize other characteristics such as noise characteristics, and as a result, high performance and multiple functions can be achieved.

According to the present invention, the setting circuit that outputs the set value of the interstage voltage between the drain terminal of the low-voltage side FET and the source terminal of the high-voltage side FET, and the interstage voltage is detected and the interstage voltage is set. An output adjusting circuit that outputs a DC bias voltage larger than 0V to the gate terminal of the high-voltage side FET so that the voltage difference between the detected value and the set value of the interstage voltage is eliminated as compared with the set value of the voltage. Since the bias circuit composed of is provided, the interstage voltage VF is the knee voltage Vkne of the low-voltage side FET due to process variations and temperature changes.
It is possible to prevent it from becoming smaller than e1, and it is possible to obtain a stable operating point irrespective of process variations and temperature changes.

According to the present invention, the setting FET is formed simultaneously with the high-voltage side FET in the same semiconductor process, and the source terminal and the gate terminal are connected to the low-voltage terminal of the power supply.
And a setting resistor connected between the high-voltage terminal of the power source and the drain terminal of the setting FET, the voltage at the connection point between the drain terminal of the setting FET and the setting resistor is high. Since the bias circuit that outputs the DC bias voltage to the gate terminal of the high-side FET is provided, it is possible to prevent the inter-stage voltage VF from becoming a bias state in which it becomes smaller than the knee voltage of the low-voltage side FET due to process variations and the like. Therefore, stable operation can be performed regardless of process variations. Further, there is an effect that it can be realized by a small-scale circuit as compared with the case where the bias circuit is configured by the setting circuit and the output adjusting circuit.

According to the present invention, a matching circuit having a high-pass filter characteristic is connected to the gate terminal of the high-voltage side FET and / or the gate terminal of the low-voltage side FET, and a high-frequency signal and / or a local signal passes through this high-pass filter. Since the noise signal having a frequency close to the intermediate frequency input from the local signal input terminal and the high frequency signal input terminal is attenuated by the high pass filter, the noise signal is The intermediate frequency signal is not overlapped as it is and is not output from the output terminal. Therefore, there is an effect that a low-noise high-frequency mixer is obtained without disturbing the operation of generating an intermediate-frequency signal from a high-frequency signal or a local signal.

According to the present invention, the matching circuit is constructed by using the matching inductor, and all or part of the matching inductor is the bonding wire and / or the matching wire.
Alternatively, since it is composed of leads, it is possible to reduce (the size of) the inductor outside the chip or the package, and there is an effect that the performance can be improved or the size can be reduced accordingly.

According to the present invention, since the stabilizing circuit having the low-pass filter characteristic is provided at the drain terminal of the high-voltage side FET, the intermediate frequency signal is attenuated while the local signal or the high frequency signal is attenuated. The signal can be output efficiently. Therefore, the output does not oscillate due to a high frequency signal,
Stable operation can be achieved.

According to the present invention, the stabilizing circuit includes a stabilizing resistor having one end connected to the drain terminal of the high-voltage side FET, and the other end of the stabilizing resistor and the low-voltage terminal of the power source or the ground plane. A stabilizing capacitor connected to the stabilizing resistor and a stabilizing inductor having one end connected to the connecting point between the stabilizing resistor and the stabilizing capacitor and outputting an intermediate frequency signal from the other end. Alternatively, since a part of the inductor is formed by the bonding wire and / or the lead, the inductor (size) outside the chip or the package can be reduced, and accordingly, the performance can be improved or the size can be reduced.

According to the present invention, the local signal lead for inputting the local signal and the high frequency signal lead for inputting the high frequency signal are assigned to the leads in opposite directions of the package. One signal does not interfere with the other signal due to crosstalk or the like, and there is an effect that leakage of a local signal into a high frequency signal circuit or an intermediate frequency circuit can be reduced.

[Brief description of drawings]

FIG. 1 is a circuit diagram of a high frequency mixer according to a first embodiment of the present invention.

FIG. 2 is a characteristic diagram of the high frequency mixer of FIG.

FIG. 3 is a circuit diagram of a high frequency mixer according to a second embodiment of the present invention.

FIG. 4 is a circuit diagram of a high frequency mixer according to a third embodiment of the present invention.

FIG. 5 is a circuit diagram of a high frequency mixer according to a fourth embodiment of the present invention.

FIG. 6 is a circuit diagram of a high frequency mixer according to a fifth embodiment of the present invention.

FIG. 7 is a circuit diagram of a high frequency mixer according to a sixth embodiment of the present invention.

FIG. 8 is a seventh embodiment and a eighth embodiment of the present invention.
2 is a circuit diagram of a high frequency mixer integrated circuit according to FIG.

FIG. 9 is a circuit diagram of a conventional high frequency mixer.

10 is a characteristic diagram of the high-frequency mixer of FIG.

[Explanation of symbols]

1 low-voltage side field effect transistor, 2 high-voltage side field effect transistor, 5, 6 matching circuit, 8 power supply, 14
Bias circuit, 15 output adjustment circuit, 18 setting circuit,
19 setting field effect transistor, 20 setting resistance, 22, 23, 24, 25 matching inductor, 26
Stabilizing resistor, 27 stabilizing capacitor, 28 stabilizing inductor, 35, 36, 37 lead, 38 bonding wire, 44 stabilizing circuit.

─────────────────────────────────────────────────── ─── Continued Front Page (72) Inventor Noriko Ogata 2-3-3 Marunouchi, Chiyoda-ku, Tokyo Mitsubishi Electric Corporation (72) Inventor Masayoshi Ono 2-3-2 Marunouchi, Chiyoda-ku, Tokyo Mitsubishi Electric Corporation (72) Inventor Yoshitada Iyama 2-3-3 Marunouchi, Chiyoda-ku, Tokyo Mitsubishi Electric Corporation (72) Inventor Yasushi Yoshii 2-3-2 Marunouchi, Chiyoda-ku, Tokyo Mitsubishi Electric Corporation In-company (72) Inventor Yukio Miyazaki 2-3-3 Marunouchi, Chiyoda-ku, Tokyo Mitsubishi Electric Co., Ltd. (56) Reference JP-A-59-17708 (JP, A) JP-A-1-289304 (JP, A) JP-A-8-222977 (JP, A) JP-A-7-336149 (JP, A) JP-A-8-162852 (JP, A) (58) Fields investigated (Int.Cl. ⁷ , DB name) ) H03D 7/00 H03D 7/12

Claims (9)

(57) [Claims] 1. A field-effect transistor on the high-voltage side, comprising two field-effect transistors connected in a cascade connection between a high-voltage terminal and a low-voltage terminal of a power supply, the high-frequency signal being frequency-converted by a local signal. In the high frequency mixer which outputs the intermediate frequency signal from the drain terminal of the two field effect transistors, the absolute value of the threshold voltage of the high voltage side field effect transistor is at least equal to or higher than the knee voltage of the low voltage side field effect transistor. A high-frequency mixer characterized by setting characteristics of a transistor, inputting a high-frequency signal to the gate terminal of the high-voltage side field-effect transistor, and inputting a local signal to the gate terminal of the low-voltage side field-effect transistor. 2. A high-voltage side field-effect transistor having two field-effect transistors connected in a cascade connection between a high-voltage terminal and a low-voltage terminal of a power supply, the high-frequency signal being frequency-converted by a local signal. In the high frequency mixer which outputs the intermediate frequency signal from the drain terminal of, the DC bias voltage greater than 0V is applied to the gate terminal of the high-voltage side field effect transistor by the bias circuit, and the high frequency signal is input. A high-frequency mixer characterized in that the gate terminal of the low-voltage side field effect transistor is grounded and a local signal is input. 3. A setting circuit for outputting a set value of an interstage voltage between a drain terminal of the low-voltage side field effect transistor and a source terminal of the high-voltage side field effect transistor, and detecting the interstage voltage and detecting the interstage voltage. A DC bias voltage greater than 0V is output to the gate terminal of the high-voltage side field effect transistor so that the voltage difference between the detected value and the set value of the interstage voltage is eliminated as compared with the set value of the interstage voltage. The high frequency mixer according to claim 1, further comprising a bias circuit including an output adjusting circuit. 4. A field effect transistor for setting, which is simultaneously formed in the same semiconductor process as that of a high-voltage side field effect transistor, and whose source terminal and gate terminal are connected to a low voltage terminal of a power supply, a high voltage terminal of the power supply, and the setting. A setting resistor connected between the drain terminal of the field effect transistor for use and a voltage at the connection point between the drain terminal of the setting field effect transistor and the setting resistor The high frequency mixer according to claim 1 or 2, further comprising a bias circuit which outputs a DC bias voltage to the gate terminal. 5. A matching circuit having a high-pass filter characteristic is connected to the gate terminal of the high-voltage side field effect transistor and / or the low-voltage side field effect transistor, and the high-pass signal is used for the high-frequency signal and / or the local signal. The high-frequency mixer according to claim 1 or 2, wherein the high-frequency mixer is input to a predetermined gate terminal via the same. 6. The high frequency mixer according to claim 5, wherein the matching circuit is configured by using a matching inductor, a package for covering the high frequency mixer, a plurality of leads arranged around the package, and A high-frequency mixer integrated circuit, comprising: a bonding wire connecting a lead to the high-frequency mixer, wherein the matching inductor is entirely or partially formed of the bonding wire and / or the lead. 7. The high frequency mixer according to claim 1, wherein a stabilizing circuit having a low-pass filter characteristic is provided at the drain terminal of the high-voltage side field effect transistor. 8. The stabilizing circuit has a stabilizing resistor whose one end is connected to the drain terminal of the high-voltage side field effect transistor,
A stabilizing capacitor connected between the other end of the stabilizing resistor and the low-voltage terminal of the power supply or the ground plane, and one end is connected to the connecting point between the stabilizing resistor and the stabilizing capacitor, and the other end is intermediate. The high frequency mixer according to claim 7, which comprises a stabilizing inductor that outputs a frequency signal, a package that covers the high frequency mixer, a plurality of leads arranged around the package, and each lead connected to the high frequency mixer. A high-frequency mixer integrated circuit, wherein the stabilizing inductor comprises a bonding wire and / or a lead in whole or in part. 9. A high-frequency mixer according to claim 1, a package for covering the high-frequency mixer, and a local signal which is arranged around the package and which receives a local signal to the high-frequency mixer. A high-frequency mixer integrated circuit, comprising: a lead; and a high-frequency signal lead, which is arranged around the package in a direction opposite to the local signal lead and into which a high-frequency signal is input to the high-frequency mixer. .