JP3352139B2 - Encoding device and method - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an encoding apparatus and method for encoding digital image data.

[0002]

2. Description of the Related Art Conventionally, inter-field correlation has been used for selecting processing when encoding image data in a block composed of a plurality of pixels. In other words, if the correlation is weak, the coefficient in the high band at the time of intra-frame orthogonal transform becomes large and the coding efficiency is reduced. Therefore, the intra-field orthogonal transform is selected, and if the correlation is strong, the intra-frame orthogonal transform is selected.

FIG. 6 shows a conventional encoding apparatus that operates as described above.

In FIG. 6, 1 is a block circuit, and 2 is a block circuit.
even / odd data divider, 5 is a subtractor, 6 is an absolute value circuit,
7a is an addition circuit, 8 is a judgment circuit, 9 is a buffer memory,
10 is a selector, 11 is an orthogonal transformation circuit in a frame, 12
Is an intra-field orthogonal transformation circuit.

Next, the operation will be described.

In FIG. 6, data in a pixel block read from the blocking circuit 1 is separated by an even / odd data divider 2 into even field data and one field later.
Divided into odd field data. The difference absolute value of the two data output from the even / odd data divider 2 is calculated by the subtractor 5 and the absolute value circuit 6, and the sum of the difference absolute values in the block is calculated by the addition circuit 7a. The output of the adder circuit 7a indicates the inter-field correlation in the block, and is compared with a threshold value by the judgment circuit 8 to judge the strength of the inter-field correlation in the block. The image data read from the blocking circuit 1 is stored in the buffer memory 9 until the determination circuit 8 outputs the inter-field correlation determination result.
It is adjusted by. The data read from the buffer memory 9 is selected for processing by the selector 10 based on the determination result of the determination circuit 8, and is orthogonally transformed by the intra-frame orthogonal transformation circuit 11 or the intra-field orthogonal transformation circuit 12.

FIG. 7 is an explanatory view of a conventional example, in which white circles indicate bright pixels and black circles indicate dark pixels.

As shown in FIG. 7A or 7B, data in a pixel block (8 × 8 pixels) read from the blocking circuit 1 includes an even field pixel and an odd field pixel one field after the even field pixel. The absolute value of the difference
(Absolute value of difference value between pixels indicated by arrows in (a) and (b))
And the strength of the inter-field correlation in the block is determined using the sum in the block and the threshold value of the determination circuit 8.
If it is determined that the correlation is strong as shown in FIG. 7A, the processing by the intra-frame orthogonal transform circuit 11 (in the discrete cosine transform (DCT) which is orthogonal transform, intra-frame 8 × 8 DCT processing or the like) is selected. If it is determined that the correlation is weak as shown in FIG. 7B, the processing by the intra-field orthogonal transform circuit 12 (similarly, the intra-field 4 × 8 DCT processing) has been selected.

[0009]

In the conventional method as described above, when data in a pixel block has a correlation every two lines (for example, when data in a block is as shown in FIG. 7A), A large difference occurs when comparing the inter-field correlation of the data in the block that is shifted by one line (FIG. 7B) with respect to FIG. 7A. That is, although the inter-field correlation is strong in FIG.
7B, the intra-field processing (intra-field 4 × 8 DCT processing) is performed in FIG. When performing 4 × 8 DCT processing on FIG. 7B, the data in the block is rearranged as shown in FIG. 7C. For this reason, both the even / odd field pixel columns have the highest frequency, and therefore the block in FIG. 7B has the highest vertical frequency. When the intra-frame processing or the intra-field processing is selected according to the inter-field correlation in this manner, the coefficient in the high-frequency region when performing the orthogonal transformation is increased, and there is a possibility that the coding efficiency is reduced. .

SUMMARY OF THE INVENTION The present invention has been made to solve the above-described problems, and has as its object to provide an encoding apparatus and method capable of improving encoding efficiency as compared with the related art.

[0011]

According to the present invention, there is provided an encoding apparatus comprising: input means for inputting an image signal in units of a block composed of a plurality of pixels; and a vertical unit for each pixel column in the block in the vertical direction. Calculating means for calculating the difference between the sum of the pixel values of the odd field pixels arranged in the direction and the sum of the pixel values of the even field pixels arranged in the vertical direction; and Select either the intra-frame orthogonal transformation process or the intra-field orthogonal transformation process,
Encoding means for outputting the image signal encoded by the selected processing. Also,
The encoding method according to the present invention includes an input step of inputting an image signal in a block unit composed of a plurality of pixels, and for each pixel column in the block in a vertical direction, a pixel of an odd field arranged in a vertical direction is arranged. A calculating step of calculating a difference value between the sum of the pixel values and the sum of the pixel values of the pixels of the even-numbered fields arranged in the vertical direction; and an intra-frame orthogonal transformation process and an intra-field orthogonal transformation process according to the operation result And an encoding step of outputting the image signal encoded by the selected processing.

[0012]

[0013]

FIG. 1 shows a first embodiment of the present invention.

In FIG. 1, 1 is a block circuit, 2 is an even / odd data divider for dividing data in a block into even field data and odd field data, 3 and 4 are vertical adders, 5 is a subtractor, 6 Is an absolute value circuit, 7 is a horizontal addition circuit, 8 is a judgment circuit, 9 is a buffer memory, 10 is a selector, and 11 is an intra-frame orthogonal transformation circuit (8
× 8) DCT circuit, and 12 is a (4 × 8) DCT circuit as an intra-field orthogonal transformation circuit.

Next, the operation will be described.

In FIG. 1, image data is read from the blocking circuit 1 in units of 8 × 8 pixel blocks. The image data read from the blocking circuit 1 is divided into even data and odd data by an even / odd data divider 2. Even image data is added by the vertical addition circuit 3 with data of four pixels in the vertical direction. Similarly, the data of the four pixels in the vertical direction are added to the odd image data by the vertical addition circuit 4. The outputs of the vertical addition circuits 3 and 4 are output by the subtractor 5 to ev
The difference value between the en data sum and the odd data sum is calculated, and the absolute value circuit 6 calculates the absolute value of the output of the subtractor 5.
In the horizontal addition circuit 7, the sum of all the absolute values in the block is calculated by adding the output of the absolute value circuit 6 in the block in the horizontal direction. Then, the magnitude of the high-frequency orthogonal transform coefficient of the block is determined by comparing it with a predetermined threshold value by the determination circuit 8.

On the other hand, the image data stored in the buffer memory 9 is subjected to frame processing when the selector 10 determines that the high-frequency orthogonal transform coefficient is small according to the output of the determination circuit 8 (8 × 8). If the DCT circuit 11 is selected, and if the high-frequency orthogonal transform coefficient is determined to be large, the DCT circuit 12 that performs field processing (4 × 8) is selected, and any orthogonal transform (here, DCT) is performed. Done.

FIG. 2 is an explanatory diagram of the first embodiment.

As shown in FIG. 2, if the even data of the pixel data in the block (64 pixels) is e0, e1,..., E32, and the odd data is o0, o1,. o0 +
The absolute value of the difference value from… + o3 is calculated, and then e4 +… + e7
The absolute value of the difference between o4 +… + o7 is calculated, and then the absolute value of the difference between e8 +… + e11 and o8 +… + o11, e1
The absolute value of the difference between 2 + ... + e15 and o12 + ... + o15 is calculated, and then each absolute value is added to the horizontal addition circuit 7
And the determination circuit 8 outputs a determination of the magnitude of the high-frequency orthogonal transform coefficient. By doing so, FIG.
The block shown in FIG. 7A and the block shown in FIG.
The same motion determination result is obtained, and orthogonal transformation suitable for motion can be performed.

FIG. 3 is a diagram showing the correspondence between the first embodiment and the orthogonal transform coefficients.

When the first embodiment is used, the output of the decision circuit 8 indicates the coefficient of the vertical high frequency component of the orthogonal transform coefficient (8 × 8), that is, the approximation of the strength of the hatched portion in FIG. I have.

FIG. 4 shows a second embodiment of the present invention, and portions corresponding to FIG. 1 are denoted by the same reference numerals.

In FIG. 4, the horizontal addition circuit 7 is replaced with a subtractor 5
, The output of the absolute value circuit 6 is applied to the absolute value circuit 6, and the output of the absolute value circuit 6 is applied to the determination circuit 8.

Next, the operation will be described.

The image data read from the blocking circuit 1 in units of 8 × 8 pixel blocks is divided into even data and odd data by an even / odd data divider 2, and the even image data is vertically separated by a vertical addition circuit 3. Data of four pixels in the direction are added, and data of four pixels in the vertical direction are added to the odd image data by the vertical addition circuit 4. The difference between the sum of the even data and the sum of the odd data is calculated from the outputs of the vertical addition circuits 3 and 4 by the subtractor 5, and the output of the subtractor 5 is added in the horizontal processing circuit 7 in the image processing block in the horizontal direction. You. The absolute value of the output of the horizontal addition circuit 7 is calculated by the absolute value circuit 6 and compared with the threshold value by the determination circuit 8 to determine the magnitude of the DC component of the high-frequency orthogonal transform coefficient of the block.

On the other hand, the image data stored in the buffer memory 9 is subjected to frame processing when the selector 10 determines that the DC component of the high-frequency orthogonal transform coefficient is small according to the output of the determination circuit 8 (8). × 8) When the DCT circuit 11 is selected, and when the DC component of the high-frequency orthogonal transform coefficient is determined to be large, the (4 × 8) DCT circuit 12 that performs field processing is selected, and one of the orthogonal transforms is performed. (Here DC
T) is performed.

FIG. 5 is a diagram showing the correspondence between the second embodiment and the orthogonal transform coefficients.

When the second embodiment is used, the output of the decision circuit 8 is the horizontal DC coefficient of the vertical high-frequency component of the orthogonal transform coefficient (8 × 8), that is, the approximation of the size of the hatched portion in FIG. Is shown.

As another method, first, the average value of eight pixels in the horizontal direction is used, and the average value of the even data is added and the average value of the odd data is subtracted in the vertical direction. May be configured to determine the absolute value of.

[0030]

As described above, according to the present invention, the sum of the pixel values of the pixels of the odd field arranged in the vertical direction and the arrangement value of the pixels arranged in the vertical direction are provided for each pixel column in the vertical direction in the block. Since the difference between the pixel value of the pixel in the even field and the sum of the pixel values is calculated to select either the intra-frame orthogonal transformation processing or the intra-field orthogonal transformation processing, the correlation (movement of the image) between the fields in the block is optimized. The determination can be made accurately, and the coding efficiency can be improved.

[Brief description of the drawings]

FIG. 1 is a block diagram showing a first embodiment of the present invention.

FIG. 2 is a configuration diagram for explaining a motion detection process.

FIG. 3 is a configuration diagram showing a correspondence between the first embodiment and orthogonal transform coefficients.

FIG. 4 is a block diagram showing a second embodiment of the present invention.

FIG. 5 is a configuration diagram showing a correspondence between a second embodiment and orthogonal transform coefficients.

FIG. 6 is a block diagram showing a conventional encoding device.

FIG. 7 is a configuration diagram for explaining an operation of a conventional example.

[Explanation of symbols]

 DESCRIPTION OF SYMBOLS 1 Blocking circuit 2 Even / odd data divider 3, 4 Vertical addition circuit 5 Subtractor 6 Absolute value circuit 7 Horizontal addition circuit 8 Judgment circuit 10 Selector 11 (8 × 8) DCT circuit 12 (4 × 8) DCT circuit

Continuation of the front page (58) Field surveyed (Int.Cl. ⁷ , DB name) H04N ^7/ 24-7/68 H04N 1/41-1/419

Claims (2)

(57) [Claims] 1. An input means for inputting an image signal in a block unit composed of a plurality of pixels, and for each vertical pixel column in the block, adding pixel values of pixels in an odd field arranged in the vertical direction. Calculating means for calculating a difference between the value and the sum of the pixel values of the pixels of the even-numbered fields arranged in the vertical direction; and either an intra-frame orthogonal transformation processing or an intra-field orthogonal transformation processing according to the output of the computing means. Encoding means for selecting an image signal and outputting the image signal encoded by the selected processing. 2. An input step of inputting an image signal in units of a block composed of a plurality of pixels, and for each pixel column in the vertical direction in the block, adding pixel values of pixels in an odd field arranged in the vertical direction. An operation step of calculating a difference value between the value and an addition value of pixel values of pixels of even-numbered fields arranged in the vertical direction; and performing one of an intra-frame orthogonal transformation process and an intra-field orthogonal transformation process according to the operation result. And an encoding step of outputting the image signal encoded by the selected processing.