JP3315850B2 - Current-voltage converter - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a current-to-voltage converter comprising a semiconductor integrated circuit or the like, and more particularly to a device capable of accurately maintaining linearity between an input current and an output voltage.

[0002]

2. Description of the Related Art A current-voltage conversion circuit generates a voltage corresponding to an input signal current. FIG. 3 shows signal current generating means.
80 shows an example of a conventional current-voltage conversion means 90 for converting a signal current generated there into a voltage.

This circuit comprises a DC voltage source 31 of a voltage Vcc,
A DC voltage source 32 for outputting a reference voltage Vref, and an output amplitude Vi
n is connected to a voltage source 33 of an input voltage of n, and a signal current generating means 80 is connected to an npn transistor 34 having the same characteristics.
35, and pnp transistors 36, 37, 38, and 39 having the same characteristics as each other and forming a current mirror circuit (transistors 37, 39 are the inputs of the current mirror circuit, and transistors 36, 38 are the outputs of the current mirror circuit. Is)
And a resistor 40 connected between the emitter of the transistor 34 and the emitter of the transistor 35, and current generating means 41 and 42 for generating a current of the same value. Transistor
The current generated by the difference between the current flowing through the transistor 36 and the current flowing through the transistor 34 becomes the output current Iout of the signal current generating means 80 and flows into the current-voltage converting means 90.

The current-voltage conversion means 90 comprises an operational amplifier 48 which operates so that an inverting input terminal to which Iout is inputted and a non-inverting input terminal have the same potential, and a pnp transistor 43 which sets the voltage of the non-inverting input terminal. , 49 and transistor 4
3 and 49, pnp transistors 44 and 50 having the same characteristics, and current generating means 45 for generating a current of the same value.
46, and a resistor 47 connected between the inverting input terminal of the operational amplifier 48 and the emitter of the transistor 50. The output voltage Vout of the current / voltage converter 90 is output from the base of the transistor 44.

Here, the reference voltage Vref of the DC voltage source 32 is
Is set to Vcc / 2 so that the output amplitudes of the operational amplifiers at the front and rear stages in FIG. 3 can be maximized.

Next, the operation of the conventional current-voltage converter will be described.

First, the operation of the signal current generating means 80 will be described. Current value I ₄₂ of the current value I ₄₁ and the current generating means 42 of the current generating means 41 is set such that I ₄₁ = I ₄₂ (Equation 1).

A DC voltage source 34 is connected to the base of the transistor 34.
If the voltage (Vref−Vin) in which the reference voltage Vref of the voltage source 33 is superimposed on the signal voltage Vin of the voltage source 33 is applied, the emitter voltage Ve ₃₄ of the transistor ₃₄ becomes equal to the input voltage (V
ref-Vin), the voltage value is lower by the voltage Vbe ₃₄ between the base and the emitter of the transistor 34.
It is represented as

Ve ₃₄ = Vref−Vin−Vbe ₃₄ (Equation 2) On the other hand, the emitter voltage Ve ₃₅ of the transistor 35 is equal to the reference voltage Vref of the DC voltage source 32 given to the base of the transistor 35. The voltage value is lower than Vref by the voltage Ve ₃₅ between the base and the emitter of the transistor 35, and is expressed as (Equation 3). Ve ₃₅ = Vref−Vbe ₃₅ (Equation 3) Therefore, the difference between the emitter voltage Ve ₃₄ of the transistor ₃₄ and the emitter voltage Ve ₃₅ of the transistor 35 is (Ve ₃₅ −V
e ₃₄ ) The voltage difference occurs. Therefore, a current having a magnitude obtained by dividing the voltage difference (Ve ₃₅ −Ve ₃₄ ) by the resistance value R ₄₀ of the resistor 40 flows through the resistor 40. Assuming that the current value is Id ₄₀ , Id ₄₀ is expressed as (Equation 4).

Id ₄₀ = (Ve ₃₅ −Ve ₃₄ ) / R ₄₀ (Equation 4) By substituting (Equation 2) and (Equation 3) into (Equation 4), (Equation 5)
It is represented as

Id ₄₀ = (Vin + Vbe ₃₄ −Vbe ₃₅ ) / R ₄₀ (Equation 5) The collector current I ₃₄ of the transistor 34 flows from the current value I ₄₁ of the current generating means ₄₁ to the resistor 40 according to Kirchhoff's law. It is a value obtained by subtracting the current value Id ₄₀ , and (Equation 6)
It is represented as

I ₃₄ = I ₄₁ −Id ₄₀ (Equation 6) On the other hand, the collector current I ₃₅ of the transistor ₃₅ is a current value obtained by adding the current value Id ₄₀ flowing through the resistor 40 to the current value I ₄₂ of the current generating means 42. , (Equation 7). I ₃₅ = I ₄₂ + Id ₄₀ (Expression 7) By substituting (Expression 1) into (Expression 7), (Expression 8) is obtained.

I ₃₅ = I ₄₁ + Id ₄₀ (Equation 8) The value of (Vbe ₃₄ −Vbe ₃₅ ) in (Equation 5) is the transistor 34
Collector current I ₃₄ of transistor 35 and collector current I of transistor 35
_{If 35} is used, it is expressed by (Equation 9).

Vbe ₃₄ −Vbe ₃₅ = V _T × ln (I ₃₄ / I ₃₅ ) (Equation 9) where V _T is kT / q (k: Boltzmann constant, T: absolute temperature, q: electron charge) The applied thermal voltage.
(I ₃₄ / I ₃₅₎ in Equation (9), and (6), from (Equation _{8), I 34 / I 35} = (I 41 -Id 40) / (I 41 + Id 40) ( Formula 10) If I ₄₁ >> Id ₄₀ , the value of (I ₃₄ / I ₃₅ ) is almost 1. Therefore, the value of (Vbe ₃₄ -Vbe ₃₅ ) becomes almost zero from (Equation 9). Therefore, (Equation 5) is represented as (Equation 11).

Id ₄₀ = Vin / R ₄₀ (Equation 11) Since the same current as the current I _{35 of the} transistor 35 is inputted to the transistors 37 and 39, the transistors 36 and 38 which become the outputs of the current mirror circuit are also provided. current of the same magnitude as the input current I ₃₅ flows. Therefore, the output current Iout becomes a current value obtained by subtracting the collector current I ₃₄ of the transistor 34 from the output current I ₃₅ of the current mirror circuit is represented by (Equation 12).

Iout = I ₃₅ −I ₃₄ (Equation 12) By substituting (Equation 12) with (Equation 6) and (Equation 8), the output current Iout is expressed by (Equation 13). Iout = (I ₄₁ + Id ₄₀ ) − (I ₄₁ −Id ₄₀ ) = 2 × Id ₄₀ (Equation 13) Therefore, from (Equation 11) and (Equation 13), the relationship between the input voltage and the output current is expressed by (Equation 13) 14). Iout = 2 × Vin / R ₄₀ (Equation 14) As described above, the signal current generating means 80 outputs a current value proportional to the input voltage and Vin and inversely proportional to the resistance R ₄₀ of the resistor 40.

Here, conditions for maximizing the input voltage of the signal current generating means 80 will be described. A voltage (Vref + Vin) in which a reference voltage Vref from the DC voltage source 32 and a signal voltage Vin from the voltage source 33 are superimposed on the base of the transistor 34.
Is added, the emitter voltage Ve ₃₄ of the transistor 34 becomes a voltage value lower than the voltage (Vref + Vin) by the base-emitter voltage Vbe ₃₄ of the transistor 34, and is expressed by (Equation 15).

Ve ₃₄ = Vref + Vin−Vbe ₃₄ (Equation 15) Collector voltage Va ₃ and emitter voltage Ve of transistor 34
_When the voltage difference from the voltage becomes the saturation voltage of the transistor 34, it becomes the upper limit of the input voltage. If this is expressed by an inequality, it is expressed as (Equation 16).

Va ₃ −Ve ₃₄ ≧ Vce _{34 (sat)} (Equation 16) where Vce _{34 (sat)} is the saturation voltage of the transistor 34. By substituting (Equation 15) into (Equation 16) and rearranging,
(Equation 17) is obtained. Vin ≦ Va ₃ −Vref + Vbe ₃₄ −Vce _{34 (sat)} (Equation 17) On the other hand, a voltage (Vref−) in which the reference voltage Vref from the DC voltage source 32 and the signal voltage Vin from the voltage source 33 are superimposed on the base of the transistor 34. Vin), the emitter voltage Vce ₃₄ of the transistor ₃₄ becomes equal to the voltage (Vref-
Vin) from the base-emitter voltage Vbe of the transistor 34
_The voltage value is reduced by ₃₄ and is represented by (Equation 18).

Ve ₃₄ = Vref−Vin−Vbe ₃₄ (Equation 18) Assuming that the current generating means 41 is composed of a transistor, the emitter voltage Ve ₃₄ of the transistor ₃₄ is
Is the lower limit of the input voltage. This is expressed as (Equation 19) by inequality.

Ve ₃₄ ≧ Vce _(sat) (Equation 19) where Vce _(sat) is the saturation voltage of the transistor constituting the current generating means 41.

By substituting (Equation 18) for (Equation 19) and rearranging, it is expressed as (Equation 20). Vin ≧ Vref−Vbe ₃₄ −Vce _(sat) (Equation 20) In order to maximize the input voltage of the signal current generating means 80, it is necessary to set the right side of (Equation 17) to be larger than the right side of (Equation 20). I just need. Expressing this as an inequality, (Equation 2
It becomes like 1).

Va ₃ −Vref + Vbe ₃₄ −Vce _{34 (sat)} ≧ Vref−Vbe ₃₄ −Vce _(sat) (Equation 21) In (Equation 21), Vce _{34 (sat)} and Vce _(sat) may be considered to be equal. Therefore, (Equation 21) becomes (Equation 22).

Va ₃ ≧ 2 × Vref−2 × Vbe ₃₄ (Expression 22) Since (2 × Vref) in (Expression 22) is equal to Vcc, (Expression 22) is expressed as (Expression 23).

Va ₃ ≧ Vcc−2 × Vbe ₃₄ (Equation 23) Accordingly, the collector voltage Va ₃ of the transistor 34 is expressed by (Equation 2)
By setting as in 3), the input voltage of the signal current generating means 80 can be maximized, but the voltage value of Va ₃ has an upper limit. Va ₃ becomes the maximum value when the transistor 36 is saturated, and the base-emitter voltage Vbe ₃₈ of the transistor ₃₈ and the saturation voltage Vce
_The voltage value is reduced by _{36 (sat)} . If this is expressed by an inequality, it is expressed by (Equation 24).

Va ₃ ≦ Vcc−Vbe ₃₈ −Vce _{36 (sat)} (Equation 24) Accordingly, when (Equation 23) and (Equation 24) are put together into one,
It is expressed as (Equation 25). In _{Vcc-2 × Vbe 34 ≦ Va} 3 ≦ Vcc-Vbe 38 -Vce 36 (sat) ( Formula 25) (Formula 25), Vcc = 5V, Vbe 34 = Vbe 38 = 0.7
V, Vce _{36 (sat)} = 0.2V, the transistor 34
It can be seen that the collector voltage can be set to 3.6 V or higher and 4.1 V or lower.

Next, the operation of the current / voltage conversion means 90 will be described.

The operational amplifier 48 has a negative feedback circuit and operates so that the inverting input terminal and the non-inverting input terminal have the same potential. Assuming that the voltage at the inverting input terminal of the operational amplifier 48 is Va ₄ and the voltage at the non-inverting input terminal is Vb ₄ , the operation of the operational amplifier 48 gives Va ₄ = Vb ₄ (Equation 26). This Vb ₄ is applied to the reference voltage Vref by the transistor 43.
The sum of the base-emitter voltage Vbe ₄₃ and the base-emitter voltage Vbe _{49 of the} transistor 49 becomes Vb ₄ = Vref + Vbe ₄₃ + Vbe ₄₉ (Equation 27). Here, Vb ₄ is set so that Va ₄ = 3.9 V in order to maximize the input voltage of the signal current generating means 80. From (Equation 26), Va ₄ is expressed as (Equation 28).

Va ₄ = Vref + Vbe ₄₃ + Vbe ₄₉ (Equation 28) The input current supplied to the inverting input terminal of the operational amplifier 48 by the signal current generating means 80 flows through the resistor 47, is converted into a voltage, and is output. If the resistance of the resistor 47 is R ₄₇ , the current flowing through the resistor 47 is Id ₄₇ , the base-emitter voltage of the transistor ₅₀ is Vbe ₅₀ , and the base-emitter voltage of the transistor 44 is Vbe ₄₄ , the output voltage Vout is From the voltage Va _{4 at} the inverting input terminal to the voltage at the resistor 47 (R ₄₇ × I
d ₄₇ ) and the base-emitter voltage Vbe of the transistor 50
_Since the voltage value is reduced by ₅₀ and the voltage Vbe ₄₄ between the base and the emitter of the transistor 44, it is expressed by (Equation 29).

Vout = Va ₄ −R ₄₇ × Id ₄₇ −Vbe ₅₀ −Vbe ₄₄ (Equation 29) If the amplification factor of the operational amplifier 48 is infinite, Id ₄₇ becomes Iout
(Equation 29) is represented by (Equation 30).

[0031] _{Vout = Va 4 -R 47 × Iout} -Vbe 50 -Vbe 44 ( Equation 30) further and rearranging by substituting (equation 28), Vout is expressed by Equation (31).

[0032] _{Vout = Vref + Vbe 43 + Vbe} 49 -R 47 × Iout-Vbe 50 -Vbe 44 = Vref-R 47 × Iout + (Vbe 43 -Vbe 44) + (Vbe 49 -Vbe 50) ( Equation 31) Here, ( _{Vbe 43 -Vbe 44) + (Vbe} 49 -Vbe 50) if it is possible to be _{zero, Vout = Vref-R 47 ×} Iout
Thus, a linear conversion from the input current to the output voltage becomes possible. This (Vbe ₄₃ -Vbe ₄₄ ) + (Vbe ₄₉ -Vbe ₅₀ )
Is determined next.

Since the current value I ₄₅ of the current generating means ₄₅ and the current value I ₄₆ of the current generating means 46 are set so that I ₄₅ = I ₄₆ (Equation 32), the operating current I of the transistors 43 and 49 is obtained. ₄₃ is equal to the current value I ₄₅ of the current generating means 45,
It is represented by (Equation 33).

I ₄₃ = I ₄₅ (Equation 33) On the other hand, the operating current I ₄₄ of the transistors _{44 and} 50 is the current Id ₄₇ flowing through the resistor 47 to the current value I ₄₆ of the current generating means 46, that is, the current obtained by adding Iout. the value I ₄₄ = I ₄₆ + Iout (equation 34), and by substituting equation (32) to (equation 34), I ₄₄ is represented by (equation 35). I ₄₄ = I ₄₅ + Iout (Equation 35) Assuming that the saturation current of the transistor 43 and the transistor 44 is Is, the base-emitter voltage Vbe _{43 of the} transistor ₄₃
Is represented by Vbe ₄₃ = V _T × ln (I ₄₃ / Is), and is substituted by (Expression 33), and is represented by (Expression 36).

Vbe ₄₃ = V _T × ln (I ₄₅ / Is) (Equation 36) On the other hand, the base-emitter voltage Vbe of the transistor 44
₄₄ is expressed by Vbe ₄₄ = V _T × ln (I ₄₄ / Is), and by substituting (Equation 35), it is expressed by (Equation 37).

Vbe ₄₄ = V _T × ln {(I ₄₅ + Iout) / Is} (Equation 37) According to (Equation 36) and (Equation 37), (Vbe ₄₃ of (Equation 31)) is obtained.
−Vbe ₄₄ ) is represented by (Equation 38).

(Vbe ₄₃ −Vbe ₄₄ ) = V _T × ln {I ₄₅ / (I ₄₅ + Iout)} (Equation 38) Similarly, the term of (Vbe ₄₉ −Vbe ₅₀ ) in (Equation 31) is expressed by (Equation 31). 39).

[0038] _{(Vbe 49 -Vbe 50) = V} T × ln {I 45 / (I 45 + Iout)} 200μA (Formula 39) I _45, 20μA to Iout, 10 k.OMEGA the R ₄₇
, The expected value (−R ₄₇ × Iout) of the amplitude of Vout in (Equation 31) is −200 mV, and the error ((Vb
e ₄₃ −Vbe ₄₄ ) + (Vbe ₄₉ −Vbe ₅₀ )) is given by (Equation 38)
From (Equation 39), it becomes −5 mV. That is, an error of 2.5% occurs with respect to Vout. This error makes I ₄₅ Iout
However, if it is made sufficiently large, the size can be reduced, but the current consumption increases.

[0039]

As described above, in the conventional structure, the voltage between the base-emitter voltage Vbe ₄₃ of the transistor ₄₃ and the base-emitter voltage Vbe ₄₄ of the transistor 44 is calculated as shown in (Equation 38). Since a voltage difference is generated and a voltage difference is generated between the base-emitter voltage Vbe ₄₉ of the transistor ₄₉ and the base-emitter voltage of the transistor 50 as shown in (Equation 39), the output voltage Vout becomes Vout
_{= Vref-R 47 × Iout +} (Vbe 43 -Vbe 44) + (Vbe 49
-Vbe _50), and the amplitude of the expected value of Vout (-R ₄₇ × Io
ut), ((Vbe ₄₃ −Vbe ₄₄ ) + (Vbe ₄₉ −Vbe
There is a problem that an error occurs in the output voltage only by the value of ₅₀ )).

An object of the present invention is to solve such a problem, and an object of the present invention is to provide a current-voltage converter having excellent linearity between an input current and an output voltage.

[0041]

Therefore, in the current-to-voltage converter of the present invention, two sets of current mirror circuits each having an input terminal of the first current mirror circuit and an output terminal of the second current mirror circuit are connected. The input terminal of the second current mirror circuit is connected to a transistor forming a negative feedback circuit of the operational amplifier, and the output terminal of the first current mirror circuit sets the voltage of the non-inverting input terminal of the operational amplifier. Connected to transistor.

Therefore, the same current flows through these transistors, the error in the output voltage is eliminated, and good linearity can be maintained.

[0043]

DESCRIPTION OF THE PREFERRED EMBODIMENTS The invention according to claim 1 of the present invention relates to an operational amplifier which operates so as to keep the inverting input terminal and the non-inverting input terminal to which a signal current is input at the same potential through a negative feedback circuit. A first element group consisting of one or more elements for setting the voltage of the non-inverting input terminal, a resistor and a second element group forming a negative feedback circuit, and a current supplied to one end of the second element group And a current generating means, wherein the elements constituting the second element group are set so as to have the same characteristics as the elements of the first element group. And two sets of current mirror circuits connecting the output terminal of the second current mirror circuit and
The input terminal of the second current mirror circuit is connected to the other end of the second element group, and the output terminal of the first current mirror circuit is connected to one end of the first element group. By supplying the same current to the element group and the second element group, an error in the output voltage is eliminated.

According to a second aspect of the present invention, the elements of the first element group and the second element group are constituted by using transistors, diodes or resistors, so that various elements can be used. I have.

According to a third aspect of the present invention, the first current generating means is connected between the input terminal of the second current mirror circuit and the ground potential, and the output terminal of the first current mirror circuit is connected to the output terminal of the first current mirror circuit.
A second current generating means for supplying the same current value as that of the first current generating means to the first element group;
And reducing the current flowing through the second current mirror circuit,
The power consumption is reduced.

Hereinafter, embodiments of the present invention will be described with reference to the drawings.

(Embodiment 1) As shown in FIG. 1, a current-voltage converter according to a first embodiment of the present invention
Current source 11 for generating Iout from the signal current generating means 80 of FIG.
A DC voltage source 12 for outputting a reference voltage Vref;
c, a DC voltage source 22, an operational amplifier 21 that operates so that an inverting input terminal and a non-inverting input terminal have the same potential, and pnp transistors 13 and 23 that set the voltage of the non-inverting input terminal.
And pnp transistors 14 and 24 having the same characteristics as the transistors 13 and 23, current generating means 19 connected between the transistor 24 and the DC voltage source 22, and an inverting input terminal of the operational amplifier 21 and the transistor 24. And a resistor 20 connected between the emitters of the transistors 15 and 16 forming the first current mirror circuit 60 (transistors 15 and 16).
Are the inputs of the current mirror circuit, the transistor 16 is the output of the current mirror circuit), and the npn transistors 17 and 18 forming the second current mirror circuit 70 (the transistor 18 is the input of the current mirror circuit and the transistor 17 is the output of the current mirror circuit).

Next, the operation of the current-to-voltage converter shown in FIG. 1 will be described. The operational amplifier 21 has a negative feedback circuit and operates so that the inverting input terminal and the non-inverting input terminal of the operational amplifier 21 have the same potential. Assuming that the voltage at the inverting input terminal of the operational amplifier 21 is Va ₁ and the voltage at the non-inverting input terminal is Vb ₁ , the operation of the operational amplifier 21 results in Va ₁ = Vb ₁ (Equation 40). Here, the current source 11 for generating Iout is
In order to maximize the input voltage of the signal current generating means 80, it is assumed that Va ₁ = 3.9.
Vb ₁ is set to V. This value of Vb ₁ is
The base-emitter voltage Vbe ₁₃ of the transistor ₁₃ and the base-emitter voltage Vbe of the transistor 23 are added to the reference voltage Vref.
₂₃ and the voltage value Vb ₁ = Vref + Vbe ₁₃ + Vbe ₂₃ (Equation 41). From (Equation 40), Va ₁ is expressed as (Equation 42).

Va ₁ = Vref + Vbe ₁₃ + Vbe ₂₃ (Expression 42) The input current supplied to the inverting input terminal of the operational amplifier 21 by the current source 11 flows into the resistor 20, is converted into a voltage, and is output. The resistance value of the resistor 20 is R ₂₀ , and the current flowing through the resistor 20 is I
d ₂₀ , the voltage between the base and the emitter of the transistor 24 is Vb
e ₂₄ , the base-emitter voltage of the transistor 14 is set to Vbe ₁₄
When the output voltage Vout from the voltage Va ₁ of the inverting input terminal of the operational amplifier 21, the voltage at the resistor ₂₀ (R 20 × Id 20)
And the base-emitter voltage Vbe _{24 of} the transistor 24,
Since the voltage value is lower than the voltage Vbe ₁₄ between the base and the emitter of the transistor 14, it is expressed by (Expression 43).

[0050] When the amplification factor of _{Vout = Va 1 -R 20 × Id} 20 -Vbe 24 -Vbe 14 ( Equation 43) the operational amplifier 21 is infinite, Id ₂₀ is Iout
And is represented by (Equation 44).

[0051] _{Vout = Va 1 -R 20 × Iout} -Vbe 24 -Vbe 14 ( Equation 44) further and rearranging by substituting (equation 42), Vout is expressed by Equation (45).

[0052] _{Vout = Vref + Vbe 13 + Vbe} 23 -R 20 × Iout-Vbe 24 -Vbe 14 = Vref-R 20 × Iout + (Vbe 13 -Vbe 14) + (Vbe 23 -Vbe 24) ( Equation 45) transistors 14 and 24 The current value I ₁₉ of the current generating means ₁₉
Then, a current Id ₂₀ flowing through the resistor 20, that is, a current value (I ₁₉ + Iout) obtained by adding Iout flows. The current flowing through the transistors 14 and 24 is fed back by the current mirror circuit 60 and the current mirror circuit 70, so that the transistors 13 and
Since the current is supplied to the transistor 23, the operating current of the transistors 13 and 23 is equal to the operating current of the transistors 14 and 24, and the current value is (I ₁₉ + Iout). That is, Vbe in (Equation 45)
Values of ₁₃ and Vbe _14, when the saturation current of the transistor 13 and the transistor 14, Is, is expressed as _{Vbe 13 = Vbe 14 = V T} × ln {(I 19 + Iout) / Is} ( Equation 46) both equal Become. Therefore, as the term (equation 45) in (Vbe ₁₃ -Vbe ₁₄₎ is represented by _{(Vbe 13 -Vbe 14) = 0} ( Equation 47) becomes zero. Similarly, the term (Vbe ₂₃ −Vbe ₂₄ ) in (Equation 45) also becomes zero, as represented by (Vbe ₂₃ −Vbe ₂₄ ) = 0 (Equation 48). Therefore, (Equation 45)
It can be a (Equation 47) and (Equation 48), Vout = Vref-R 20 × Iout ( Equation 49).

[0053] In this current-voltage conversion device, a method of setting the voltage Vb ₁ of the non-inverting input terminal of the operational amplifier 21, but connects the pnp transistor to two series as transistors 13 and 23, The number of transistors connected in series may be changed according to the power supply voltage Vcc. Also, instead of transistors, diodes, FETs, CMOs
Vb ₁ may be set with S, a resistor, or the like. In that case, the configurations of the transistors 14 and 24 need to be changed in the same manner.

(Embodiment 2) The current-voltage converter of the second embodiment is connected between the output terminal of the first current mirror circuit 60 and the DC voltage source 22, as shown in FIG. It comprises a current generating means 25 and a current generating means 26 connected between the input terminal of the second current mirror circuit 70 and the ground potential. Other configurations are the same as those of the first embodiment.

In this current-voltage converter, the current generating means
The current values of 25 and 26 are set to be equal to the current value I ₁₉ of the current generating means 19. The transistors 14 and 24 have a current value I ₁₉ of the current generating means 19 and a current Id flowing through the resistor 20.
₂₀ , ie, a current value (I ₁₉ + Iout) to which Iout is added flows. The current I ₁₉ of the current generating means 26 is
After pulling out from 14 collectors, current mirror circuit 60
And the current mirror circuit 70 feeds back only the current Id ₂₀ flowing through the resistor ₂₀ , that is, Iout. Then, in addition to the current I ₁₉ of the current generating means 25, the transistor
Since the current is supplied to the transistors 13 and 23, the operating current of the transistors 13 and 23 is equal to the operating current of the transistors 14 and 24, and the current value is (I ₁₉ + Iout). Therefore, similarly to the current-voltage converter shown in FIG. 1, the error of Vout does not appear.

Further, according to this method, the current consumption is reduced as compared with the case of FIG. That is, the sum of When Itotal1 the total current of the circuit in the case of FIG. 1, Itotal1 the current of the current mirror circuit _{70 (2 × (I 19 +} Iout)), and the current flowing through the transistor 13,23 (I ₁₉ + Iout) And is represented by (Equation 50).

Itotall = 2 × (I ₁₉ + Iout) + (I ₁₉ + Iout) = 3 × I ₁₉ + 3 × Iout (Equation 50) On the other hand, if the total current of the circuit in the case of FIG.
Itotal2 The current I ₁₉ of the current generating means 26, the current of the current mirror circuit 70 (2 × Iout), transistors 13 and 23
Is obtained as the sum of the current (I ₁₉ + Iout) flowing through
(Expression 51).

[0058] _{Itotal2 = I 19 + 2 × Iout} + (I 19 + Iout) = 2 × I 19 + 3 × Iout ( Equation 51) Therefore, the difference between Itotal2 and Itotal1, from (Equation 50) and (Equation 51), Itotal2- I total1 = −I ₁₉ (Equation 52), and the current consumption can be reduced by I ₁₉ .

[0059]

As is apparent from the above description, the current-to-voltage converter of the present invention uses two sets of current mirror circuits to reduce the current flowing through the transistors 24 and 14 and the transistor.
By making the currents flowing through 23 and 13 equal, the following effects are obtained.

1. An error in the output voltage when the input current is converted to the output voltage is eliminated, and good linearity in the conversion is maintained.

[0061] 2. Since the linearity can be maintained regardless of the magnitude of the current flowing through each transistor, the operating current of each transistor can be reduced.

3. Even if the bias of the current input terminal is set independently, a current-voltage converter with good linearity can be configured.

In a device in which two current generating means are provided so that the current mirror circuit operates only with the input current of the current-voltage converter, the current consumption of the entire circuit can be reduced.

[Brief description of the drawings]

FIG. 1 is a circuit diagram showing a configuration of a current-to-voltage converter according to a first embodiment of the present invention.

FIG. 2 is a circuit diagram showing a configuration of a current-to-voltage converter according to a second embodiment of the present invention.

FIG. 3 is a circuit diagram showing a configuration of a conventional current-voltage converter.

[Explanation of symbols]

11 Current source 12, 32 DC voltage source for reference voltage Vref 13, 14, 15, 16, 17, 18, 23, 24, 34, 35, 36, 37, 3
8, 39, 43, 44, 49, 50 Transistors 19, 25, 26, 41, 42, 45, 46 Current generating means 20, 40, 47 Resistors 21, 48 Operational amplifiers 22, 31 Voltage source of voltage Vcc 33 Voltage source 60, 70 Current mirror circuit 80 Signal current generator 90 Current-voltage converter

Continuation of the front page (58) Field surveyed (Int.Cl. ⁷ , DB name) H03F 1/32 H03F 3/34 H03F 3/343 H03F 3/45

Claims (3)

(57) [Claims] 1. An operational amplifier operable to maintain an inverting input terminal and a non-inverting input terminal, to which a signal current is input, at the same potential through a negative feedback circuit, and one or a plurality of terminals for setting a voltage of the non-inverting input terminal. A first element group consisting of the following elements:
A resistor and a second element group forming the negative feedback circuit; and a current generating means for supplying a current to one end of the second element group, wherein the element forming the second element group is the first element. A current-voltage converter set to have the same characteristics as the elements of the element group, wherein two sets of current mirror circuits connecting the input terminal of the first current mirror circuit and the output terminal of the second current mirror circuit And the input end of the second current mirror circuit is connected to the other end of the second element group, and the output end of the first current mirror circuit is connected to one end of the first element group. A current-voltage converter characterized by the above-mentioned. 2. The current-to-voltage converter according to claim 1, wherein each of the first and second element groups comprises a transistor, a diode, or a resistor. 3. A first current generating means is connected between an input terminal of the second current mirror circuit and a ground potential, and the first current generating circuit is connected to an output terminal of the first current mirror circuit. 3. The current-to-voltage converter according to claim 1, wherein a second current generating means for supplying the same current value as the means to the first element group is connected.