JP3314403B2 - Method for manufacturing semiconductor integrated circuit device - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention is suitable for fine processing of a surface.
Related to dry etching technology , in particular, to prevent reaction products generated by etching from re-adhering to the wafer,
High-precision dry etching that prevents the effects of reaction products
The present invention relates to a method for manufacturing a semiconductor integrated circuit device including steps .

[0002]

2. Description of the Related Art A dry etching technique used as a fine processing method of a semiconductor integrated circuit (LSI) requires a high precision of 0.1 μm level as the LSI becomes finer. However, the conventional RIE etching usually requires 10
Since etching was performed at a relatively high gas pressure of mTorr to 100 mTorr, the directionality of ions incident on the substrate was disturbed due to scattering of ions in gas plasma or the like, and high-precision processing was difficult. As described above, etching was performed at a high gas pressure because, first, it was difficult to obtain a stable discharge at a low gas pressure, and second, it was not possible to obtain a sufficient etching rate at a low gas pressure. Met. In recent years, etching that performs high-efficiency discharge at a lower gas pressure to prevent the scattering of ions in gas plasma and obtain a certain etching rate has been studied.
For example, Japanese Patent Publication No. 52-126174 and Solid State Devices and Materials, p.
90) (Solid State Devices and Materials p20
7, (1990)), the magnetron discharge type RIE described in the dry process symposium p54, (1988), the Journal of Vacuum Science Technology B9 (2), 310 ( 1991) (Jour
nal of Vacuum Science Technology B9 (2), 310
(1991)) has been developed.

In these apparatuses, for example, as in the ECR etching described in the former, polysilicon is etched at a low gas pressure of 0.5 mTorr and a gas flow rate of Cl 220 sccm. At this time, the etching rate of the polysilicon was 300 nm / min or less .

[0004] However, in the case of a Si trench or a Si02 contact hole in which a deep groove must be etched, there has been a problem that the etching rate is too low with a similar low gas pressure. As described above, in the conventional etching method, it is difficult to improve the directionality of etching at a low gas pressure of 0.5 mTorr or less and obtain a high etching rate at a low gas pressure. An object of the present invention is to provide a process of performing dry etching at a high etch rate by preventing a reaction product generated by etching from being re-incident on a wafer and adhering to a surface, thereby preventing an effect of inhibiting an etching reaction.
To provide a method of manufacturing a semiconductor integrated circuit device including the same.

[0005]

In order to accelerate the reaction by etching the processing gas with the sample surface as much as possible, a large amount of unreacted processing gas is introduced, the gas and the sample surface react efficiently, and the etching is performed. It is necessary to prevent the generated reaction product from re-entering the wafer surface. When this reaction product adheres to the wafer surface, it covers the etched surface and hinders the incidence of particles that cause an etching reaction. As a result, the etching reaction is suppressed, and the etch rate decreases. Such an effect is particularly significant when the absolute number of etching reaction particles is small under a high vacuum. In order to prevent this effect, it is important to discharge the reaction product out of the vacuum processing chamber in a short time after the reaction product has desorbed from the wafer, and to capture it with a cooling trap before re-entering the wafer. Can be

Therefore, one typical configuration of the present invention is to install a wafer in a processing chamber, introduce an etching gas into the processing chamber, convert the etching gas into plasma, and use the plasma to form a main surface of the wafer. A method of manufacturing a semiconductor integrated circuit device including a step of dry-etching a material, wherein a pressure in a plasma atmosphere is reduced by evacuating the inside of the container during dry etching using an exhaust pump having a total exhaust speed of 2000 l / s or more. A method for producing a semiconductor integrated circuit device, wherein the reaction product of the etching gas and the material of the wafer main surface is captured by a cooling trap provided in the processing chamber. It is in.

In order to efficiently prevent the reaction product from re-entering the wafer, it is necessary to install a cooling trap as close to the wafer as possible. The guideline for this installation position is to install the reaction product at a position where it is trapped before the reaction product collides with the inner wall of the processing chamber and changes its direction toward the wafer. It is effective to install at a position five times the mean free path or less than 50 cm. Although the material of the cold trap it is necessary to use a metal having high thermal conductivity, so as not to source such as metal contamination, it must be used a metal such as a high-purity aluminum Invite example embodiment.

[0008]

Here, the amount of reaction products generated will be considered by taking Si etching as an example. The areal density of single-crystal Si is 5 × 10 ¹⁴ / cm ² per 1 cm ² , and when this is etched at a rate of, for example, 1 μm / min, a reaction product of 5 × 10 ¹⁸ / cm ² per min is generated. Meanwhile, 1
The amount of incident etching gas at a gas pressure of mTorr is 2 × 10 ¹⁹ / cm ² per minute. Therefore, if all the reaction products re-enter the wafer, 20% of all the incident particles become the reaction products.

The speed of particles such as etching gas and reaction products is about 400 m / sec at room temperature, and the mean free path at 0.5 mTorr is about 16 cm. From this, for example, most of the particles colliding with the wall 16 cm away from the wafer collide with the wall without collision between the particles, and the average number of collisions is 2500 times / sec. If it hits the wall and returns straight to the wafer, the reaction product is 1se
1250 times per c.

[0010] Further, as an amount indicating the ease of gas flow in the vacuum processing chamber, there is a gas residence time in the processing chamber, which is represented by the following equation.

Τ = V / S (= PV / Q) (1) where V is the total volume of the vacuum processing chamber, S is the pumping speed, P is the gas pressure, and Q is the gas flow rate.

For example, a processing chamber having a volume of 100 l
If the gas is exhausted at an exhaust speed of 00 l / sec, the gas residence time is 77 msec. When performing such high-speed exhaust,
The number of times the reaction product collides with the wafer during 77 msec staying in the processing chamber is reduced to 96 times. However, such re-incidence of the reaction product may also affect the etching reaction, and it is effective to install a cooling trap in the processing chamber to further reduce this. If the temperature of the cooling trap is set to be equal to or lower than the condensation temperature of the reaction product, the reaction product that once collides with the cooling trap is physically adsorbed there and hardly desorbed again. By this effect, re-incidence of reaction products on the wafer can be significantly reduced. FIG. 1 shows the vapor pressures of the etching gas and the main reaction product. For example, considering the case where Cl ₂ is used as an etching gas and SiCl ₄ is generated as a reaction product, when etching is performed at a gas pressure of 0.5 mTorr, the respective condensing temperatures are −150 ° C. and −110 ° C.
° C. Therefore, the temperature of the cooling trap is set to -15.
If the temperature is set between 0 ° C. and −110 ° C., for example, −140 ° C., the etching can be performed without adsorbing the etching gas while adsorbing the reaction product SiCl ₄ on the trap.

When high-speed exhaust is not performed using only the cooling trap, a large amount of reaction products is accumulated in the cooling trap,
Some of them may be desorbed again. In such a situation, the effect of the cooling trap is insufficient, and it is not possible to minimize the re-incident of the reaction product to the wafer. Therefore, it is important to apply both a cooling trap and high speed exhaust.

[0014]

【Example】

(Embodiment 1) FIG. 2 shows an embodiment of a high-speed exhaust microwave plasma etching apparatus according to the present invention. Vacuum processing chamber 1
An etching gas is introduced into the microwave generator 2 to generate a high frequency of 2.45 GHz in the microwave generator 2.
To transport to the discharge part 4 to generate gas plasma 5. A solenoid coil 6 for generating a magnetic field is arranged around the discharge part for high-efficiency discharge, and an electron cyclotron resonance (Electron Cyclotron Resonan) is generated by a magnetic field of 875 Gauss.
ce: ECR) generates high-density plasma. A sample stage 7 is provided in the discharge unit, and a wafer 8 placed on the sample stage 7 is subjected to etching processing by gas plasma.

The processed etching gas is discharged from the gas inlet 9 through the discharge unit 4 and the vacuum processing chamber 1 to the outside of the vacuum processing chamber from the exhaust pipe 10 by the exhaust pump 11. At this time, the exhaust speed can be changed by making the conductance valve 12 variable. The processing gas passes through a gas flow controller 13, passes through a gas pipe 14, and is introduced into the discharge unit 4 from a gas inlet 9 through a buffer chamber 15 having small holes formed in a mesh shape. Two or more gas inlets 9 were provided and arranged symmetrically with respect to the central axis of the discharge part.

On the sample stage on which the wafer is set, the wafer
A cooling mechanism 16 for cooling to 13.degree.
An RF bias 17 from MHz to 400 KHz can be applied. A cooling trap 18 is installed in the vacuum processing chamber,
Reaction products can be trapped. The cooling trap is provided with a heating means 19, which can be heated to room temperature or higher to regenerate the trap by removing reaction products from the cooling trap after completion of the etching process.

The pump has a pumping speed of 2000 l / sec.
Using two turbo molecular pumps with a total pumping speed of 4000
1 / sec and arranged symmetrically with respect to the central axis of the discharge part. The total exhaust conductance of the discharge part, the vacuum processing chamber, the exhaust pipe, and the conductance valve serving as a gas passage is 400.
0 l / sec. At this time, the effective pumping speed is 2000
1 / sec. The total volume of the discharge part, the vacuum processing chamber, and the exhaust pipe is 100 l, and the gas residence time in the vacuum processing chamber is 50 msec from the above equation (1).

Using this high-speed evacuation microwave plasma etching apparatus, an Si single crystal used for a Si trench was etched. The sample is a 500 nm Si substrate
A thermal oxide film is formed to a thickness of, and a photoresist mask is formed thereon. After dry etching of the oxide film, the photoresist is removed to form a SiO ₂ mask. Cl ₂ is used as an etching gas, gas pressure is 0.5 mTorr,
Microwave power 500W, RF bias is 2 at 2MHz
0 W and the wafer temperature were -30 ° C. The set temperature of the cooling section was changed from -180 ° C to + 50 ° C. The magnetic field intensity distribution was smaller from the upper part of the discharge part to the lower part, and the position of 875 gauss satisfying the ECR condition was 40 mm above the wafer. FIG. 3 shows the result of measurement of the dependence of the Si etch rate on the set temperature of the cooling section at this time while changing the effective pumping speed.
When the effective pumping speed is 500 l / sec, the cooling unit temperature is -1.
The etch rate sharply increased below about 10 ° C., and was about five times that at room temperature. However, when the temperature is lower than -150 ° C., the etching gas is trapped in the cooling part, so that the gas pressure is rapidly reduced, and it becomes difficult to maintain the discharge. When the effective pumping speed is 2000 l / sec, the effective pumping speed is 500 even at room temperature.
1 / sec, but about 4 times, but cooling unit temperature -110 ° C
In the following, it further increased by a factor of 2.5. That is, the etching speed has been increased by a factor of 10 due to the high-speed evacuation at an effective evacuation speed of 2000 l / sec and the installation of the cooling unit. All of these effects can be considered as effects of preventing the reaction product from being re-incident on the wafer.

(Embodiment 2) FIG. 4 shows an embodiment of a high-speed exhaust reactive ion etching (RIE) apparatus. An etching gas is introduced into the vacuum processing chamber 1 and discharged at a high frequency of 13.56 MHz to generate a gas plasma 5. A sample stage 7 is provided in the discharge unit, and a wafer 8 placed on the sample stage 7 is subjected to etching processing by gas plasma. The processed etching gas is discharged from the gas inlet 9 through the vacuum processing chamber 1 to the outside of the vacuum processing chamber by the exhaust pump 10 from the exhaust pipe 10. At this time, the exhaust speed can be changed by making the conductance valve 12 variable. The processing gas is introduced into the vacuum processing chamber 1 through the gas flow controller 13, the gas pipe 14, the gas inlet 9, and the buffer chamber 15 having small holes in a mesh shape.

The gas inlets 9 are provided at two or more places, and are arranged symmetrically with respect to the central axis of the discharge part. The sample stage on which the wafer is placed is provided with a cooling mechanism 16 for cooling the wafer to 0 ° C. or lower. A cooling trap 18 is provided in the vacuum processing chamber, and can trap a reaction product. The cooling trap is provided with a heating means 19, which can be heated to room temperature or higher to regenerate the trap by removing reaction products from the cooling trap after completion of the etching process.

The pump has a pumping speed of 2000 l / sec.
Are arranged symmetrically with respect to the central axis of the discharge part. The total exhaust conductance of the discharge part, the vacuum processing chamber, the exhaust pipe, and the conductance valve serving as a gas passage was 4000 l / sec. At this time, the effective pumping speed is 2
000 l / sec. The total volume of the discharge part, the vacuum processing chamber, and the exhaust pipe is 100 l, and the gas residence time in the vacuum processing chamber is 50 msec according to the above equation (1).

The Si substrate was etched using a photoresist as a mask by a high-speed exhaust reactive ion etching apparatus shown in FIG. HBr was used as an etching gas, the gas pressure was 0.5 mTorr, the RF power was 500 W, and the wafer temperature was -20 ° C. When the temperature of the cooling unit is
The etch rate spiked, four times that at room temperature. Further, at -170 ° C. or lower, it was difficult to maintain the discharge due to the condensation of the etching gas.

[0023]

According to the present invention, the reaction product generated by etching is adsorbed by the cooling trap, and the non-adsorbed gas can be exhausted out of the vacuum processing chamber in a short time with high-speed exhaust. Can be prevented from adversely affecting the etching reaction by re-adhering to the substrate. As a result,
The etch speed can be greatly improved. In addition, it is possible to prevent a reaction product from adhering to the surface of the fine pattern and prevent the pattern shape from being processed into a desired shape, and to form a fine and highly accurate pattern.

The effect of the present invention is not limited to the above-described etching apparatus and etching material, but may be, for example, a magnetron type RIE.
And other devices such as helicon resonant RIE, and Si
Similar effects are obtained with other materials such as O ₂ , photoresist, aluminum, tungsten, tungsten silicide, copper, GaAs, and Si nitride film.

[Brief description of the drawings]

FIG. 1 is a diagram showing vapor pressures of an etching gas and a reaction product.

FIG. 2 is a block diagram of a high-speed exhaust type microwave plasma etching apparatus according to the present invention.

FIG. 3 is a characteristic diagram showing a cooling unit set temperature and a relationship between an exhaust speed and an etch speed in Si etching using a high-speed exhaust type microwave plasma etching apparatus according to the present invention.

FIG. 4 is a block diagram of a high-speed exhaust type reactive ion etching (RIE) apparatus according to the present invention.

[Explanation of symbols]

1: vacuum processing chamber, 11: exhaust pump, 18: cooling trap.

──────────────────────────────────────────────────続 き Continuation of the front page (56) References JP-A-5-82450 (JP, A) (58) Field surveyed (Int. Cl. ⁷ , DB name) H01L 21/3065

Claims (7)

(57) [Claims] 1. A semiconductor integrated circuit device comprising the steps of: placing a wafer in a processing chamber; introducing an etching gas into the processing chamber; converting the etching gas into plasma; and dry-etching a main surface material of the wafer with the plasma. Using a vacuum pump having a total pumping speed of 2000 l / s or more during the dry etching .
And the pressure in the plasma atmosphere is reduced to 0.5 mTorr or less.
A method of manufacturing a semiconductor integrated circuit device, wherein a reaction product between the etching gas and the wafer main surface material is captured by a cooling trap provided in the processing chamber. 2. The semiconductor integrated circuit according to claim 1, wherein the cooling trap is provided at a position where a distance from the main surface of the wafer is shorter than five times a mean free path of the reaction product. A method for manufacturing a circuit device. 3. The method of manufacturing a semiconductor integrated circuit device according to claim 1, wherein said cooling trap is provided at a position whose distance from said main surface of said wafer is shorter than 50 cm. 4. The method of manufacturing a semiconductor integrated circuit device according to claim 1, wherein said cooling trap is controlled to a temperature lower than a condensation temperature of said reaction product and higher than a condensation temperature of said etching gas. 5. The method of manufacturing a semiconductor integrated circuit device according to claim 1, wherein said wafer main surface material is silicon, and said etching gas is a gas containing chlorine. 6. The method according to claim 1, wherein the temperature of the cooling trap is controlled to be −110 ° C. or lower and −150 ° C. or higher. 7. A step of forming a mask on a main surface of a wafer, placing a wafer on which the mask is formed in a processing chamber, introducing an etching gas into the processing chamber, converting the etching gas into plasma, and forming the mask. If not
Dry-etching by the plasma portion of the wafer main surface of the roller, and forming a trench to the site, pumping speed of the vessel at the time of the dry etching
Pump using an exhaust pump of 2000 l / s or more.
A pressure in a plasma atmosphere is set to 0.5 mTorr or less, and a reaction product of the etching gas and the material of the wafer main surface is captured by a cooling trap provided in the processing chamber. A method for manufacturing a semiconductor integrated circuit device, comprising: