JP3271605B2 - Printed board soldering failure detection device - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a device for detecting a defective soldering of a printed circuit board, and more particularly to a device for detecting a false soldering defect (actually correct soldering) due to the presence of a flux or the like, and a true soldering defect due to a flux or the like. The present invention relates to a printed circuit board soldering failure detecting device capable of performing the above-described steps.

[0002]

2. Description of the Related Art Conventionally, as a method of soldering and mounting an electronic component on a printed circuit board, "insertion mounting" in which a lead terminal of the electronic component is inserted into a through hole and soldered, and a lead terminal is soldered on the surface of the printed circuit board For example, an in-circuit tester is generally used to inspect a printed circuit board (mounting board) in a mounted state during mass production.

One type of the in-circuit tester is a flying probe pin device of a type in which a pin (probe) is moved by a motor or the like to contact a desired inspection position. The situation when using this flying probe pin device will be described with reference to the drawings.

FIG. 11A shows a surface mount type IC1.
FIG. 3 is a side sectional view of a case where No. 03 is correctly soldered to a circuit pattern 102 formed on a printed circuit board 101.
In this case, one end (negative electrode) of the battery 102 is connected to the pattern 1
02, the other end (positive electrode) is connected to the pin 112 via the ammeter 111, and the tip of the pin 112 is connected to the lead terminal 103a of the IC. The needle swings. 113 is a protection resistor.

However, as shown in FIG. 11B, the flux 120 is placed between the pin 112 and the lead terminal 103a.
a between the lead terminal 103a and the circuit pattern 102, as shown in FIG.
When 20b is interposed, the above-described current path is not formed, and the measurement result becomes zero (the needle of the ammeter does not move).

Here, in the case of FIG. 11B, the soldering itself (soldering of the lead terminal 103a and the circuit pattern 102) is performed accurately, and the soldering state is originally "passed" (pseudo soldering). In the case of FIG. 11C, the soldering state between the lead terminal 103a and the circuit pattern 102 is "fail" because the flux 120b is interposed therebetween (true soldering failure).

As means for distinguishing between "pseudo soldering failure" and "true soldering failure", several proposals have been made in the past (for example, see Japanese Patent Laid-Open No. 5-164).
No. 803).

[0008]

However, in this prior art, a criterion for comparison is prepared in advance for each of a large number of measurement points on a substrate, and the criterion is set for each measurement point for comparison. When the number of measurement points is large, the test time becomes long. Further, in the related art, it was impossible to detect a defect of the electronic component itself.

[0009] Therefore, an object of the present invention is to provide a print that requires a short test time and can be distinguished from a true soldering failure (see FIG. 11C) and a pseudo soldering failure (see FIG. 11B). An object of the present invention is to provide a device for detecting a soldering failure of a substrate. Another object is to provide a printed circuit board mounted electronic component defect detection device capable of detecting a defect of the electronic component itself.

[0010]

SUMMARY OF THE INVENTION In order to solve the above-mentioned problems, the present invention provides a method for manufacturing a semiconductor device, comprising the steps of interposing an insulator generated when a soldering portion of an electronic component is soldered to a metal pattern formed on a printed circuit board. An apparatus for detecting soldering failure of a printed circuit board for detecting a soldering failure, comprising: an operation power supply means for supplying an operation power supply to a printed circuit board (substrate to be measured) on which electronic components to be measured are mounted; AC signal superimposing means for superimposing an AC signal on a power supply line or a signal line of a measurement board; contact means for making contact with a predetermined portion on the substrate to be measured; A first contact mode in which the soldering portion, the metal pattern, and the contacting device are in direct contact at the same time, and the soldering portion is in direct contact with the metal pattern. A second contact mode in which the contact means indirectly contacts the soldering portion or the metal pattern via the insulator; and the contact means directly contacts the soldering portion and the soldering portion and the metal pattern. And a third contact mode in which the indirect contact is made through the insulator.
It is characterized by comprising a contact mode identification means for identifying each contact mode.

The apparent soldering failure shown in FIG. 11 (B) and FIG. 1 (B)
It is actually soldered correctly) and the correct soldering (correct soldering mode) shown in FIGS. 11A and 1A or the true soldering shown in FIGS. 11C and 1C. A defect (a true soldering failure mode) can be identified. That is, the apparent soldering failure can be identified from the correct soldering or the true soldering failure.

[0012]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS The present invention will be described below with reference to the drawings by dividing it into (1) a principle description and (2) a description of an embodiment. The parts already described are given the same reference numerals, and redundant description will be omitted.

(1) Explanation of Principle First, the principle of the present invention will be described. 1 (A), (B),
(C) shows the above-mentioned FIGS. 11 (A), (B) and (C) (conventional example).
FIG. 2 is a schematic diagram corresponding to a contact state of a pin or the like in FIG.
(A) and (B) are various signal waveform diagrams, FIG. 3 is a diagram showing a difference in signal waveform arriving at the detector constituting the schematic diagram,
FIGS. 4A and 4B are diagrams illustrating a case where the electronic component itself is defective.

Description of FIG. 1A. Correct soldering It is assumed that DC power is supplied to the IC 103 in each of the states shown in FIG. In this case, as shown in FIG. 1A, the original signal sources (signals generated from signal output pins or the like) SG1, SG1 of the IC 103 itself.
The signals sg1 and sg2 are generated from G2 (both waveforms are illustrated in FIG. 2A), and the signal sg1 rides on the lead terminal 103a, which is a "soldering portion", and the signal is a "metal pattern". The signal sg2 is on the circuit pattern 102.

FIG. 1A further shows an "AC signal" for generating a contact detection signal sg0 (the waveform is shown in FIG. 2A) for detecting various contact states (contact modes) in FIG. A touch detection signal source SG0 as a “superimposing means” and a detector D as a “detecting means” for identifying various signal waveforms and a “contact state identifying means” are added. Then, FIG.
In the case of (A), as described in the conventional example, the circuit pattern 1
02, the lead terminal 103a is correctly soldered, and the pin (probe) 112, which is a "contact means", is also correctly in contact with the lead terminal 103a. These three parties 102,
In FIG. 1A, a state in which 103a and 112 are in simultaneous contact (a first contact mode) is indicated by reference symbol U (state U).

In the case of FIG. 1A, the detector D has "sg
1 + sg0 ”(FIG. 2B) and a signal“ sg2 + sg0 ”(FIG. 2B) are input. That is, the detector D can identify and detect the signal component from the contact detection signal source SG0 (that is, the contact detection signal sg0). FIG. 3A shows a list of the above situations.

Description of FIG. 1 (B): Poor Pseudo Soldering Similarly, FIG. 1 (B) corresponds to FIG. 11 (B), and in this case, the circuit pattern 102 and the lead terminals 10
3a is in correct contact, but between the pin 112 and the lead terminal 103a there is a flux 120a that is an "insulator".
Is present (pseudo soldering failure). This state is indicated by reference numeral V.

In the case of FIG. 1B, the flux 120
a, the contact detection signal source SG0
Detection signal sg0 and signal sources SG1, SG2
Signals sg1 and sg2 from the second terminal do not arrive (second contact mode). The above situation is shown in FIG.

Description of FIG. 1 (C): True Soldering Failure Similarly, FIG. 1 (C) corresponds to FIG. 11 (C). In this case, the pin 112 and the lead terminal 103a are correctly contacted. Between the circuit pattern 102 and the lead terminal 103a.
Is interposed. This state is indicated by a symbol w.

In the case of FIG. 1C, since the flux 120b is interposed between the circuit pattern 102 and the lead terminal 103a, it is "true soldering failure". However, since the lead terminal 103a is in contact with the pin 112, the contact detection signal sg0 and the signal sg1 arrive at the detector D, but the signal sg2 does not arrive (third contact mode). The above situation is shown in FIG.

As apparent from FIGS. 3A, 3B, and 3C, the three types of contact modes (FIGS. 11A, 11B, and 11C) described in the conventional example are respectively shown. Since the signals arrive at the detector D as different combined signals, if means for identifying the difference between the three types of signals (contact type identification means) is provided, the three types of contact modes can be identified.

When the electronic component (IC) itself is defective When the IC is normal, as shown in FIGS. 4A and 3D, the lead terminals 103a of the IC and the circuit pattern 10
2, “IC original signal sg1 + contact detection signal sg0” and “IC original signal sg2 + contact detection signal sg0” arrive at detector D via pin 112. However, IC
Is abnormal, as shown in FIGS. 4B and 3E, the lead terminal 103a of the IC, the circuit pattern 102,
“Only the contact detection signal sg0” arrives via the pin 112. What is necessary is just to identify this difference with the detector D which is the "second detection means".

(2) Embodiment Next, an embodiment of the present invention will be described. FIG. 5 is a block diagram of the present embodiment, FIG. 6 is a configuration diagram of the detector 4 shown in FIG.
FIG. 8 is a specific output signal waveform diagram of each pin of the IC, and FIG. 8 is a waveform diagram of each portion.

First, as a prerequisite, in FIG. 5, a voltage V as an "operation power supply means" is provided between a power supply line (H) and a ground (GND) of a substrate to be measured (surface mounted substrate) 1.
cc DC power supply 11 is applied. By applying the voltage Vcc, the IC 1 (TTL, see FIG. 7A) mounted on the substrate under test 1 generates a signal having a waveform shown in FIG. 7B. IC2 is a post-stage operational amplifier.

As shown in FIG. 5, the in-circuit tester T is provided at predetermined locations (measurement points P,
For example, a probe (pin) 2 for detecting and measuring a signal at a measurement point P ₀ in FIG. 11A of the conventional example and a clock a at a frequency f ₀ are internally generated to generate a contact detection signal sg0.
(See FIGS. 8A and 8B)
And the contact detection signal sg in the signal detected by the probe 2.
A detector 4 (corresponding to the detector D in the principle explanation) for detecting whether or not 0 is on; a low-pass filter 5 for removing the contact detection signal sg0 from a signal taken out by the probe 2; and a measurement for measuring the signal. (The measurement in step S55 in FIG. 10 described below is performed. That is, measurement is performed as data for analyzing a defective portion. However, since the analysis of the defective portion is not directly related to the present invention, the description is omitted.) It consists of. Reference numeral 7 denotes an adder for adding the contact detection signal sg0, which is the output of the signal generator 3, to the power supply voltage Vcc, and forms a part of the "AC signal superimposing means".

As the signal generator 3, a synthesizer capable of generating an accurate high-frequency signal (contact detection signal sg0) for an arbitrary time is preferable. Contact detection signal sg0 consists square wave of frequency _{f 0} (clock) a in the FM modulated signal (FIG. 8 (A), (B) refer).

Next, the detector 4 will be described with reference to FIG. The detector 4 includes a low-pass filter 41 for extracting the contact detection signal sg0 and an extracted signal (extracted signal) d
FM demodulation circuit 42 for M demodulation, and demodulated square wave signal e
A counter 43 that counts the number of pulses per second of the (FM-demodulated signal e in FIG. 8E), and a count number of a square wave whose value of the counter 43 is set in advance (= frequency f ₀ )
And a comparator 44 for determining whether or not they are the same.

Next, the operation of this embodiment will be described with reference to FIGS. FIG. 9 is a flowchart showing the operation of the entire embodiment, and FIG. 10 is a flowchart showing the operation inside the detector 4.

First, the substrate 1 to be measured is set on the in-circuit tester T (step S1), and a DC voltage Vcc is supplied to the substrate 1 to be measured (step S2). Next, the contact detection signal s is output from the signal generator 3 of the in-circuit tester T.
g0 (FIG. 8 (B)) is applied to the power supply line L (step S3), and the probe 2 is brought into contact with a predetermined measurement point P (FIG. 11 (A), (B), (C)). (Contact including all cases) (step S4), the detection signal c is detected, and the detection operation of the contact detection signal sg0 is performed by the detector 4 (step S5).

Here, the detailed operation of step S5 will be described with reference to FIG. As described above, the detection signal c is detected, and the original signals sg1 and sg2 of the substrate 1 to be measured are cut (removed) by the low-pass filter 41 (step S51). Is taken out (step S52). Next, the square wave signal e is counted by the counter 43 for one second (step S53), and the count number n is compared with a predetermined count number of the clock a (= frequency f ₀ ) (step S5).
4).

As a result of the comparison, if they match (the count number = frequency f ₀ ), the contact detection signal sg0 has been normally detected (step S55), and FIG. 3A or FIG.
(C). That is, either FIG. 11A (correct soldering) or FIG. 11C (true soldering failure). If the comparison result shows that they do not match, the contact detection signal sg0 cannot be detected (step S56), which corresponds to FIG. That is, FIG.
(B) “Pseudo soldering failure”, and lead terminal 10
3a and the pattern 102 are "soldered correctly".

Returning again to FIG. 9, undetected (step S
56) (step S6: NO), it corresponds to FIG. 3B, and is “pseudo-soldering failure” in FIG.
Lead terminal (IC pin) 103a and probe (pin) 1
12 is open, but the lead terminal 103a and the pattern 102 are "soldered correctly" (step S7).

If it can be detected (step S6:
YES), either of the cases shown in FIG. 3 (A) or FIG. 3 (C), and either FIG. 11 (A) (correct soldering) or FIG. 11 (C) (true soldering failure) It is.
In this case, the measurement device 6 (see FIG. 5) measures data for analyzing a defective portion (step S8).

In the above embodiment, the output of the signal generator is applied to the power supply of the substrate to be measured. However, the output of the signal generator may be applied to the signal line or the GND line.

In the above embodiment, a square wave signal modulated by FM is used as the contact detection signal. However, a high frequency sine wave may be used, for example.

[0036]

As described above, according to the present invention, since there is no need to obtain data for a good product in advance, even if the target product changes, preparation for using the in-circuit tester does not take much time. Further, since the continuity test is not performed using two probes, even an in-circuit tester having only one probe can know whether or not the pseudo soldering is performed.

[Brief description of the drawings]

1A and 1B are diagrams illustrating the principle of the present invention, wherein FIG. 1A shows a state in which a lead terminal, a pin, and a circuit pattern are correctly contacted, and FIG. 1B is a state diagram in which flux is interposed between the pin and the lead terminal. (C) is a state diagram in which the pins and the lead terminals are in correct contact, but the flux is interposed between the lead terminals and the circuit pattern.

FIG. 2A is a waveform diagram of each signal source, and FIG. 2B is a diagram showing a state where a contact detection signal is superimposed on a square wave.

FIG. 3 is a table showing a difference between signal waveforms arriving at a detector in each state diagram (schematic diagram) shown in FIG. 1 and the like;

FIG. 4 is a schematic diagram when the electronic component itself is defective.

FIG. 5 is a block diagram of an embodiment of the present invention.

FIG. 6 is a block diagram of a detector according to the embodiment.

FIG. 7 is an external view of an IC used in the embodiment and an output waveform diagram of each pin.

FIG. 8 is a signal waveform diagram of each part in the embodiment.

FIG. 9 is a flowchart of the embodiment.

FIG. 10 is a flowchart showing the operation of the detector in the flowchart.

FIG. 11 is a view for explaining a contact mode between a lead terminal, a circuit pattern, and a pin (probe) in a conventional example.

[Explanation of symbols]

 D Detector SG0 Contact detection signal source sg0 Contact detection signal SG1, SG2 IC original signal source sg1, sg2 IC original signal U First contact mode V Second contact mode W Third contact mode 102 Circuit pattern 103a Lead Terminal 112 Pin (probe) 120a, 120b Flux

Claims (1)

(57) [Claims] An electronic component having a signal generating terminal for repeatedly generating a signal by supplying power to a predetermined position of a power supply line and a signal line formed of a metal pattern on a printed circuit board is soldered and mounted. A soldering failure detection device for detecting a soldering failure due to the presence of an insulator between a conductive contact terminal for use, a signal generating terminal and a signal line, wherein the signal line is different from the repetitive signal. AC signal superimposing means for superimposing an AC signal, and detecting means for detecting a signal to be arriving via the conductive contact terminal, wherein the detecting means makes conductive contact between the signal generating terminal and a signal line. An apparent soldering failure mode in which the conductive contact terminal makes non-conductive contact with the signal generating terminal via the insulator; Or the correct soldering mode in which the conductive contact terminal and the conductive contact terminal are simultaneously in conductive contact, or the truth that the conductive contact terminal and the signal generating terminal are in conductive contact and the signal generating terminal and the signal line are in non-conductive contact via the insulator. A soldering failure detection device for a printed circuit board, comprising: