JP3252831B2 - Distributed processing method and apparatus for IP packet routing processor in ATM - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an ATM exchange for routing IP packets in an asynchronous transfer mode (ATM) communication network, and more particularly to an ATM exchange for routing by distributing the load of a processor. The present invention relates to a distributed processing method and apparatus for an IP packet routing processor in a routing processor ATM.

[0002]

2. Description of the Related Art Conventionally, in an ATM communication network, a load distribution control method for improving a routing function has been used (for example, Japanese Patent Application Laid-Open No. 3-270436, "Call Processor Load Distribution Control Method"). In such a load distribution control system, the routing function is improved by equally distributing the loads of a plurality of call processors that control the switch network of the ATM exchange.

In recent ATM communication networks, the weight of IP packet traffic has been increasing. Equipped with a function to route IP packets,
ATM exchanges have been developed that introduce a less expensive IP packet routing function into ATM communication networks. In such ATM exchanges as well, with the recent increase in traffic volume, further improvement in the processing capability (transfer capability) of the IP packet is required.

[0004]

As described above, in the above-mentioned conventional example, with the recent increase in the traffic volume in the ATM exchange, an improvement in the processing capability of the IP packet is required.

[0005] The present invention is to solve such a problem in the prior art, and performs IP packet routing (load) in an ATM communication network by using a plurality of processors to distribute the load. It is an object of the present invention to provide a distributed processing method and apparatus for an IP packet routing processor in an ATM in which the processing capability is improved.

[0006]

In order to achieve the above object, a distributed processing method of an IP packet routing processor in an ATM according to the present invention comprises the steps of:
IP packet in ATM distributed and processed in Sessa
In the distributed processing method of the routing processor,
Interface processor and the interface IP address
Receiving and managing the settings with
Interface IP address and routing information
Delivering to the slave processor, and
Multiple slave processors have the same interface
Stores and uses IP addresses and routing information
To distribute and process routing using
Dynamism to the assigned interface IP address
Received a packet of the network routing protocol
This packet, together with the interface information, is
Transferring to a data processor.

The ATM / IP packet routing processor distributed processing device of the present invention distributes and processes IP packets to a plurality of processors, and receives and manages settings of an interface IP address and routing information. and an interface IP address and routing information stored and the master processor distributes the slave processor, the same interface IP address and routing information, and e Bei a plurality of slave processors to perform distributed routing by using The slave processor is assigned to itself.
Dynamic route to the configured interface IP address
When a packet of the
The packet is sent to the master processor along with the interface information.
It is configured to transfer to the server.

[0008]

At the time of transfer to the master processor, the interface information when the routing protocol arrives is passed to the master processor, and the routing information is accurately processed by the Internet Protocol (IP) or higher-level protocol processing in the master processor. There is a configuration to create.

In the above-mentioned routing setting, a slave processor that receives an incoming IP packet is determined according to the bandwidth of the virtual channel, and the load of the slave processor is distributed. The master processor and the plurality of slave processors are constituted by one processor.

The master processor is configured to execute other control in the ATM switch together with routing control.

In the above-described distributed processing method and apparatus for the IP packet routing processor in the ATM according to the present invention, the master processor receives and manages the settings of the interface IP address and the routing information, and manages the interface IP address and the routing information. Is distributed to a plurality of slave processors. Further, a plurality of slave processors store and use the same interface IP address and routing information to perform distributed routing.

As a result, the transfer capability of the IP packet processing is improved. That is, since the IP packets are distributed to a plurality of slave processors and the distribution is processed based on the bandwidth of the set connection, the traffic can be more evenly distributed.

[0014]

BEST MODE FOR CARRYING OUT THE INVENTION Next, in the ATM of the present invention,
An embodiment of a distributed processing method of a P packet routing processor and an apparatus therefor will be described in detail with reference to the drawings. FIG. 1 is a block diagram showing a configuration of an embodiment of a distributed processing method and an apparatus of an IP packet routing processor in an ATM according to the present invention.

In FIG. 1, this example shows an ATM switch 4 for switching a line, line cards 5, 6, and 7 for processing an interface with a line, and an external interface IP setting change request through the ATM switch 4. The master processor 10 which receives and manages the information, searches the routing information, and receives the received I based on the search.
It has slave processors 11 and 12 for respectively processing the routing of P packets.

In the figure, a virtual path identifier (VPI: V
irtual Path Identifier) and virtual channel identifier (V
CI (Virtual Channel Identifier) is indicated by black circles, and the flow of IP packets is indicated by arrows.

Next, the operation of this embodiment will be described. In FIG. 1, the master processor 10 receives an external interface IP setting change request from the outside,
We manage it. This interface IP information is transmitted from the master processor 10 to the slave processor 1.
1, 12 and stored here. The master processor 10 also sets IP packet routing,
Accepts commands and dynamic routing protocol packets. Then, the master processor 10
The routing information created and updated based on the received information is distributed to the slave processors 11 and 12.
Each of the slave processors 11 and 12 searches for routing information, and performs routing of the received IP packet based on the search.

On the other hand, the slave processors 11 and 12
When an IP packet to itself is received, in particular, when a dynamic routing protocol is received, it is determined whether the stored interface IP address matches the destination, and the input interface information can be determined by the master processor 10. And the information is transferred to the master processor 10. Further, the master processor 10 has a virtual channel (VC) set in each of the slave processors 11 and 12.
Store the information. When there is a new connection request with a VC, the slave processor 11 having the smallest total VC bandwidth (eg, maximum cell rate / PCR) has been set.
Alternatively, the connection is allocated to 12 and managed.

Hereinafter, the main part of this operation will be described in detail.
FIG. 2 is a flowchart for explaining the flow of processing when the slave processor receives an IP packet.
FIG. 3 is a diagram showing an example of resource management data in the master processor, and is an example of VC management data set in the master processor and the slave processors.

In FIG. 1 and FIG. 2, the master processor 10 and the slave processors 11 and 12 having the IP packet routing function
Performs reception, processing and management of addition / update of routing information (destination IP address and VPI / VCI map for reaching the destination IP address).

As shown in FIG. 2, the master processor 10 includes the number of slave processors 11 and 12 mounted, the VC connections connected to the slave processors 11 and 12, and the bandwidth (for example, maximum cell rate / PCR).
Is managing. The master processor 10 notifies the slave processors 11 and 12 of the state of addition, change and deletion of the interface IP address information 40.

The slave processors 11 and 12 notify the notified states of addition, change and deletion of the interface IP address information 40 to the interface IP information 41 and
42 is stored. Further, the master processor 10
The routing information 50 is notified to the slave processors 11 and 12 periodically or as needed. Slave processor 1
1 and 12 store the routing information 50 as routing information 51 and 52. As shown in FIG. 2, when the slave processors 11 and 12 receive an IP packet from a VC for which an input-side connection is set, the slave processors 11 and 12 search for routing information using the destination IP address of the IP packet and send the IP packet to the corresponding VC. Is sent.

The slave processors 11 and 12
I to the interface IP address assigned to itself
When a P packet is received (step (S) in FIG. 2)
1, S2: Yes), and sends this IP packet together with the input interface information to the master processor 10 (S3, S4). The master processor 10 that has received the IP packet and the input interface information obtains the input interface IP address based on the interface information, and delivers the IP packet to the upper-level protocol processing, such as IP or the routing protocol processing.

In step 2, the slave processor 1
1 and 12 do not receive an IP packet to the interface IP address assigned to themselves (S2: N
o), IP packet routing information is searched by the destination address, the output VC is determined and transmitted (S5, S6).
As a result, in the protocol processing executed by the master processor 10, the routing information can be updated using the input interface IP information.

In FIG. 3, mounting slot numbers and management data resources are assigned to the slave processors 11 and 12 in the management information address table. Each management data (mounting slot number and management data resource) manages an opposite IP address, an input VC, and a band as information of a VC for inputting an IP packet allocated to the slave processor 11 or 12. When newly assigning a VC, the slave processors 11, 1
2 is calculated, the slave processor 11 or 12 having the smallest total value is selected, VC is set as shown in FIG. 1, and the set VC information is shown in FIG.
Append to data.

As described above, in this embodiment, the master processor 10 receives and manages the settings of the interface IP address and the routing information, and distributes the settings to the slave processors. Slave processors 11 and 12
Store and use the same interface IP address and routing information to perform routing. That is, since the IP packets are distributed to the plurality of slave processors 11 and 12 and the distribution is processed based on the bandwidth of the set connection, the traffic can be more evenly distributed, and the IP packet processing is performed. Transfer capacity is improved.

In this embodiment, the master processor 10 and the slave processors 11 and 12 are formed separately, but one processor having the processing functions of the master processor 10 and the slave processors 11 and 12 is combined. May be configured. Further, the processor 10 may perform not only the above-described processing but also control of each unit (not shown) in the ATM switch 4 and VC setting. Further, separately from the master processor 10,
Control of each part not shown in the ATM switch 4 and V
It is also possible to mount a processor for performing C setting and the like.

[0028]

As is apparent from the above description, according to the distributed processing method and apparatus of the IP packet routing processor in the ATM of the present invention, the master processor accepts the setting of the interface IP address and the routing information. It manages and distributes this interface IP address and routing information to a plurality of slave processors. Further, a plurality of slave processors store and use the same interface IP address and routing information to perform distributed routing.

Therefore, since the IP packet is distributed to a plurality of slave processors and the distribution is processed based on the bandwidth of the set connection, the traffic can be more evenly distributed. As a result, the IP packet can be distributed. The transfer capability of the process is improved.

[Brief description of the drawings]

FIG. 1 is a block diagram showing a configuration of an embodiment of a distributed processing method and an apparatus of an IP packet routing processor in an ATM according to the present invention.

FIG. 2 is a diagram illustrating a flow of processing when an IP packet is received in a slave processor according to the embodiment;

FIG. 3 is a diagram illustrating an example of resource management data in a master processor according to the embodiment.

[Explanation of symbols]

 4 ATM switch 5-7 Line card 10 Master processor 12 Slave processor

────────────────────────────────────────────────── ─── Continuation of the front page (56) References JP-A-11-191774 (JP, A) JP-A-9-289524 (JP, A) JP-A-2000-332768 (JP, A) JP-A-3-270436 (JP, A) JP-A-2000-41068 (JP, A) JP-A-2000-138687 (JP, A) JP-A-2000-101606 (JP, A) (58) Fields investigated (Int. Cl. ⁷ , DB name) ) H04L 12/56

Claims (6)

(57) [Claims] 1. A distributed processing method for an IP packet routing processor in an ATM which distributes and processes IP packets to a plurality of processors, wherein a master processor receives and manages settings of an interface IP address and routing information. Distributing the interface IP address and the routing information to the slave processors, and the plurality of slave processors store and use the same interface IP address and the routing information to distribute the routing. Processing and download to the interface IP address assigned to it.
Receives the packet of the dynamic routing protocol
When this packet is sent,
Transferring to the master processor in the ATM. 2. An ATM / IP packet routing processor distributed processor for distributing and processing IP packets to a plurality of processors, receives and manages settings of an interface IP address and routing information, and manages the interface IP address and routing information. and a master processor to be distributed to the slave processor, storing the same interface IP address and routing information, and a plurality of slave processors to perform distributed routing by using the slave processor to itself Granted Inter
Dynamic routing to the interface IP address
When a packet of a protocol is received, this packet is
Transfer to master processor with interface information
An ATM / IP packet routing processor distributed processing device, comprising: 3. When the transfer to the master processor is performed ,
To come, the interface information when routing protocol arrives, passing the master processor, according to claim 2, wherein the creating accurate routing information on the Internet Protocol (IP) or higher protocol processing in the master processor ATM / IP packet routing processor distributed processing device. 4. The slave processor according to claim 2 , wherein the master processor determines a slave processor that receives an incoming IP packet based on the bandwidth of the virtual channel and distributes the load of the slave processor.
4. The ATM / IP packet routing processor distributed processing device according to 3. 5. according to the master processor and a plurality of slave processors, claim 2-4, characterized in that it is constituted by a single processor ATM / I
P packet routing processor distributed processing device. Wherein said master processor, along with control of routing, according to any of claims 2-5, characterized by performing other control in the ATM switch A
TM / IP packet routing processor distributed processing device.