JP3239963B2 - Multi-processor computer system - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a computer system comprising a plurality of processors for dividing and dividing data.
Against Ri, those relates Mar <br/> Chi processor computer system for parallel execution by a plurality of processors, in particular, the present invention is about the multi-processor computer system of distributed memory type such that the processor, each with its own memory It is.

[0002]

2. Description of the Related Art As a computer system including a plurality of processors, a system shown in FIGS. 6A and 6B is conventionally known. 11A and 11B, 11
.. represent processors, 12, 12a, 12b... memory, and 13 a network. FIG. 1A shows a multi-processor system of a shared memory system.
The processors 11a and 11b share the memory 12, and the memory 12 is directly accessible from the instructions of the processors 11a and 11b.

FIG. 1B shows a multi-processor system of a distributed memory system, in which each processor 11a, 11
have unique memories 12a, 12b,..., and communication between the processors is performed via a network 13. By the way, in the above-mentioned multi-processor system, when a program is executed in parallel by a plurality of processors, the following two methods have conventionally been used. One source that instructs the parallel executable part to that effect
A method of converting programs and executing them in parallel.

FIG. 7A shows a case where a source program P1 shown in FIG.
Memory-sharing multi-processor
It is a figure showing the case where it is performed in a system. The source program P1 in the figure shows an example in which data is read from a file into an array A and a DO loop is executed in parallel by two processors. Data is read from a file into an array A by "READ A". "PARALLEL
DO I = 1,1000 ... "and" = A (I) "for parallel execution.

The source program P1 is executed in a shared memory multiprocessor system as shown in FIG. After securing an array area in the memory 12 by the processor 11a, "READ"
A "is executed to read data from the file into the area secured in the memory 12. Then, the processors 11a,
11b starts parallel execution. That is, the DO loop of 1 to 1000 is divided into two, and the processor 11a executes the DO loops of 1 to 500 in parallel, and the processor 11b executes the DO loops of 501 to 1000 in parallel. Processor 11
a and 11b are read from the memory 12.

FIG. 1B shows the source program P1.
To the processor 11a having the memory 12a and the memory 12
9 is a diagram showing a case where the processing is executed by a distributed memory type multi-processor system composed of a processor 11b having the processor 11b. In FIG. 2B, the processor 11
a, after securing an array area in the memory 12a,
Execute "READ A" to read data from the file into the area secured in the memory 12a.

Next, as shown in FIG. 1A, the DO loops 1 to 1000 of the DO loop are divided into two, and the DO loops 1 to 500 are provided by the processors 11a and 11b.
Loops: Execute 501 to 1000 DO loops in parallel. In this case, since the array data is stored in the memory 12a, every time the processor 11b executes the instruction of the DO loop, the data is stored in the processor 11a, 1a.
1b. This causes transfer overhead and increases execution time. A method of writing a source program for each processor, converting each to an executable program, and executing the program in parallel.

FIG. 8A shows a multi-processor system of a distributed memory system composed of a processor 11a having a memory 12a and a processor 11b having a memory 12b.
It is a figure which shows the case where the source program P2a shown in (b) and the source program P2b are executed. Source·
The programs P2a and p2b read data from the file into the arrays A and B, respectively, and
As in the case of FIG. 1, an example in which a DO loop is executed in parallel by two processors is shown.

The source program P2a is a processor 1
The source program P2b is a program described for the processor 11b. The source programs P2a and P2b are executed in a distributed memory multiprocessor system as shown in FIG.

After the processor 11a, 11b secures an array area in each of the memories 12a, 12b, the processor 11a executes "READ A" to read 500 pieces of array data and store it in the array A. Then, an event of “first half completed” is notified. The processor 11b keeps waiting for the event of "first half completed", and after it is satisfied, "READ"
B "to read 500 elements of array data and store it in array B.

As described above, 1 to 5 are stored in the memory 12a.
When data of up to 00 is stored, the processor 11a executes a DO loop in parallel by storing the data of 501 to 1000 in the memory 12b, and the processor 11b executes a DO loop in parallel.
a and 11b are read from the memories 12a and 12b.

[0012]

By the way, the above-mentioned method uses a uniform shared memory system as shown in FIG. 6A (a shared memory system in which there is not much difference in the access speed to the memory from each processor). 6) is suitable for application to a multi-processor system.
The distributed memory shown in (b) has a drawback that the execution time increases because data transfer with another processor occurs when data is referred to.

In the above-mentioned method, since a source program must be described for each processor, for example, for a part that cannot be executed in parallel such as a READ statement, synchronization control using a POST or WAIT statement or the like is required. For example, in a program, consideration must be given to a part that cannot be executed in parallel, and there is a disadvantage that the description of the program is difficult.

SUMMARY OF THE INVENTION The present invention has been made in view of the above-mentioned drawbacks of the prior art. In a distributed multiprocessor system including a plurality of processors, the present invention divides an instruction for using a plurality of processors, and executes data division. Can be shared by a single division instruction so that a parallel execution program can be easily described, and data reference and storage at the time of data reference and storage can be performed. An object of the present invention is to provide a multi-processor computer system capable of reducing data transfer time and executing time in parallel execution.

[0015]

FIG. 1 is a diagram illustrating the principle of the present invention. To solve the above problems, the present invention provides a multi-processor computer of a distributed memory system or a shared memory system in which the access speed from a processor to a memory varies depending on the distance between the processor and the memory, as shown in FIG. in the system, a plurality of processors 2a of the multi-processor computer system 2, 2b, when the parallel execution by sharing one of the source program 1 by 2c, Seo
Number of processors and instructions written in the source program
And one-dimensional array data and an instruction in the source program based on an index section serving as a data division reference and information indicating an index division method. The object divided into a plurality of objects so that the division matches the division of the one-dimensional array data into the memory of each processor.
A program is generated for each processor. Then, each processor 2a of the multi-processor computer system 2
2b, 2c, the object program is assigned , and each of the processors 2a, 2b, 2c assigns the divided object program.
The is obtained so as to parallel execution.

[0016]

According to the present invention, when a plurality of processors 2a, 2b, 2c of a multi-processor computer system 2 share and execute one source program 1 in parallel, the number of processors described in the source program 1
And an index section that serves as a reference for dividing instructions and data
And information indicating how to divide the index,
One-dimensional array data and
Instructions in each processor of the instruction section in the above source program.
And memos for each processor for one-dimensional array data
Objects divided so that the division into
Project program for each processor 2a, 2b, 2c
Generated by each processor of the multi-processor computer system.
The object program is stored in the processors 2a, 2b, and 2c.
Assign the object program
Since such executed in parallel grams, it becomes possible to easily describe the parallel execution program, to reduce the data transfer time for data reference, it is possible to shorten the execution time of parallel execution . In addition, the division of the instruction part in the program 1 into the processors 2a, 2b, and 2c and the division of the array data into the memories of the processors 2a, 2b, and 2c are matched with each other. Even if the number of repetitions in is different,
In each processor, parallel execution can be performed without any problem, and the data transfer time when referring to data can be reduced, and the execution time in parallel execution can be reduced.

[0017]

FIG. 2 is a diagram showing an example of a source program according to the present invention and the operation when the program is executed by a distributed memory type multiprocessor system shown in FIG. 6B. In the figure, 11a, 1
1b is a processor, and 12a and 12b are memories specific to the processors 11a and 11b, respectively. Also, P3
Is an example of a source program executed by the system shown in the figure, and shows an example in which data is read from a file into an array A and a DO loop is executed in parallel by two processors, similarly to the source program P1 described above. Things. The source program P3 is compiled by a compiler described later and converted into an executable program executed by the processors 11a and 11b.

The execution of the program converted into the execution format in the processors 11a and 11b is the same as in the case of FIG.
AD A ”reads data from the file into array A,
The data is transferred to the processor 11b and is executed in parallel. In the source program P3, "PARTITION P =
(2,1: 1000, BAND) "is division information for dividing the instruction part and the data part and assigning them to a plurality of processors.In the above description," 2 "in parentheses indicates how many instructions or data Number of processors indicating whether to assign to processors, "1:
“1000” indicates an index section serving as an instruction or data division reference, and “BAND” indicates an index division method.

"PARALLEL DO ..." describes the start of parallel execution in the same manner as the source program P1 shown in FIG. Here, the index section,
A method of dividing an index will be described. Index section The index section serves as a reference for dividing an instruction or data as described above. In the source program P3 shown in FIG. 2, the array declaration is "REAL A (1000)" and the repetition in the DO loop is performed. The number of times is “I = 1,1000”, which coincides with the index section “1: 1000”. For this reason, the upper and lower limits of the array declaration or DO
Even if instructions and data are divided according to the number of repetitions in the loop, no problem occurs.

However, if the above-mentioned array declaration or the number of repetitions in the DO loop does not match, if the instruction or data is divided by either the upper or lower limit value of the array declaration or the number of repetitions in the DO loop, the divided value by the other will match the divided value by the other. The problem of not doing so arises. For example, in the following example: In the array declaration, it is A (400), but the number of repetitions in the DO loop is I = 3,398, and both ends of the array declaration are excluded from the calculation by "2". In the above example, when array A is divided into four, array A becomes A (1:
100) A (101: 200) A (201: 30)
0) It is divided into A (301: 400). DO
When the number of repetitions is divided into four by I = 3,398 of the loop, I = 3,101 I = 102,200 I = 2
01,299 I = 300,398, 101
And 300 do not agree.

On the other hand, when the division is performed based on the index section of the division information, the number of repetitions in the DO loop is I = 3,100 I = 101,200 I = 20
1,300 I = 301,398, which matches the data division. As described above, by dividing an instruction or an array based on the index section of the division information instead of the start value and the end value of the repetition or the upper and lower limits of the subscript of the array declaration, the boundary as shown in the above example is obtained. Even when the value is out of the calculation target, the division of the instruction and the array can be matched even in the reduced section. FIG. 3 is a diagram showing a method of dividing an index. In FIG. 3, the vertical axis indicates a processor number and the horizontal axis indicates an index value. As shown in the figure, the index can be divided by various methods such as “equal division”, “circular division”, “triangular division” and the like.

In the above dividing method, for example, the triangular division is employed when the processing amount is larger toward the rear, such as when the DO loop is a double loop as described below, so that the processing amount is uniform. Can be FIG. 4 is a diagram showing an example of the configuration of a compiler for compiling a source program for performing parallel execution. In FIG. 4, reference numeral 21 denotes a source program for parallel execution, and 22 denotes a source program. Compiler for compiling, 23 is a source program analyzing unit for analyzing a source program, 24 is an optimizing unit for automatically finding a parallelizable part from the source program, and 25 is an executable form from the analyzed source program , A code generator for generating a syntax analysis in the source program analysis unit; and 27, a created parallel object program.

The optimizing unit 24 shown in FIG. 4 is provided as needed. As shown in the example of FIG. 2, when the parallelized part is described in the source program, unnecessary. In the figure, when a source program 21 is provided to a compiler 22, the source program 21 is first analyzed by a source program analysis unit 23.

When the syntax analysis is performed by the source program analysis unit 23, in addition to the grammar of the syntax 26 used for analyzing a normal source program, a parallel program for interpreting a parallel execution source program is used. Syntax 26
Parsing is performed with reference to the grammar of a. FIG. 5 shows Fo
3 is a diagram illustrating an example of a syntax that employs a split description for parallel execution in a source program of rtran. The syntax illustrated in FIG.
ckus-Naur Form).
(See Compiler I-Principles, Techniques and Tools, Compiler-related literature such as the first edition of Science Co., Ltd. 1990/10/10).

The output of the source program analysis unit 23 is
It is provided to the optimization unit 24 as needed. Note that, as described above, the optimization unit 24 is not necessary when the parallelized part is described in the source program. The optimizing unit 24 selects a parallelizable part in a given source program. As a part that can be parallelized in the source program, a part where repetitive operations are performed, such as a DO loop, is selected. For this selection, for example, in the case of a multiple DO loop, the DO loop is exchanged. The execution performance is taken into consideration, such as dividing the outer loop as much as possible to reduce the number of parallel processing controls and reduce overhead.

As described above, the program analyzed by the source program analysis unit, or
In the optimizing unit 24, the program in which the loop to be parallelized is selected is provided to the code generating unit 25. The code generator 25 generates a final object program from the above program.

In the code generation unit 25, the object
When generating a program, for an instruction, a start value and an end value of a repetitive operation are compared with an index value of division information, and a processor to be executed is determined.
For the data, the lower limit and upper limit of the subscript in the array declaration are compared with the index value of the division information, and the processor to which the data is allocated is determined.

In the example shown in FIG. 5, "locate-sta
For "tement", the upper and lower limit values in the declaration of "array-name" are divided into a plurality of arrays according to the index range of the division information, and incorporated into the executable program for each processor. Also, "parallel-do-stat
ement "for" start-value "and" end-va
lue "against the index range of the split information, and a new" start-value
, "End-value" repetition into the executable program.

With the above processing, the compiler 22
Generates and outputs a parallel object program 27 for parallel execution, and the parallel object programs 27a to 27c are loaded into each processor and executed. Actually, the parallel object programs 27a to 27c for each processor are output as a series of programs and loaded into each processor. When each processor executes, each processor selects and executes a program portion corresponding to its own processor. .

In the above embodiment, an example is shown in which the present invention is applied to a multiprocessor system having a distributed memory system. However, the present invention is not limited to the above embodiment. Even in a multi-processor system having a shared memory system, there is a difference in the access speed to the memory depending on the distance between the memory and each processor, and the data for obtaining the data referred to by the instruction execution unit of each processor. By applying the present invention to a system in which the transfer time is longer than the calculation time and the reduction of the data transfer time contributes to the improvement of the execution speed of the entire program, the same effect as in the case of the distributed memory system can be obtained.

Further, in the above embodiment, an example in which a source program is compiled by a compiler and executed is described. However, the present invention is not limited to the above embodiment. The present invention can also be applied to an interpreter system which executes the program as it is, or a preprocessor system which generates a plurality of new source programs from one source program.

[0032]

As apparent from the above description,
In the present invention, one array data in the source program is divided into a plurality of arrays and allocated to the memories of a plurality of processors, so that the instruction part in the program and the division / allocation of the array data coincide with each other. In addition, it is possible to easily describe a program for parallel execution, reduce the data transfer time when referring to data, and reduce the execution time in parallel execution.

[Brief description of the drawings]

FIG. 1 is a principle diagram of the present invention.

FIG. 2 is a diagram illustrating a parallel execution process according to the embodiment of the present invention.

FIG. 3 is a diagram showing a method of dividing an index.

FIG. 4 is a diagram showing a configuration of a compiler according to the embodiment of the present invention.

FIG. 5 is a diagram showing an example of a syntax in the embodiment of the present invention.

FIG. 6 is a diagram illustrating a configuration of a computer system including a plurality of processors.

FIG. 7 is a diagram showing a conventional example (part 1).

FIG. 8 is a diagram showing a conventional example (part 2).

[Explanation of symbols]

 1, 21 Source program 2 Multi-processor system 22 Compiler 27 Object program 11a, 11b Processor 12a, 12b Memory 23 Source program analysis unit 24 Optimization unit 25 Code generation unit

Claims (1)

(57) [Claims] 1. A multi-processor computer system of a distributed memory system or a shared memory system having a difference in access speed from a processor to a memory depending on a distance between the processor and the memory, wherein the multiprocessor computer system is described in a source program. based on the number of processors, and the index section serving as a division criterion of instructions and data, and information indicating the method of division index, source
One one-dimensional array data and instructions in the program are
An object divided into a plurality of parts so that the division of the instruction part in the source program into each processor and the division of the one-dimensional array data into the memory of each processor match.
A program is generated for each processor, and the object is stored in each processor of the multi-processor computer system.
Assign the door program, each processor is assigned above object
.Multiple programs characterized by executing programs in parallel
Processor computing system.