JP3237783B2 - Dual screen TV receiver - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an NTS having an aspect ratio of 4: 3 on a screen such as a high definition display having an aspect ratio of 16: 9.
The present invention relates to a two-screen display television receiver in which two video signals of the C system are displayed side by side at the same size.

[0002]

2. Description of the Related Art Conventionally, so-called picture-in-picture, in which video signals of the same system are displayed as a parent screen and a child screen, has been implemented in many television receivers.

[0003]

SUMMARY OF THE INVENTION It is an object of the present invention to provide a two-screen television receiver in which two screens of the NTSC system are arranged in the same size on the screen of a high-vision display having an aspect ratio of 16: 9. With the goal.

[0004]

According to the present invention, there is provided a first video signal and a second video signal of an NTSC system having an aspect ratio of 4: 3, wherein the first video signal in analog is converted into a digital signal. A first A / D conversion circuit for conversion, means for reducing the data from the first A / D conversion circuit by half both horizontally and vertically, and a first field memory for storing the reduced data. , A second A / D conversion circuit for converting the analog second video signal into a digital signal,
Means for reducing the data from the D-conversion circuit by と も both horizontally and vertically, a second field memory for storing the reduced data, and switching between the first video signal and the second video signal in the horizontal direction A mute signal generating circuit for generating a mute signal to be inserted at a boundary portion, and sequentially switching between a signal from the first field memory, the mute signal, and a signal from the second field memory based on control of a memory controller. A switching circuit; a memory controller for controlling writing and reading to and from the first field memory and the second field memory and a switching control of the switching circuit; a means for converting a signal from the switching circuit into a scanning line; A D / A conversion circuit for converting the converted digital signal into an analog signal, wherein the screen has an aspect ratio of 16: 9. There is provided a two-screen display television receivers be displayed over the video image mute the first and second video signals and the left and right half increments and the boundary portion.

[0005]

The data of each of the first video signal and the second video signal converted into digital signals is halved, and the size (horizontal and vertical) is halved. The reduced data is respectively written in the field memory, and read out so that one image is synchronized with the other image. Each field memory output is switched by a switching circuit about every half of a scanning line. At this time, a mute signal is inserted at the boundary between the two screens. The memory controller controls the switching of the switching circuit in addition to the writing and reading control of each field memory. The output of the switching circuit is subjected to scanning line conversion in order to obtain a normal aspect ratio image. After this, the signal is returned to an analog signal.

[0006]

BRIEF DESCRIPTION OF THE DRAWINGS FIG. 1 is a block diagram of a two-screen television receiver according to the present invention. FIG. 1 is a main block diagram showing an embodiment of a two-screen display television receiver according to the present invention. In the figure, 1 is a first video signal of the NTSC system and analog, 2 is the same and second video signal, 3 and 4 are a first A / D conversion circuit for converting an analog signal into a digital signal, and a second A / D converter circuits 5 and 6 are a first digital video signal and a second digital video signal, and 7 and 8 are a first digital video signal and a first digital video signal.
Digital video signal 5 and second digital video signal 6
A first reduced screen processing unit and a second reduced screen processing unit for reducing the respective horizontal and vertical data by half, 9 and 10 are a first reduced video signal and a second reduced video signal, 11 and 12 respectively. Represents a first field memory and a second field memory for storing the first reduced video signal 9 and the second reduced video signal 10, respectively, and 13 represents a mute signal to be inserted at a horizontal boundary between the two video signals. Generated mute signal generation circuit, 14
Are the first field memory 11 and the second field memory
12, a switching circuit for switching between a signal read from each and a mute signal, 15 a horizontal and vertical synchronization signal corresponding to the first video signal 1, and 16 a horizontal and vertical synchronization signal corresponding to the second video signal 2. A signal 17, a memory controller for controlling writing and reading of the first field memory 11 and the second field memory 12 and switching of the switching circuit 14, 18 a scanning line converter, 19 a D / A converter,
20 is a video output signal.

Next, the operation of the present invention will be described. The first video signal 1 and the second video signal 2 do not include a synchronization signal and are non-interlaced signals. These video signals are supplied to the first A / D conversion circuit 3 and the second A / D converter
The signal is converted into a first digital video signal 5 and a second digital video signal 6 by the D conversion circuit 4 and input to the first reduced screen processing section 7 and the second reduced screen processing section 8. The first reduced screen processing unit 7 and the second reduced screen processing unit 8 reduce the data of the first digital video signal 5 and the data of the second digital video signal 6 to １ ／. This is because an image of the same size is displayed on two screens. Then, as a method, in the vertical direction, thinning is performed every scanning line, and in the horizontal direction, every other pixel is thinned out. These data may be subjected to data interpolation in each reduced screen processing unit.
The first reduced video signal 9 thus reduced and the second
Of the first field memory 11 and the second field memory 12 under the control of the memory controller 17.
Written to each. Here, one field is one screen. The signals written in each field memory are sequentially read out by the memory controller 17, and at this time, the signals are read out so as to synchronize one image (horizontal / vertical) with the other image. For example, the second video is synchronized with the first video based on the first video. The signal read in this way enters the switching circuit 14. The switching timing of the switching circuit 14 is approximately 1/2 scanning point of each scanning line.
The period is switched to the mute signal generation circuit 13 during a period of a fixed width before and after the 1/2 scanning point. For example, when placing the first video on the left side of the screen and the second video on the right side, select the first video side in the first half of scanning, then select the mute signal, and select the second video side in the second half. I do. This is repeated for each scanning line.
Note that a range (several μs) in which the video component is not significantly lost is appropriate for the mute period in relation to the horizontal frequency. The memory controller determines the switching timing.
This is a switching signal 21 output from 17. The switching signal 21 is generated based on the first synchronization signal and the second synchronization signal.

As described above, one video is read out in synchronization with the other video, and the video is switched in the first and second half of scanning, and a mute signal is inserted at the boundary when the video is switched. One video signal composed of one image is completed. However, this signal is
If the image is projected horizontally on a 16 to 9 display, the image will expand horizontally (horizontally long image). Aspect ratio 4
When the original signal of 3: 3 is scanned horizontally and vertically at the ratio of 16: 9,
This is because the horizontal direction is stretched to 4/3 times the original signal even if both the vertical directions are combined. Therefore, in order to obtain an image with a correct aspect ratio (for example, a circle is a true circle), the vertical direction must be 4
Correction to enlarge by / 3 times is required. The scanning line converter 18 corrects this. That is, the scanning line converter 18 increases the number of scanning lines of the signal from the switching circuit 14 by 4/3. As a result, the horizontally long image becomes an image having a normal aspect ratio. However, since unnecessary scanning lines due to the increase are included, these are cut as video blanking. The signal after the scan line conversion is returned to analog, and a two-screen video output signal 20 is completed. FIG. 2 shows a conceptual diagram when such a video signal is projected. In the figure, the vertical dotted portions of the first and second video boundary portions are video mute periods, and the upper and lower dotted portions are non-projected portions (blanking).

[0009]

As described above, according to the present invention, an NTSC video having an aspect ratio of 4: 3 can be displayed on two screens of the same size by taking advantage of the feature of an HDTV landscape screen having an aspect ratio of 16: 9. Since the display is made full, a function having a characteristic different from that of a conventional parent-child screen including large and small screens can be obtained. Further, since the mute period is provided at the boundary between the two screens, the division between the two screens becomes clear.

[Brief description of the drawings]

FIG. 1 is a main block diagram showing one embodiment of a two-screen display television receiver according to the present invention.

FIG. 2 is a conceptual diagram when two screens are displayed.

[Explanation of symbols]

 DESCRIPTION OF SYMBOLS 1 1st video signal 2 2nd video signal 3 1st A / D conversion circuit 4 2nd A / D conversion circuit 7 1st reduced screen processing unit 8 2nd reduced screen processing unit 11 1st Field memory 12 Second field memory 13 Mute signal generation circuit 14 Switching circuit 17 Memory controller 18 Scan line conversion unit 19 D / A conversion circuit

──────────────────────────────────────────────────続 き Continued on the front page (58) Field surveyed (Int.Cl. ⁷ , DB name) H04N 5/38-5/46 H04N 5/262-5/28

Claims (1)

(57) [Claims] A first video signal and a second video signal of an NTSC system having an aspect ratio of 4: 3, wherein the first video signal and the second video signal are analog.
A / D conversion circuit for converting the video signal into a digital signal, means for reducing the data from the first A / D conversion circuit by half both horizontally and vertically, and storing the reduced data. And a second A / A converter for converting the analog second video signal into a digital signal.
A D conversion circuit, means for reducing the data from the second A / D conversion circuit by と も both horizontally and vertically, a second field memory for storing the reduced data,
Signal generating circuit for generating a mute signal to be inserted at a boundary between horizontal switching between the video signal and the second video signal, a signal from the first field memory, the mute signal, and the second field memory A switching circuit for sequentially switching between the first and second signals based on the control of the memory controller; a memory controller for controlling writing and reading to and from the first field memory and the second field memory and for controlling the switching of the switching circuit;
Means for converting a signal from the switching circuit into a scanning line, and a D / D converter for converting a digital signal obtained by the scanning line conversion into an analog signal.
An A / A conversion circuit for displaying the first video signal and the second video signal on a screen having an aspect ratio of 16: 9 by halving the right and left sides and by applying a video mute to a boundary portion thereof. A two-screen display television receiver, characterized in that: