JP3216232B2 - Solid-state imaging device - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION The present invention relates to a charge coupled device (CCD).
The present invention relates to a solid-state imaging device using a solid-state image sensor such as a CCD image sensor formed by a Charge Coupled Device, and in particular, an imaging unit having a vertical transfer register from which imaging charges obtained by photoelectric conversion elements arranged in a matrix are read. And a storage unit having a vertical transfer register for transferring imaging charges from the vertical transfer register of the imaging unit at a high speed, and a horizontal transfer register for transferring imaging charges from the vertical transfer register of the storage unit line-sequentially. The present invention relates to a solid-state imaging device that includes an interline transfer type solid-state image sensor and has an operation mode in which unnecessary charges generated in the photoelectric conversion element are read out to a vertical transfer register of the storage unit and swept away through the horizontal transfer register.

[0002]

2. Description of the Related Art In general, a solid-state image sensor such as a CCD image sensor has a frame transfer type, an interline transfer type, and a frame interface classified according to a structure for reading out imaging charges obtained by photoelectric conversion elements arranged in a matrix. Various structures such as a line transfer type are known. In a solid-state imaging device using such a solid-state image sensor, the solid-state image sensor is driven in a frame accumulation mode or a field accumulation mode, and the NTSC (National Televis) is used.
An imaging output signal conforming to a standard television system such as the ion System Commitee (Ion System Commitee) system is obtained.

That is, the standard television system such as the NTSC system employs interlaced scanning in which the scanning lines of the odd field and the scanning lines of the even field are located between the scanning lines.

In a solid-state imaging device that captures an image of a subject with a solid-state image sensor such as a CCD image sensor in which photoelectric conversion elements are arranged in a matrix, an operation mode called field reading (field accumulation mode) or a frame reading mode is used. By operating the solid-state image sensor in a so-called operation mode (frame accumulation mode), an image pickup output corresponding to interlaced scanning is obtained.

For example, an interline transfer type C
The CD image sensor, when the operation of the field readout mode, as shown in FIG. 6, the readout pulses every vertical blanking period, by the photoelectric conversion element of the image pickup charges A _i and even rows by the photoelectric conversion elements in the odd rows adjacent transferred to the vertical transfer registers by changing the combination of the upper and lower imaging charges B _i for each field, the image pickup charges a _{i +} B i for each field, the _{B i} + a _i + ₁ the horizontal transfer register from the vertical transfer registers in the video period An image pickup output corresponding to interlace scanning is obtained by line-sequentially reading the data through the interface. Further, when the operation of the frame read mode, as shown in FIG. 7, the read pulse of each vertical blanking period, an imaging charge by the photoelectric conversion element of the image pickup charges A _i and even rows by the photoelectric conversion elements in the odd rows adjacent B _i are alternately transferred to the vertical transfer register for each field, and the imaging charges A _i , B _i of each field are read out line-sequentially from the vertical transfer register via the horizontal transfer register during the video period, thereby providing interlaced scanning. Is obtained.

[0006] Each photoelectric conversion element in a solid-state image sensor such as a CCD image sensor generates an imaging charge proportional to the amount of incident light. The maximum charge accumulation amount is determined by, for example, an overflow drain potential. It can be controlled by varying the voltage with a voltage applied to the substrate substrate. Then, the effective charge accumulation period of the photoelectric conversion element is varied by applying a shutter pulse to the substrate substrate so that the imaging charge generated in the photoelectric conversion element is swept away via the overflow drain potential. Thus, an electronic shutter function is realized.

Further, in a hood interline transfer type CCD image sensor, unnecessary charges generated in a photoelectric conversion element are read out to a vertical transfer register of an imaging section, and
The effective charge accumulation period is controlled by sweeping out the unnecessary charges by high-speed transfer through a horizontal transfer register.

[0008]

By the way, the unnecessary charges generated in the photoelectric conversion element are read out to the vertical transfer register of the imaging section, and the unnecessary charges are swept away by high-speed transfer via the horizontal transfer register. In this case, the maximum charge transfer capability of the horizontal transfer register becomes a problem. When an excessive amount of light is input, unnecessary charges generated in the photoelectric conversion element overflow in the horizontal transfer register and enter the video portion, thereby deteriorating the image quality. There is a fear.

In view of the above-mentioned problems of the conventional solid-state imaging device, the present invention includes a frame-interline transfer type solid-state image sensor, and transfers unnecessary charges generated in a photoelectric conversion element to the vertical transfer of the storage section. In a solid-state imaging device having an operation mode of reading out to a register and sweeping out through a horizontal transfer register, when an excessive light amount is input,
It is an object of the present invention to prevent unnecessary charges generated in the photoelectric conversion element from overflowing in the horizontal transfer register, and to obtain an image pickup output with good image quality.

[0010]

The solid-state imaging device according to the present invention has a vertical transfer register for reading out imaging charges obtained by photoelectric conversion elements arranged in a matrix in order to solve the above-mentioned problems. An imaging unit, a storage unit having a vertical transfer register in which imaging charges are transferred from the vertical transfer register of the imaging unit at high speed, and a horizontal transfer register in which imaging charges are transferred line-sequentially from the vertical transfer register of the storage unit. A frame interline transfer type solid-state image sensor, and imaging charges obtained by the odd-numbered rows of photoelectric conversion elements and imaging charges obtained by the even-numbered rows of photoelectric conversion elements of the solid-state image sensor are transferred on a field-by-field basis during the video period. The image data is alternately read into the vertical transfer register of the image pickup unit, and the image pickup is performed during the vertical blanking period for each field. The high speed transfer from the vertical transfer registers to the vertical transfer registers of the storage unit, performs a line sequential high-speed transfer to sweep controls the imaging charge from the vertical transfer registers of the storage section via the horizontal transfer register,
The imaging charges obtained by the adjacent odd-numbered row photoelectric conversion elements and the even-numbered row photoelectric conversion elements are added and mixed during the vertical blanking period of each field, read out to the vertical transfer register of the imaging section, and read out of the storage section. A third operation mode in which high-speed transfer is performed to a vertical transfer register, and control is performed to read out image pickup charges line-sequentially from the vertical transfer register of the storage unit via the horizontal transfer register during a video period, and a first operation mode Image sensor drive control means operable in an operation mode for performing at least one of field reading as the second mode and frame reading as the second operation mode, and storage for variably controlling the maximum accumulated charge amount of the photoelectric conversion element of the solid-state image sensor. Charge amount control means, wherein the maximum amount of the photoelectric conversion element is controlled by the stored charge amount control means in the third operation mode. Characterized in that to reduce the product charge amount.

Further, the stored charge amount control means in the solid-state imaging device according to the present invention includes a changeover switch for switching a maximum stored charge amount of the photoelectric conversion element.

Further, the accumulated charge amount control means in the solid-state image pickup device according to the present invention comprises: The effective charge accumulation period of each photoelectric conversion element of the solid-state image sensor is set to be equal to the odd-numbered row of photoelectric conversion elements and the even-numbered photoelectric conversion elements by controlling the timing of reading the data to the vertical transfer register of the imaging unit alternately for each field during the video period. Independently of the photoelectric conversion elements in the rows, control is performed in which imaging charges obtained by adjacent photoelectric conversion elements in the odd-numbered rows and photoelectric conversion elements in the even-numbered rows are added and mixed for each field, and read out.

[0013]

In the solid-state imaging device according to the present invention, the accumulated charge amount of the photoelectric conversion element of the frame interline transfer type solid-state image sensor is variably controlled by the accumulated charge amount control means, and the unnecessary charge generated in the photoelectric conversion element is reduced. In the third operation mode in which the image sensor drive control means controls the sweeping of the electric charge from the vertical transfer register of the accumulation section via the horizontal transfer register, the maximum accumulated electric charge of the photoelectric conversion element is reduced.

Further, in the solid-state imaging device according to the present invention, the storage charge amount control means switches the maximum storage charge amount of the photoelectric conversion element by a changeover switch.

Furthermore, in the solid-state imaging device according to the present invention,
The imaging charge obtained by the odd-numbered row of photoelectric conversion elements and the imaging charge obtained by the even-numbered row of photoelectric conversion elements of the solid-state image sensor are alternately read out to the vertical transfer register of the imaging section for each field during a video period. By controlling the timing, the effective charge accumulation period of each photoelectric conversion element of the solid-state image sensor is independently changed between the odd-numbered row photoelectric conversion elements and the even-numbered row photoelectric conversion elements, and the adjacent odd-numbered row photoelectric conversion elements are changed. The accumulated charge amount control means controls addition and mixing of image pickup charges obtained by the photoelectric conversion elements and the even-numbered rows of photoelectric conversion elements for each field and reading.

[0016]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS An embodiment of the solid-state imaging device according to the present invention will be described below in detail with reference to the drawings. A solid-state imaging device according to the present invention is configured, for example, as shown in FIG.

The solid-state imaging device shown in FIG.
_i is a CCD of the imaging unit 3 to which the light is incident via the imaging optical system 1
(Charge Coupled Device) An image sensor 2 captures three primary color images of a subject image and uses NTSC (National T
The present invention is applied to a color television camera device that outputs a color television signal conforming to the elevision system committer (Elevision System Commitee) method, and a signal processing unit 4 to which an imaging signal is supplied from the imaging unit 3, and a signal processing unit 4. An encoder 5 to which an image pickup signal subjected to signal processing is supplied, a CCD drive circuit 6 for driving the CCD image sensor 2, a control unit 7 for controlling the operation of these various circuit blocks, and the like.

In this solid-state imaging device, the imaging unit 3
CCD image sensor 2 which constitutes the, as shown in FIG. 2, the photoelectric conversion elements S _O, such as each photodiode corresponding to each pixel of the odd field images and even field images on the imaging plane, S _E is a matrix in sequence A so-called frame interline transfer (FIT) type having the captured image capturing unit IM and a storage unit ST in which stored charges obtained by each photoelectric conversion element S of the image capturing unit IM are transferred via a vertical transfer register IMV _REG . A CCD image sensor, which is driven by the CCD drive circuit 6 and arranged in a matrix in the form of photoelectric conversion elements _So ,
Imaging charges obtained by S _E is the vertical transfer register ST of every vertical blanking via the transfer gate SG storage unit ST from the vertical transfer registers IMV _REG of the imaging section IM
_REG, and during the video period, 1 via the vertical transfer register ST _REG horizontal transfer register H _REG of the storage section ST.
The data is read out line by line in a line-sequential manner.

The signal processing section 4 forms an image signal obtained by subjecting the image signal read from the CCD image sensor 2 to process processing such as gamma correction. Then, this imaging signal is supplied to the encoder 5. Further, the encoder 5 forms a television signal conforming to the NTSC system from the imaging signal supplied from the signal processing unit 4 and outputs the television signal from an output terminal 8.

Further, the CCD drive circuit 6 transfers the imaging charge obtained by each of the photoelectric conversion elements S _O and S _E in the imaging unit IM to the vertical transfer register IMV based on the timing signal given by the control unit 7. _The sensor gate pulses φSG ₁ and φSG ₂ to be transferred to the _REG , the vertical transfer pulse vertical transfer pulse φIM for vertically transferring the signal charges in the vertical transfer register IMV _REG of the imaging unit IM,
A vertical transfer pulse vertical transfer pulse φ for vertically transferring the signal charges in the vertical transfer register STV _REG of the storage unit ST.
ST, a transfer pulse φVH for transferring a signal charge from the vertical transfer register STV _REG of the storage unit ST to the horizontal transfer register H _REG , a horizontal transfer pulse φH for horizontally transferring the signal charge in the horizontal transfer register H _REG , and the like. This is given to the CCD image sensor 2.

The CCD driving circuit 6 is shown in FIG.
As described above, two types of power generated by the voltage generation source 6A are provided.
Pressure V-SUB₁, V-SUB_TwoVia the changeover switch 6B
To selectively output the signal, and the CCD image sensor 2
The voltage is applied to the bushing substrate. Above
The changeover switch 6B is controlled by the control unit 7
In response to the signal, the sub-storage of the CCD image sensor 2 is
By switching the voltage V-SUB applied to the rate substrate,
Each photoelectric conversion element S of the CCD image sensor 2 _O, S_E
Of accumulated charge Q of_MAXDetermine the overflow dray
Change the potential. The above CCD image sensor
The voltage of each voltage V-SUB₁, V-SUB_TwoIs one of
Voltage V-SUB₁Is applied to the substrate
Each photoelectric conversion element S_O, S_EOf accumulated charge Q of_MAX1
Than the other voltage V-SUB_TwoIs a substrate substrate
Each photoelectric conversion element S when applied to_O, S_EThe largest stock of
Accumulated charge Q_MAX2Are set so that
You.

Based on the system clock of the solid-state imaging device, the control unit 7 supplies a synchronization signal, a blanking signal, and the like to the encoder 5, and sends various signals to the signal processing unit 4 and the CCD drive circuit 6. A timing signal is provided. The operation mode of the controller 7 is controlled by a system controller (not shown).
, And the following control operation is performed.

First, the first operation mode is a field read mode, and the control section 7 supplies various timing signals of the field read mode to the CCD drive circuit 6.

In the first operation mode, the CC
D driving circuit 6 is applied with the voltage V-SUB ₁ on the substrate board, sensor gate pulses φSG during the vertical blanking interval of each field _{T VBLK
1} and φSG ₂ are simultaneously supplied to the imaging unit IM, and the imaging charge A _i obtained by the odd-numbered row of photoelectric conversion elements S _O and the imaging charge B _i obtained by the even-numbered row of photoelectric conversion elements S _E are set to 1
By transferring the combination vertically and alternately to the vertical transfer register IMV _REG for each field, the imaging charges A _i + B _i and _Bi + A _{i + 1} corresponding to the interline scanning in the field readout mode are transferred to the vertical transfer register IMV _REG. Read out.

Note that the sensor gate pulse φSG₁,
φSG_TwoImmediately before the timing of the high-speed vertical transfer pulse
φIM and φST are transferred to the vertical transfer register I of the imaging unit IM.
MV _REGAnd the vertical transfer register STV of the storage unit ST
_REGTo the vertical transfer register IM of the imaging unit IM.
_REGUnnecessary charges such as smear components in the storage unit ST
Vertical transfer register STV_REGTo transfer at high speed. This high
By the fast transfer operation, the vertical transfer register
IMV_REGThe inside is empty with unnecessary charges swept out.
You.

The CCD drive circuit 6 supplies the sensor gate pulses φSG ₁ and φSG ₂ with the vertical transfer register IMV _REG emptied, so that the odd-numbered row of photoelectric conversion elements in the image pickup unit IM. _SO
The photoelectric conversion elements S of the image pickup charges A _i and even rows obtained by
An imaging charge B _i obtained by the _E changed alternately above and below the combination for each field the vertical transfer register IM
_VREG .

Further, the sensor gate pulse φS
Immediately after the timings of G ₁ and φSG ₂ , high-speed vertical transfer pulses φIM ₁ and φST are given to the vertical transfer register IMV _REG of the image pickup unit IM and the vertical transfer register STV _REG of the storage unit ST, and the image pickup unit IM The charges A _i + B _i and B _i + A _{i + 1} in the vertical transfer register IMV _REG are transferred to the vertical transfer register STV _REG of the storage section ST at a high speed.

The signal charges A _i + B _i , B transferred to the vertical transfer register STV _REG of the storage section ST at a high speed.
_i + A _{i + 1} represents the following readout period (video period):
The data is read out line-sequentially via the horizontal transfer register _HREG .

[0029] Thus, in the first operation mode, performs an imaging operation in a state of maximum accumulated charge amount Q _MAX1 corresponding to the voltage V-SUB ₁ applied to the substrate board by the CCD image sensor 2, the The imaging charges A _i obtained by the odd-numbered rows of photoelectric conversion elements S _O and the imaging charges B _i obtained by the even-numbered rows of photoelectric conversion elements S _E of the imaging unit IM.
Are transferred alternately to the vertical transfer register IMV _REG for each field, and the imaging charges A _i + B _i , B _i + A _{i + 1} of each field are transferred during the video period to the vertical transfer register STV of the storage unit ST. _By performing line-sequential reading from the _REG via the horizontal transfer register _HREG , an imaging output corresponding to interlaced scanning is obtained in the field reading mode. Then, the imaging signal read from the CCD image sensor 2 is supplied to an encoder 5 via the signal processing unit 4, encoded into a television signal conforming to the NTSC system, and output from the output terminal 8. .

Next, the second operation mode is a frame read mode. The control section 7 supplies various timing signals of the frame read mode to the CCD drive circuit 6.

In the second operation mode, the CC
D driving circuit 6 is applied with the voltage V-SUB ₁ on the substrate board, a vertical blanking period TV
_The sensor gate pulses φSG ₁ and φSG ₂ are set to 1 during _BLK.
Alternately every field given to the imaging section IM, the image pickup charges B _i obtained by photoelectric conversion elements S _E of the imaging charges A _i and the even-numbered rows are obtained by the photoelectric conversion elements S _O in the odd rows 1
By transferred alternately for each field to the vertical transfer registers _{IMV REG,} imaging charges _A i corresponding to the interline scanning in the frame readout mode, reads out the _{B i} to the vertical transfer registers _{IMV REG.}

In this second operation mode,
Immediately before the timing of the sensor gate pulses φSG ₁ and φSG ₂ , high-speed vertical transfer pulses φIM and φST are applied to the vertical transfer register IMV _REG of the imaging unit IM and the vertical transfer register STV _REG of the storage unit ST, Unnecessary charges such as smear components in the vertical transfer register IM _REG of the imaging unit IM are transferred to the vertical transfer register S of the storage unit ST.
High-speed transfer to TV _REG . With this high-speed transfer operation,
The inside of the vertical transfer register IMV _REG of the image pickup unit IM is in an empty state where unnecessary charges have been swept out.

Then, the CCD drive circuit 6 supplies the sensor gate pulses φSG ₁ and φSG ₂ with the vertical transfer register IMV _REG emptied, and in the image pickup unit IM, the odd-numbered rows of photoelectric conversion elements S _O the resulting imaging charges a _i and even rows of the photoelectric conversion element S captured charge B _i obtained by the _E alternately for each field is transferred to the vertical transfer registers IMV _REG.

Further, the sensor gate pulse φS
Immediately after the timings of G ₁ and φSG ₂ , the high-speed vertical transfer pulses φIM and φST are applied to the vertical transfer register IMV _REG of the imaging unit IM and the vertical transfer register SV of the storage unit ST.
The charges A _i and B _i in the vertical transfer register IMV _REG of the imaging unit IM are transferred to the TV _REG at a high speed to the vertical transfer register STV _REG of the storage unit ST.

The signal charges A _i and B _i transferred at high speed to the vertical transfer register STV _REG of the storage section ST are:
During the subsequent readout period, the horizontal transfer register H _REG
Is read via

[0036] Thus, in the second operation mode, performs an imaging operation in a state of maximum charge accumulation amount Q _MAX1 corresponding to the voltage V-SUB ₁ applied to the substrate board by the CCD image sensor 2, the The imaging charges A _i obtained by the odd-numbered rows of photoelectric conversion elements S _O and the imaging charges B _i obtained by the even-numbered rows of photoelectric conversion elements S _E of the imaging unit IM.
To the vertical transfer register IMV alternately for each field.
_REG to transfer the imaging charges A _i , B _{i of} each field.
During the video period, the vertical transfer register ST of the storage unit ST.
By reading out line-sequentially from _VREG via the horizontal transfer register _HREG , an image pickup output corresponding to interlaced scanning is obtained in the frame readout mode. Then, the imaging signal read from the CCD image sensor 2 is supplied to an encoder 5 via the signal processing unit 4, encoded into a television signal conforming to the NTSC system, and output from the output terminal 8. .

The third operation mode is an operation mode of the solid-state imaging device according to the present invention.
By applying various timing signals, the CCD drive circuit 6 is operated as follows.

In the third operation mode, the CC
D driving circuit 6 is applied with the voltage V-SUB ₂ on the substrate the substrate, as shown in FIG. 4, sensor gate pulses FaiSG 1 alternately for each field in the video period of each _field, the FaiSG ₂ A vertical blanking period T for each field, which is given to the imaging unit IM.
Sensor gate pulses FaiSG during _{VBLK 1,} the FaiSG ₂ given at the same time the imaging section IM, odd rows of the image pickup charges obtained by photoelectric conversion elements _{S O A i} and even rows of the resulting imaging charges by photoelectric conversion elements _{S E} vertical transfer register IM the B _i is changed alternately above and below the combination every field
V _REG to transfer the imaging charge A _i + corresponding to the interline scanning in the field readout mode.
B _i , B _i + A _{i + 1} are transferred to the vertical transfer register IMV.
_Read to _REG .

In the third operation mode,
Immediately before the timing of the sensor gate pulses φSG ₁ and φSG ₂ for each vertical blanking period TVBLK, high-speed vertical transfer pulses φIM and φST are applied to the vertical transfer register IMV _REG of the imaging unit IM and the vertical transfer register of the storage unit ST. given to STV _REG, unnecessary charges such as smear components of the vertical transfer register _{IM REG} of the imaging section IM to high-speed transfer in the vertical transfer registers _{STV REG} of the storage section ST. By this high-speed transfer operation, sensor gate pulses φSG ₁ and φSG ₂ are alternately applied to the image pickup unit IM for each field during the video period of each field, so that the vertical transfer register IMV of the image pickup unit IM is provided.
Imaging charges of the photoelectric conversion elements S _O of the odd row read out to the _REG A _{i 'and} the image pickup charges B _i of even rows of the photoelectric conversion elements S _E' is swept out as unnecessary charges, vertical of the imaging section IM The transfer register IMV _REG is in an empty state where unnecessary charges have been swept out.

The CCD driving circuit 6 supplies the sensor gate pulses φSG ₁ and φSG ₂ with the vertical transfer register IMV _REG emptied, so that the odd-numbered row of photoelectric conversion elements in the image pickup unit IM. _SO
The photoelectric conversion elements S of the image pickup charges A _i and even rows obtained by
An imaging charge B _i obtained by the _E changed alternately above and below the combination for each field the vertical transfer register IM
_VREG .

Further, the sensor gate pulse φS
Immediately after the timings of G ₁ and φSG ₂ , the high-speed vertical transfer pulses φIM and φST are applied to the vertical transfer register IMV _REG of the imaging unit IM and the vertical transfer register SV of the storage unit ST.
The electric charges A _i + B _i and B _i + A _{i + 1} in the vertical transfer register IMV _REG of the imaging unit IM are transferred to the TV _REG at a high speed to the vertical transfer register STV _REG of the storage unit ST.

Here, in the third operation mode, the sensor gate pulses φSG ₁ and φSG ₂ are alternately applied for each field during the video period of each field, and the image pickup unit IM
Is the imaging unit capturing charges of the photoelectric conversion elements S _O of the odd row read out to the vertical transfer registers IMV _REG of IM A _{i 'and} the image pickup charges B _i of even rows of the photoelectric conversion elements S _E' by giving the Since it is swept out as unnecessary charges, a large amount of unnecessary charges is generated. Therefore, during the high-speed transfer period to the vertical transfer register STV _REG , the horizontal transfer pulse φH is also set to a high-speed pulse, so that unnecessary charges are swept out through the horizontal transfer register H _REG by high-speed transfer. In the third operation mode, a large amount of unnecessary charges are generated as described above. However, a large amount of unnecessary charges can be swept out through the horizontal transfer register _HREG by the high-speed transfer. That is, the horizontal transfer register _HREG can sweep away a large amount of unnecessary charges by increasing the number of transfers in the high-speed transfer even if the amount of charge transferred per transfer is small. Further, the voltage V-SUB ₂ and is applied to the substrate board each photoelectric conversion element S _O as described _above, the maximum accumulated charge amount of S _E Q
_{By reducing MAX2} , the amount of generated unnecessary charges can be reduced. Thus, when an excessive amount of light input, the photoelectric conversion elements S _O, unnecessary charges generated in S _E can be prevented from overflowing in the horizontal transfer register STV _REG, it is possible to obtain a good imaging output image quality .

[0043] Such a third operation mode, performs an imaging operation in a state of maximum charge accumulation amount Q _MAX2 corresponding voltage V-SUB ₂ applied to the substrate board by the CCD image sensor 2, the During the video period of each field, the sensor gate pulses φSG ₁ and φSG ₂ are alternately applied to the imaging unit IM for each field, and the imaging charges A _i obtained by the odd-numbered photoelectric conversion elements S _O and the imaging charges of the even-numbered rows are provided. by performing dummy read alternately imaging charges _{B i} obtained for each field by the conversion elements _{S E,} an imaging charge _a i ₊ B i of each _{field, B} i + a
The addition and mixing ratio of _{i + 1} can be changed from 1: 1 in the normal field readout mode. And
For example, the image pickup unit IM
The photoelectric conversion element S _O by the resulting imaging charge A in the odd rows of
_i and the photoelectric conversion element S captured charge B _i obtained by _E of an even row is changed alternately above and below the combination every field is transferred to the vertical transfer registers IMV _REG, video imaging charges A _{i +} B _i for each field During the period, the accumulation unit S
By line-sequentially reading data from the vertical transfer register STV _{REG of the} T via the horizontal transfer register H _REG , an image pickup output corresponding to interlace scanning is obtained in the field read mode. Then, the CCD image sensor 2
Is supplied to the encoder 5 via the signal processing unit 4 and is encoded into a television signal conforming to the NTSC system, and is output from the output terminal 8.

[0044] By varying the additive mixing ratio of the image pickup charges B _i obtained by photoelectric conversion elements S _E of the imaging charges A _i and the even-numbered rows are obtained by the photoelectric conversion elements S _O in the odd rows Thus, in FIG. 5 As shown, a vertical resolution (MTF) intermediate between the first operation mode, ie, the normal field readout mode, and the second operation mode, ie, the frame readout mode, can be obtained. For example, by setting the addition mixture ratio to 1: 2 and obtaining an imaging output corresponding to interlaced scanning in the field reading mode, the vertical resolution is improved as compared with the first operation mode, that is, the normal field reading mode. In addition, the dynamic range and sensitivity can be maintained at 75%, and the dynamic range and sensitivity can be improved as compared with the second operation mode, that is, the frame read mode.

In the embodiment described above, the CCD image
Voltage V-SU applied to substrate substrate of sensor 2
B₁, V-SUB_TwoTo switch each photoelectric conversion element
S_O, S _EThe maximum charge accumulation of_MAX1To Q_MAX2Cut into pieces
The CCD image sensor 2
The voltage V-SUB applied to the boost substrate is continuously
By variably controlling each photoelectric conversion element S_O, S_Eof
To be able to change the maximum charge accumulation continuously
Can also.

[0046]

As is apparent from the above description, in the solid-state imaging device according to the present invention, the maximum charge amount of the photoelectric conversion element of the frame interline transfer type solid-state image sensor can be varied by the charge amount control means. Control
In a third operation mode in which the image sensor drive control means controls the sweeping of unnecessary charges generated in the photoelectric conversion element from the vertical transfer register of the storage section via the horizontal transfer register, the maximum accumulated charge amount of the photoelectric conversion element Therefore, when unnecessary charges generated in the photoelectric conversion element are read out to the vertical transfer register of the imaging unit, and the unnecessary charges are swept away by high-speed transfer via the horizontal transfer register, the photoelectric conversion is performed when an excessive amount of light is input. Unnecessary charges generated in the element can be prevented from overflowing in the horizontal transfer register, and an image pickup output with good image quality can be obtained.

Further, the image sensor drive control means converts the imaging charge obtained by the odd-numbered row of photoelectric conversion elements and the imaging charge obtained by the even-numbered row of photoelectric conversion elements of the frame interline transfer type solid-state image sensor during the video period. The effective charge accumulation period of each photoelectric conversion element is independently controlled by the odd-numbered row photoelectric conversion elements and the even-numbered row photoelectric conversion elements by controlling the timing of reading the data into the vertical transfer register of the imaging unit alternately for each field. Can be changed. During the video period, the imaging charges read to the vertical transfer register of the imaging unit alternately for each field are transferred from the vertical transfer register of the imaging unit to the storage unit during the vertical blanking period of each field. , And is transferred at high speed line-sequentially from the vertical transfer register of the storage section via the horizontal transfer register, and is discharged as unnecessary charges. Then, by reducing the maximum accumulated charge amount of the photoelectric conversion element in the third operation mode in which unnecessary charges generated in the photoelectric conversion element are swept away via the horizontal transfer register, the photoelectric conversion element can be used when an excessive amount of light is input. The generated unnecessary charges can be prevented from overflowing in the horizontal transfer register, and an image pickup output with good image quality can be obtained.

Furthermore, even if the amount of charge transferred per transfer is small, the horizontal transfer register sweeps out a large amount of unnecessary charges during the vertical blanking period for each field by increasing the number of transfers at high speed transfer. Can be.

Then, the imaging charges obtained by the adjacent odd-numbered row photoelectric conversion elements and the even-numbered row photoelectric conversion elements are added and mixed during the vertical blanking period for each field, and read out to the vertical transfer register of the imaging section. By transferring the image-capturing charges line-sequentially from the vertical transfer register of the storage unit to the vertical transfer register of the storage unit via the horizontal transfer register during a video period, the transfer speed is higher than in the field read mode. Vertical resolution (MTF)
, The afterimage is smaller than in the case of frame reading, and an image pickup output with a wide dynamic range can be obtained.

[Brief description of the drawings]

FIG. 1 is a block diagram illustrating a configuration of a solid-state imaging device according to the present invention.

FIG. 2 is a schematic plan view showing a configuration of a frame interline transfer CCD image sensor used in the solid-state imaging device.

FIG. 3 is a diagram showing a means for generating a voltage applied to a substrate substrate of the CCD image sensor in the solid-state imaging device.

FIG. 4 is a timing chart showing an operation of the solid-state imaging device.

FIG. 5 is a characteristic diagram showing vertical MTF characteristics of an image signal obtained by the solid-state imaging device.

FIG. 6 is a timing chart showing an operation in a field read mode.

FIG. 7 is a timing chart showing an operation in a frame read mode.

[Explanation of symbols]

1 imaging optical system 2 CCD image sensor 3 imaging unit 4 signal processing unit 5 ····· Encoder 6 ······ CCD drive circuit 6A ····· Voltage source 6B ····· Changeover switch 7 ······ Control Unit 8: Output terminal S: Photoelectric conversion element IM: Image pickup unit IMV _REG: Vertical transfer register ST: ······ Storage unit STV _REG ····· Vertical transfer register H _REG ····· Horizontal transfer register

──────────────────────────────────────────────────続 き Continued on the front page (58) Field surveyed (Int.Cl. ⁷ , DB name) H04N 5/335

Claims (3)

(57) [Claims] An image pickup section having a vertical transfer register from which image pickup charges obtained by photoelectric conversion elements arranged in a matrix are read out, and a vertical transfer register for transferring image pickup charges from the vertical transfer register of the image pickup section at a high speed. A frame interline transfer type solid-state image sensor comprising: a storage unit having: a vertical transfer register of the storage unit; and a horizontal transfer register for transferring image charges from the vertical transfer register in a line-sequential manner. The imaging charge obtained by the element and the imaging charge obtained by the even-numbered rows of the photoelectric conversion elements are alternately read into the vertical transfer register of the image pickup unit for each field during the video period, and during the vertical blanking period for each field. High-speed transfer from the vertical transfer register of the imaging unit to the vertical transfer register of the storage unit; Controls the line-sequential high-speed transfer and sweep-out of the imaging charge from the vertical transfer register of the stacking unit via the horizontal transfer register, and obtains the imaging obtained by the adjacent odd-numbered row photoelectric conversion elements and the even-numbered row photoelectric conversion elements. The electric charges are added and mixed during the vertical blanking period for each field, read out to the vertical transfer register of the image pickup unit, and transferred at high speed to the vertical transfer register of the storage unit.
A third control for line-sequentially reading out imaging charges from the vertical transfer register of the storage section via the horizontal transfer register;
Operation mode, and the first operation mode, the field reading mode.
Reading or frame reading which is the second operation mode.
And operable image sensor drive control means in an operation mode for performing at least one, the maximum accumulated charge amount of the photoelectric conversion elements of the solid-state image sensor and an accumulated charge amount control means for variably controlling, when said third mode of operation A solid-state imaging device, wherein the maximum charge amount of the photoelectric conversion element is reduced by the stored charge amount control means. 2. The solid-state imaging device according to claim 1, wherein said storage charge amount control means includes a changeover switch for switching a maximum storage charge amount of said photoelectric conversion element. 3. The image forming apparatus according to claim 1, wherein the stored charge amount control means converts the imaging charge obtained by the odd-numbered row of photoelectric conversion elements and the imaging charge obtained by the even-numbered row of photoelectric conversion elements of the solid-state image sensor into one field during a video period. By controlling the read timing to the vertical transfer register of the imaging unit alternately every time, the effective charge accumulation period of each photoelectric conversion element of the solid-state image sensor is changed between the odd-numbered row photoelectric conversion elements and the even-numbered row photoelectric conversion elements. 2. The control method according to claim 1, wherein the imaging charges obtained by the adjacent odd-numbered row photoelectric conversion elements and the even-numbered row photoelectric conversion elements are mixed and read out for each field. 3. The solid-state imaging device according to 2.