JP3194922B2 - Electronic exchange - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION [Object of the Invention] (Industrial application field) The present invention relates to an electronic exchange of a distributed control system, and
It relates to a communication method between sessa. (Prior art) A plurality of processors are distributed to distribute the entire function and processing.
Electronic switch of distributed control system with enhanced ability
I have. This type of distributed control electronic exchange is
Inventors are subscriber terminals and stations such as telephones and data terminals.
Line / trunk card connected to line or leased line
Controls the installed line / trunk shelf and exchange process
Common control shelf with common control card
Stackable according to the scale of the
And communicate between these processors.
The proposed electronic exchange has been proposed. In such electronic exchanges, different shelves
Communication between implemented processors, especially line / trunk
A processor in the shelf and a processor in the common control shelf
Communication between sesas must occur in real time.
No. To do this, the communication between the processors must be transmitted in parallel.
It is recommended that the cable be connected between shelves.
The number of cables increases, cable installation costs increase, and
The problem that reliability is reduced occurs. On the other hand, in the same shelf, for example, a common control shelf
Interrupt when communicating between different processors
When serial transmission is performed by control, interrupt control is performed.
Of complex circuits required for processor support
As the amount of hardware as a whole increases,
Conversion processing is interrupted each time interrupt control is performed, and processing efficiency decreases.
Problem. Generally, the processor inside the line / trunk shelf is
Dial signal transmitted and received by the server (line / trunk card)
Signals are at the physical level,
The signal (processor) in the common control shelf (main
Processor, etc.), the load on the processor increases significantly.
Not only large, but also difficult to change, add, etc.
There is a problem that it becomes poor. (Problems to be solved by the invention) As described above, the line / trunk shelf and the common control
Stack the processors and distribute the processors in each shelf.
Electronic exchanges have processors in different shelves.
Communication between servers should not increase the number of wires between shelves.
In real time, and professionals within the same shelf
Communication between Sessas should not be accompanied by increased hardware
And without reducing the efficiency of the replacement process.
It is also important to make the system easy to expand
It has become a challenge. The present invention has been made to solve such a problem.
, Line / trunk shelves and common control shelves
Switch in the electronic exchange by the distributed control method of the laminated structure
And minimize the number of wires between shelves,
Real-time communication between processors in the shelf
And increase hardware and replacement processes.
Communication between processors in the same shelf without loss of efficiency
Scalable electronic exchange that can communicate
The purpose is to provide. [Structure of the Invention] (Means for Solving the Problems) An electronic exchange according to the present invention includes a subscriber terminal, a central office line, and the like.
Or multiple lines / tones connected to any of the dedicated lines
Line / trunk shelf with rank card
And first common control for mainly controlling the exchange processing
Card, and a common bus for this first common control card.
Connected to the line / trunk system
Connected to Elf via the control highway
Control shelf on which a second common control card is mounted
And And each of the plurality of line / trunk cards
To the connected subscriber terminal, office line or leased line.
A first processor that performs processing at a physical level
The first common control card is the line / trunk car
Logic related to the above exchange process based on the information sent from the
A second processor that performs level processing,
The second common control card is a line / trunk card.
Communication via the control highway.
Function to be carried out by means of transmission via the first common control card
Communication with the PC through parallel transmission via the common bus.
And the physical level of the first processor
Processing and logic level processing by the second processor
And a function of performing exchange between the (Operation) Between processors mounted on different shelves, for example,
Processor in the in / trunk shelf and common control system
When communicating with a processor in Elf,
Data is transmitted serially on the data highway.
This reduces the amount of wiring between shelves,
The installation cost is greatly reduced, and the reliability is
Enhanced. On the other hand, within the same shelf, for example,
When communicating between processors in the
Parallel transmission via a common bus. Therefore, the interrupt system
Complex hardware such as that used in
And the processing efficiency is improved. In addition, for example, common control with line / trunk shelves
For communication between the processor and the shelf,
A signal format handled by the processor in the rank shelf
Management level and the processes for replacement in the common control shelf.
Exchange with the logical level which is the processor processing level is for exchange processing
For local use provided separately from the first common control card
Performed by the second common control card of
Of the processor such as the main CPU in the communication control
So increase the number of stacked line / trunk shelves
And expandability is improved. (Embodiment) FIG. 1 is a schematic diagram of an electronic exchange according to an embodiment of the present invention.
FIG. 2 is a diagram showing a common control shelf 1 and a plurality of lines / tones.
Rank shelves 2a to 2n are stacked as shown in FIG.
It is made. Replacement processing, maintenance, etc. for the common control shelf 1
And a main CPU (Mcpu) card 11
Various applications such as Saging and Directory
Application CPU (Acpu) card 12
Main CPU card 11 and application CPU card 12
Control between the PC and the line / trunk (L / T) card 21
Or a local that performs input / output level conversion in software
CPU (Lcpu) card 13 and time-division time slot
Time switch (TSW) card 14
Card (card-like circuit device) that constitutes the
Is equipped. In the present invention, these common control shells are used.
The various cards 11 to 14 in the file 1 are collectively called a common control card.
Say. The processors in each of the common control cards 11 to 14
Communication with each other is performed via a common memory 16 connected to a common bus 15.
I can do the trust. On the other hand, in the line / trunk shelves 2a-2n,
Subscriber terminals such as machines and data terminals, and office or leased lines
Is connected to the line / trunk (L / T) card 21
Implemented according to number. Common control shelf 1 and line
Local trunk card between trunk shelves 2a-2n
Data high for transmission from 3 to line / trunk card 21
Local CPU module from way and line / trunk card 21
Serial transmission including receive data highway to code 13
Highway 3 and time switch for
Connected between card 14 and line / trunk card 21
PCM Highway 4 for replacing PCM time slots
More connected. Next, each part of FIG. 1 will be described in detail. Fig. 3
Is a line / trunk card 21
Internal structure of line / trunk card connected to handset 31
Is shown. The line connected to the office line or dedicated line /
Trunk card has the same configuration as card 21 above
Therefore, its illustration is omitted. In FIG. 3, digital
The telephone LSI (DTLSI) 32 is a digital telephone 31
In / trunk cards and the phones connected to them
Port control consisting of a CPU that controls office lines
This is an LSI that controls communication with the controller (PC) 33. Ma
The interface LSI (ILSI) 34 is a port control
Controller 33 and the local CPU 13 in the common control shelf 1 (first
This is an LSI that controls communication with the
It operates in the slave mode. FIG. 4 shows the local CPU card 1 in the common control shelf 1.
3 shows the internal configuration. In FIG. 4, the interface
LSI (ILSI) 41 is the interface LSI in Fig. 3.
Same configuration as 34, but different mode setting input from outside
And operate in master mode as described below.
You. Local memory 42 operates local CPU (Lcpu) 43
For storing programs and data for
The buffer 45 is connected to the common bus 15 and the local CPU card 1
3 to connect or disconnect with the local bus 46
Local CPU 43 accesses the common bus 15
The decoder 44 assigns it to the common memory 71 (described later)
Turns on buffer 45 when it detects the
To connect the common bus 15 and the local bus 46. In addition,
Different addresses are assigned to the local memory 42 and the common memory 71
Have been. FIG. 5 shows the main CPU card 11 in the common control shelf 1.
2 shows the internal configuration of FIG. Main CPU card 11 as shown
Has almost the same configuration as the local CPU card 13 shown in FIG.
And local memory 51, main CPU (Mcpu) 52,
And a local bus 55. However
And the main CPU card 11 goes to control highway 3.
Interface LSI is not built in because it is not connected.
No. Although not shown, an address in the common control shelf 1 is not shown.
The application CPU card 12 is also the main CPU shown in FIG.
It has the same configuration as the card 11. FIG. 6 shows a time switch car in the common control shelf 1.
The internal configuration of the time switch controller and the time switch controller
And time switch 61, decoder 62 and buffer 63.
Have. The time switch card 14 is controlled by the main CPU 52.
Are accessed only by
When the address on the common bus 15 is set by the coder 62
Monitor whether the address matches the control address
Only when a match occurs, the buffer 63 is turned on and the time
Switch controller and time switch 61 to common bus 15
Connect to FIG. 7 shows the common memory card 16 in the common control shelf 1.
The common memory 71, the decoder 72 and the bus
The method for accessing the common memory 71
As described above in the time switch card 14 shown in FIG.
It is the same as the access method. Next, referring to FIG.
The processor in the common control card, for example as shown in FIG.
FIG. 3 shows the local CPU 43 in the local CPU card 13.
Processor (port) in the line / trunk card 21
A communication method with the controller 33) will be described.
As mentioned earlier, processors in these different shelves
Communication between the devices is performed by serial transmission using interrupt control.
It is. In FIG. 8, the control highway 3 is the data
Highway (data input / output line), frame synchronization signal transmission
Line and data highway clock transmission line, PC
M Highway 4 is a PCM highway clock transmission line and PCM
It has a transmission line for a highway frame synchronization signal. locker
Clock generator 47 in the CPU card 13
A data highway clock is sent to the way 3. one
On the other hand, the line corresponding unit 36 in the line / trunk card 21 is CODE
Including C and SLIC. In this embodiment, the mode is set as the interface LSI.
There are two modes depending on the input:
Master module that has the function of sending data in synchronization with
And the time slot designation address from outside
Data can be sent only at the obtained time slot address.
Switchable to slave mode with
The result is used. The interface LSI 41 in the local CPU card 13 is
It operates in the star mode, with the local CPU and control hardware.
Inserted between Eway 3. This interface LS
Transmission of data from I41 to control highway 3
Is performed in synchronization with the change point of the time slot. Ma
Interface LS in line / trunk card 21
When receiving data from I34, a header was detected.
Sometimes receive, and receive request to local CPU43.
Interrupt request. Interface LSI3 in line / trunk card 21
4 operates in slave mode and controls highway
B3 and PCM highway 4 and each port in the card 21
Connected to the port controller 33 that controls
You. Control high from this interface LSI34
Transmission of data to way 3 is controlled by external time slots.
At the time slot specified by the
Only possible. Also, the interface LSI 34
When transmitting, after detecting the header,
Receive data via the third way, and add the received data.
Address matches the external time slot designation address.
Only when the received data is valid,
Issues an interrupt request as a reception request to the controller 33
Live. When the port controller 33 receives the interrupt request,
Received data from the receive register in interface LSI34
Read and read the line / trunk card 21 according to the data
Is controlled. When sending data to the line corresponding unit 36
Port controller 33 is the interface LSI 34
After writing control data to the line corresponding unit control unit in the
The interface LSI 34 sends the control data to the line
Send out. The state of the line corresponding unit 36 or the state of the digital telephone 31 etc.
The data from the subscriber terminal, etc.
Is periodically taken into the I / O register of the line corresponding unit control unit
It is. And the port controller 33 uses this I / O register
By reading the data in the data periodically,
36 state changes are detected and the state change or local CP
The control data for U43 is
Write to transmit register. After this, interface LSI3
4 is given by an external time slot designation address.
The contents of the transmit register in the time slot
Control highway 3 data highway (data
Output line). Next, between each processor in the common control shelf 1,
That is, communication between processors provided in each common control card.
The method will be described. Process in common control shelf 1
For local communication between the servers, each local CPU 43
Regarding the status of subscriber terminals collected from rank card 21
Data and data from subscriber terminals to a specified level
Process the processed data to main CPU 52 or application CPU
Data transmission to the main CPU 52 and the
Terminal control obtained by application CPU exchange processing
Data transmission for transmitting data to the local CPU 43 side
There is. As mentioned above, processors within the same shelf
Communication between the processors is performed by the processors in common on the common bus 15.
Connect a common memory 16 that can access
Write the data to be sent to the memory
By reading the data to be received from
You. Connect a common memory to the common bus, and
Method for transmitting data between arbitrary processors
Is well known, for example, as found in control by IEEE 796.
is there. This method requires common memory access
Processor outputs a control signal on the common bus.
Data by occupying the common bus during the access period.
Data transmission is performed. In that case, multiple processors
Access conflicts based on a given priority
Processing is performed. In this embodiment, each local CPU 43 is a subscriber terminal.
Whenever a state change occurs on the
Each time dial information is sent, its status or dial
The information data is written to the common memory 16. On the main CPU 52
Is to periodically poll the contents of the common memory 16
Information about the status of each subscriber terminal,
Do the work. For example, if there is a call from a subscriber terminal,
Upon detecting this, call processing is performed. A series of calls
Data stored in the common memory 16
Data, or from the subscriber terminal via the local CPU 43.
When the data written in the communication memory 16 becomes necessary,
Access the memory 16 and read the data to process
Do. As a result of this processing, control to control the subscriber terminal side
When the data changes, the control data is stored in the common memory.
Write to 16. On the other hand, the local CPU 43 also controls the subscriber terminal.
Determine if data has changed, and if
Detects what the control data was
To periodically poll the contents of the common memory 16
I have. Thus, each processor (main CPU 52, local CPU 4
3) writes the data to be transmitted to the common memory 16,
The contents of the common memory 16 periodically or when necessary.
By polling and reading the data to be received
Communication between these processors. this
By doing so, the local CPU 43 and main CPU 52 and application
There is a difference in the function level with the
Data from the local CPU 43 to the 52 or application CPU
Despite the relationship that gathers, the main CPU 52 and application
The application CPU, etc. has its own processing program (for example,
Processing program) without interruption
Thus, the processing efficiency is improved. In addition, the local CPU (Lcpu) 43, the main CPU (Mcpu) 52
And application CPU (Acpu) on common bus 15
Connected via the common memory 16 of Mc
Flexible communication between pu-Lcpu, Lcpu-Acpu, Mcpu-Acpu
More advanced services in real time
It is possible to do it while keeping it. Furthermore, there is a position between the serial transmission system and the parallel transmission system.
As shown in FIG. 9, the local CPU 43
Physical level which is the processing level of the in / trunk card 21
To the logical level, which is the processing level of the local CPU 43
The main CPU 52 abstracts the input and output
It can be handled at the level that has been done. Fig. 9 shows the line
/ Trunk card 21, local CPU43 and main CPU52
Functions and communication data between these processors.
2 shows a specific example of data. This way local
Command data between the CPU 43 and the subscriber terminal or trunk
Transmission control can be performed, and the main CPU 52
Since there is no need to manage command data,
The load on the in-CPU 52 is reduced, making changes and additions easier.
Has the advantage of increased scalability and increased productivity.
You. Next, the internal configuration of the interface LSI (34, 41, etc.)
This will be described with reference to FIG. Interface LSI before
As described above, data on control highway 3
Data transmission to the e-way coincides with the time slot change point.
Master mode with expected functions and data
Data transmission to the Eway
Address matching the address given by the fixed address
Slave mode, which is only possible in
It is configured to be able to be switched to. Mode setting input
Control unit that switches between master and slave modes
Is in the data highway transmitting / receiving section 101. In FIG. 10, the data highway transmitting / receiving section 101 is
Frame synchronization signal DHFS and data highway clock DH
Operated by CLK, the data highway transmission register 102 and
And data via the data highway reception register 103.
Data transfer between input line DHIN and data output line DHOUT
Send and receive. In this case, the transmission / reception timing is
As described above, the difference depends on the password. That is,
In master mode, it synchronizes with the time slot change point.
The data in the transmission register 102 is sent out, and
After receiving the data, the data is received and stored in the reception register 103.
You. In slave mode, an external time slot
Time slot of the address that matches the specified address
The data in the transmission register 102 is transmitted only at
When receiving data, after receiving the header,
Time slot designation address and address in received data
Data is stored in the reception register 103 only when the
Store. The CPU interface control unit 104
Decodes the address data and stores it in the interface LSI
Data is sent to each block. The line corresponding unit control unit 105 has an input register 106, an output register
I / O specification register to specify data 107 and I / O mode
And is connected to the line corresponding unit 36 (FIG. 8). PCM time slot control unit 109 is PCM frame synchronous PCMFS
And the PCM clock to count the number of time slots
PCM time slot by the port controller 33.
PCM time slot address set in the
To the CODEC when they match.
Control to give frame synchronization. In the electronic exchange of the present embodiment, the local CPU 43
Transmit the same data to multiple port controllers 33
The port controllers 33 are connected
Shared with the flave mode interface LSI 34
Group address, and assign this group address
Transmit data using the address. This group address
Is a set of addresses of multiple interface LSI34
The meaning of each interface LSI 34
Registered. Note that the same data is sent from the local CPU 43 to multiple ports.
As a method of transmitting to the controller 33, each port
Controller, and sends the same data in sequence.
And the port controller 33 as described above.
Represents multiple interface LSI34 connected
Transmission method with transmission data added to group address
You could think so. Although the method is simple, each port
Address and transmission data for controller individually
Next must be transmitted. In contrast,
Between the local CPU 43 and multiple port controllers 33
Transmission can be performed at once between
Time is reduced, and the load on the local CPU 43 is also reduced.
You. Next, the transmission signal format in this embodiment is
This will be described with reference to the drawings. As shown in FIG.
One frame is formed by dress, control data and information data
Has formed. Address to single port controller 33
Individual addresses for transmitting data individually and multiple addresses
The same data is transmitted to the port controller 33.
Address for all port controllers 33
It is divided into a broadcast address for transmitting one data.
Distinguishing between individual address, broadcast address and broadcast address
Information (referred to as an identifier) is shown at the bottom of FIG.
Upper 2 bits (MSB side) in the address format
used. In the case of individual address, this address
Following the upper two-bit identifier to indicate
-Interface LSI address (ILSI address), broadcast again
In the case of, a group address indicating an arbitrarily specified group
Each is added. Now, as shown in FIG. 12, a single group address (#
A) substitutes address information of multiple interface LSIs
This means that the local CPU 43
Interface LSI3 connected to the remote controller 33
If the same data is transmitted to 4,
As described above, the upper 2 bits in the address format are
Set the identifier “10” and continue with the representative addresses of # 1 to #n
And #A may be added. This allows the local CPU4
Data from 3 can be transmitted to multiple ports by one call operation
To the interface LSI 34 connected to the controller 33
Will be sent. In this way, the data sent from the local CPU 43
Interface LSI 34 via the data highway.
Extract the group address from the data received
Compare with the registered group address. This ratio
As a result of comparison, when both addresses match, the
Receive information data. Note that in FIG.
Address #A, #B is the interface LSI34
The line / trunk card 21 provided is a standard telephone (ST
T) indicates that the card is connected. this
Line / trunk cards transmit data from the local CPU43.
Data, but other line / trunk cards
Cannot receive the same data. FIG. 13 shows a line / transformer for performing the above processing.
2 shows the configuration of the address processing circuit provided in the network 21.
And the upper 2 bits (identifier) of the received address
Is supplied to the E and S terminals (control input terminals) of the selector 131.
You. The A and B terminals (data input terminals) of the selector 131
Glue stored in the memory 132 in the
Address and individual interface LSI34
The supplied LSI address is supplied. Selector 131
Are the LSI address when (E, S) = (0,0), and (E, S)
When S) = (1,0), the group address is output
The signal is supplied to the first input terminal of the comparator 133.
The second input terminal of the comparator 133
Address information following the upper two bits is supplied, and
Comparing when the values of the first and second input terminals match
The output of the data 133 becomes “1”. On the other hand,
2-bit information is further input to a 2-input AND gate 134
Whether the upper 2 bits are “11”, that is,
It is determined whether the dress is a broadcast address. this
Two inputs of the output of AND gate 134 and the output of comparator 133
It is input to the force OR gate 135. “1” out of OR gate 135
The force becomes a reception request to the port controller 33. You
That is, the interface LSI that the receiving address received
If the address is an individual address (LSI address) corresponding to
And the broadcast address including the received interface LSI
(Group address) and broadcast address
, The information data following the address is received.
Request is issued. With this configuration, the system can be shut down when the system goes down.
Program is stored in each port when starting up the system
It is effective when you make it. In other words, programs such as programs
Loading time regardless of the number of ports
System, since it is determined only by the number of programs to be
The time required to start up the system is greatly reduced. According to the present invention, laminated line / trunk shells
Without increasing the number of wires between
Communication between processors in the
It is also possible to increase hardware and replace
Communication between processors in the same shelf without loss of efficiency
Distributed control method that can perform communication
Type electronic exchange can be provided.

BRIEF DESCRIPTION OF THE DRAWINGS FIG. 1 is a diagram showing a schematic configuration of an electronic exchange according to an embodiment of the present invention, FIG. 2 is a diagram showing a shelf laminated structure of the electronic exchange, and FIG. FIG. 4 is a diagram showing an internal configuration of a local CPU card in the embodiment, FIG. 5 is a diagram showing an internal configuration of a main CPU card in the embodiment, FIG.
FIG. 7 is a diagram showing an internal configuration of a time switch card in the embodiment. FIG. 7 is a diagram showing an internal configuration of a common memory card in the embodiment. FIG. 8 is a local CPU card in a common control shelf in the embodiment. FIG. 9 is a diagram for explaining the communication system in the line / trunk card and FIG. 9 is a diagram showing a specific example of the communication between the line / trunk card and the local CPU and the main CPU, and FIG. FIG. 11 is a diagram showing an internal configuration of an interface LSI in the embodiment. FIG. 11 is a diagram showing a transmission signal format for describing a method of transmitting data from a local CPU to a port controller in a line / trunk card in the embodiment. FIG. 12 is a conceptual diagram for explaining the data transmission method, and FIG. 13 is an address in a line / trunk card used for implementing the data transmission method. It is a diagram showing a configuration of a reception circuit. 1 ... Common control shelf, 2a ~ 2n ... Line / trunk shelf, 3 ... Control highway, 4 ... PCM
Highway, 11: Main CPU card, 12: Application CPU card, 13: Local CPU card, 14 ...
Time switch card, 15 Common bus, 16 Common memory, 21 Line / trunk card, 33 Port controller, 34, 41 Interface LSI, 43 Local CPU, 52 Main CPU, 71 ... Common memory.

──────────────────────────────────────────────────続 き Continuation of the front page (56) References JP-A-60-108958 (JP, A) JP-A-56-42868 (JP, A) JP-A-53-84526 (JP, A) JP-A-57- 135592 (JP, A) JP-A-58-33389 (JP, A) JP-A-60-160969 (JP, A) JP-A-58-48592 (JP, A) JP-A-54-138313 (JP, A) JP-A-57-180288 (JP, A) (58) Fields investigated (Int. Cl. ⁷ , DB name) H04Q 3/54-3/56

Claims (1)

(57) [Claims] A line / trunk shelf mounted with a plurality of line / trunk cards connected to a subscriber terminal, an office line or a dedicated line; a first common control card mainly for controlling switching processing; A common control shelf mounted with a second common control card connected to the common control card via a common bus and connected to the line / trunk shelf via a control highway; Each of the plurality of line / trunk cards includes a first processor that performs physical level processing for connected subscriber terminals, office lines or leased lines, and wherein the first common control card includes the line / trunk card. A second processor that performs a logic level process related to the exchange process based on information sent from the The common control card has a function of performing communication with a line / trunk card by serial transmission via the control highway, and a function of performing parallel communication with the first common control card via the common bus. And a function of exchanging between a physical level process by the first processor and a logical level process by the second processor.