JP3175456B2 - Digital signal processor - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method of recording compressed data obtained by bit-compressing a digital signal of a digital audio signal, for example, on a recording medium or transmitting it to a transmission medium, and / or recording on a recording medium. The present invention relates to a digital signal processing device for reproducing compressed data or receiving compressed data via a transmission medium and restoring an original digital signal.

[0002]

2. Description of the Related Art The applicant of the present invention has previously developed a technique in which an input digital audio signal is bit-compressed and the bit-compressed digital audio signal is recorded in bursts with a predetermined data amount as a recording unit. For example, Japanese Patent Application No. 2-221364, Japanese Patent Application No. 2-221365.
No. 2-282121, Japanese Patent Application No. 2-2282
No. 3 has been proposed in each specification and drawings.

This technology uses a magneto-optical disk as a recording medium and a so-called compact disk (CD: Comp
act Disc) CD-I (CD-Interactive) and C
It records and reproduces AD (adaptive difference) PCM audio data specified in the audio data format of the D-ROM XA. For example, 32 sectors of the ADPCM data and several sectors for linking for interleave processing are recorded. As a recording unit, data is recorded in a burst on the magneto-optical disk.

Several modes can be selected for ADPCM audio in a recording / reproducing apparatus using this magneto-optical disk. For example, sampling is performed at twice the compression ratio as compared with the normal CD reproducing time. Frequency 3
A level A of 7.8 kHz, a level B of 47.8 times the sampling frequency and a sampling frequency of 37.8 kHz, and a level C of 8 times the compression rate and 18.9 kHz of the sampling frequency are defined.

That is, for example, in the case of the level B, digital audio data is compressed to approximately 1/4, and the reproduction time (play time) of a disk recorded in this level B mode is a standard CD. 4 times the format (CD-DA format). According to this, a recording / reproducing time of about the same size as a standard 12 cm can be obtained with a smaller disk, so that the apparatus can be downsized.

However, the rotation speed of the disk is a standard C
Since it is the same as D, for example, in the case of the level B, compressed data for a reproduction time four times as long as the predetermined time is obtained. For this reason, for example, the same compressed data is read out four times in units of time such as sectors or clusters, and only one of the compressed data is used for audio reproduction. Specifically, when scanning (tracking) a spiral recording track, 1
A track jump is performed to return to the original track position for each rotation, and the reproduction operation proceeds in such a form that the same track is repeatedly tracked four times. This means that normal compressed data only needs to be obtained at least once out of, for example, four overlapping readings, which is resistant to errors due to disturbances and the like, and is particularly preferable when applied to portable small devices.

As a technique for bit-compressing an input digital audio signal, an input time-series audio signal is divided into a plurality of band components by a band division filter or the like, and the signal is divided into blocks for each band component. A so-called adaptive transform coding method is known in which a time-series audio signal is converted into spectral data on a frequency axis by using a frequency analysis method such as an orthogonal transform for each block, and the obtained spectral data is directly coded. .

Further, in this adaptive transform coding system, a frequency band composed of spectrum data for each block obtained by a frequency analysis technique such as orthogonal transform is further subdivided into a plurality of subbands. There is known a method of improving the quantization efficiency by further constructing a block, performing a so-called floating process for each of the subdivided blocks, and then performing a quantization process. In this method, a so-called scale factor, which is a coefficient representing a floating state set for each subdivided divided band (each subdivided block) for performing a floating process, is quantized by the quantization. Need to be recorded and / or transmitted together with the acquired spectral data.

[0009]

In general, audio signals have a high correlation in the time axis direction. Therefore, when a block for performing the above-described orthogonal transform (orthogonal transform block, hereinafter referred to as a frame) is shortened, There is considerable similarity in spectral data between successive frames.

Normally, when performing the floating process for each block, the scale factor is determined by the peak value of the spectral data for each unit block (hereinafter referred to as a block floating unit) for which the block floating process is performed. .

As described above, the scale factor is determined by the peak value of the spectrum data for each of the block floating units, and the spectrum data between consecutive frames has similarity as described above. Therefore, it can be said that the correlation of the scale factor of the same block floating unit between the consecutive frames is high. In particular, for a stationary signal represented by a sine wave, the same scale factor is set in any frame. However, strictly speaking, even in the case of the sine wave, since the spectrum data slightly changes due to the relationship of the cutout position of the frame,
Although the value of the scale factor changes, the correlation remains high.

In the conventional method, the value of the scale factor is set for each frame, and recording / transmission is performed for each frame. As described above, similar information is recorded / transmitted between frames. In other words, useless information is recorded / transmitted.

Accordingly, the present invention has been made in view of the above-described circumstances, and has the advantage of reducing unnecessary information.
It is another object of the present invention to provide a digital signal processing device capable of increasing the efficiency of bit compression.

[0014]

SUMMARY OF THE INVENTION The present invention has been proposed to achieve the above-mentioned object, and a digital signal processing apparatus according to the present invention comprises: a blocking means for blocking a digital signal by a plurality of samples; A floating unit for setting floating information for each block and performing a floating process based on the floating information for each block; a quantization encoding unit for quantizing and encoding the data subjected to the floating process; Recording / transmission means for recording or transmitting encoded and encoded data, wherein the recording / transmission means is adapted to store floating information of the block and floating information of a block temporally preceding the block. Is recorded or transmitted. Further, the digital signal processing device of the present invention
The digital signal is divided into blocks by a plurality of samples, floating information is set for each of the blocks, floating processing is performed for each of the blocks based on the floating information, and coded data recorded or transmitted after being quantized and coded is stored. , Play or receive play /
Receiving means, decoding and inverse quantization means for decoding and inverse quantizing the reproduced or received encoded data, and inverse floating means for performing an inverse floating process based on the floating information to restore an original digital signal; Wherein the reproducing / receiving means is configured to perform, when the difference information between the floating information of the block and the floating information of a block temporally preceding the block is recorded or transmitted at the time of the recording or transmission, Is
The differential information is reproduced or received, and the reverse floating means obtains block floating information from the differential information and performs reverse floating processing.

Here, in the digital signal processing apparatus of the present invention, at the time of the recording or transmission, the difference information and the floating information of the block are adaptively selected and recorded or transmitted, and When the information amount is large, the floating information of the block is recorded or transmitted, and when the information amount of the difference information is small, the difference information is recorded or transmitted.

The digital signal processing device of the present invention compares the information amount of the difference information with the information amount of the floating information of the block, and records or transmits the smaller information.

Next, a digital signal processing apparatus according to the present invention comprises a band dividing means for dividing a digital signal into a plurality of band signals, and a signal for performing a signal analysis process for each band divided band signal to obtain a signal component. Analyzing means, two-dimensional blocking means for dividing the signal component obtained by the signal analyzing means into a plurality of two-dimensional blocks relating to time and frequency, and setting floating information for each two-dimensional block relating to time and frequency, and Means for performing a floating process based on the floating information for each two-dimensional block relating to frequency and frequency, quantizing and coding means for quantizing and coding the data subjected to the floating process, and the quantized and coded data Recording / transmission means for recording or transmitting the data, wherein the recording / transmission means comprises It is characterized in that recording or transmitting the difference information between the time floating information of the previous two-dimensional blocks with respect to the floating information and the two-dimensional blocks of the block. Further, the digital signal processing device of the present invention divides a digital signal into a plurality of band signals, performs a signal analysis process for each band-divided band signal to obtain a signal component, and converts the signal component with respect to time and frequency. Divided into a plurality of two-dimensional blocks, floating information is set for each two-dimensional block related to the time and frequency, and floating processing is performed based on the floating information for each two-dimensional block related to the time and frequency. A reproducing / receiving means for reproducing or receiving data recorded or transmitted after the quantization and encoding of the data, and decoding and inverse quantization of the reproduced or received encoded data; Decoding inverse quantizing means, and the floating unit for each two-dimensional block relating to time and frequency. Inverse floating means for performing an inverse floating process based on the switching information, signal component inverse analysis means for obtaining a signal component in the two-dimensional block related to the time and frequency subjected to the inverse floating process, and a two-dimensional block related to the time and frequency A signal synthesizing means for obtaining a plurality of band signals from the signal components therein and synthesizing the respective band signals to restore the original signal, wherein the reproducing / receiving means performs the two-dimensional block at the time of the recording or transmission. When the difference information between the floating information of the two-dimensional block and the floating information of the two-dimensional block preceding the two-dimensional block is recorded or transmitted, the difference information is reproduced or received,
The floating means calculates block floating information from the difference information and performs reverse floating processing.

Here, in the digital signal processing apparatus of the present invention, at the time of the recording or transmission, the difference information and the floating information of the two-dimensional block are adaptively selected and recorded or transmitted. When the information amount of the difference information is large, the floating information of the two-dimensional block is recorded or transmitted, and when the information amount of the difference information is small, the difference information is recorded or transmitted.

The digital signal processing device of the present invention compares the information amount of the difference information with the information amount of the floating information of the two-dimensional block, and records or transmits the smaller information.

Further, in the digital signal processing device according to the present invention, the difference information is a difference between the floating information of the block and the floating information of the block which is immediately before the block in time and the same in frequency. is there. Further, the block floating information is determined based on a peak value of a signal component in the block.

In the digital signal processing apparatus of the present invention, orthogonal transformation is used to decompose a digital signal into a plurality of frequency components to obtain a plurality of two-dimensional blocks relating to time and frequency. An inverse orthogonal transform is used to convert a signal in a dimensional block into a digital signal on a time axis. Here, the second digital signal processing apparatus of the present invention firstly decomposes the digital signal into a plurality of frequency band components to obtain signal components in a plurality of two-dimensional blocks relating to time and frequency. Divide and form a block consisting of a plurality of samples for each of the divided bands, perform orthogonal transform for each block of each band to obtain coefficient data, and convert the multiple bands on the frequency axis to the time axis signal. In the conversion, inverse orthogonal transform is performed for each block in each band, and the output of each inverse orthogonal transform is synthesized to obtain a synthesized signal on the time axis. The block size of the orthogonal transform and the inverse orthogonal transform is variable. In addition, the division frequency width in the division of the time axis signal before the orthogonal transform into a plurality of bands on the frequency axis and the multiple frequency bands in the synthesis into the time axis signal from the plurality of bands on the frequency axis after the inverse orthogonal transform The composite frequency width is the same in two successive bands of the lowest band, and / or is made wider as the band is substantially higher. Further, a modified discrete cosine transform is used as the orthogonal transform, and an inverse modified discrete cosine transform is used as the inverse orthogonal transform.

Next, in a first digital signal processing method according to the present invention, a digital signal is divided into blocks by a plurality of samples, floating information is set for each block, and floating processing is performed for each block based on the floating information. , Processing to quantize and encode and record or transmit, and / or block the digital signal by a plurality of samples, set floating information for each block, perform floating processing based on the floating information for each block, The encoded data recorded and transmitted after being quantized and encoded is reproduced or received, the reproduced or received encoded data is decoded and inversely quantized, and an inverse floating process is performed based on the floating information. Perform processing to restore digital signals In Ijitaru signal processing method,
In the recording or transmission, difference information between the floating information of the block and the floating information of a block temporally preceding the block is recorded or transmitted.

Here, in the first digital signal processing method of the present invention, at the time of the recording or transmission, the difference information and the floating information of the block are adaptively selected and recorded or transmitted. When the information amount of the difference information is large, the floating information of the block is recorded or transmitted, and when the information amount of the difference information is small, the difference information is recorded or transmitted.

Further, in the first digital signal processing method of the present invention, the information amount of the difference information is compared with the information amount of the floating information of the block, and the smaller information is recorded or transmitted.

Next, a second digital signal processing method of the present invention divides a digital signal into a plurality of band signals, performs signal analysis on each band-divided band signal to obtain a signal component, and The component is divided into a plurality of two-dimensional blocks related to time and frequency, floating information is set for each two-dimensional block related to time and frequency, and floating processing is performed based on the floating information for each two-dimensional block related to time and frequency. Performing quantization, encoding, recording or transmitting, and / or dividing a digital signal into a plurality of band signals, performing signal analysis on each band-divided band signal, and obtaining signal components. Divide components into multiple 2D blocks related to time and frequency, and float for each 2D block related to time and frequency. Information, perform floating processing based on the floating information for each of the two-dimensional blocks related to time and frequency, reproduce or receive encoded data recorded or transmitted by quantization and encoding, and perform the reproduction or reception. Decoding and dequantizing the encoded data, performing inverse floating processing based on the floating information for each two-dimensional block regarding the time and frequency, and obtaining a signal component in the two-dimensional block regarding the time and frequency, In a digital signal processing method for obtaining a plurality of band signals from signal components in a two-dimensional block relating to time and frequency, and combining them to restore the original signal, the above-described two-dimensional signal Floating information of the block and the previous two It is characterized in that recording or transmitting the difference information between the original block floating information.

Here, in the second digital signal processing method of the present invention, at the time of the recording or transmission, the difference information and the floating information of the two-dimensional block are adaptively selected and recorded or transmitted. When the information amount of the difference information is large, the floating information of the two-dimensional block is recorded or transmitted, and when the information amount of the difference information is small, the difference information is recorded or transmitted.

In the second digital signal processing method according to the present invention, the information amount of the difference information is compared with the information amount of the floating information of the two-dimensional block, and the smaller information is recorded or transmitted. .

Further, in the first and second digital signal processing methods according to the present invention, the difference information is the floating information of the block and the block which is immediately before the block and the same as the block in frequency. This is the difference from the floating information. Further, the block floating information is determined based on a peak value of a signal component in the block.

Further, in the second digital signal processing method of the present invention, orthogonal transformation is used to decompose the digital signal into a plurality of frequency components to obtain a plurality of two-dimensional blocks relating to time and frequency. An inverse orthogonal transform is used to convert a signal in a two-dimensional block related to frequency into a digital signal on a time axis.

In the second digital signal processing method of the present invention, in order to decompose a digital signal into a plurality of frequency band components and obtain signal components in a plurality of two-dimensional blocks relating to time and frequency, a plurality of frequency components are first used. , And a block composed of a plurality of samples is formed for each of the divided bands, orthogonal transform is performed for each block of each band to obtain coefficient data, and a time axis signal is obtained from a plurality of bands on the frequency axis. In the conversion to, an inverse orthogonal transform is performed for each block in each band, and the output of each inverse orthogonal transform is synthesized to obtain a synthesized signal on the time axis. Here, the block sizes of the orthogonal transform and the inverse orthogonal transform are variable. In addition, the division frequency width in the division of the time axis signal before the orthogonal transform into a plurality of bands on the frequency axis and the multiple frequency bands in the synthesis into the time axis signal from the plurality of bands on the frequency axis after the inverse orthogonal transform The composite frequency width is the same in two successive bands of the lowest band, and / or is made wider as the band is substantially higher. Further, a modified discrete cosine transform is used as the orthogonal transform, and an inverse modified discrete cosine transform is used as the inverse orthogonal transform.

Next, the first recording medium of the present invention is characterized by recording data encoded by the first digital signal processing device of the present invention.

A second recording medium according to the present invention is characterized by recording data encoded by the first digital signal processing method according to the present invention.

Here, as the first and second recording media of the present invention, a magneto-optical disk, a semiconductor recording medium, an IC memory card, an optical disk and the like can be exemplified.

That is, according to the digital signal processing apparatus, the digital signal processing method, and the recording medium of the present invention,
In the so-called scale factor setting process, the value of the scale factor of the previous frame is stored for each block floating unit, and the difference from the scale factor of the previous frame is calculated for each block floating unit, and only the difference of the scale factor is calculated. By recording / transmitting, the information amount of the scale factor can be reduced.
When the difference between the scale factors is large, that is, when the correlation with the previous frame is low, the value of the scale factor itself is recorded / transmitted, and only when the difference between the scale factors is small, that is, when the correlation with the previous frame is high. Any signal can be handled by recording / transmitting the difference between the scale factors.

[0035]

According to the digital signal processing apparatus and the digital signal processing method of the present invention, when recording or transmitting,
By recording or transmitting difference information between the floating information of the block and the floating information of the block temporally preceding the block, the amount of information to be recorded or transmitted for the floating information is reduced. At this time, according to the digital signal processing apparatus and the digital signal processing method of the present invention, during recording or transmission, difference information and floating information are adaptively selected and recorded or transmitted, and the information amount of the difference information is reduced. When the information amount is large, the floating information of the block is recorded, and when the information amount of the difference information is small, the difference information is recorded or transmitted. The transmission prevents any signal from increasing the amount of information recorded or transmitted for floating information.

According to the digital signal processing apparatus and the digital signal processing method of the present invention, at the time of recording or transmission, the floating information of the two-dimensional block and the two-dimensional block temporally preceding the two-dimensional block. By recording or transmitting the difference information with respect to the floating information, the amount of information to be recorded or transmitted for the floating information is reduced. At this time, according to the digital signal processing apparatus and the digital signal processing method of the present invention, at the time of recording or transmission, difference information and floating information of a two-dimensional block are adaptively selected and recorded or transmitted, and the difference information is recorded. When the information amount is large, the floating information of the two-dimensional block is recorded or transmitted,
When the information amount of the difference information is small, the difference information is recorded or transmitted, and by comparing the information amount of the difference information with the information amount of the floating information of the two-dimensional block, the smaller information is recorded or transmitted. This prevents the amount of information recorded or transmitted for floating information from increasing for any signal.

Further, according to the digital signal processing apparatus and the digital signal processing method of the present invention, the difference information is the floating information of the block and the floating information of the block immediately before and in the same frequency with respect to the block. And the correlation between the blocks is used. Also, the block floating information is determined based on the peak value of the signal component in the block.

Further, according to the digital signal processing apparatus and the digital signal processing method of the present invention, a digital signal is decomposed into a plurality of frequency components by orthogonal transformation to obtain a plurality of two-dimensional blocks relating to time and frequency. In this case, first, a block including a plurality of samples is formed for each of the divided bands, and orthogonal transform is performed for each block of each band to obtain coefficient data. On the other hand, according to the digital signal processing device and the digital signal processing method of the present invention, a signal in a two-dimensional block relating to time and frequency is converted into a digital signal on a time axis by inverse orthogonal transform. Sometimes, in the conversion from a plurality of bands on the frequency axis to a time-axis signal, an inverse orthogonal transform is performed for each block in each band, and each inverse orthogonal transform output is synthesized to obtain a synthesized signal on the time axis. . Here, by making the block sizes of the orthogonal transform and the inverse orthogonal transform variable, the orthogonal transform and the inverse orthogonal transform according to the characteristics of the signal are performed. In addition, the division frequency width in the division of the time axis signal before the orthogonal transform into a plurality of bands on the frequency axis and the multiple frequency bands in the synthesis from the plurality of bands on the frequency axis into the time axis signal after the inverse orthogonal transform The synthesized frequency width is the same in two consecutive bands of the lowest band, and / or is made wider in a substantially higher band to utilize human auditory characteristics. Further, a modified discrete cosine transform is used as the orthogonal transform, and an inverse modified discrete cosine transform is used as the inverse orthogonal transform.

Next, according to the recording medium of the present invention, by recording data encoded by the digital signal processing device and the digital signal processing method of the present invention, a magneto-optical disk, a semiconductor recording medium, Thus, the effective use of the recording capacity of an IC memory card, an optical disk or the like is attempted.

That is, according to the digital signal processing device, digital signal processing method, and recording medium of the present invention,
By reducing the amount of information for block floating information, the number of bits that can be used for encoding a digital signal is increased, and as a result, the amount of quantization noise is reduced.

[0041]

Embodiments of the present invention will be described below in detail with reference to the drawings. First, FIG. 1 shows a schematic configuration of a compressed data recording / reproducing apparatus as one embodiment to which the digital signal processing apparatus of the present invention is applied. The digital signal processing device of the present invention is applied to an ATC encoder 63 and an ATC decoder 73 of the compressed data recording / reproducing device shown in FIG. 1 which will be described later. As shown, the ATC decoder 73
FIG. 14 shows a specific configuration of the method.

Hereinafter, the specific configuration of FIG. 1 will be described in detail. In the compressed data recording / reproducing apparatus shown in FIG. 1, a magneto-optical disc 1 is used as a recording medium, and the magneto-optical disc 1 is driven to rotate by a spindle motor 51. When recording data on the magneto-optical disk 1, so-called magnetic field modulation recording is performed, for example, by applying a modulation magnetic field in accordance with the recording data with the magnetic head 54 while irradiating the laser light with the optical head 53. Thereby, the recorded data is stored on the magneto-optical disk 1.
Are recorded along the recording track. In reproducing the magneto-optical disk 1 on which data is recorded, the recording track of the magneto-optical disk 1 is traced by the laser light from the optical head 53, and the polarization angle of the reflected light of the laser light from the magneto-optical disk 1 is traced. The magneto-optical reproduction based on is performed.

The optical head 53 is composed of, for example, a laser light source such as a laser diode, optical components such as a collimator lens, an objective lens, a polarizing beam splitter, and a cylindrical lens, and a photodetector having a light receiving portion having a predetermined pattern. . This optical head 53
Is provided at a position facing the magnetic head 54 via the magneto-optical disk 1. When data is recorded on the magneto-optical disk 1, a recording head drive circuit 66 described later drives the magnetic head 54 in accordance with the recording data, so that the magnetic head 54 records the data on the magneto-optical disk 1. Is applied, and a target track of the magneto-optical disk 1 is irradiated with laser light by the optical head 53 to perform thermomagnetic recording of a magnetic field modulation system. The optical head 53
Detects a reflected light of a laser beam applied to a target track, detects a focus error by, for example, a so-called astigmatism method, and detects a tracking error by, for example, a so-called push-pull method. When reproducing data from the magneto-optical disk 1, the optical head 53 detects the focus error and the tracking error, and at the same time, detects the difference in the polarization angle (Kerr rotation angle) of the reflected light of the laser light from the target track to reproduce the data. Generate a signal.

The output from the optical head 53 is supplied to an RF circuit 55. The RF circuit 55 extracts the focus error signal and the tracking error signal from the output of the optical head 53 and supplies the same to the servo control circuit 56, binarizes the reproduction signal, and supplies it to a reproduction system decoder 71 described later. .

The servo control circuit 56 comprises, for example, a focus servo control circuit, a tracking servo control circuit, a spindle motor servo control circuit, a thread servo control circuit and the like. The focus servo control circuit controls the focus of the optical system of the optical head 53 so that the focus error signal becomes zero. Further, the tracking servo control circuit performs tracking control of the optical system of the optical head 53 so that the tracking error signal becomes zero. Further, the spindle motor servo control circuit controls the spindle motor 51 so as to rotate the magneto-optical disk 1 at a predetermined rotation speed (for example, a constant linear speed). Further, the thread servo control circuit moves the optical head 53 and the magnetic head 54 to target track positions of the magneto-optical disk 1 designated by the system controller 57. The servo control circuit 56 that performs such various control operations includes the servo control circuit 5
The information indicating the operation state of each unit controlled by 6 is sent to the system controller 57.

A key input operation unit 58 and a display unit 59 are connected to the system controller 57. The system controller 57 controls a recording system and a reproduction system based on operation input information from the key input operation unit 58. The control signal from the system controller 57 is sent to each unit. In addition, the system controller 57 traces the optical head 53 and the magnetic head 54 on the basis of the address information in the unit of sector reproduced from the recording track of the magneto-optical disk 1 by the header data and the Q data of the subcode. Manages recording positions and playback positions on recording tracks. Further, the system controller 57
Controls the display unit 59 to display the reproduction time based on the data compression ratio of the compressed data recording / reproducing apparatus of the present embodiment and the reproduction position information on the recording track.

The reproduction time display is based on the reciprocal of the data compression ratio (absolute time information) with respect to address information (absolute time information) in sector units reproduced from a recording track of the magneto-optical disk 1 by so-called header time or so-called subcode Q data. For example, in the case of 1/4 compression, the actual time information is obtained by multiplying by 4), and this is displayed on the display unit 59. At the time of recording, if absolute time information is recorded in advance on a recording track of a magneto-optical disk or the like (preformatted), the preformatted absolute time information is read and the data compression ratio is adjusted. By multiplying the reciprocal, the current position can be displayed by the actual recording time.

Next, in the recording system of the compressed data recording / reproducing apparatus, the analog audio input signal Ain from the input terminal 60 is supplied to an A / D converter 62 via a low-pass filter 61, and the A / D converter 62 62 quantizes the analog audio input signal Ain. The digital audio signal obtained from the A / D converter 62 is supplied to an ATC encoder 63 that performs adaptive transform coding (ATC). The digital audio input signal Din from the input terminal 67 is supplied to the ATC encoder 63 via the digital input interface circuit 68.

The ATC encoder 63 quantizes the analog audio input signal Ain by the A / D converter 62 and outputs a digital audio signal of a predetermined transfer rate.
The CM data is subjected to bit compression (data compression) processing according to a predetermined data compression ratio.
The compressed data (ATC data) output from the C encoder 63 is supplied to the memory 64. For example, a case in which the data compression rate is 1/8 will be described. Here, the data transfer rate is 1/8 (9.37) of the data transfer rate (75 sectors / second) of the standard CD-DA format.
5 sectors / second).

The memory 64 is controlled by the system controller 57 to write and read data.
It is used as a buffer memory for temporarily storing data and recording it on a disk as needed. That is, for example, when the data compression ratio is ８, the compressed audio data supplied from the ATC encoder 63 has a data transfer rate of a standard CD-
DA format data transfer rate (75 sectors / sec)
, Ie, 9.375 sectors / sec, and the compressed data is continuously written to the memory 64. As for the compressed data (ATC data), it is sufficient to record one sector per eight sectors as described above.
Since such recording every eight sectors is practically impossible, recording of consecutive sectors as described later is performed. This recording is performed at intervals of the same data transfer rate (75 sectors / second) as a standard CD-DA format by using a cluster consisting of a plurality of predetermined sectors (for example, 32 sectors + several sectors) as a recording unit through a pause period. It is done on a regular basis. That is, in the memory 64, the data compression ratio 1 continuously written at a low transfer rate of 9.375 (= 75/8) sectors / sec according to the bit compression rate.
/ 8 ATC audio data is read out as recording data in a burst at the transfer rate of 75 sectors / second. For the data read and recorded, the overall data transfer rate including the recording pause period is 9.3.
Although the speed is as low as 75 sectors / second, the instantaneous data transfer speed within the time of a burst recording operation is the standard 75 sectors / second. Therefore, when the disk rotation speed is the same speed (constant linear speed) as the standard CD-DA format, the same recording density and storage pattern as those in the CD-DA format are recorded.

The AT read from the memory 64 in a burst at the (instantaneous) transfer rate of 75 sectors / second.
The C audio data, that is, the recording data, is supplied to the encoder 65. Here, in the data string supplied from the memory 64 to the encoder 65, a unit continuously recorded in one recording is a cluster composed of a plurality of sectors (for example, 32 sectors) and a cluster connection arranged before and after the cluster. For several sectors. The cluster connection sector is set longer than the interleave length in the encoder 65, so that even if interleaved, the data of other clusters is not affected.

The encoder 65 operates on the recording data supplied in bursts from the memory 64 as described above.
Parity addition and interleave processing as encoding processing for error correction, and EFM (Eight to Fourteen Mo
dulation) Encoding processing is performed. This encoder 65
Is supplied to the magnetic head drive circuit 66. This magnetic head drive circuit 66
Is connected to the magnetic head 54, and drives the magnetic head 54 so as to apply a modulation magnetic field corresponding to the recording data to the magneto-optical disk 1.

The system controller 57 performs the above-described memory control on the memory 64, and writes the recording data read from the memory 64 in a burst by the memory control.
The recording position is controlled so that recording is continuously performed on the recording track. The recording position is controlled by controlling the recording position of the recording data read in a burst from the memory 64 by the system controller 57 and transmitting a control signal designating the recording position on the recording track of the magneto-optical disk 1 to a servo control circuit. 56.

Next, a reproducing system of the compressed data recording / reproducing apparatus of the present embodiment will be described. This reproducing system is for reproducing the recording data continuously recorded on the recording tracks of the magneto-optical disk 1 by the above-mentioned recording system. The decoder 71 is provided with a reproduction output obtained by tracing at step (1) and binarized by the RF circuit 55 and supplied. At this time, the compressed data recording / reproducing apparatus of this embodiment can read not only the magneto-optical disk but also the same read-only optical disk as the compact disk.

The reproduction system decoder 71 corresponds to the encoder 65 in the above-mentioned recording system, and reproduces the reproduction output binarized by the RF circuit 55.
The decoding processing and the EFM decoding processing as described above for error correction are performed, and the ATC audio data having the data compression ratio of 1/8 is transferred at a transfer rate of 75 sectors / sec, which is faster than the normal transfer rate. To play. This decoder 7
1 is supplied to the memory 72.

In the memory 72, data writing and reading are controlled by the system controller 57, and reproduced data supplied from the decoder 71 at a transfer rate of 75 sectors / second is burst-written at the transfer rate of 75 sectors / second. It is. Also, in the memory 72, the reproduced data written in a burst at the transfer rate of 75 sectors / second is continuously read out at a transfer rate of 9.375 sectors / second corresponding to a data compression rate of 1/8. .

The system controller 57 writes the reproduced data into the memory 72 at a transfer rate of 75 sectors / second, and writes the reproduced data from the memory 72 into the 9.375.
Memory control for continuously reading data at a transfer rate of sector / second is performed. The system controller 57 performs the above-described memory control on the memory 72, and continuously reproduces the reproduction data written in a burst to the memory 72 by the memory control from the recording track of the magneto-optical disk 1. Control of the playback position.
The reproduction position is controlled by managing the reproduction position of the reproduction data read in a burst from the memory 72 by the system controller 57 and transmitting a control signal designating the reproduction position on the recording track of the magneto-optical disk 1 or the optical disk 1. This is performed by supplying the signal to the servo control circuit 56.

ATC audio data obtained as reproduction data continuously read from the memory 72 at a transfer rate of 9.375 sectors / sec is supplied to the ATC decoder 73. The ATC decoder 73 is provided with the A
It corresponds to the TC encoder 63. For example, by expanding ATC data by 8 times (bit expansion),
Reproduces digital audio data of bits. The digital audio data from the ATC decoder 73 is supplied to a D / A converter 74.

The D / A converter 74 converts the digital audio data supplied from the ATC decoder 73 into an analog signal and outputs the analog audio output signal Aou.
form t. The analog audio signal Aout obtained by the D / A converter 74 is supplied to a low-pass filter 75
Is output from the output terminal 76 via the.

Next, the high-efficiency compression encoding for implementing the predetermined data compression processing in the ATC encoder 63 will be described in detail. That is, in the ATC encoder 63,
An input digital signal such as an audio PCM signal is subjected to band division coding (sub-band coding: SBC),
High-efficiency coding is performed using adaptive conversion coding (ATC) and adaptive bit allocation techniques. This high efficiency coding technique will be described with reference to FIG.

In the concrete decoder shown in FIG. 2, first,
The input digital signal is divided into a plurality of frequency bands. The frequency bandwidth at this time is the same between the two lowest bands adjacent to each other, and the higher the frequency band, the wider the bandwidth is selected as the frequency band increases.

Further, in the decoder of FIG. 2, the signals of the respective frequency bands divided as described above are divided into blocks at predetermined time intervals, and orthogonal transformation is performed for each of the blocks. Is adaptively encoded. Here, the spectrum data on the frequency axis obtained by orthogonally transforming the low-frequency signal of the divided frequency band is referred to as a so-called critical bandwidth (critical band: Crit
The coding is performed by adaptive bit allocation for each ical band). In addition, for spectrum data on the frequency axis obtained by orthogonally transforming the middle and high frequency side signals of the divided frequency bands, a band obtained by further subdividing the critical bandwidth in consideration of the block floating efficiency described later. Encoding by adaptive bit allocation is performed every time. Normally, a band obtained by further subdividing the critical band is a unit (that is, a block floating unit) in which quantization noise is generated. Further, in the embodiment of the present invention, before performing the orthogonal transform, the block size (block length) of the orthogonal transform, that is, the predetermined time for performing the blocking is changed adaptively according to the characteristics of the input signal. Let me.

In FIG. 2, the input terminal 100 has
For example, an audio PCM signal of 0 to 22 kHz among audio PCM signals obtained by sampling an audio signal at a sampling frequency of 44.1 kHz is supplied.

This input signal is supplied to a band division filter 101 composed of a filter such as a so-called QMF.
0-11kHz band and 11k-22kHz band (high frequency)
Is divided into signals. The signal in the 0 to 11 kHz band is divided into a signal in the 0 to 5.5 kHz band (low band) and a signal in the 5.5 to 11 kHz band (middle band) by the band division filter 102 also formed of a filter such as a so-called QMF. You.

As a method of dividing the input digital signal into a plurality of frequency bands, for example, the above-described QM
There is a division method using a filter such as F. This dividing method is described in R. E. Croquière, "Digital Coding of Speech in Subvans", Bell System Technology Journal, Volume 5
5, Number 8 1976 (RECrochiere, @Digit
al coding of speech insubbands "Bell Syst.Tech.
J., Vol. 55, No. 8, 1976). In addition, ICSA 83, Boston,
“Polyphase Quadrature Filters-A New Subband Coding Technique”,
Joseph H. Lost Weiler (ICASSP 83, BOSTO
N, ∧PolyphaseQuadrature filters-A new subband cod
ing technique ", Joseph H. Rothweiler) describes an equal bandwidth filter splitting technique.

The signals of the respective bands from the band division filters 101 and 102 are supplied to the orthogonal transform block size determination circuit 1.
06 and the orthogonal transform block size determination circuit 1
06, the block size at the time of the orthogonal transform is determined for each band.

The orthogonal transform block size determining circuit 10
6, the length of the block size is, for example, 11.6.
Based on the length of ms, this is the maximum block size. This maximum block size will be referred to as a transformed frame or simply a frame. Here, for example, when the signal is quasi-stationary in time, the frequency resolution can be increased by selecting the orthogonal transform block size as large as 11.6 ms. Also, for example, when the signal is non-stationary in time, the orthogonal transform block size is set to, for example, four in the band of 11 kHz or less, and
In the frequency band above Hz, the orthogonal transform block size is set to, for example, 8
By dividing, the time resolution can be increased.

The band division filters 101 and 102
Output from each orthogonal transform circuit 1 for each signal of each band.
03, 104, and 105. At this time, the orthogonal transform block size information determined by the orthogonal transform block size determining circuit 106 is
3, 104, and 105. Therefore, in each of the orthogonal transform circuits 103, 104, and 105, the band division filter output data is divided into blocks according to the orthogonal transform block size determined by the orthogonal transform block size determination circuit 106 for each of the transform frames. An orthogonal transformation process is performed on the data for each block. In other words, these orthogonal transform circuits 103, 10
In steps 4 and 105, the band division filter output of the transform frame having the maximum block size is further divided into blocks according to the orthogonal transform block size determined by the orthogonal transform block size determination circuit 106, and each block is divided into blocks. Is subjected to an orthogonal transformation process.

FIG. 3 shows the orthogonal transform block size in one transform frame. In the orthogonal transform block size determination circuit 106, 11.6 ms (long mode) in the low band and the middle band. Or 2.9
ms (short mode) is selected, and in the high frequency range, either 11.6 ms (long mode) or 1.45 ms (short mode) is selected. The orthogonal transform block size information is supplied to an adaptive bit allocation encoding circuit 108 described later.

As the above-described orthogonal transform, for example, an input audio signal is divided into blocks in a predetermined unit time, and a fast Fourier transform (FFT), a discrete cosine transform (DCT), a modified discrete cosine transform (MDC) is performed for each block.
T) and the like, there is an orthogonal transformation that transforms the time axis into the frequency axis. Regarding the MDCT, see ICSA 1987, “Subband /
Transform coding using filter bank designs based on time
Domain Aliasing Cancellation, "J.P.Prinsen, A.B.Bradley,
University of Shulay Royal Melbourne Institute of Technology (ICAS
SP 1987, ∧Subband / Transform Coding Using Filter Ba
nk Designs Based on Time Domain Aliasing Cancellati
on, "JPPrincen ABBradley, Univ. of Surrey Roya
lMelbourne Inst. of Tech.).

FIG. 4 shows an adaptive bit allocation encoding circuit 10
8 shows a schematic configuration of one specific example. In FIG. 4, a terminal 401 is connected to each of the orthogonal transform circuits 103, 104, 10
5 is supplied on the frequency axis, and the terminal 402 is supplied with the orthogonal transform block size information. Note that the spectrum data on the frequency axis supplied to the terminal 401 refers to each of the orthogonal transform circuits 10
MDCT coefficient data from 3, 104 and 105. The data from the terminal 401 is sent to the block floating circuit 403 and the bit allocation calculation circuit 406, and is also sent to the scale factor setting circuit 405. Further, the orthogonal transform block size information from the terminal 402 is sent to the encoding circuit 407 and also to the bit allocation calculating circuit 406.

First, the scale factor setting circuit 40
In 5, based on the spectral data divided in consideration of the critical band and block floating,
Floating information for block floating in the block floating circuit 403 is set. Usually, as the floating information, a value close to the peak value of the spectrum data in the divided band is used for each divided band in consideration of the critical band and the block floating. The floating information set here is used as a scale factor for each divided band in consideration of the critical band and block floating.

In the bit allocation calculating circuit 406, based on the spectral data divided in consideration of the critical band and the block floating, each divided band in which the critical band and the block floating are considered in consideration of the so-called masking effect and the like. The amount of masking is determined, and the number of bits to be allocated is determined for each band based on the amount of masking and the energy or peak value of each divided band in consideration of the critical band and block floating.

In the block floating circuit 403, based on the scale factor set by the scale factor setting circuit 403, ie, the floating information, the critical band and the block floating are considered for the spectrum data from the terminal 401. Floating processing is performed for each divided band. The output of the block floating circuit 403 is
4

In the quantization circuit 404, according to the scale factor set by the scale factor setting circuit 405 via the block floating circuit 403 and the number of bits allocated to each band by the bit allocation calculation circuit 406. Then, re-quantization of each spectrum data from the block floating circuit 403 is performed.

The quantized spectrum data output from the quantization circuit 404, the scale factor information output from the scale factor setting circuit 405, and the allocated bit number information output from the bit allocation calculation circuit 406 And the orthogonal transform block size information supplied from the terminal 402 are both sent to the encoding circuit 407 and encoded, and extracted via the terminal 408.

Next, FIG. 5 shows a schematic configuration of a specific example of the scale factor setting circuit 405.

In FIG. 5, spectrum data on the frequency axis is given to a terminal 501 and sent to a scale factor ID setting circuit 502. The scale factor ID setting circuit 502 sets the scale factor for each divided band in consideration of the critical band and the block floating, and converts the set scale factor into an ID (integer). In the present embodiment, an integer of 0 to 63 is used as the ID of the scale factor, whereby an optimum value is set for each divided band in consideration of the critical band and the block floating from the 64 scale factors. You can do it.
Here, the unit of the divided band in consideration of the critical band and the block floating is referred to as a block floating unit.

The scale factor ID setting circuit 502
Is stored in the memory 505, so that the scale factor ID of the immediately preceding conversion frame can be obtained from the memory 505. Here, assuming that the scale factor ID set by the scale factor ID setting circuit 502 is expressed as ISF (n, i), where n is a variable indicating the conversion frame number and i is a variable indicating the number of the block floating unit, the memory 505 is used. Can be expressed as ISF (n-1, i).

The scale factor ID setting circuit 502
The scale factor ID represented by ISF (n, i) is sent to a subtractor 503, where the immediately preceding scale factor ID represented by ISF (n-1, i) from the memory 505 is sent to the subtractor 503. The difference between the conversion frame and the scale factor ID is obtained. Note that the subtractor 503 uses an adder in the example of FIG. 5, and in the adder, an ISF from the scale factor ID setting circuit 502 is connected to an addition input terminal.
A scale factor ID represented by (n, i) and a scale factor I of the immediately preceding transform frame represented by ISF (n-1, i) from the memory 505 at a subtraction input terminal.
The difference is obtained by supplying D.

Here, assuming that the difference of the scale factor ID which is the output of the subtracter 503 is ISFd (n, i),
ISFd (n, i) can be expressed by the following equation (1). ISFd (n, i) = ISF (n, i) -ISF (n-1, i) (1) In this equation (1), n of ISFd (n, i) represents a conversion frame number and i Is a variable indicating the block floating unit number.

The difference of the scale factor ID represented by the ISFd (n, i) is sent to the scale factor ID recording mode determination circuit 506.

The scale factor ID recording mode determination circuit 506 determines the scale factor ID according to the difference value of the scale factor ID represented by the above ISFd (n, i).
, The scale factor ID recording mode including the number of recording bits is determined. Scale factor ID in this embodiment
As a recording mode, a scale factor ID represented by the above ISF (n, i) is used as information of the above scale factor.
And a mode for recording the difference value of the scale factor ID represented by the above ISFd (n, i).

The scale factor ID recording mode determined by the scale factor ID recording mode determining circuit 506 is sent to the switching control terminal of the switch 507. The switch 507 is connected to one of the switched terminals by the ISF (n, i).
Is supplied, and the difference of the scale factor ID represented by ISFd (n, i) is supplied to the other switched terminal. Therefore,
In the switch 507, either the scale factor ID represented by the ISF (n, i) or the difference between the scale factor IDs represented by the ISFd (n, i) is determined according to the scale factor ID recording mode. Selected. Information selected by the switch 507 is taken out via a terminal 508.

The scale factor ID recording mode determined by the scale factor ID recording mode determining circuit 506 is taken out via a terminal 509.

FIG. 6 shows a schematic operation of a specific example of the scale factor ID recording mode determination circuit 506. In FIG. 6, the number of block floating units is N. First, in step S11, the absolute value of the difference ISFd (n, i) between the N scale factors ID is obtained for each block floating unit.

Next, in step S12, the maximum ISFd (n, i) is detected from the obtained N absolute values, and the maximum ISFd (n, i) value of the absolute value is determined by the MISF.
d.

Next, after step S13, the above MISF
The scale factor ID recording mode is determined for the value of d.

First, in step S13, -4≤M
A determination is made based on the conditional expression of ISFd ≦ 3, and if the condition of step S13 is satisfied, the mode MD1 of step S16 is selected as the scale factor ID recording mode. That is, the value of the MISFd is set to the value in step S1.
If the condition of 3 is satisfied, in step S16, the difference ISFd (n, i) of the scale factor ID is selected as the scale factor information, and the scale factor ID is recorded so as to record 3 bits for each block floating unit. Mode is selected. On the other hand, if the value of the MISFd does not satisfy the conditional expression in step S13, the process proceeds to the next step S14.

In step S14, −8 ≦ MISFd ≦ 7
Is determined by the conditional expression. When the condition of step S14 is satisfied, the mode MD2 of step S17 is selected as the scale factor ID recording mode. That is, when the value of the MISFd satisfies the condition of step S14, in step S17, the difference ISFd of the scale factor ID is used as the scale factor information.
(n, i) is selected, and the scale factor ID recording mode is selected so that recording is performed with 4 bits for each block floating unit. In contrast, the above MISFd
Does not satisfy the conditional expression in step S14, the process proceeds to the next step S15.

In step S15, -16≤MISFd≤
A determination is made based on 15 conditional expressions. If the condition of step S15 is satisfied, the mode MD3 of step S18 is selected as the scale factor ID recording mode.
That is, if the value of the MISFd satisfies the condition of step S15, in step S18, the difference ISF of the scale factor ID is used as the scale factor information.
Select d (n, i) and set the scale factor ID so that it is recorded with 5 bits for each block floating unit.
The recording mode is selected. On the other hand, the MISF
If the value of d does not satisfy the conditional expression in step S15,
In the next step S19, mode MD4 is selected. In this step S19, the scale factor ID represented by the above ISF (n, i) is selected as the scale factor information, and the scale factor ID is recorded in each block floating unit with 6 bits.
The recording mode is selected.

Here, each scale factor ID recording mode will be described.
2. In the case of the mode MD3, the difference ISFd (n, i) of the scale factor ID is selected as the scale factor information, and the number of recording bits of the scale factor information for each block floating is 3 bits in the mode MD1 and in the mode M
D2 has 4 bits and mode MD3 has 5 bits.
On the other hand, in the case of the mode MD4: Scale factor information represented by ISF (n, i) as information of the scale factor
And the number of recording bits of the scale factor information for each block floating is set to 6 bits. For this reason, in this embodiment, the maximum absolute value of the difference ISFd (n, i) of the scale factor ID is small.
That is, the higher the correlation between the frequency components (the above-described spectrum data) between the converted frames, the smaller the number of bits for recording the information of the scale factor, and the higher the compression efficiency.

In the above description, an example in which the scale factor ID recording mode is uniformly determined for all N block floating units is described. The scale factor ID recording mode may be determined for each of the three bands of the middle band and the high band.

Next, FIG. 7 shows a schematic configuration of a specific example of the bit allocation calculation circuit 406. In FIG. 6, an input terminal 21 is connected to each of the orthogonal transform circuits 103, 10
4 and 105, spectrum data on the frequency axis is supplied.

The input data on the frequency axis is sent to the energy calculation circuit 22 for each band, and the energy of each divided band in consideration of the masking amount, the critical band, and the block floating is, for example, each energy within the band. It is obtained by calculating the sum of the amplitude values. Note that a peak value, an average value, or the like of the amplitude value may be used instead of the energy for each band. This energy calculation circuit 22
For example, the spectrum of the sum value of each band is shown as SB in FIG. However, in FIG. 8, for simplicity of illustration, the number of divided bands in consideration of the masking amount, the critical band, and the block floating is represented by 12 bands (B1 to B12).

Here, in order to consider the influence on the so-called masking of the spectrum SB, a convolution process is performed such that the spectrum SB is multiplied by a predetermined weighting function and added. Therefore, the output of the energy calculation circuit 22 for each band, that is, each value of the spectrum SB is sent to the convolution filter circuit 23. The convolution filter circuit 23 includes, for example, a plurality of delay elements for sequentially delaying input data, and a plurality of multipliers (for example, 25 corresponding to each band, for multiplying an output from these delay elements by a filter coefficient (weighting function)). Multipliers) and a sum adder for summing the outputs of the multipliers. By this convolution processing, the sum of the parts indicated by the dotted lines in FIG. 8 is obtained. The masking refers to a phenomenon in which a certain signal masks another signal and makes it inaudible due to human auditory characteristics. The masking effect includes time-axis masking by an audio signal on a time axis. There is an effect and a simultaneous masking effect by a signal on the frequency axis. Due to these masking effects, even if noise is present in the masked portion, this noise will not be heard.
For this reason, in an actual audio signal, the noise within the masked range is regarded as acceptable noise.

A specific example of the multiplication coefficient (filter coefficient) of each multiplier of the convolution filter circuit 23 is shown below.
When the coefficient of the multiplier M corresponding to an arbitrary band is 1,
The multiplier M-1 has a coefficient of 0.15, the multiplier M-2 has a coefficient of 0.0019, and the multiplier M-3 has a coefficient of 0.000008.
6 is multiplied by a coefficient 0.4 by a multiplier M + 1, a coefficient 0.06 by a multiplier M + 2, and a coefficient 0.007 by a multiplier M + 3 to the output of each delay element.
Is performed. Here, M is an arbitrary integer of 1 to 25.

Next, the output of the convolution filter circuit 23 is sent to a subtractor 24. The subtractor 24 calculates a level α corresponding to an allowable noise level described later in the convolved area. The level α corresponding to the permissible noise level (hereinafter, referred to as permissible noise level) becomes the permissible noise level for each critical band by performing inverse convolution processing, as described later. Such a level. Here, an allowance function (a function expressing a masking level) for obtaining the level α is supplied to the subtractor 24. The level α is controlled by increasing or decreasing the allowable function. Note that the subtracter 24 uses an adder in the example of FIG. 7. In the adder, the output of the convolution filter circuit 24 is added to the addition input terminal, and the allowable function is set to the subtraction input terminal. Subtraction is performed by being supplied.

The above-mentioned tolerance function is expressed by (n
-Ai) It is supplied from the function generation circuit 25.

That is, the level α corresponding to the allowable noise level is a number given in order from the lower band of the critical band, i.
Then, it can be obtained by the following equation (2). α = S− (n−ai) (2) In this equation (2), n and a are constants, a> 0, S is the intensity of the convolution-processed Bark spectrum, and equation (2) (N-ai) in the table is the allowable function. In this embodiment, n = 38 and a = 1. At this time, there is no deterioration in sound quality and good coding can be performed.

Thus, the level α is obtained, and this data is transmitted to the divider 26. The divider 26 is for deconvolving the level α in the convolved area. Therefore,
By performing the inverse convolution processing, a masking spectrum can be obtained from the level α. That is, this masking spectrum becomes an allowable noise spectrum. The inverse convolution process requires a complicated operation, but in the present embodiment, the inverse convolution is performed using the simplified divider 26.

Next, the masking spectrum is transmitted to a subtractor 28 via a synthesis circuit 27. Here, the subtractor 28 includes the energy calculation circuit 22 for each band.
, That is, the above-mentioned spectrum SB is supplied via a delay circuit 29. Therefore, the masking spectrum and the spectrum SB
As a result, the spectrum SB is masked below the level indicated by the level of the masking spectrum MS, as shown in FIG.

The output from the subtracter 28 is taken out through an allowable noise correction circuit 30 and an output terminal 31.
For example, the assigned bit number information is sent to a ROM or the like (not shown) in which the information is stored in advance. The ROM or the like outputs information on the number of bits assigned to each band according to the output obtained from the subtraction circuit 28 via the allowable noise correction circuit 30. By transmitting the allocated bit number information to the quantization circuit 404, each spectrum data on the frequency axis from the orthogonal transform circuits 103, 104, and 105 is quantized by the number of bits allocated to each band. That is.

That is, in summary, the quantization circuit 404 uses the number of bits allocated according to the level of the difference between the energy level of each divided band and the allowable noise level in consideration of the masking amount, the critical band, and the block floating. The spectrum data for each band is quantized. The delay circuit 29 in FIG. 7 is provided for delaying the spectrum SB from the energy detection circuit 22 in consideration of the delay amount in each circuit before the synthesis circuit 27.

By the way, at the time of synthesizing by the synthesizing circuit 27 described above, data indicating a so-called minimum audible curve RC, which is a human auditory characteristic as shown in FIG. The masking spectrum MS can be synthesized. At this minimum audible curve, if the absolute noise level is below this minimum audible curve, the noise will not be heard. This minimum audible curve will differ depending on, for example, the playback volume at the time of playback, even if the encoding is the same. However, in a realistic digital system, for example, music is not so much included in the 16-bit dynamic range. Since there is no difference, for example, if quantization noise in the most audible frequency band around 4 kHz is not heard, it is considered that quantization noise below the level of the minimum audible curve is not heard in other frequency bands. Therefore, assuming that the system is used in such a manner that noise near the allocated number of bits of the system, for example, 4 kHz is not heard, and an allowable noise level is obtained by combining the minimum audible curve RC and the masking spectrum MS together. In this case, the allowable noise level can be up to the shaded portion in FIG. In this embodiment, the 4 kHz level of the minimum audible curve is adjusted to the lowest level corresponding to, for example, 20 bits. FIG.
Also shows the signal spectrum SS at the same time.

The allowable noise correction circuit 30 corrects the allowable noise level in the output from the subtracter 28 based on, for example, information on the equal loudness curve sent from the correction information output circuit 33. Here, the equal loudness curve is a characteristic curve relating to human auditory characteristics. For example, the loudness curve is obtained by calculating the sound pressure of sound at each frequency that sounds as loud as a pure tone of 1 kHz, and is connected by a curve. Also called a sensitivity curve. Further, this equal loudness curve draws substantially the same curve as the minimum audible curve RC shown in FIG. In this equal loudness curve, for example, at around 4 kHz, even if the sound pressure falls by 8 to 10 dB below 1 kHz, it sounds as large as 1 kHz. It doesn't sound the same size. For this reason, it can be seen that noise exceeding the level of the minimum audible curve (allowable noise level) preferably has a frequency characteristic given by a curve corresponding to the equal loudness curve. From this, it can be seen that correcting the allowable noise level in consideration of the equal loudness curve is suitable for human auditory characteristics.

Here, in the correction information output circuit 33, the detection output of the output information amount (data amount) at the time of quantization by the quantization circuit 404 and the bit rate target value of the final coded data are obtained. The allowable noise level may be corrected on the basis of the information on the error. This is because the total number of bits obtained by performing temporary adaptive bit allocation for all bit allocation units in advance becomes a fixed number of bits (target value) determined by the bit rate of the final encoded output data. On the other hand, there may be an error, and the bit is allocated again so that the error is set to 0.
That is, when the total number of allocated bits is smaller than the target value, the number of bits of the difference is allocated to each bit allocation unit and added. When the total number of allocated bits is larger than the target value, the number of bits of the difference is This is done by allocating to the assigned unit so as to cut it. The bit allocation unit is equal to the block floating unit.

To do this, the correction information output circuit 33 detects an error of the total allocated bit number from the target value, and corrects each allocated bit number according to the error data. Outputs correction data. Here, when the error data indicates that the number of bits is insufficient, it is possible to consider a case where the data amount is larger than the target value by using a large number of bits per bit allocation unit. Further, when the error data is data indicating the remainder of the number of bits, it is possible to consider a case where the number of bits per bit allocation unit is small and the data amount is smaller than the target value. Therefore, from the correction information output circuit 33, the allowable noise level in the output from the subtracter 28 is corrected, for example, based on the information data of the equal loudness curve, according to the error data. Data will be output. By transmitting the correction value as described above to the allowable noise correction circuit 30, the allowable noise level from the subtractor 28 is corrected.

In the system as described above, data obtained by processing the orthogonally transformed output spectrum with sub-information as main information, scale factor information indicating a block floating state, and word length indicating a word length as sub-information.
And length information, which are sent from the encoder to the decoder.

In the embodiment of the present invention, the following effective bit allocation method different from the bit allocation method described above can be used. A bit allocation method different from the above is described.

The operation of the adaptive bit allocation circuit to which the bit allocation method is applied will be described with reference to FIG. This figure 1
At 1, an orthogonal transform output, for example, an MDCT output is supplied to a terminal 300, and this MDCT output is sent to an energy calculating circuit 301 that calculates energy for each band for each divided band in consideration of a critical band and block floating, The energy calculation circuit 301 calculates the energy for each divided band. Note that a peak value or an average value of the amplitude may be used instead of the energy of each band.

Here, the MDCT which is the orthogonal transform output is used.
Assuming that the number of bits that can be used for transmission or recording by expressing the coefficient is 1 k bits / frame, in this embodiment, a fixed bit distribution pattern using the 1 k bits is created in the fixed bit distribution pattern generation circuit 307. The information on the number of bits that can be used for transmission or recording is sent from the available total bit generation circuit 305 to the fixed bit distribution pattern generation circuit 307.

The fixed bit distribution pattern generation circuit 30
7, a plurality of bit allocation patterns for the fixed bit allocation are prepared, and various selections can be made according to the nature of the signal. In the present embodiment, there are various patterns in which the bit amount of a short time block corresponding to 1 k bits is distributed to each frequency. In this embodiment,
In particular, a plurality of patterns having different bit allocation ratios between the middle and low ranges and the high range are prepared. Then, in the present embodiment, a pattern is selected in which the smaller the signal size, the smaller the amount allocated to the high frequency band. As a result, in the present embodiment, the loudness effect in which the sensitivity in the high frequency band decreases as the signal becomes smaller can be used. As the magnitude of the signal at this time, the magnitude of the signal in the entire band can be used. Can be used.

The energy-dependent bit distribution circuit 306
Then, the energy-dependent bit allocation pattern 306 is determined from the energy for each band calculated by the energy calculation circuit 301. In this energy-dependent bit pattern, for example, the greater the energy of the band,
Allocate so that many bits are allocated.

Further, the division ratio between the bit allocation of the fixed bit allocation pattern and the bit allocation depending on the spectrum for each band is determined by an index (tonality) representing the smoothness of the signal spectrum. In the present embodiment, the terminal 30
A value obtained by dividing the sum of the absolute values of the differences between adjacent values of the signal spectrum from 0 by the sum of these signal spectra is calculated, and this value is used as the tonality.

When the tonality is determined by the smoothness calculation circuit 302, the value of the tonality is sent to the bit division ratio determination circuit 304. In the bit division ratio determination circuit 304, the division ratio is determined according to the tonality. Here, the division ratio is a value for changing the weighting between the fixed bit allocation and the energy-dependent bit allocation.

The respective values for changing the weighting of the fixed bit allocation and the energy-dependent bit allocation, which are the division ratios from the bit division ratio determination circuit 304, are sent to multipliers 311 and 312. The output of the energy-dependent bit allocation circuit 306 is supplied to the multiplier 311, and the output of the fixed bit allocation circuit 307 is supplied to the multiplier 312. Each output of the circuits 306 and 307 is supplied to the multiplier 311. , 312 are multiplied by weighting values corresponding to the respective division ratios from the bit division ratio determination circuit 304.

As described above, in the multipliers 311 and 312, the division ratios corresponding to the values of the fixed bit allocation and the values of the bit allocation depending on the energy for each of the divided bands in consideration of the critical band and the block floating are respectively described. , The two values are added and added by an adder circuit 308. The addition output from the addition circuit 308 is taken out from a terminal 309 and used for the subsequent quantization and encoding.

The state of bit allocation at this time is shown in FIG. 12 (a) and FIG. 13 (a), and the state of quantization noise corresponding thereto is shown in FIG. 12 (b) and FIG. 13 (b). ). 12A and 12B show the case where the signal spectrum is relatively flat, and FIGS. 13A and 13B show the case where the signal spectrum shows a high tonality. In addition, FIG.
(B) in the figure shows the bit amount for the signal level dependence, and QF in the figure shows the bit amount for the fixed bit allocation. Further, L in FIGS. 12 (a) and 13 (a) indicates a signal level, NS indicates a noise reduction due to a signal level dependency, and NF indicates a noise level due to a fixed bit allocation. Is shown.

Here, in the case where the spectrum of the signal is flat as shown in FIG. 12, it is useful to allocate a large amount of fixed bits to obtain a large signal-to-noise ratio over the entire band. . However, in the example of FIG. 12B, relatively few bit allocations are used in the low band and the high band. This is because in the example of FIG. 12A, the importance of these bands is reduced auditorily. At this time, simultaneously performing a bit distribution depending on the signal level is effective in selectively lowering the noise level in a band where the signal magnitude is large. However, when the spectrum of the signal is relatively flat as in the example of FIG. 12, the selectivity also works over a relatively wide band.

On the other hand, when the signal spectrum shown in FIG. 13 shows a high tonality, a large amount of bits used to reduce quantization noise by performing signal level-dependent bit allocation is as follows. Used to reduce very narrow band noise. With such a bit allocation, an improvement in the characteristics of the isolated spectrum input signal is achieved. Also, at this time, simultaneously allocating bits with a small fixed bit allocation is effective in non-selectively lowering the noise level of a wide band.

Again, in FIG. 2, the data encoded as described above is taken out via the output terminal 110.

Next, a decoder, that is, a decoding device corresponding to the encoder for performing the high-efficiency encoding shown in FIG. 2 will be described with reference to FIG.

In FIG. 14, the input terminal 210 is supplied with coded data output from the output terminal 110 of FIG. And decrypted,
It is restored to the spectrum data on the frequency axis. The adaptive bit allocation decoding circuit 208 also extracts orthogonal transform block size information by the above decoding processing.
The data is sent to the inverse orthogonal transform circuits 203, 204, and 205 for each band together with the spectrum data on the frequency axis.

These inverse orthogonal transform circuits 203, 204, 2
At 05, of the spectrum data obtained from the adaptive bit allocation decoding circuit 208, the data in the 0 to 5.5 kHz band is supplied to the inverse orthogonal transform circuit 203 for 5.5 to 11 kHz.
The data in the Hz band is supplied to the inverse orthogonal transform circuit 204 by 11 to 2
The data of the 2 kHz band is sent to the inverse orthogonal transform circuit 205, respectively, and according to the orthogonal transform block size information,
Inverse orthogonal transform processing is performed for each band.

Further, the inverse orthogonal transform circuits 204 and 20
5 is synthesized by the band synthesis filter 202, and the outputs of the inverse orthogonal transform circuit 203 and the band synthesis filter 202 are synthesized by the band synthesis filter 201 to become a reproduced signal.
It is taken out from the output terminal 200.

FIG. 15 shows a schematic configuration of a specific example of the adaptive bit allocation decoding circuit 208 shown in FIG.

In FIG. 15, encoded data is supplied to a terminal 601 via the terminal 210 of FIG. 2, and the encoded data is sent to a decoding circuit 602. The decoding circuit 602 decodes the coded data and restores spectrum data information, scale factor information, scale factor ID recording mode information, allocated bit number information, and orthogonal transform block size information on the frequency axis. The spectrum data information and the allocated bit number information on the frequency axis are sent to an inverse quantization circuit 603, and the scale factor information is converted to a scale factor restoration circuit 6
05, and the orthogonal transform block size information is extracted via a terminal 607.

The inverse quantization circuit 603 to which the spectrum data information and the allocated bit number information are supplied from the decoding circuit 602 performs an inverse quantization process on the spectrum data information based on the allocated bit number information.

The scale factor restoration circuit 605
Restores the value of the scale factor, ie, the floating information, from the scale factor information, and sends the value of the scale factor to the inverse floating circuit 604.

The inverse floating circuit 604 receives the spectrum data information inversely quantized by the inverse quantization circuit 603 and the value of the scale factor output from the scale factor restoration circuit 605. The spectrum data information is subjected to reverse floating processing based on the floating information, and is restored to spectrum data. This restored spectral data is
It is taken out via the terminal 606.

FIG. 16 shows a specific configuration of the scale factor restoration circuit 605, and the operation will be described using the configuration of FIG. In FIG. 16, terminals 701,
The terminal 702 is provided with scale factor information obtained from the decoding circuit 602 in FIG. 15 and scale factor ID recording mode information determined on the decoder side. The scale factor information from the terminal 701 is
The signal is sent to the input terminal a of the switch 701.

The switch 703 is connected to the switched terminal c or d or e depending on the scale factor ID recording mode.
Or f is to be selected.

For example, if the scale factor ID recording mode is the mode MD1, mode MD2, or mode MD3 described above.
, The switched terminals d and f are selected. Also, the scale factor ID recording mode is set to these modes M
D1, mode MD2, mode MD3, terminal 7
The scale factor information from 01 is a difference between a certain converted frame and the immediately preceding converted frame. For this reason,
When the scale factor ID recording mode is set to these modes MD
In mode 1, mode MD2, and mode MD3, the switched terminals d and f of the switch 703 are selected, and the scale factor information from the terminal 701 is sent to the adder 704. Memory 7
06 is added to the previously stored scale factor ID of the immediately preceding conversion frame. From this adder 704, a normal scale factor ID is obtained. The output terminal of the adder 704 is
3, the normal scale factor ID is output from the output terminal d of the switch 703 switched to the switched terminal f side. The scale factor ID thus obtained is sent to the scale factor setting circuit 707 and stored in the memory 706.

For example, when the scale factor ID recording mode is the above-described mode MD4, the switched terminals c and e of the switch 703 are selected. When the scale factor ID recording mode is the above-described mode MD4, the scale factor information from the terminal 701 is a regular scale factor ID. Therefore, when the scale factor ID recording mode is the mode MD4,
When the switched terminals c and e of the switch 703 are selected, the scale factor information from the terminal 701 is directly sent to the scale factor setting circuit 707 and stored in the memory 706.

In the scale factor setting circuit 707, the given scale factor ID is digitized, and the scale factor value is taken out from the terminal 708.

In the above embodiment, a configuration may be adopted in which the above-described minimum audible curve synthesizing process is not performed. In this case, the minimum audible curve generating circuit 32 and the synthesizing circuit 2
7 becomes unnecessary, and the output from the subtractor 24 is deconvolved by the divider 26 and immediately thereafter,
8 will be transmitted. There are a variety of bit allocation methods, and the simplest method is to use fixed bit allocation, simple bit allocation based on the energy of each band of a signal, or bit allocation combining fixed and variable components.

Further, the present invention is not limited to only the above-described embodiment, and is applicable not only to audio PCM signals but also to signal processing devices for digital voice (speech) signals, digital video signals, and the like. It is.

As described above, in the compressed data recording / reproducing apparatus according to the embodiment of the present invention, when data is recorded on the disk 1, the information of the scale factor, that is, the floating information of the block and the block are temporally shifted before the block. By recording the difference information from the floating information of the block, the amount of information required for recording for the floating information is reduced. At this time, in the compressed data recording / reproducing apparatus of the present embodiment, at the time of recording, difference information and floating information are adaptively selected and recorded,
When the information amount of the difference information is large, the floating information of the block is recorded, and when the information amount of the difference information is small, the difference information is recorded. By recording and transmitting information, the amount of information to be recorded for floating information does not increase for any signal.

Also, in the compressed data recording / reproducing apparatus of this embodiment, at the time of recording, the difference between the floating information of the two-dimensional block and the floating information of the two-dimensional block temporally preceding the two-dimensional block. By recording or transmitting information, the amount of information required for recording for floating information is reduced. Also at this time, in the compressed data recording / reproducing apparatus of the present embodiment, at the time of recording, the difference information and the floating information of the two-dimensional block are adaptively selected and recorded, and when the information amount of the difference information is large, The floating information of the two-dimensional block is recorded, and when the information amount of the difference information is small, the difference information is recorded.Also, the information amount of the difference information is compared with the information amount of the floating information of the two-dimensional block. Recording information does not increase the amount of information to be recorded for floating information with any signal.

Further, in the compressed data recording / reproducing apparatus of this embodiment, the difference information is the difference between the floating information of the block and the floating information of the block immediately before the block in time and at the same position in frequency. Since it is used, it is possible to use the correlation between blocks. The block floating information is determined based on the peak value of the signal component in the block, so that the processing can be simplified.

Further, in the compressed data recording / reproducing apparatus of this embodiment, MDCT and IMDCT are performed, and by making the conversion block size variable at this time, MDCT and IMDCT according to the characteristics of the signal can be performed. . In addition, in band division, encoding and decoding according to human auditory characteristics can be performed by dividing by a critical band.

Next, according to the recording medium of the present embodiment, data encoded by the above-described compressed data recording / reproducing apparatus of the present embodiment is recorded, so that a magneto-optical disk, a semiconductor recording medium, It is possible to effectively use the recording capacity of an IC memory card, an optical disk, or the like.

That is, in the compressed data recording / reproducing apparatus and the disk 1 according to the present embodiment, by reducing the amount of information for block floating information, the number of bits that can be used for encoding a digital signal is increased.
As a result, the amount of quantization noise is reduced.

In other words, in the compressed data recording / reproducing apparatus and the disc 1 of the present embodiment, the difference of the scale factor between the converted frames is recorded by utilizing the property of the audio signal, thereby reducing the amount of sub-information. The compression efficiency of the main information (spectral data) can be improved.

[0146]

As is apparent from the above description, in the digital signal processing apparatus of the present invention, when recording or transmitting, the floating information of a block and the floating of By recording or transmitting the difference information from the information, the amount of information to be recorded or transmitted for the floating information can be reduced. At this time, in the digital signal processing device and the digital signal processing method of the present invention, during recording or transmission, difference information and floating information are adaptively selected and recorded or transmitted, and the information amount of the difference information is large. Sometimes, the floating information of the block is recorded or transmitted when the information amount of the difference information is small, and the smaller information is recorded or transmitted by comparing the information amount of the difference information with the information amount of the floating information. By doing so, it is possible to prevent any signal from increasing the amount of information recorded or transmitted for floating information.

In the digital signal processing device of the present invention, when recording or transmitting, the difference between the floating information of the two-dimensional block and the floating information of the two-dimensional block temporally preceding the two-dimensional block. By recording or transmitting information, the amount of information to be recorded or transmitted for floating information can be reduced.
At this time, in the digital signal processing device and the digital signal processing method of the present invention, at the time of recording or transmission, the difference information and the floating information of the two-dimensional block are adaptively selected and recorded or transmitted, and the difference information is recorded. When the information amount is large, the floating information of the two-dimensional block is recorded or transmitted. When the information amount of the difference information is small, the difference information is recorded or transmitted. Also, the information amount of the difference information and the information of the floating information of the two-dimensional block are recorded. By recording or transmitting the smaller information in comparison with the amount, it is possible to suppress an increase in the amount of information to be recorded or transmitted for floating information for any signal.

Further, in the digital signal processing device of the present invention, the difference information uses the difference between the floating information of the block and the floating information of the block immediately before the block in time and at the same position in frequency. Thus, the correlation between the blocks can be used, and the block floating information is determined based on the peak value of the signal component in the block, thereby simplifying the processing.

[0149]

[0150]

[0151]

[Brief description of the drawings]

FIG. 1 is a block circuit diagram showing a schematic configuration example of a compressed data recording / reproducing device as one embodiment to which a digital signal processing device of the present invention is applied.

FIG. 2 is a block circuit diagram showing a specific example of a decoder for realizing the high-efficiency audio encoding method of the present embodiment.

FIG. 3 is a diagram for explaining an orthogonal transform block size according to the embodiment;

FIG. 4 is a block circuit diagram showing a specific example of an adaptive bit allocation encoding circuit of an encoder for realizing the audio efficient encoding method of the present embodiment.

FIG. 5 is a block circuit diagram for explaining a specific example of a scale factor setting circuit of the adaptive bit allocation encoding circuit.

FIG. 6 is a flowchart for explaining a function of a scale factor setting circuit of the adaptive bit allocation encoding circuit.

FIG. 7 is a block circuit diagram showing a configuration of one specific example of performing a bit allocation operation in the device of the embodiment.

FIG. 8 is a diagram illustrating spectra of respective critical bands and bands divided in consideration of block floating.

FIG. 9 is a diagram showing a masking spectrum.

FIG. 10 is a diagram in which a minimum audible curve and a masking spectrum are combined.

FIG. 11 is a block circuit diagram showing a configuration of a specific example for realizing another bit allocation method of the present embodiment.

FIG. 12 is a diagram illustrating a noise spectrum and a bit allocation when a signal spectrum is flat in another bit allocation method according to the present embodiment.

FIG. 13 is a diagram illustrating a noise spectrum and bit allocation when the tonality of a signal spectrum is high in another bit allocation method according to the present embodiment.

FIG. 14 is a block circuit diagram showing a specific example of a decoding side that realizes a decoding method corresponding to the audio efficient coding method of the present embodiment.

FIG. 15 is a block circuit diagram showing a specific example of an adaptive bit allocation decoding circuit on the decoding side which realizes a decoding method corresponding to the audio efficient coding method of the present embodiment.

FIG. 16 is a block circuit diagram showing a specific example of a scale factor restoring circuit of the adaptive bit allocation decoding circuit.

[Explanation of symbols]

Reference Signs List 1 magneto-optical disk, 21 allowable noise level calculation function input terminal, 22 energy detection circuit for each band, 23 convolution filter circuit, 24 subtractor, 25 (n-ai) function generation circuit, 26 divider, 27 synthesis Circuit, 28 subtractor, 29 delay circuit, 30 allowable noise correction circuit, 31
Allowable noise level calculation function output terminal, 32 minimum audible curve generation circuit, 33 correction information output circuit, 51 spindle motor, 53 optical head, 54 magnetic head, 5
6 Servo control circuit, 57 System controller, 6
2 A / D converter, 63 ATC encoder, 64, 7
2 memories, 65 encoders, 66 magnetic head drive circuit, 71 decoder, 73 ATC decoder, 74 D
/ A converter, 100 Acoustic signal input terminal, 101, 10
2 band division filter, 103 orthogonal transform (MDCT)
Circuit, 104 orthogonal transform (MDCT) circuit, 105 orthogonal transform (MDCT) circuit, 106 orthogonal transform block size determination circuit, 108 adaptive bit allocation encoding circuit, 1
10 coded output terminal, 200 sound signal output terminal, 2
01, 202 Band synthesis filter, 203 inverse orthogonal transform circuit, 204 inverse orthogonal transform circuit, 205 inverse orthogonal transform circuit, 208 adaptive bit allocation decoding circuit, 210 coded data input terminal, 300 orthogonal transform output (MDCT coefficient) input terminal , 301 Energy calculation circuit for each band,
302 Spectrum smoothness calculation circuit, 304 Bit division ratio determination circuit, 305 Total number of usable bits, 3
06 Energy-dependent bit allocation circuit, 307 fixed bit allocation circuit, 308-bit sum operation circuit, 309
Bit allocation output terminal for each band, 401 Spectrum data input terminal, 402 Orthogonal transformation block size information input terminal, 403 block floating circuit, 404
Quantization circuit, 405 Scale factor setting circuit, 4
06 bit allocation calculation circuit, 407 encoding circuit, 40
8 coded data output terminal, 501 spectrum data input terminal, 502 scale factor ID setting circuit, 5
03 subtractor, 505 memory, 506 scale factor ID recording mode determination circuit, 507 switch circuit, 5
08 scale factor information output terminal, 509 scale factor ID recording mode output terminal, 601 coded data input terminal, 602 decoding circuit, 603 inverse quantization circuit, 604 inverse floating circuit, 605 scale factor restoration circuit, 606 spectrum data output terminal , 607 orthogonal transform block size information output terminal, 7
01 scale factor information input terminal, 702 scale factor ID recording mode input terminal, 703 switch circuit, 704 adder, 706 memory, 707 scale factor setting circuit, 708 scale factor output terminal

────────────────────────────────────────────────── ─── Continuation of front page (56) References JP-A-4-302535 (JP, A) JP-A-4-302536 (JP, A) JP-A-4-302537 (JP, A) JP-A-4-302535 304031 (JP, A) JP-A-5-19797 (JP, A) JP-A-5-55925 (JP, A) JP-A-5-313694 (JP, A) Japanese Translation of PCT Application No. 4-503136 (JP, A) (58) Field surveyed (Int. Cl. ⁷ , DB name) H03M 7/30

Claims (11)

(57) [Claims] 1. Blocking means for blocking a digital signal by a plurality of samples, floating means for setting floating information for each block and performing floating processing based on the floating information for each block, and floating processing Quantization / encoding means for quantizing and encoding the obtained data; and recording / transmission means for recording or transmitting the quantized and encoded data, wherein the recording / transmission means comprises: A digital signal processing apparatus for recording or transmitting difference information between the floating information of the block and the floating information of a block temporally preceding the block. 2. A digital signal is divided into blocks by a plurality of samples, floating information is set for each of the blocks, floating processing is performed for each of the blocks based on the floating information, quantized and encoded, and then recorded or transmitted. Reproduction / reception means for reproducing or receiving the encoded data, decoding / dequantization means for decoding and dequantizing the reproduced / received encoded data, and inverse floating processing based on the floating information. Inverse floating means for performing the restoration to restore the original digital signal, wherein the reproduction / reception means comprises the floating information of the block and the floating information of a block temporally preceding the block during the recording or transmission. If the difference information is recorded or transmitted, A digital signal processing apparatus for reproducing or receiving the difference information, wherein the reverse floating means obtains block floating information from the difference information and performs reverse floating processing. 3. The digital signal processing apparatus according to claim 1, wherein at the time of the recording or transmission, the difference information and the floating information of the block are adaptively selected and recorded or transmitted. 4. The method according to claim 2, wherein when the information amount of the difference information is large, the floating information of the block is recorded or transmitted, and when the information amount of the difference information is small, the difference information is recorded or transmitted. The digital signal processing device according to claim 1. 5. The method according to claim 3, wherein the information amount of the difference information is compared with the information amount of the floating information of the block, and the smaller information is recorded or transmitted.
The digital signal processing device according to claim 1. 6. A band dividing unit that divides a digital signal into a plurality of band signals, a signal analyzing unit that performs a signal analyzing process on each band-divided band signal to obtain a signal component, and a signal analyzing unit. Two-dimensional blocking means for dividing a signal component into a plurality of two-dimensional blocks relating to time and frequency; and setting floating information for each two-dimensional block relating to time and frequency, and setting the floating information for each two-dimensional block relating to the time and frequency. A floating unit for performing a floating process based on information; a quantization encoding unit for quantizing and encoding the data subjected to the floating process; and a recording / transmission unit for recording or transmitting the quantized and encoded data. Wherein the recording / transmission means comprises: the floating information of the two-dimensional block; A digital signal processing device for recording or transmitting difference information between a two-dimensional block and floating information of a two-dimensional block preceding the two-dimensional block temporally. 7. A digital signal is divided into a plurality of band signals, and a signal component is obtained by performing a signal analysis process for each band signal, and the signal component is divided into a plurality of two-dimensional blocks relating to time and frequency. Dividing, setting floating information for each two-dimensional block related to time and frequency, performing floating processing based on the floating information for each two-dimensional block related to time and frequency, quantizing and coding the floating-processed data Reproducing / receiving means for reproducing or receiving data recorded or transmitted after the quantization and the encoding, and decoding and inverse quantization for decoding and inverse quantizing the reproduced or received encoded data. Means, and a reverse flow based on the floating information for each two-dimensional block relating to the time and frequency. Inverse floating means for performing a floating process; signal component inverse analysis means for obtaining a signal component in the two-dimensional block relating to the time and frequency subjected to the inverse floating process; and a plurality of signal components in the two-dimensional block relating to the time and frequency. And a signal synthesizing means for synthesizing each band signal and restoring an original signal, wherein the reproducing / receiving means comprises: When the difference information from the floating information of the two-dimensional block preceding the two-dimensional block with respect to the two-dimensional block is recorded or transmitted, the difference information is reproduced or received, and the floating unit performs block floating from the difference information. A digital signal processing device, which obtains information and performs inverse floating processing. 8. The digital signal according to claim 6, wherein the recording or transmission is performed by adaptively selecting the difference information and the floating information of the two-dimensional block during the recording or transmission. Processing equipment. 9. The method according to claim 8, wherein when the information amount of the difference information is large, the floating information of the two-dimensional block is recorded or transmitted, and when the information amount of the difference information is small, the difference information is recorded or transmitted. Item 10. The digital signal processing device according to Item 8. 10. The digital signal processing according to claim 9, wherein the information amount of the difference information is compared with the information amount of the floating information of the two-dimensional block, and the smaller information is recorded or transmitted. apparatus. 11. The difference information according to claim 6, wherein the difference information is a difference between the floating information of the block and the floating information of the block immediately before the block in time and at the same position in frequency. The digital signal processing device according to claim 1.