JP3150342B2 - Orthogonal rotator - Google Patents

Description

DETAILED DESCRIPTION OF RELATED APPLICATIONS This patent application, filed July 8, 1991, is pending U.S. patent application Ser. No. 07 / 726,929, entitled "Single Chip Page Printer." Controller: Single Chip P
age Printer Controller ", and the contents of the specification of the U.S. patent application are incorporated herein by reference.

BACKGROUND OF THE INVENTION I. INDUSTRIAL APPLICATIONS This invention relates to the field of computer graphics, and more particularly to raster printers, screens, displays, or other human visual perception methods. And manipulating the data stored in the bit map associated with the video image represented by.

II. Related Art In a raster graphics system, a graphics image is stored in a memory, and the image (image) is expressed in the form of a matrix of bits to a printer, a screen, or a display device. expressed. The matrix is called a "bit map" or "frame buffer." In a monochrome system, one bit of the bit map represents one visible dot or pixel (abbreviated pixel) on the display surface.
In a gray scale or color system, multiple bits of a bit map represent a pixel or set of pixels on a display surface.

Many types of graphics processors have been designed and implemented in the art to control the display of graphics images. A graphics processor dedicated to this task helps to reduce the processing burden on the control processor. Graphics processors are typically designed not only to generate image data, but also to manipulate image data residing in a bit map. One typical graphics operation is rotation. "Rotation" means "transform (tr
anslation) or "shifting"
In contrast to moving an image, or part of it, about an axis perpendicular to the display surface. Transformation or shifting refers to the linear component of movement, ie, movement across the display surface.

Rotating an image implemented in hardware and / or software using straightforward mathematics requires a great deal of computation. One reason is that
That is, the bit map is treated as a coordinate system having an X component and a Y component. In order to manipulate one bit of the bit map, both the X and Y components must be considered.

Due to the complex math involved in rotating graphics images, rotation is usually accomplished by drawing a character for each angle used and storing the character in a font table or font cache. Was. Basically, all available fonts are stored in a font table, and the rotated view of a single character is treated as a single unique character. Therefore, to rotate a character to the most common rotation, i.e., 90, 180 or 270,
Four fonts are stored in a font table corresponding to each angle of rotation.

In addition, the font table can be reduced in size by storing only a single version of a character, and then the character can be rotated by software if rotation is required. However, rotation using software takes much longer than rotation using hardware, which leads to a decrease in system performance.

Another technique for achieving rotation is described in U.S. Pat. No. 4,797,852 to S. Nanda, entitled "Block Shifter for Graphics Processors."
r For Graphics Processor) ". The contents of the specification of the U.S. patent are incorporated herein by reference to the U.S. patent number. The block shifters are provided in a matrix array of registers. Rotation is accomplished by first loading the block shifter with data from memory. The bits are then shifted both horizontally and vertically as determined by a predetermined algorithm, so that the bits stored in the array can change position.
Once the rotation operation is completed, the bit pattern representing the rotated data is shifted in the horizontal direction (latera).
l) Read in sequential word order from register array from output or vertical output. According to Nanda, one per character
Only fonts need be stored in the font table. This is because all rotated shapes are achieved by character block transfers.

Although the techniques described above reduce, to some extent, the computational overload associated with performing image rotation, the system circuitry required to achieve it is too large. Therefore, emphasis on speed, efficiency and area is the driving force.
s), the highly competitive graphics industry requires high performance graphics systems that take up less space than systems in related technologies.

SUMMARY OF THE INVENTION The present invention is used to rotate a bit map area in a graphics processor to a right angle (90 degrees or 270 degrees) as well as to vertically mirror it (vertical mirror). Directional rotator.

In the present invention, the register array means is configured in a matrix having a row and a column of bit locations. The bit control means controls the register array together with the word control means. The bit control means loads the source data bytes from the source bit map into the columns of the register array means. For orthogonal rotation and vertical mirroring, a word (4 bytes) is stored in the destination bit map (destination bit map).
Combined with the order in which they are read in p), this is achieved according to the order in which bytes are loaded from the source bit map into the register array means.

Specifically, to rotate 90 degrees without incorporating vertical mirroring, the bit control means converts the source data byte to the least significant bit (LSB) present in the leftmost column (hereinafter referred to as the LSB column). ) Loads into the columns of the register array means in order starting from the position and ending with the most significant bit (MSB) present in the rightmost column (hereinafter referred to as the MSB column) The word control means then reads the data words from the register array means, starting with the most significant word (MSW) in the bottom register and ending with the least significant word (LSW) in the top register. .

To rotate 90 degrees using vertical mirroring, register bytes in the order that data bytes start with the LSB column and end with the MSB column.
Loaded into array means. Next, the data word starts with the LSW of the top register and the MSW of the bottom register.
Are read from the register array means in the order ending with.

To rotate 270 degrees without using vertical mirroring, the data bytes are loaded into the register array means in the order that the data bytes begin in the MSB column and end in the LSB column. Subsequently, the word control means reads the words from the register array means in an order starting with the LSW in the top register 108 and ending with the MSW in the bottom register.

To achieve a 270 degree rotation using vertical mirroring, the source data bytes are loaded into the register array means in an order starting with the MSB column and ending with the LSB column. Next, the data word begins with the MSW of the bottom register and
The registers are read from the register array means in the order ending with the LSW.

The invention has numerous advantages and applications. For example, in order to provide the necessary mechanisms to achieve fast and reliable rotation of image data (in bytes) on a bit map, the real area is almost completely embedded in an integrated circuit such as a RISC microprocessor. It can be easily realized without taking any steps.

The orthogonal rotator can easily realize the clearing function.

The independent operation of the orthogonal rotator allows the graphics rotator to run while the orthogonal rotator is running.
Multiple other subsystems of the processor will be able to function in parallel, thereby providing faster graphics capabilities.

Yet another advantage of the present invention is that it allows for a trade-off between hardware, software, performance and space requirements. For example, data can be read from this novel orthogonal rotator by software or hardware, or a combination of both, depending on performance and space requirements. Further, the number of word registers in the orthogonal rotator can be changed. The number of word registers can be increased, thereby increasing system performance at the expense of space. In other words, the preferred embodiment is an eight word register, but if desired, this number can be raised to 16 or 32. Furthermore, if hardware costs and real estate are of greatest concern, the number of word registers can be reduced.

Yet another advantage of the present invention is that the novel orthogonal rotator provides a simple horizontal mirror (horizontal mirror: h) that can rotate the bit map area by substantially 180 degrees.
that it can be used in combination with an orizontal mirror system, thereby making all rotations feasible in 90 degree increments. A horizontal mirror system for this purpose is described in pending U.S. patent application Ser. No. 07 / 798,705, entitled "Pixel Modification Unit." The contents of the specification of the US patent application constitute a part of the present specification by referring to the number of the US patent application.

BRIEF DESCRIPTION OF THE DRAWINGS The invention, as set forth in the claims, will be better understood with reference to the following drawings.

FIG. 1 is a block diagram of an orthogonal rotator having a register array according to the present invention.

FIG. 2A is a diagram illustrating a 90 degree rotation of an area in a video image of a bit map.

FIG. 2B illustrates a 270 degree rotation of an area in the video image of the bit map.

FIG. 2C shows a 90 degree rotation of a region within the video image of the bit map, incorporating vertical mirroring.

FIG. 2D shows a 270 degree rotation incorporating vertical mirroring of an area within the video image of the bit map.

FIG. 3 is a block diagram in which a communication path is provided around register array bits in the register array of FIG.

FIG. 4 shows a high level flow chart of the methodology of the present invention.

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENT FIG. 1 shows a high performance orthogonal rotator 10 according to the present invention.
It is a block diagram of 0. The orthogonal rotator 100 can be rotated at right angles, as well as vertically mirroring the area of bit map data in bytes from the graphics source bit map 102. That is, it can be rotated 90 degrees or 270 degrees.

2A to 2D are diagrams visually illustrating the concept of orthogonal rotation and vertical mirroring in the present specification. In FIG. 2A, the region 202 in the source bitmap 102 is at a 90 degree angle (as opposed to the direction of rotation of the clock hand), as shown by the orthogonally rotated region 204 in the destination bitmap 122. In the direction).

In FIG. 2B, the bit map area 202 in the source bit map 102 is orthogonally oriented at a 270 degree angle (clockwise), as indicated by the orthogonally rotated area 206 in the destination bit map 122. It is rotating in the direction opposite to the direction of rotation of the needle).

In FIG. 2C, the bit map area 202 in the source bit map 102 is rotated at an angle of 90 degrees and is mirrored vertically. Rotated and vertically mirrored area 214
Is shown in the destination bit map 122.

Further, in FIG. 2D, the source bit map 10
The bit map area 202 in 2 rotates at an angle of 270 degrees and is mirrored vertically. Destination bitmap 1 showing the configuration of rotated and vertically mirrored area 216
See Figure 22.

Referring again to FIG. 1, from an architectural point of view, the new orthogonal rotator 100 comprises bit decode / control logic 104, word decode / control logic 105, and a register array 106. In the preferred embodiment, register array 106 contains 8
It has registers 108 to 114 arranged in rows.
In general, for example, source data 118
While provided to 114, a bit select control signal 116 from the control software is provided to the bit decode / control logic 104 to generate orthogonally rotated output data 120. As shown, the orthogonally rotated output data 120 is entered into a graphics destination bit map 122.

A common convention in the graphics industry is to place the least significant bit (LSB) of each byte on the left side of the image bit map and the most significant bit of each byte on the right side of the image bit map. It is. Although that general convention is used herein for discussion purposes, it is not necessary to use that convention in implementing the present invention. Thus, in Figure 1, bit b ₀ corresponds to the leftmost bit of the bit map, the bit b ₃₁ corresponds to the rightmost bit of the bit map. In addition, the most significant word (MSW)
While stored in register 114, the least significant word (LS
W) is stored in the top register 108.

The present invention contemplates transferring the source data bytes (8 bits) to the columns of register array 106.
Source data bytes are written to the register array until the array is completely or partially full. As specifically shown in FIG. 1, each source data
Bytes 124-130 are bit sliced such that each of its bits is streamed to a separate register (or row) 108-114. Each bit of the bit slice expression is then its exclusive register, ie, registers 108-114.
Is multiplexed for all bits. For example, source bit 0 is passed to all 32 bits of array register 0. Source bit 1 is, as shown in FIG.
It is passed to all 32 bits of array register 1, and so on.

The bit select control signal 116 is decoded by the bit decode / control 104 to generate a 32-bit load select signal set that feeds into each of the registers 108-114, as shown in FIG. The load selection signal is in a bit slice system that crosses the columns of the register array 106. In other words, the load selection control bit 0 which is denoted by reference numeral 132 controls column 0 containing the b ₀ to all bits. Load selection control bits and denoted by reference numeral 134 1 controls the column 1 containing the b ₁ for all bits, and so on. Therefore, the bit selection control signal
116 selects a column of the array to which the input source data byte is written. Further, although the source data bits are multiplexed for all bits of registers 108-114, only one bit of each register 108-114 is loaded by the source data bits.

Further, the word selection control signal 144 and the load / read control signal 146 are, as shown in FIG.
4 is decoded by word decode / control logic 148 to generate a word load signal as well as a word read signal.

FIG. 3 shows any registers in the register array 106.
FIG. 4 is a block diagram of array bit position 302. Register array bit position 302 corresponds to registers 108-114 of FIG.
There is a likelihood that any bit b ₃₁ ~b _0, which is on the either.

As shown in FIG. 3, the bit load 304 causes the source bit n (0 <n <7 in the preferred embodiment) to be set to the register array bit position in response to the bit select signal 116.
302. Word Road 306
Can cause words to enter a particular word register or row containing register array bits 302 from parallel load bus 308 in response to the word select control signal along with the load control signal. Read word
310 may cause a word to be written to read bus 312 in response to a word select control signal along with a read control signal. Thus, word load 306 and word read 310 cause random access to registers 108-114 or rows in register array 106. In addition, register array bit position 302
Register set 108 as a result of bit loading 304
To 114 or random access to rows of the bit b ₃₁ -b ₀ is generated.

In accordance with yet another aspect of the invention, the orthogonal rotator can allow either all registers to be cleared simultaneously or individual registers to be cleared. Bit control / decode logic 104 may cause all of registers 108-114 to be cleared at the same time. Such a full clearing function may be convenient for initial settings, for example. In this type of clearing,
The entire orthogonal rotator 100 may be pre-loaded into the bit control / decode logic 104 by a single instruction (not described herein). further,
Clearing of individual registers may be performed via word control / decode logic 148. As used herein, "clearing" refers to a register or row being filled with a source bit n of the same state (either 1 or 0) flowing through the register.

FIG. 4 is a diagram illustrating the methodology of the present invention implemented in the architecture shown in FIG. As can be seen from FIG. 4, orthogonal rotation and vertical mirroring are basically
It is performed according to the order in which data bytes are loaded from the source bit map 102 into the register array 106 and according to the order in which data words are read from the register array 106 into the destination bit map 122.

Specifically, to achieve a 90 degree rotation without vertical mirroring, as shown in FIG. 2A, the control logic 140 requires that each register row 108-114 be moved from the column having the LSB position (LSB column). Beginning with each register row 108-114 column with MSB position (MSB
Each of the data bytes 124-130 is loaded from the source bit map 102 into the register array 106, in the order ending in column. In addition, a data word (1 word = 4 bytes) is subsequently read from register array 114, starting with the MSW in bottom register 114 and ending with the LSW in top register 108. The methodology is described in blocks 404, 40 of the flowchart of FIG.
6, 408.

To perform a 90-degree rotation without vertical mirroring, first multiplex the source data bits in the reverse order as shown in FIG.
Load the columns of the register array 106 in the order ending with the columns, and finally load the data word into the top register 108
It should be noted that this could have been achieved by reading into the bottom register 114 from. Basically, reversing the order of the source bits means that
That is to say that the data word has to be read from the bottom register 114 to the top register 108. The methodology is equally applicable to the discussion below for 270 degree rotation using vertical mirroring.

To perform a 90 degree rotation using vertical mirroring, the data bytes are loaded into the register array 106 in the order starting with the LSB column and ending with the MSB column, as shown in FIG. 2C.
In addition, the data word is then
The data is read from the register array 106 in the order starting from SW and ending with the MSW of the bottom register 114. The methodology is illustrated by blocks 404, 406, 410 in FIG.

To perform a 270 degree rotation without vertical mirroring, the data bytes are loaded into the register array 106 in the order starting with the MSB column and ending with the LSB column, as shown in FIG. 2B.
Then, the data word is stored in LSW in top register 108.
From the register array 106 in the order starting with ending with MSW in the bottom register 114. The methodology is shown in blocks 404, 412, 414 of FIG.

To implement 270 degree rotation with vertical mirroring, the data bytes are loaded into register array 106 in the order starting with the MSB column and ending with the LSB column, as shown in FIG. 2D. Then the data word is in the bottom register
The registers are read from the register array 106 in an order starting with the MSW of 114 and ending with the LSW of the top register 108. The methodology is illustrated in blocks 404, 412, 416 of FIG.

Another advantage of the present invention is that this orthogonal rotator 100
That it can be used in conjunction with a simple horizontal mirroring system that can effectively rotate the bitmap area at an 80 degree angle, thereby enabling full rotation in 90 degree increments That is. For a horizontal mirroring system for this purpose, see pending U.S. patent application Ser. No. 07 / 798,705, entitled "Pixel Change Unit: P.
ixel Modification Unit ”.
The contents of the specification of the US patent application constitute a part of the present specification by referring to the number of the US patent application.

While the preferred embodiment of the present invention has been described in detail above, those skilled in the art will readily appreciate that additional modifications and adaptations are possible without departing substantially from the teachings of the present invention. Will recognize. By way of example, in accordance with the present invention, register array 106 may be constructed with more or less rows (registers) and / or columns (output bits) than described in the preferred embodiment. right. As another example, source bits can be multiplexed into register array 106 in a controllable manner while achieving orthogonal rotation and without having to read the array in a particular manner. right. Therefore, such modifications and applications as described above are intended to be included within the scope of the present invention as set forth in the claims below.

────────────────────────────────────────────────── ─── Continuation of the front page (56) References JP-A-1-134495 (JP, A) JP-A-1-59296 (JP, A) (58) Fields investigated (Int. Cl. ⁷ , DB name) G06T 3/60 G09G 5/36

Claims (1)

(57) [Claims] 1. An orthogonal rotator for rotating a source data area of a source bit map in an orthogonal direction in a graphics processor, the array register comprising a plurality of bit strings.
14) in a multi-row array, wherein each bit of each source data byte is multiplexed to every bit of said separate array register, in a bit sliced register array (106); A bit decode / control logic (104) for decoding a bit select control signal to generate a load select signal for the array register, and a word for the array register for decoding a word select control signal and a load / read control signal A word decode / control logic (148) for generating a load signal and a word read signal; performing a bit load of a source bit at a register array bit position according to the bit select signal; A specific word register that contains the register array bits in response to the control signal and the word select control signal Alternatively, by performing a word load on a row and performing a word read in response to a word select control signal and a read control signal, a row in the register array and a bit in the row can be randomly accessed and loaded. Characterized in that the rotator is configured to rotate by rotating the order of the rows and the order of the rows to be read.