JP3148557B2 - Optical receiving circuit - Google Patents
Optical receiving circuitInfo
- Publication number
- JP3148557B2 JP3148557B2 JP07897895A JP7897895A JP3148557B2 JP 3148557 B2 JP3148557 B2 JP 3148557B2 JP 07897895 A JP07897895 A JP 07897895A JP 7897895 A JP7897895 A JP 7897895A JP 3148557 B2 JP3148557 B2 JP 3148557B2
- Authority
- JP
- Japan
- Prior art keywords
- operational amplifier
- receiving element
- transistor
- output
- feedback path
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
Links
Landscapes
- Control Of Amplification And Gain Control (AREA)
- Selective Calling Equipment (AREA)
- Optical Communication System (AREA)
Description
【０００１】[0001]
【産業上の利用分野】本発明は赤外線を利用した光通信
器などに好適な光受信回路に関する。BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an optical receiving circuit suitable for an optical communication device using infrared rays.
【０００２】[0002]
【従来の技術】従来より、リモートコントローラや携帯
端末器などに用いられている光受信回路は、特開平３−
７２７３０号公報に示されるように、バイアスをかけら
れた受光素子の出力をモニターし、それをコンパレータ
やフィルターを用いてデジタル信号に変換していた。2. Description of the Related Art Conventionally, an optical receiving circuit used for a remote controller, a portable terminal or the like is disclosed in Japanese Patent Laid-Open Publication No.
As disclosed in Japanese Patent No. 72730, the output of a biased light receiving element is monitored, and the output is converted into a digital signal using a comparator or a filter.
【０００３】[0003]
【発明が解決しようとする課題】しかしながら、例えば
バイアスを抵抗を介して供給する場合、結果的に電流−
電圧変換になり、到達した光強度の大きさや受光素子自
身の感度のばらつきによって、得られた出力信号の立ち
上がりや立ち下がりの波形のなまり方が大きく変化す
る。従ってデジタル信号に変換したときそのパルス幅が
変わることとなり、正確なデジタル信号の再生が困難に
なっていた。However, when a bias is supplied through a resistor, for example, the current-
The voltage conversion is performed, and depending on the magnitude of the reached light intensity or the variation in the sensitivity of the light receiving element itself, the rounding of the rising and falling waveforms of the obtained output signal greatly changes. Therefore, when converted into a digital signal, the pulse width changes, and it has been difficult to accurately reproduce the digital signal.
【０００４】[0004]
【課題を解決するための手段】本発明は上述の点を考慮
して成されたもので、受光素子の両端を入力端子に接続
し利得制限帰還路を有した演算増幅器と、その演算増幅
器の出力に接続されたコンパレータとを備えた光受信回
路で、より好ましくはその帰還路をトランジスタで構成
し、更にその帰還路に立ち下がり波形改善用のダイオー
ドを接続したものである。SUMMARY OF THE INVENTION The present invention has been made in view of the above points, and comprises an operational amplifier having both ends of a light receiving element connected to an input terminal and having a gain-limited feedback path, and an operational amplifier of the operational amplifier. An optical receiving circuit having a comparator connected to the output, and more preferably, the feedback path is constituted by a transistor, and a diode for improving the falling waveform is connected to the feedback path.
【０００５】[0005]
【作用】これにより演算増幅器の帰還路を介して受光素
子にバイアスされそれが直ちに演算増幅器の入力となる
ので、出力が安定するばかりか、利得制限などにより立
ち上がり立ち下がりの波形がシャープになる。As a result, the light receiving element is biased via the feedback path of the operational amplifier and immediately becomes the input of the operational amplifier. Therefore, not only the output is stabilized, but also the rising and falling waveforms become sharp due to gain limitation and the like.
【０００６】[0006]
【実施例】図1は本発明実施例の光受信回路の回路図
で、１はフォトダイオードからなる受光素子で、アノー
ド側をアースに接続している。FIG. 1 is a circuit diagram of an optical receiving circuit according to an embodiment of the present invention. Numeral 1 denotes a light receiving element composed of a photodiode, the anode side of which is connected to ground.
【０００７】２は、その受光素子１の両端を入力端子に
接続し利得制限帰還路を有した演算増幅器で、演算増幅
器の増幅器部分をオペアンプ２１と呼ぶことにすると、
オペアンプ２１の正の入力端子＋を受光素子１のアノー
ドに、負の入力端子−を受光素子１のカソードに接続し
ている。そしてトランジスタ２２のコレクタ側を出力端
子Ｏに、又エミッタ側を負の入力端子−に接続し、その
トランジスタ２２のベースを抵抗ｒを介してアースに接
続することで利得制限帰還路を形成している。なお、ト
ランジスタ２２のコレクターエミッタ間に並列接続され
るように十分大きい値の安定化用帰還抵抗２３をいれ、
オペアンプ２１の固有増幅率を押さえると発振防止の役
割をするので好ましい。Reference numeral 2 denotes an operational amplifier having both ends of the light receiving element 1 connected to input terminals and having a gain-limited feedback path. The amplifier portion of the operational amplifier is called an operational amplifier 21.
The positive input terminal + of the operational amplifier 21 is connected to the anode of the light receiving element 1, and the negative input terminal − is connected to the cathode of the light receiving element 1. The collector side of the transistor 22 is connected to the output terminal O, the emitter side is connected to the negative input terminal-, and the base of the transistor 22 is connected to the ground via the resistor r to form a gain limiting feedback path. I have. Note that a stabilizing feedback resistor 23 having a sufficiently large value is inserted so as to be connected in parallel between the collector and the emitter of the transistor 22.
It is preferable to suppress the inherent amplification factor of the operational amplifier 21 because it serves to prevent oscillation.
【０００８】３は演算増幅器２の出力Ｏに接続されたコ
ンパレータで、ここでは帰還路のないオペアンプ３１の
一方の入力端子に基準電圧Ｖｒｅｆを与えて用いてい
る。Reference numeral 3 denotes a comparator connected to the output O of the operational amplifier 2, which uses a reference voltage Vref applied to one input terminal of an operational amplifier 31 having no feedback path.
【０００９】この様な構成であるから、受光素子１に光
が当ると帰還路を介して電流が供給されオペアンプ２１
により増幅されるが、光強度が更に強くなるとトランジ
スタ２２を中心とする帰還路で増幅量が押さえられる。
即ち、トランジスタ２２を帰還路に持つオペアンプ２１
は基本的に対数増幅器であるから、入力が小さいときに
増幅率が高く、大きい入力に対して増幅率が著しく小さ
くなる。本発明にあっては上述のような構成にしている
ので、受光素子１の受光量に応じてオートゲインコント
ロールとして作用することとなる。With such a configuration, when light strikes the light receiving element 1, a current is supplied through the feedback path and the operational amplifier 21
However, when the light intensity is further increased, the amount of amplification is suppressed by the feedback path centering on the transistor 22.
That is, the operational amplifier 21 having the transistor 22 in the feedback path
Since is basically a logarithmic amplifier, the amplification factor is high when the input is small, and the amplification factor is extremely small for a large input. In the present invention, since the configuration is as described above, it functions as an automatic gain control according to the amount of light received by the light receiving element 1.
【００１０】なお、帰還路に用いているトランジスタ２
２の立ち下がりの応答性は、ベース側の残留チャージに
影響される。そこで、図に示すように、トランジスタ２
２のベース−コレクタ間に、ベース側がアノードとなる
ようにダイオード２４を接続すると、立ち下がりの波形
もシャープになり、図２に示すようなハイ・ローの明確
な出力波形を得ることができるので、コンパレータ３の
出力はデジタル信号を一層忠実に再現することができ
た。Note that the transistor 2 used in the feedback path
The responsiveness of the falling edge of 2 is affected by the residual charge on the base side. Therefore, as shown in FIG.
When the diode 24 is connected between the base and the collector of the transistor 2 so that the base side becomes an anode, the falling waveform becomes sharp, and a clear high / low output waveform as shown in FIG. 2 can be obtained. The output of the comparator 3 was able to reproduce the digital signal more faithfully.
【００１１】[0011]
【発明の効果】以上の如く、本発明にあっては、利得制
限帰還路付き演算増幅器を受光素子に接続するので、受
光素子のばらつきなどがあっても信号を一層忠実に再現
することとなり、例えばＲＳ２３２Ｃを利用したシリア
ル通信等においても光通信を行うことができる。As described above, according to the present invention, since the operational amplifier with the gain limiting feedback path is connected to the light receiving element, the signal can be reproduced more faithfully even if the light receiving element varies. For example, optical communication can also be performed in serial communication or the like using RS232C.
【図１】本発明実施例の光受信回路の回路図である。FIG. 1 is a circuit diagram of an optical receiving circuit according to an embodiment of the present invention.
【図２】図１の演算増幅器２の出力波形図である。FIG. 2 is an output waveform diagram of the operational amplifier 2 of FIG.
１ 受光素子 ２ 演算増幅器 ３ コンパレータ 1 light receiving element 2 operational amplifier 3 comparator
フロントページの続き (51)Int.Cl.7 識別記号 ＦＩ Ｈ０４Ｂ 10/26 (56)参考文献 特開 平６−29802（ＪＰ，Ａ) 特開 平６−196973（ＪＰ，Ａ) 特開 平１−113689（ＪＰ，Ａ) 特開 昭61−198904（ＪＰ，Ａ) 特開 昭63−246942（ＪＰ，Ａ) 特開 昭57−111119（ＪＰ，Ａ) 特開 昭58−42008（ＪＰ，Ａ) 特公 昭59−49528（ＪＰ，Ｂ２) 実公 昭53−39157（ＪＰ，Ｙ２) (58)調査した分野(Int.Cl.7，ＤＢ名) H04B 10/00 - 10/28 H03G 3/20 Continuation of the front page (51) Int.Cl. 7 Identification symbol FI H04B 10/26 (56) References JP-A-6-29802 (JP, A) JP-A-6-196973 (JP, A) JP-A-1 JP-A-113689 (JP, A) JP-A-61-198904 (JP, A) JP-A-63-246942 (JP, A) JP-A-57-111119 (JP, A) JP-A-58-42008 (JP, A) ) JP-B-59-49528 (JP, B2) JP-B-53-39157 (JP, Y2) (58) Fields investigated (Int. Cl. 7 , DB name) H04B 10/00-10/28 H03G 3 / 20
Claims (1)
子に接続したオペアンプ、該オペアンプ出力端子−負入
力端子間に接続されると共にベースが抵抗を介してアー
スに接続されたトランジスタ、及び該トランジスタのベ
ース−オペアンプ出力端子間に接続された抵抗からなり
オートゲインコントロールとして作用する利得制限帰還
路を有した演算増幅器と、該演算増幅器の出力に接続さ
れたコンパレータと、上記トランジスタのベースにアノ
ード側が接続され、コレクタにカソード側が接続された
ダイオードとを具備したことを特徴とする光受信回路。A light-receiving element, an operational amplifier having both ends of the light-receiving element connected to an input terminal, a transistor connected between the output terminal of the operational amplifier and a negative input terminal and having a base connected to ground via a resistor ; and The transistor base
And a resistor connected between the output terminals of the
An operational amplifier having a gain limiting feedback path to act as automatic gain control, and a comparator connected to the output of the operational amplifier, anode to the base of the transistor
A light receiving circuit comprising: a diode connected to a cathode side; and a diode connected to a cathode side to a collector .
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP07897895A JP3148557B2 (en) | 1995-04-04 | 1995-04-04 | Optical receiving circuit |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP07897895A JP3148557B2 (en) | 1995-04-04 | 1995-04-04 | Optical receiving circuit |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPH08279791A JPH08279791A (en) | 1996-10-22 |
| JP3148557B2 true JP3148557B2 (en) | 2001-03-19 |
Family
ID=13676992
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP07897895A Expired - Fee Related JP3148557B2 (en) | 1995-04-04 | 1995-04-04 | Optical receiving circuit |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JP3148557B2 (en) |
Families Citing this family (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP3947865B2 (en) * | 2000-03-06 | 2007-07-25 | 富士通株式会社 | Preamplifier |
-
1995
- 1995-04-04 JP JP07897895A patent/JP3148557B2/en not_active Expired - Fee Related
Also Published As
| Publication number | Publication date |
|---|---|
| JPH08279791A (en) | 1996-10-22 |
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Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| LAPS | Cancellation because of no payment of annual fees |