JP3139084B2 - Image storage device - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an image storage device,
More particularly, to an image storage device for storing the image memory.

[0002]

2. Description of the Related Art With the improvement of semiconductor technology, large-capacity semiconductor memories can be supplied at relatively low cost. The use of is proposed.
Compared to the case where a magnetic tape or a magnetic disk is used as a recording medium, a recorded image can be searched at a high speed, a moving image of an arbitrary synchronization frequency can be recorded and reproduced, and copying and relocation of data in the medium are easy . There are advantages.

[0003]

However, storing data having a large amount of information, such as an image, requires a very large memory capacity, which makes address management difficult. That is, in general, the amount of information per image unit (that is, field or frame) is not always a power of two, so that address assignment to each image is complicated. To simplify this, the amount of information per unit of image may be forced to be a power of 2 by adding dummy data or the like, but the use efficiency is reduced.

[0004] An object of the present invention is to provide an image storage device which solves such a problem.

[0005]

According to the present invention, there is provided an image storage device comprising: a memory; a frame number corresponding to the frame number of the image data to be written into the memory;
A table for storing dresses and writing to the memory
Based on the frame number of the image data to be
And generates a memory address, based on the memory address.
Writing means for writing image data to the memory
And characterized in that: Image storage device according to the present invention
The image data is also a frame number of the image data and the image data.
Input means for inputting frame number data indicating
And the frame number input by the input means.
Conversion means for converting signal data into a memory address;
Based on the address from the conversion means, the input means
To write the input image data into the memory
And a writing means.

[0006]

According to the above-mentioned means, the frame number of the image data written in the memory can be obtained without complicated address management .
And the table, the memory address can be obtained.
This makes it possible to write image data quickly,
Further, it is possible to flexibly cope with the expansion of the memory .

[0007]

Embodiments of the present invention will be described below with reference to the drawings.

FIG. 1 is a block diagram showing the configuration of an embodiment of the present invention. Reference numeral 10 denotes an image memory including a random access memory element, which has a storage capacity capable of storing a predetermined number of frames of images. 12 is data and address
A bus 14 is a control bus for control signals. Reference numeral 16 denotes a frame access control circuit that manages the image memory 10 on a frame basis.

Reference numeral 18 denotes an address conversion table for storing a correspondence table between a frame number of an image written or written in the image memory 10 and a start address on the image memory 10, and a ROM (ROM) for storing initial data. A read-only memory) and an update RAM (random access memory). Reference numeral 20 denotes a bus control circuit that arbitrates an access request to the image memory 10 and controls the data address bus 12.

The data address bus 12 and the control bus 14 are connected to n input / output ports 22, and each input / output port 22 is connected via a buffer 24 to
An A / D converter 26, which digitizes an external analog video signal and outputs it to the buffer 24, and a D / A converter 28 which digitizes the digital video signal output from the buffer 24 and outputs it to the outside, are connected. . Only one set of the buffer 24, the A / D converter 26, and the D / A converter 28 is illustrated. A / D by buffer 24
The converter 26 and the D / A converter 28 and the input / output port 22
And the image memory 10 can operate asynchronously.

When the A / D converter 26 digitizes the external video signal and the output data is input to the buffer 24, the corresponding input / output port 22 outputs a write request to the image memory 10 to the control bus 14. I do. In response to this write request, the frame access control circuit 16
Specifies a frame number if there is room in the image memory 10, and permits writing. Note that the frame access control circuit 16 can control not only the entire storage area of the image memory as one storage area but also a plurality of storage areas. In the latter case, the input / output ports 22 can be individually allocated to the divided storage areas.

The frame number specified by the frame access control circuit 16 is input to the bus control circuit 20 via the control bus 14. Bus control circuit 20
Converts the input frame number into the address conversion table 18
And read the corresponding start address. FIG. 2 shows the relationship between the contents of the conversion table 18 and the memory map of the image memory 10. FIG. 2A shows the contents of the conversion table 18, and FIG. 2B shows a memory map of the image memory 10.

The bus control circuit 20 writes the image data output from the input / output port 22 to the data address bus 10 to the image memory 10 according to the head address read from the address conversion table 18. The bus control circuit 20 arbitrates access requests from the plurality of input / output ports 22.

To read desired image data from the image memory 10, the frame access control circuit 16
, Input the frame number and output port of the image to be read. When the input frame number and output port are valid, the frame access control circuit 16 transfers the frame number and output port designation to the bus control circuit 20. The bus control circuit 20 stores the address conversion table 18
To read the start address of the image memory. One frame of image data is sequentially read out from the head address on the image memory onto the data address bus 12, and the input / output port 22 designated as an output port takes in the image data from the data address bus 12,
Output to the buffer 24. The speed is converted by the buffer 24, converted into an analog signal by the D / A converter 28, and output to the outside. The D / A converter 28 can be driven by an external synchronization signal of an arbitrary frequency.

As described above, the address conversion table 18 has a ROM for storing an initial table and an R for updating.
AM. When the system is started up, the contents of ROM are
M and refers to the RAM as a conversion table. This allows the conversion table to be rewritten and used even during system operation. For example, during a system operation, a defective storage area can be avoided. FIG.
7 shows a conversion table when an area of H or more and less than 3000H is not used. FIG. 3A shows the contents of the conversion table 18, and FIG. 3B shows a memory map of the image memory 10. The hatched area in FIG. 3B is an unused area.

In the above embodiment, even when the memory capacity of the image memory 10 is increased, it is only necessary to add a conversion table, and complicated address management is not required. Further, even when the storage area of the image memory 10 is divided and used, the write and read addresses can be easily obtained.

The buffer 24 and the D / A conversion circuits 26 and A
A compression circuit and an expansion circuit may be connected to the / D conversion circuit 28, respectively.

In the above embodiment, the description has been made as if the data amount of one frame is constant at a power of two.
It is not necessary to be a power of two, and the present invention can be applied to a case where the data amount of one frame differs depending on the resolution, the compression ratio, and the like. When the data amount of one frame is different, the start address of the next frame may be set in the address conversion table 18 at the end of the writing of one frame. 1
If an end code is added to the end of the frame data, one frame can be read without any trouble when reading from the image memory 10.

[0019]

As can be easily understood from the above description, according to the present invention, a large number of frames of image data can be easily and quickly recorded without complicated address management.
Can be written to the file.

[Brief description of the drawings]

FIG. 1 is a configuration block diagram of an embodiment of the present invention.

FIG. 2 is an example of the contents of a conversion table 18 and a memory map of an image memory 10 according to the embodiment.

FIG. 3 is another example of the contents of a conversion table 18 and a memory map of an image memory 10;

[Explanation of symbols]

10: Image memory 12: Data address bus 1
4: Control bus 16: Frame access control circuit 18: Address conversion table 20: Bus control circuit 22: I / O port 24: Buffer 26: A / D converter 28: D / A
converter

──────────────────────────────────────────────────続 き Continuation of the front page (72) Inventor Hirofumi Nakajima 3-30-2 Shimomaruko, Ota-ku, Tokyo Inside Canon Inc. (56) References JP-A-3-179982 (JP, A) (58) Survey Field (Int.Cl. ⁷ , DB name) H04N 5/907

Claims (4)

(57) [Claims] 1. A memoryWhen, The memory Of image data written toFrame number and
A memory address corresponding to the frame number.
Table A frame number of image data to be written to the memory;
Generate a memory address based on the table and
The image data is stored in the memory based on the memory address.
Writing means to write An image characterized by comprising:
Storage device. 2. The table according to claim 1, wherein the table corresponds to the frame number.
Claim 1 wherein the corresponding memory address is rewritable.
The image storage device according to claim 1. 3. An input means for inputting an image signal, The image signal input by the input means is converted into a digital signal.
An A / D converter for converting the Temporarily stores the image signal converted by the A / D converter
2. The image storage device according to claim 1, further comprising:
Place. 4. Image data and a frame of the image data
Input means for inputting frame number data indicating a number
When, Memory and The frame number data input by the input means
To a memory address, The input unit based on an address from the conversion unit;
Write the image data input by the
Image storage device comprising a writing unit
Place.