JP3097403B2 - Video signal transmitting device and video signal receiving device - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

The present invention relates to an aspect ratio of 16: 9.
The present invention relates to a video signal transmitting apparatus and a video signal receiving apparatus for digital serial transmission of wide video signals.

[0002]

2. Description of the Related Art A BTA (Broadcasting Technology Development Council) is currently studying a 16: 9 aspect ratio wide-screen broadcast system (EDTVII). Along with this, development of broadcasting equipment such as wide-screen cameras and VTRs has been progressing, and there has been remarkable progress in signal processing technology for wide-screen video.

[0003] There are two types of scanning methods for such a wide video signal, interlaced scanning and sequential scanning. Below, 18MH
An interlaced wide video signal consisting of a z-sampling luminance signal (Yi) and a 9 MHz sampling chrominance signal 2 channels (R-Yi, B-Yi), a 13.5 MHz sampling luminance signal (Yp) and a 13.5 MHz A conventional video signal transmitting apparatus for transmitting a progressively wide video signal consisting of a luminance auxiliary signal (Y'p) for sampling and two channels (RYp, BYp) of color difference signals for 6.75 MHz sampling, and a video signal The receiving device will be described.
However, the progressively scanned wide video signal handled here is Y
A luminance component composed of p and Y'p is an information amount necessary for sequential scanning, but a chrominance component composed of R-Yp and B-Yp is a signal that transmits only the information amount of interlaced scanning. It is in the form. This is because the amount of information is reduced by halving the vertical information of the color difference signal due to the visual characteristic that the resolution of human eyes is worse than that of light and dark colors.

FIG. 4 is a block diagram showing an example of a conventional video signal transmitting apparatus. In FIG. 4, 201 is 18 MH
An interlaced scanning video signal input terminal for inputting an interlaced wide video signal consisting of a z-sampling luminance signal (Yi) and a 9-MHz sampling chrominance signal two channels (R-Yi, B-Yi). A progressive wide video signal consisting of a sampling luminance signal (Yp), a 13.5 MHz sampling luminance auxiliary signal (Y'p), and a 6.75 MHz sampling chrominance signal 2 channels (R-Yp, B-Yp) is input. A multiplexing circuit for adding a word synchronizing signal to a digital video signal and performing time division multiplexing to convert it into a serial signal; 203 and 209 for a scramble circuit; and 204 and 210 for an electric signal. Electrical / optical converters 205 and 211 for converting into optical signals and outputting to outside
Is an optical signal output terminal, 206 is a first serial transmission circuit,
212 is a second serial transmission circuit.

[0005] The operation of the video signal transmitting apparatus configured as described above will be described below.

First, an interlaced scanning video signal input terminal 201
18 MHz sampling 10-bit quantization luminance signal (Yi) and 9 MHz sampling 10
Two channels of bit-quantized color difference signals (R-Yi, B-
Yi), the interlaced wide video signal is a word synchronization bit pattern for detecting a 10-bit word from the received serial signal in the multiplexing circuit 202, that is, 3FFh, 000h, 000h, 000h (h is 16).
Indicates a base number. ) Are inserted into Yi, R-Yi, and B-Yi in the horizontal blanking period, and are replaced with data. Then, they are time-division multiplexed into words in the order of B-Yi, Yi, R-Yi, Yi. FIG. 6A shows the arrangement order of the data in this state. Further, in the multiplexing circuit 202,
Parallel / serial conversion is performed so that each word LSB is output first, and a serial signal is output. At this time, the serial signal has a transmission rate of 360 Mbps. In the scramble circuit 203, in order to remove the DC component of the output signal of the multiplexing circuit 202 and prevent continuation of the same code, scramble processing of the generator polynomial represented by Expression (1) is performed, and a serial signal is output. Scramble circuit 2
03 output serial electric signal is output from the electric / optical converter 204.
Are subjected to light intensity modulation and output as an optical signal from an optical signal output terminal 205 to the outside.

G (x) = (x ⁹ + x ⁴ +1) (x + 1) (1) The scramble circuit 203 of the generator polynomial represented by the equation (1) and a scramble circuit 209 described later are shown in FIG.
(A) is used. 7A, reference numeral 301 denotes a serial clock input terminal, 302 denotes a serial data input terminal, 316 denotes a scrambled data output terminal, 303 to 312 denote delay elements, and 313 to 315 denote exclusive OR elements.

On the other hand, a luminance signal (Yp) of 13.5 MHz sampling and 10-bit quantization and a luminance auxiliary signal (Y'p) of 13.5 MHz sampling and 10-bit quantization input from the progressive scanning video signal input terminal 207. And 6.7
5MHz sampling / 10-bit quantization color difference signal 2
The multiplexing circuit 208 converts the progressively scanned wide video signal composed of the channels (R-Yp, B-Yp) into a word synchronization bit pattern for detecting a 10-bit word from the received serial signal, that is, 3FFh, 000h, 000.
The code of h, 000h is inserted into Yp, Y'p and R-Yp in the horizontal blanking period and is replaced with data. Then, they are time-division multiplexed into words in the order of B-Yp, Yp, Y'p, R-Yi, Yp, Y'p. FIG. 6B shows the data arrangement order in this state. Further, the multiplexing circuit 208
Then, parallel / serial conversion is performed so that each word LSB is output first, and a serial signal is output. At this time, the serial signal has a transmission rate of 405 Mbps. In the scramble circuit 209, the multiplex circuit 208
In order to remove the DC component of the output signal and prevent the continuation of the same code, the generator polynomial shown in Expression (1) is scrambled and a serial signal is output. The serial electric signal output from the scramble circuit 209 is output to the electric / optical converter 2
At 10, light emission intensity modulation is performed, and an optical signal is output from the optical signal output terminal 211 to the outside.

As described above, the conventional video signal transmitting apparatus transmits two types of wide video signals having different signal forms like the first serial transmitting circuit 206 and the second serial transmitting circuit 212. Transmission signals are transmitted using a plurality of serial transmission circuits having different rates.

Next, a conventional video signal receiving apparatus will be described. FIG. 5 is a block diagram showing an example of a conventional video signal receiving device. In FIG. 5, 213 and 219 are optical signal input terminals, 214 and 220 are optical / electrical converters for converting optical signals into electrical signals, 215 and 221 are descrambling circuits, and 216 and 222 are word-synchronized from serial signals. A separation circuit 217 for separating the time-division multiplexed signal outputs an interlaced wide video signal composed of an 18 MHz sampling luminance signal (Yi) and a 9 MHz sampling color difference signal 2 channels (R-Yi, B-Yi). Interlaced scanning video signal output terminal, 223
Is 13.5 MHz sampling luminance signal (Yp) and 1
A progressive scanning video signal output terminal for outputting a progressive scanning wide video signal composed of a 3.5 MHz sampling luminance auxiliary signal (Y'p) and a 6.75 MHz sampling chrominance signal 2 channels (R-Yp, B-Yp); 218 is the first
The serial receiving circuit 224 is a second serial receiving circuit.

The operation of the video signal receiving apparatus configured as described above will be described below.

First, an optical signal input from an optical signal input terminal 213 is converted into an electrical signal by an optical / electrical converter 214, equalized, amplified and discriminated and regenerated, and re-timed by extracting a serial clock to obtain a serial signal. Is output. This serial signal is 360 Mbps. The descrambling circuit 215 descrambles the serial signal output from the optical / electrical converter 214 to restore it to a time division multiplexed signal. The separation circuit 216 converts the serial signal output from the descrambling circuit 215 into 3FFh, 000
Word synchronization is obtained by detecting a bit pattern of h, 000h, 000h, and a luminance signal (Yi) of 18 MHz sampling and 10-bit quantization and a color difference signal of 9 MHz sampling and 10-bit quantization are obtained from the time-division multiplexed signal. The signals of the channels (R-Yi, B-Yi) are separated and output to the interlaced scanning video signal output terminal 217.

The descrambling circuit 215 and the descrambling circuit 221 described later use the circuit shown in FIG. In FIG. 7B, 317 is a serial clock input terminal, 318 is a scrambled data input terminal, 332 is a restored data output terminal, and 319 to 328.
Is a delay element, and 329 to 331 are exclusive OR elements.

On the other hand, the optical signal input from the optical signal input terminal 219 is converted into an electrical signal by the optical / electrical converter 220, equalized, amplified and discriminated and regenerated, and re-timed by extracting a serial clock to obtain a serial signal. Is output. This serial signal is 405 Mbps. In the descrambling circuit 221, the serial signal output from the optical / electrical converter 220 is descrambled to restore a time-division multiplexed signal. The separation circuit 222 converts the serial signal output from the descrambling circuit 221 into 3FFh, 000
Word synchronization is obtained by detecting a bit pattern of h, 000h, 000h, and a luminance signal (Yp) of 13.5 MHz sampling and 10-bit quantization and a 13.5 MHz sampling and 10-bit quantization from a time-division multiplexed signal. , And a two-channel (R-Yp, B-Yp) color difference signal of 6.75 MHz sampling and 10-bit quantization are separated and sequentially output to a video signal output terminal 223. I have.

As described above, the video signal receiving apparatus in the conventional example is provided with the first serial receiving circuit 218 and the second serial receiving circuit 224 for serial transmission of two types of wide video signals having different signal forms. As described above, the signals are received by using different serial receiving circuits having different transmission rates, and video signals are output.

[0016]

However, in the above-described conventional configuration, if the form of the wide video signal is different, the transmission rate is different, and a serial transmission circuit and a serial reception circuit are required separately, and the common configuration is required. There is a problem that the number of possible circuit parts is small, the circuit scale is large, and the cost is high.

The present invention solves the above-mentioned conventional problems, and uses a serial transmission circuit in a video signal transmission device and a serial reception circuit in a video signal reception device in common for wide video signals of different forms. It is an object of the present invention to provide an inexpensive video signal transmitting device and a video signal receiving device.

[0018]

In order to achieve this object, a video signal transmitting apparatus according to the present invention comprises a luminance signal of 13.5 MHz sampling, a luminance auxiliary signal of 13.5 MHz sampling, and a color difference signal of 6.75 MHz sampling. 2
Effective sample of digital video signal consisting of channels
Of the bit information of one horizontal scanning cycle at the interlaced scanning timing , the bit information of one horizontal scanning cycle at the interlaced scanning timing of the digital video signal composed of two channels of the luminance signal of 18 MHz sampling and the color difference signal of 9 MHz sampling. It has a configuration in which a mapping circuit that rearranges the bit information by allocating it to the bit information is provided.

The video signal receiving apparatus of the present invention has a serial receiving
A 13.5 MHz sampling luminance signal and a 13.5 MHz sampling signal are obtained from the bit information for one horizontal scanning cycle in the interlaced scanning timing of the parallel digital video signal output from the communication circuit.
A configuration in which a demapping circuit for extracting and rearranging bit information for one horizontal scanning cycle in interlaced scanning timing of a digital video signal composed of two channels of a luminance auxiliary signal of Hz sampling and a color difference signal of 6.75 MHz sampling is provided. Have.

[0020]

According to the present invention, an interlaced scanning video signal composed of a luminance signal (Yi) of 18 MHz sampling and two channels of color difference signals (R-Yi, B-Yi) of 9 MHz sampling and a 13.5 MHz sampling luminance signal are provided. A different wide form of a progressive scanning video signal composed of a luminance signal (Yp), a luminance auxiliary signal (Y'p) of 13.5 MHz sampling, and two channels (R-Yp, B-Yp) of a color difference signal of 6.75 MHz sampling. The information at the same transmission rate of 360 Mbps can be obtained for the video signal, and the serial transmission circuit in the video signal transmission device and the serial reception circuit in the video signal reception device can be used in common. Can be realized.

[0021]

(Embodiment 1) An embodiment of the present invention will be described below with reference to the drawings.

FIG. 1 is a block diagram showing a video signal transmitting apparatus according to a first embodiment of the present invention. In FIG.
Reference numeral 101 denotes a luminance signal (Yi) of 18 MHz sampling and a color difference signal of 2 channels (RY) of 9 MHz sampling.
i, B-Yi), an interlaced scanning video signal input terminal for inputting an interlaced wide video signal.
5MHz sampling luminance signal (Yp) and 13.5M
Hz sampling luminance auxiliary signal (Y'p) and 6.75M
Hz sampling color difference signal 2 channels (R-Yp,
B-Yp), a progressive scanning video signal input terminal for inputting a progressive scanning wide video signal, 103 a mapping circuit for rearranging bit information of the video signal, and 104 a signal to be transmitted from two systems of digital video signals. A signal selection circuit; 105, a multiplexing circuit for adding a communication synchronization signal to a digital video signal and performing time division multiplexing to convert the signal into a serial signal; 106, a scramble circuit; 107, an electric signal for converting an electric signal into an optical signal and outputting the signal to the outside; / Optical converter, 108
Is an optical signal output terminal, and 109 is a serial transmission circuit.

The operation of the video signal transmitting apparatus according to the present embodiment configured as described above will be described below.

First, a luminance signal (Yp) of 13.5 MHz sampling and 10-bit quantization and a luminance auxiliary signal (Y'p) of 13.5 MHz sampling and 10-bit quantization input from the progressive scanning video signal input terminal 102. And 6.7
5MHz sampling / 10-bit quantization color difference signal 2
A wide-scan video signal composed of channels (R-Yp, B-Yp) is converted by the mapping circuit 103 into bit information of one horizontal scanning period at the interlaced scanning timing.
1 in the interlaced scanning timing of a digital video signal consisting of a luminance signal (Yi) of 8 MHz sampling and 10-bit quantization and two channels of color difference signals (R-Yi and B-Yi) of 9 MHz sampling and 10-bit quantization.
Bit information can be rearranged by assigning it to bit information in the horizontal scanning period.

The rearrangement will be described in more detail with reference to the drawings. FIG. 2 is a diagram showing an array of bit information in one horizontal scanning period at the interlaced scanning timing of the digital video signal. FIG. 2A shows the bit information of Yp input from the sequential scanning video signal input terminal 102. Sequence diagram,
FIG. 2B is an arrangement diagram of bit information of Y′p input from the progressive scanning video signal input terminal 102, and FIG. 2C is R-Yp input from the progressive scanning video signal input terminal 102.
FIG. 2D is an array diagram of B-Yp bit information input from the progressive scanning video signal input terminal 102, and FIG. 2E is a Yi bit output of the mapping circuit 103. FIG. 2 (f) is an arrangement diagram of R-Yi bit information output from the mapping circuit 103, and FIG.
(G) is an arrangement diagram of the bit information of B-Yi output from the mapping circuit 103.

As shown in FIGS. 2A and 2B,
Since Yp and Y'p input from the progressive scanning video signal input terminal 102 have a sampling frequency of 13.5 MHz, there are 858 sample data in each horizontal scanning cycle. However, the information of the effective screen in one horizontal scanning period is equivalent to 760 samples. Further, as shown in FIGS. 2C and 2D, R-Yp and B-
Since Yp has a sampling frequency of 6.75 MHz, 429 sample data are present in each horizontal scanning cycle. However, the information of the effective screen in one horizontal scanning cycle is 380 samples. The information of these effective screens is converted to Y of 18 MHz sampling.
i, assignment is performed according to the form of the interlaced wide video signal composed of R-Yi and B-Yi of 9 MHz sampling.

The assignment of bit information is shown in FIG.
(G). As shown in FIG.
MHz sampling Yi is 1144 in one horizontal scanning cycle.
There are samples, of which 720 samples are assigned to Yp on the effective screen and 360 samples are assigned to Y'p.
Also, as shown in FIG. 2 (f), there are 572 samples of R-Yi of 9 MHz sampling in one horizontal scanning period. Of these, 360 samples are set to R-Yp of the effective screen.
180 samples are assigned to Y'p of the effective screen. Similarly, for B-Yi, as shown in FIG.
60 samples are assigned to BY-p of the effective screen, and 180 samples are assigned to Y'p of the effective screen. Then, fixed data is put in a portion indicated by a period F in FIG. In other words, the code of 100h in the F period of Yi in (e) of FIG. 2 is replaced by R-Yi, B- in (f) and (g) of FIG.
In the F period of Yi, data of a code of 200h is put.

As described above, the sequentially scanned video signals are rearranged from the mapping circuit 103 and output in the form of interlaced scanning.

Next, in the signal selection circuit 104, the luminance signal (Yi) of 18 MHz sampling and 10-bit quantization input from the interlaced scanning video signal input terminal 101 and 9
The wide-scan interlaced video signal composed of two channels (R-Yi, B-Yi) of the chrominance signal of MHz sampling and 10-bit quantization and the rearranged progressive-scan video signal output from the mapping circuit 103 should be transmitted. One of the signals is selected and output to the serial transmission circuit 109.

The serial transmission circuit 109 is the same as the first serial transmission circuit 206 of the conventional video signal transmission apparatus, and the video signal output from the signal selection circuit 104 is converted by the multiplexing circuit 105 into a 10-bit signal from the received serial signal. , A code of 3FFh, 000h, 000h, 000h is inserted and replaced with data. And B-
Time division multiplexing is performed on words in the order of Yi, Yi, R-Yi, and Yi. The position where the word synchronization bit pattern is inserted is a horizontal retrace period in the interlaced scanning timing, and is inserted in the period F in FIG. Further, the multiplexing circuit 105 performs parallel / serial conversion so that each word LSB is output first, and outputs a serial signal.
The serial signal at this time has a transmission rate of 360 Mbps. In the scramble circuit 106, the multiplex circuit 105
In order to remove the DC component of the output signal and prevent the continuation of the same code, the generator polynomial shown in Expression (1) is scrambled and a serial signal is output. The serial electric signal output from the scramble circuit 106 is output to the electric / optical converter 1
At 07, the light intensity is modulated and converted to an optical signal, which is externally output from the optical signal output terminal 108.

As described above, according to the present embodiment, by using the mapping circuit 103, Yi, R-Yi, B
-Yi interlaced scanning video signal and Yp, Y'p, R
When one of the progressively scanned video signals consisting of -Yp and B-Yp is selected and transmitted, transmission can be performed by a single serial transmission circuit 109.

The actual mapping circuit 103 and the signal selection circuit 104 can be constituted by a memory or a simple logic IC, and can operate at 360 Mbps or 405 Mbps.
It is generally cheaper than a serial transmission circuit composed of a transmission device such as a diode. Therefore, the video signal transmitting device can be realized at low cost.

(Embodiment 2) Hereinafter, a second embodiment of the present invention will be described with reference to the drawings.

FIG. 3 is a block diagram showing a video signal receiving apparatus according to a second embodiment of the present invention. In FIG.
111 is an optical signal input terminal, 112 is an optical / electrical converter for converting an optical signal to an electric signal, 113 is a descramble circuit, 114 is a separating circuit for separating words which are word-synchronized from a serial signal and time-division multiplexed, Reference numeral 115 denotes a luminance signal (Yp) of 13.5 MHz sampling, a luminance auxiliary signal (Y'p) of 13.5 MHz sampling, and a luminance signal of 6.75 MHz sampling from bit information of one horizontal scanning cycle in the interlaced scanning timing of the digital video signal. A demapping circuit that extracts and rearranges bit information for one horizontal scanning cycle in interlaced scanning timing of a digital video signal composed of two channels of color difference signals (R-Yp, B-Yp), and 116 is a luminance signal (18 MHz sampling). Yi) and two channels of color difference signals of 9 MHz sampling (R-Yi, B- Yi) an interlaced scanning video signal output terminal for outputting an interlaced scanning wide video signal;
117 is a 13.5 MHz sampling luminance signal (Y
p) and a luminance auxiliary signal (Y ′) of 13.5 MHz sampling.
p) and a progressive scanning video signal output terminal for outputting a progressive scanning wide video signal composed of two channels (RYp, BYp) of 6.75 MHz sampling color difference signals, and a 118 serial receiving circuit.

The operation of the video signal receiving apparatus according to the present embodiment configured as described above will be described below.

First, an optical signal input from an optical signal input terminal 111 is converted into an electric signal by an optical / electrical converter 112, equalized, amplified and discriminated and reproduced, and re-timed by extracting a serial clock to obtain a serial signal. Is output. In the descramble circuit 113, the optical / electrical converter 1
The 12 output serial signals are descrambled and restored to a time division multiplexed signal. The separation circuit 114 converts the serial signal output from the descrambling circuit 113 into 3FF
Word synchronization is obtained by detecting a bit pattern of h, 000h, 000h, 000h, and a luminance signal (Yi) of 18 MHz sampling and 10-bit quantization and a color difference of 9 MHz sampling and 10-bit quantization from a time-division multiplexed signal. Signal 2 channels (R-Yi, BY)
i) The signal of (i) is separated and the interlaced scanning video signal output terminal 11
6 and output to the demapping circuit 115.

The demapping circuit 115 performs the reverse process of the mapping circuit 103 described in the first embodiment. The output signal of the separation circuit 114 is Yi in FIGS.
, R-Yi, and B-Yi, and Yp, Y'p, R-Yp, and B-Y in FIGS.
Sorted as Yp, 13.5 MHz sampling
10-bit quantization luminance signal (Yp) and 13.5 MHz
A luminance auxiliary signal (Y ′ for sampling and 10-bit quantization)
p) and a progressively scanned wide video signal composed of two channels (RYp and BYp) of 6.75 MHz sampling and 10-bit quantized color difference signals are output to a progressively scanned video signal output terminal 117. In the horizontal retrace period of the wide-scan video signal of progressive scanning, Yp and Y'p are 100h.
Is 200h for RYp and BYp.
The data of the following code is input by the demapping circuit 115.

As described above, according to the present embodiment, by using the demapping circuit 115, Yi, R-Yi,
The interlaced scanning video signal composed of B-Yi and Yp, Y'p,
When a progressive scanning video signal composed of R-Yp and B-Yp is received, reception can be performed by a single serial receiving circuit 109.

The actual demapping circuit 115 can be composed of a memory or a simple logic IC,
It is generally inexpensive compared to a high-speed descrambling circuit / high-speed separation circuit operating at ps or 405 Mbps, or a serial receiving circuit composed of devices such as a communication light receiving element. Therefore, the video signal receiving device can be realized at low cost.

In the video signal transmitting apparatus according to the first embodiment, the electrical / optical converter 107 is used for the serial transmitting circuit 109. In the video signal receiving apparatus according to the second embodiment, the optical / optical converter 107 is used for the serial receiving circuit 118. Optical transmission was performed using the electric converter 112. However, due to transmission using a metal coaxial line, electric /
A cable driver may be used instead of the optical converter 107, and a cable receiver may be used instead of the optical / electrical converter 112.

[0041]

As described above, the video signal transmitting apparatus and the video signal receiving apparatus according to the present invention can be used in a video signal transmitting apparatus with the following features:
A digital video signal consisting of a luminance signal of 5 MHz sampling, a luminance auxiliary signal of 13.5 MHz sampling, and two channels of a color difference signal of 6.75 MHz sampling .
The bit information of one horizontal scanning cycle at the interlaced scanning timing among the bit information of the effective sample is set to 18 MHz.
A mapping circuit for allocating bit information for one horizontal scanning cycle in the interlaced scanning timing of a digital video signal comprising two channels of a sampling luminance signal and two channels of a 9 MHz sampling chrominance signal and rearranging the bit information; The bit information for one horizontal scanning period at the interlaced scanning timing of a digital video signal in the form of a two-channel digital image signal having a luminance signal of 18 MHz sampling and a color difference signal of 9 MHz sampling is set to 1
3.5MHz sampling luminance signal and 13.5MHz
One horizontal scanning cycle at the interlaced scanning timing of a digital video signal consisting of a sampling luminance auxiliary signal and two channels of 6.75 MHz sampling color difference signals
By providing a demapping circuit that extracts and rearranges bit information of valid samples, it is possible to obtain information of the same transmission rate of 360 Mbps for a wide video signal having a different form. The transmission circuit, and the serial reception circuit in the video signal receiving device can be commonly used,
The device could be realized at low cost.

In addition, since the transmission rate for the transmission of the progressive scanning video signal can be reduced from 405 Mbps to 360 Mbps, the operation speed of the elements and the load on the transmission line can be reduced (for example, inexpensive elements having a low operation speed can be used). It can be used, and the non-repeated transmission distance for coaxial transmission can be extended.)

[Brief description of the drawings]

FIG. 1 is a block diagram illustrating a configuration of a video signal transmission device according to a first embodiment of the present invention.

2A is an arrangement diagram of Yp bit information inputted from a progressive scanning video signal input terminal 102. FIG. 2B is an arrangement diagram of Y'p bit information inputted from a progressive scanning video signal input terminal 102. (C) is an array diagram of R-Yp bit information input from the progressive scanning video signal input terminal 102. (d) is an array diagram of B-Yp bit information input from the progressive scanning video signal input terminal 102. (e) ) Is an array diagram of bit information of Yi output from the mapping circuit 103. (f) is an array diagram of bit information of R-Yi output from the mapping circuit 103. (g) is an array diagram of B-Yi bit information output from the mapping circuit 103.

FIG. 3 is a block diagram illustrating a configuration of a video signal receiving device according to a second embodiment of the present invention.

FIG. 4 is a block diagram showing a configuration of a video signal transmission device in a conventional example.

FIG. 5 is a block diagram showing a configuration of a video signal receiving device in a conventional example.

FIG. 6A is an explanatory diagram showing a multiplexed state of an interlaced scanning video signal of a video signal transmitting device in a conventional example. FIG. 6B is an explanatory diagram showing a multiplexed state of a progressively scanned video signal of the video signal transmitting device in a conventional example. Figure

FIG. 7A is a circuit diagram that realizes scrambling of a generator polynomial represented by Expression (1). FIG. 7B is a circuit diagram that restores a scrambled signal of the generator polynomial represented by Expression (1).

[Explanation of symbols]

 103 mapping circuit 104 signal selection circuit 109 serial transmission circuit 115 demapping circuit 118 serial reception circuit

Claims (3)

(57) [Claims] 1. A luminance signal of 13.5 MHz sampling, a luminance auxiliary signal of 13.5 MHz sampling and 6.7
Among the bit information of the effective sample of the digital video signal composed of two channels of the color difference signal of 5 MHz sampling, the bit information of one horizontal scanning cycle at the interlace scanning timing is converted into the luminance signal of 18 MHz sampling and the 9 MHZ.
a mapping circuit for allocating bit information for one horizontal scanning cycle in the interlaced scanning timing of a digital video signal composed of two channels of z-sampling color difference signals and rearranging the bit information, and serializing the digital video signal output from the mapping circuit; And a serial transmission circuit for transmitting the video signal. 2. A digital video signal output from a mapping circuit.
Signal, 18MHz sampling luminance signal and 9MHz sampling
Digital image consisting of two channels of color difference signal of pulling
A signal selection circuit for selecting a signal to be transmitted from two systems of image signals
With the road, the serial digital video signal of said signal selection circuit output
The video signal transmitting apparatus according to claim 1, wherein the video signal is transmitted after being converted. 3. A serial receiving circuit for receiving a serial signal and outputs the daisy <br/> barrel video signal of the parallel, one horizontal scanning period in interlaced scanning timing of the parallel digital image signal of serial reception circuit output from the bit information, the luminance signal and the 13.5MHz sampling 13.5MHz sampling luminance auxiliary signal and 6.75MHz sampling color difference signals of two channels of
A video signal receiving apparatus comprising: a demapping circuit for extracting bit information of effective samples of a digital video signal and performing rearrangement.