JP3097294B2 - Code conversion device - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a code conversion device for performing a code conversion accompanying a numerical operation. Code conversion is required when converting a data format used for internal numerical operation into code data such as ASCII code used in the system. In the case of a system including a user interface, it is relatively frequently used, and the code conversion speed has a great effect on system performance.

[0002]

2. Description of the Related Art FIG. 6 shows the configuration of a conventional code conversion apparatus. In FIG. 6, reference numeral 1 denotes a binary-decimal conversion device for converting binary data including decimals to binary-decimal data and outputting decimal integer data and decimal decimal data;
A decimal integer register for holding decimal integer data output from the decimal conversion device 1; a numeral 11, a decimal decimal register for holding decimal decimal data output from the binary / decimal conversion device 1; A code generator for generating code information to be added to the integer data and decimal decimal data, a decimal point code, and a completion code indicating the end of the converted code data string. 6 is 10 when outputting a decimal numerical code. Decimal data to be output is selected from the contents of the decimal integer register 2 and the decimal decimal register 11, and the code information output from the code generator 7 is added to generate code data. Is output, the code data generation device outputs the code data output from the code generation device 7 as it is. The addresses of the data, address register code generator 7 and code data generating device 6 specifies the data to be converted, 8 is a data register for holding an output of the code data generator 6.

The operation will be described below with reference to FIG.
Binary data including decimals is converted to binary data by
As a result of the decimal-to-decimal conversion, 8-digit decimal integer data (D₇
D₆D _FiveD_FourD_ThreeD_TwoD₁D₀) In the decimal integer register 2,
8-digit decimal decimal data (D_-1D_-2D_-3D_-FourD_-FiveD_-6D
_-7D_-8) Are held in the decimal fraction register 11, respectively.
The ASCII code conversion in the case of the above will be described. here
And D_n(N = 7 to -8) is BCD (4bit), A_n(N = 7-8)
D_nASCII code obtained by adding '0011' to the upper part of
(8bit), '. 'Is the decimal point code (8 bits),' * 'is the completion code
Mode (8 bits). Also, decimal integer registers 2, 10
The decimal register 11 is 32 bits, and the data register 8 is
16 bits, without 16 bits (2 ASCII codes)
Data can be transferred.

In the code data generating device 6, the following
(1)-(4) Execute the operation and output the ASCII code. Table 1 shows the contents of the address register 20 (Adr0 to Adr
8) shows a correspondence table between data D _n to be converted, a decimal point code, and a completion code. (1) Change the address for the following operations (a) and (b) (Adr0 to Adr
3) While executing, the contents of the decimal integer register 2 are converted to ASCII code and output. (a) Select the data shown in (Table 1) from the contents (address) of the address register 20. (b) the output from the code generator 7 "0011" is added to D _n to generate ASCII code A _n, stored in the data register 8. '0011' D _n '0011' D _n-1 → _An A _n-1 → Data register 8 (2) Decimal point code when address is Adr4. 'Is output from the code generator 7 and D _-1 is selected from the decimal fraction register 11 and A is converted from D _-1 to A by the operation (b).
Generates _-1 . '. ''0011'D _-1 → '. 'A _-1 → Data register 8 (3) Change the address in the operations of (a) and (b) above (Adr5 to Adr7)
The contents of the decimal number register 11 are converted into ASCII codes and output. (4) When the address is Adr8, D- ₈ is selected from the decimal decimal register 11 and A- ₈ is generated from D- ₈ by the operation (b), and the completion code '*' is generated by the code generator 7. Output. '0011' D _-8 '*' → A _-8 '*' → Data register 8

[0005]

[Table 1]

[0006] As described above, the 18 bytes
Key code 'A₇A₆A_FiveA_FourA_ThreeA_TwoA ₁A₀. A_-1A_-2A_-3
A_-FourA_-FiveA_-6A_-7A_-8* 'Is generated and the code data
16-bit (ASCII)
(Two codes).

In the case of handling signed data, a code flag (not shown) for detecting a code output from the binary-decimal conversion device 1 is provided, and the code generation device 7 generates a code code “+” or “+”. -'Is generated. By assigning an address to this code, an ASCII code '± A comprising 19 bytes including the code code
₇ A ₆ A ₅ A ₄ A ₃ A ₂ A ₁ A ₀ . A _-1 A _-2 A _-3 A _-4 A _-5 A _-6 A
_-7 A _-8 * 'can be output.

[0008]

However, when binary data is converted using the above-mentioned conventional code conversion apparatus, data read from a decimal integer register or a decimal decimal register is uniquely determined by an address register. Therefore, the length of the converted code data becomes constant, and an ASCII code of 18 bytes (19 bytes for signed data) is always generated.

For this reason, there is no problem if all the data is valid data, but the following meaningless data (0
When there is a continuation of a sign or a + sign), unnecessary code conversion processing is performed, and it takes more time than necessary. -When the decimal number is zero Example: A ₇ A ₆ A ₅ A ₄ A ₃ A ₂ A ₁ A ₀ . 00000000 *-When the integer is zero Example: 00000000. A _-1 A _-2 A _-3 A _-4 A _-5 A _-6 A _-7 A
_-8 * • When the lower digit of the decimal is zero Example: A ₇ A ₆ A ₅ A ₄ A ₃ A ₂ A ₁ A ₀ . A _- 100000000 *-When the high-order digit of the integer is zero Example) 000000A ₀ . A _-1 A _-2 A _-3 A _-4 A _-5 A _-6 A
_-7 A _-8 * • When the sign is positive Example) + A ₇ A ₆ A ₅ A ₄ A ₃ A ₂ A ₁ A ₀ . A _-1 A _-2 A _-3 A _-4 A
_-5 A _-6 A _-7 A _-8 * Accordingly, the present invention eliminates the conversion and transfer of such meaningless data and provides a code conversion apparatus that further increases the processing speed of code conversion that greatly affects system performance. The purpose is to provide.

[0010]

SUMMARY OF THE INVENTION In order to solve the above-mentioned problems, a code conversion apparatus according to the present invention first converts binary data with a plus or minus sign into binary to decimal, and adds a plus or minus sign to a plurality of digits. A binary-decimal conversion device for outputting decimal data;
A decimal register for holding a plurality of digits of decimal data output from the decimal-to-decimal conversion device, a code flag for holding a code output from the binary-to-decimal conversion device, and inputting the code flag. A sign determination device for determining whether the sign is positive or negative;
A code that generates a code code only when the code determination device determines a negative code, and generates code information to be added to each digit of decimal data when the decimal data is converted to other code data. When the generator and the sign determination device indicate a positive code, the code information output from the code generator is divided by a predetermined number of digits with respect to the decimal data input from the decimal register. The code data added and generated is sequentially output, and when the sign determination device indicates a negative sign, the negative sign code output from the code generator and the code information output from the code generator are output. A code data generation device for sequentially outputting code data generated by adding a predetermined number of digits to decimal data input from a decimal register, and A data register for holding the output of the code data generation device, and instructing the code generation device to generate a code code or code information, and generating code data for the code data generation device and transmitting data to the data register. An order register for instructing transfer and holding data indicating an order of transfer from the code data generation device to the data register.

Second, binary data including decimal numbers are converted to binary 10
A binary-to-decimal conversion device for performing binary conversion to output decimal integer data and decimal decimal data of a plurality of digits, respectively,
A decimal integer register for holding decimal integer data output from the decimal-decimal conversion device, a decimal decimal register for holding decimal decimal data output from the binary-decimal conversion device, and the decimal decimal A decimal zero judging device for judging whether or not the contents of the register is '0'; and the decimal integer data and 1 according to an output of the decimal zero judging device.
Code information to be added at the time of code conversion of decimal data, a code generator for generating a decimal point code, and when the decimal zero determination device indicates that there is no decimal, the code generator is output from the code generator. Code information is generated by adding a predetermined number of digits to the decimal integer data output from the decimal integer register, and the generated code data is sequentially output to indicate that the decimal zero determination device has a decimal number. In this case, code data generated by adding code information output from the code generator to the decimal integer data input from the decimal integer register by a predetermined number of digits, The decimal point code output from the device and the code information output from the code generator are converted into 1
A code data generation device for sequentially outputting code data generated by adding a predetermined number of digits to a decimal number data, a data register holding an output of the code data generation device, and the code generation device To indicate the generation of code information or decimal point code,
An order register that instructs the code data generation device to generate code data and transfer data to the data register, and that holds data indicating a transfer order from the code data generation device to the data register. I have.

Third, binary data including decimal numbers are converted to binary 10
A binary-to-decimal conversion device that outputs decimal integer data and decimal decimal data of a plurality of digits by performing decimal conversion, and a decimal integer register that holds the decimal integer data output from the binary-decimal conversion device A decimal decimal register for holding decimal decimal data output from the binary decimal conversion device, an integer zero determination device for determining that the content of the decimal integer register is '0', A code generator for generating code information to be added at the time of code conversion of the decimal integer data and decimal decimal data and a decimal point code according to an output of the integer zero determination device, and the integer zero determination device having no integer. In this case, the decimal point code output from the code generator and the code information output from the code generator are output from the decimal decimal register. Code data generated by adding a predetermined number of digits to decimal decimal data is sequentially output, and when the integer zero determination device indicates that there is an integer, the code data is output from the code generation device. Data generated by adding predetermined number of digits to decimal integer data input from a decimal integer register, the decimal point code output from the code generator, and the code A code data generation device for sequentially outputting code data generated by adding code information output from the generation device to the decimal decimal data input from the decimal decimal register by a predetermined number of digits, and A data register for holding the output of the code data generator, and instructing the code generator to generate code information or a decimal code. And an order register that instructs the code data generation device to generate code data and transfer data to the data register, and that holds data indicating a transfer order from the code data generation device to the data register. Have.

Fourth, a binary-decimal conversion device for converting binary data into binary-decimal data and outputting a plurality of digits of decimal integer data, and a decimal integer output from the binary-decimal conversion device A decimal integer register for holding data, an integer zero detection device for detecting data indicating “0” of the most significant digit or “0” continuous from the most significant digit from the contents of the decimal integer register; From the output of the detection device, the most significant digit of the decimal integer data, the most significant digit indicating device for designating a digit having data other than '0', and the decimal integer according to the output of the most significant digit indicating device. A code generator for generating code information to be added at the time of data code conversion,
Based on the output of the most significant digit indicating device, for the decimal integer data input from the decimal integer register, data other than data indicating "0" of the most significant digit or "0" continuous from the most significant digit. A code data generating apparatus for determining data to be converted, adding code information output from the code generating apparatus to the data by a predetermined number of digits, and sequentially outputting the generated code data; and A data register for holding the output of, and instructing the code generator to generate code information,
An order register that instructs the code data generation device to generate code data and transfer data to the data register, and retains data indicating a transfer order from the code data generation device to the data register. Code conversion device.

Fifth, a binary-decimal conversion device for converting decimal binary data into binary-decimal data to output a plurality of decimal data, and a plurality of digits output from the binary-decimal conversion device And a decimal point register holding the decimal point data of the decimal point.
A decimal zero detecting device for detecting data indicating "0" or continuous "0" to the least significant digit; and a digit having data other than "0" from the least significant digit of the decimal decimal data from the output of the decimal zero detecting device. A code generator for generating a decimal point code or code information to be added at the time of code conversion of the decimal data according to an output of the least significant digit indicator; Based on the decimal point code output from the device and the output of the least significant digit indicating device, the decimal decimal data input from the decimal decimal register is continuously up to the least significant digit '0' or the least significant digit. The data to be converted other than the data indicating '0' to be converted is determined, and the code information output from the code generator is added thereto by a predetermined number of digits, and the generated code data is sequentially processed. A code data generating device for outputting, a data register for holding an output of the code data generating device, and an instruction for generating code information to the code generating device, and generating code data to the code data generating device. And an order register for instructing data transfer to the data register and holding data indicating an order of transfer from the code data generation device to the data register.

[0015]

The code conversion apparatus of the present invention does not uniquely determine data to be read from a decimal integer register or a decimal decimal register by designating an address of data to be code-converted. Arbitrary data from the decimal register can be converted and transferred. Therefore, in particular, with the first configuration, it is possible to omit the code code conversion when the code is positive. Further, according to the second configuration, the code conversion of the decimal point and the decimal part when the decimal number is zero can be omitted. Further, with the third configuration, it is possible to omit the code conversion of the integer part when the integer is zero. Further, according to the fourth configuration,
When the upper digit of the integer is zero, the code conversion of the upper digit of the integer part can be omitted. Further, with the fifth configuration, it is possible to omit the code conversion of the decimal part lower digit when the lower digit of the decimal part is zero.

[0016]

【Example】

(Embodiment 1) FIG. 1 shows a configuration diagram of a code conversion apparatus according to a first embodiment of the present invention. In FIG.
1 is a binary-decimal conversion of signed binary data,
Binary-to-decimal conversion device that outputs 0-ary data, 2 is binary 1
10 holding the decimal number output from the 0-base conversion device 1
A decimal integer register, 3 is a code flag for holding the code output from the binary-decimal conversion device 1, 4 is a code determination device that receives the code flag 3 and determines the code, and 7 is an output of the code determination device 4. A code generator for generating code information to be added at the time of code conversion of the decimal data, a completion code to be added to the end of the converted data sequence, and a negative code code; When the code to be converted is determined from the data, the decimal data to be converted is selected from the contents of the decimal integer register 2 and the code information output from the code generator 7 is added. When generating data and converting the negative code and the completion code, the code data generator which outputs the code data output from the code converter 7 as it is. Data register for holding an output of the motor generator 6, 5 the code generator 7 and the code generating unit 6
Is an order register that gives a code conversion instruction to the data register 8 and holds data indicating the transfer order when the code data generated by the code data generating device 6 is transferred to the data register 8.

The operation will be described below with reference to FIG.
The code conversion apparatus according to the present embodiment converts decimal data with positive and negative signs into ASCII codes, and omits code code conversion when a positive code is added. For example, in ASCII code conversion of binary 8-digit integer data (A _n : an ASCII code indicating an n-digit number), when the sign is negative, '-A ₇ A ₆ A ₅ A ₄ A ₃ A _2. A ₁ A ₀ ',
Sign when positive outputs _{'A 7 A 6 A 5 A} 4 A 3 A 2 A 1 A 0'.

As a result of binary-to-decimal conversion of binary data including a code by the binary-to-decimal conversion device 1, the binary data MS
ASCII when B (sign bit) is held in the sign flag 3 and 8-digit decimal integer data (D ₇ D ₆ D ₅ D ₄ D ₃ D ₂ D ₁ D ₀ ) is held in the decimal integer register 2 The code conversion will be described. Here, D _n (n = 7 to 0) is BCD (4b
it) and A _n (n = 7 to 0) are ASCII codes (8 bits) obtained by adding “0011” to the upper part of D _n , and “−” is a negative code
(8bit), '*' is the completion code (8bit). Also, 10
Hexadecimal integer register 2 is 32 bits, data register 8 is 1
6 bits, from the code generator 6 to the data register 8
Can transfer data of 16 bits (two ASCII codes) at a time.
To the order register 5 using a part of the address bus.

Table 2 shows the contents of the order register 5 and the code data to be transferred when the ASCII code converted by the code generator 6 is transferred to the data register 8 when the sign is positive and when the sign is negative. FIG.

[0020]

[Table 2]

When the CPU designates the transfer order in the order register 5, the code judging device 4, the code generating device 5, and the code data generating device 6 perform the following operations in accordance with the contents of the order register 5, as shown in Table 2. The code data is generated, and the generated code data is transferred to the data register 8. () Shows the contents of the order register 5. (1) The sign judgment device 4 judges the contents of the sign flag 3. - sign is negative if the code generator 6 is negative sign code to the code generator 7 '-' with requests to output adds the output "0011" from the code generator 7 to D ₇ To generate an ASCII code A ₇ and store it in the data register 8. '-'0011' D ₇ → '-' A ₇ → Data register 8 ・ If the sign is positive The output '0011' from the code generator 7 is added to D ₇ D ₆ and the ASCII code A ₇ A ₆ is added. Generated and stored in data register 8. '0011' D ₇ '0011' D ₆ → A ₇ A ₆ → Data register 8 (2-4) The code generator 7 outputs '0011', and the code generator 6 outputs D from the decimal integer register 2. _n is selected, '0011' is added, and the ASCII code _An is generated two digits at a time and stored in the data register 8. - (1) if the sign is negative _{... A 6 A 5, A 4} A 3, A 2 when the sign by A ₁ generates and transfer and (1) is positive _{... A 5 A 4, A 3} A 2 , A ₁ A ₀ to generate and transfer '0011' D _n '0011' D _n-1 → A _n A _n-1 → data register 8 (5) Processing of least significant digit and completion code from code generator 7 * 'Output.・ If the sign is negative in (1) '0011' D ₀ '*' → A ₀ '*' → Data register 8 ・ If the sign is positive in (1) '*' → Data register 8 By performing the above operations (1) to (5) accordingly, code conversion can be performed and an ASCII code can be output.In particular, in the case of a positive code, unnecessary code conversion of a positive code is performed. Can be omitted. Further, the CPU that reads the ASCII code can obtain the code data in order from the head of the ASCII code only by designating the transfer order and without being aware of the code.

In the case of this embodiment, since the number is an eight-digit number, five transfers are required regardless of the sign of the sign. However, if the number is an odd number, the sign is a positive sign. The number of transfers is reduced by one. For example, in the case of a seven-digit numerical value, the number is five for a negative sign and four for a positive sign. That is,
In signed code conversion, code conversion of data having a positive sign can be executed at high speed.

As described above, according to the present embodiment, the code of the binary data is determined and the data transfer order is transferred simultaneously with the reading of the ASCII code data. Unnecessary code code conversion when the code that was used is positive can be omitted,
Code conversion of binary data including a code can be performed at high speed.

(Embodiment 2) FIG. 2 shows a block diagram of a code conversion apparatus according to a second embodiment of the present invention. In FIG. 2, reference numeral 1 denotes a binary-decimal conversion device for converting binary data including decimals to binary-decimal data and outputting decimal integer data and decimal decimal data, and 11 denotes an output from the binary-decimal conversion device 1. Decimal decimal register holding the obtained decimal decimal data, 2 is a decimal integer register holding the decimal integer data output from the binary-decimal conversion device 1, and 9 is a decimal decimal register 11 whose contents are ' A decimal zero determination device 7 for determining 0 'is received. The output of the decimal zero determination device 9 is applied to code information to be added at the time of code conversion of the decimal data and completion of addition to the end of the converted data string. A code generator 6 for generating a code or a negative sign code determines a code to be converted from the output of the decimal zero judging device 9 and converts a numerical code into a decimal integer register 2 and a decimal decimal register. 10 for code conversion from 1 of contents
When the decimal data is selected, the code information output from the code generator 7 is added to the decimal data to generate code data, and the decimal point code and the completion code are converted, the code data output from the code generator 7 is used. , A data register for holding the output of the code data generator 6, a code register 5 for giving an instruction for code conversion to the code generator 7 and the code generator 6, and a code register 8. This is an order register that holds data indicating the transfer order when transferring the generated code data to the data register 8.

The operation will be described below with reference to FIG.
In the present embodiment, binary data including decimals is converted into ASCII code. When the decimal part is zero, code conversion of the decimal point and the decimal part is omitted. For example, 1
In ASCII code conversion of binary data including an 8-digit integer part and a decimal 8-digit decimal part, if there is a decimal number, 'A ₇ A _{6
A 5 A 4 A 3 A 2} A 1 A 0. A _-1 A _-2 A _-3 A _-4 A _-5 A _-6 A _-7 A
₈ ', when the decimal is not' outputs the _{A 7 A 6 A 5 A 4} A 3 A 2 A 1 A 0 '.

[0026] The binary data including decimal binary decimal converter 1 by binary-decimal conversion result, 8-digit decimal integer data _{(D 7 D 6 D 5 D} 4 D 3 D 2 D 1 D 0 ) Is stored in the decimal integer register 2 as 8-digit decimal decimal data (D _-1 D _-2 D _-3 D _{-4).
D -5 D -6 D -7 D -8} ) will be described ASCII code conversion when held respectively in decimal fraction register 11. Here, D _n (n = 7 to -8) is BCD (4 bits), A _n (n = 7
To -8) are ASCII codes (8 bits) obtained by adding '0011' to the upper part of D _n , '. 'Is decimal point code (8bit),' * '
Is the completion code (8 bits). The decimal integer register 2 and the decimal decimal register 11 have 32 bits, and the data register 8 has 16 bits. Data can be transferred from the code generator 6 to the data register 8 by 16 bits (two ASCII codes). It is assumed that data indicating the transfer order is transferred from a CPU (not shown) to the order register 5 using a part of the address bus.

Table 3 shows a correspondence table between the contents of the order register 5 and the code data to be transferred when the ASCII code converted by the code generator 6 is transferred to the data register 8 when there is a decimal number and when there is no decimal number. It shows. In Table 3, '...' indicates that code conversion is not performed.

[0028]

[Table 3]

When the CPU designates the transfer order in the order register 5, the decimal zero judging device 4, the code generating device 5, and the code data generating device 6 perform the following operations according to the contents of the order register 5, and The generated code data is generated, and the generated code data is stored in the data register 8.
Transfer to () Shows the contents of the order register 5. (1-4) The code generation device 6 adds '0011' output from the code generation device 7 to D _n (n = 7-0) to generate an ASCII code _An two digits at a time, and the data register 8 Stored in. '0011' D _n '0011' D _n-1 → _An A _n-1 → Data register 8 (5) Decimal zero determination unit 9 determines the contents of decimal decimal register 11. If the decimal number is zero: Request the code generator 7 to output a completion code '*', store the completion code in the data register 8, and end the code conversion. '*' → Data register 8 ・ If there is a decimal number Decimal code for the code generator 7. 'With requests to output the output from the code generator 7' 0011 'generates the ASCII code A _-1 in addition to D _-1, stored in the data register 8. '. ''0011'D _-1 → '. 'A _-1 → Data register 8 (6 to 8) Output' 0011 'from code generator 7 to D _n (n = -2
To -7) to generate the ASCII code _An two digits at a time,
Stored in data register 8. '0011' D _n '0011' D _n-1 → A _{n An n-1} → Data register 8 (9) Processing of least significant digit and output of completion code '*' from code generator 7. '0011' D _-8 '*' → A _-8 '*' → Data register 8 The code conversion can be executed and the ASCII code can be transferred by the operation of (1) to (9).
The conversion operation ends in (1) to (5). That is, in this embodiment, the transfer is performed 9 times when there is a decimal number, and 5 when there is no decimal number.
The code conversion ends with the transfer of the number of times. Therefore, in code conversion of data including decimal numbers, code conversion of decimal numbers when the decimal number is zero is omitted, so that code conversion of data including decimal numbers can be executed at high speed. Further, the CPU that reads the converted ASCII code can obtain the code data in order from the beginning of the ASCII code simply by designating the transfer order and without being aware of the presence or absence of decimal numbers.

As described above, according to the present embodiment, it is determined whether the decimal number is zero and the data transfer order is transferred simultaneously with the reading of the ASCII code data.
Unnecessary decimal code conversion when the decimal number is zero, which has been a problem in the conventional code conversion apparatus, can be omitted, so that code conversion of binary data including decimal numbers can be executed at high speed.

(Embodiment 3) FIG. 3 shows a block diagram of a code converter according to a third embodiment of the present invention. In FIG. 3, reference numeral 1 denotes a binary-to-decimal conversion device for converting binary data including decimals to binary-decimal data and outputting decimal integer data and decimal-decimal data, and 11 denotes an output from the binary-decimal conversion device 1. Decimal point register for holding the obtained decimal point data, 2 is a decimal integer register for holding the decimal integer data output from the binary-to-decimal converter 1, and 12 is 10
An integer zero determination device for determining that the contents of the decimal integer register 2 is '0'; 7 is code information to be added when the code of the decimal data is converted from the output of the integer zero determination device 12; a completion code; The code generator 6 determines the code to be converted from the output of the integer zero judging device 12 and, when converting the numerical code, converts the code from the contents of the decimal integer register 2 and the decimal decimal register 11. When the decimal data is selected, the code information output from the code generator 7 is added to the decimal data to generate code data, and the decimal point code and the completion code are converted, the code data output from the code generator 7 is used. A data register for holding the output of the code data generator 6,
Reference numeral 5 denotes an order register that gives a code conversion instruction to the code generator 7 and the code generator 6 and holds data indicating a transfer order when the code data generated by the code data generator 6 is transferred to the data register 8. It is.

The operation will be described below with reference to FIG.
This embodiment converts binary data including decimals to ASCII code.
If the integer part is zero, the integer part
The code conversion is omitted. For example, a decimal 8 digit
ASCII of binary data including integer part and decimal part of 8 digits
In code conversion, if there is an integer, 'A₇A₆A_FiveA_FourA _Three
A_TwoA₁A₀. A_-1A_-2A_-3A_-FourA_-FiveA_-6A_-7A_-8’
When there are no numbers, '. A_-1A _-2A_-3A_-FourA_-FiveA_-6A_-7A_-8’
Is output.

[0033] The binary data including decimal binary decimal converter 1 by binary-decimal conversion result, 8-digit decimal integer data _{(D 7 D 6 D 5 D} 4 D 3 D 2 D 1 D 0 ) Is stored in the decimal integer register 2 as 8-digit decimal decimal data (D _-1 D _-2 D _-3 D _{-4).
D -5 D -6 D -7 D -8} ) will be described ASCII code conversion when held respectively in decimal fraction register 11. Here, D _n (n = 7 to -8) is BCD (4 bits), A _n (n = 7
To -8) are ASCII codes (8 bits) obtained by adding '0011' to the upper part of D _n , '. 'Is decimal point code (8bit),' * '
Is the completion code (8 bits). The decimal integer register 2 and the decimal decimal register 11 are 32 bits, and the data register 8 is 16 bits. Data can be transferred from the code generator 6 to the data register 8 by 16 bits (two ASCII codes). The order is to be transferred using a part of the address bus.

Table 4 shows a correspondence table between the contents of the order register 5 and the code data to be transferred when the ASCII code converted by the code generator 6 is transferred to the data register 8 when there is an integer and when there is no integer. It shows. In Table 4, '...' indicates that code conversion is not performed.

[0035]

[Table 4]

When the CPU designates the transfer order in the order register 5, the integer zero judging device 12, the code generating device 5, and the code data generating device 6 perform the following operations according to the contents of the order register 5, and The generated code data is generated, and the generated code data is transferred to the data register 8. () Shows the contents of the order register 5. Will be described. () Shows the contents of the order register 5. (1) The integer zero determination device 12 determines the contents of the decimal integer register 2. When there is no integer, the code generator 6 sends the decimal point code '. 'With requests to output the output from the code generator 7 "0011" to generate ASCII code A _-1 in addition to D _-1, stored in the data register 8'. ''0011'D _-1 → '. 'A _-1 → data register 8 ・ If there is an integer, the output' 0011 'from the code generator 7 is added to D _n (n = 7 to 6) to generate an ASCII code _An , and the data register 8
2 digit ASCII code A _n storage '0011'D _7' 0011'D output from ₆ → A ₇ A ₆ → data register 8 (2-4) code generator 7 "0011" is added to D _n to Are generated and stored in the data register 8. ・ If there is no integer in (1): A- _{2A- 3} , A- _{4A- 5} , A- _6A
If the integer is at a _{-7 · (1) ... A 5} A 4, A 3 A 2, A 1 A 0 '0011'D n'0011'D n-1 → A n A n-1 → data register 8 ( 5) When there is no integer in (1) The code generator 6 requests the processing of the least significant digit and outputs a completion code '*' from the code generator 7, and stores the completion code in the data register 8. To terminate the code conversion. '0011' D _-8 '*' → A _-8 '*' → Data register 8-When there is an integer in (1) The code generator 6 sends the decimal point code '. 'With requests to output the output from the code generator 7 "0011" to generate ASCII code A _-1 in addition to D _-1, stored in the data register 8'. ''0011'D _-1 → '. 'A _-1 → Data register 8 (6 to 8) Output' 0011 'from code generator 7 to D _n (n = -2
Generates ASCII code A _n is added to the ~-7), stored in the data register _{8. '0011'D n'0011'D n} -1 → A n A n-1 → data register 8 (9) the least significant Digit processing and output of completion code '*' from code generator 7 '0011' D _-8 '*' → A _-8 '*' → Data register 8 Executes code conversion by the operations of (1) to (9) ASCII code can be transferred, especially when the integer is zero
The operations (1) to (5) end. That is, in this embodiment, the code conversion is completed after nine transfers when there is an integer, and five times when there is no integer. Therefore, in code conversion of data including decimal numbers, code conversion of integers when the integer is zero is omitted, so that code conversion of data including decimal numbers can be executed at high speed. In addition, the CPU that reads the ASCII code can obtain the code data in order from the head of the ASCII code only by designating the transfer order and without being aware of the presence or absence of the integer.

As described above, according to this embodiment, it is determined whether or not an integer is zero and the data transfer order is transferred simultaneously with the reading of the ASCII code data.
Unnecessary integer code conversion when the integer is zero, which is a problem in the conventional code conversion device, can be omitted, so that code conversion of binary data including decimals can be performed at high speed.

(Embodiment 4) FIG. 4 shows a block diagram of a code converter according to a fourth embodiment of the present invention. In FIG. 4, 1 is a value obtained by converting binary data into a binary value
Binary-to-decimal conversion device that outputs binary data
Holding decimal data output from decimal conversion device 1
A zero-digit integer register, 13 is an integer zero detection device for detecting a code indicating a value “0” at the most significant digit side from the contents of the decimal integer register 2, and 14 is a decimal data from the output of the integer zero detection device 13. The most significant digit designating device for designating the most significant digit, 7 is a code generating device for generating code information to be added and a completion code at the time of code conversion of the decimal data from the output of the most significant digit designating device 14, and 6 is the most significant digit The code to be converted is determined from the output of the digit indicating device 14, and when converting the numerical code, the decimal data to be converted is selected from the contents of the decimal integer register 2 and the code information output from the code generator 7 is converted. Code data is generated by adding code data to the decimal data and outputting the code data output from the code generator 7 as it is when converting the completion code. Location, 8 code data generator 6
The data register 5 holds the output of the code generator 5, and the code generator 5 and the code generator 6 give a code conversion instruction, and the transfer order when the code data generated by the code data generator 6 is transferred to the data register 8. Is an order register that holds data indicating the following.

The operation will be described below with reference to FIG.
In this embodiment, binary data is converted to ASCII code. If there is a zero at the most significant digit of the integer part, the code conversion of the zero is omitted. For example, 10
In ASCII code conversion of 8-digit integer data, the upper 7
'00000000A ₀ ' instead of ' ₀ ' if the digit is zero
A ₀ 'is output.

As a result of the binary-to-decimal conversion of the integer binary data by the binary-to-decimal converter 1, 8-digit decimal integer data (D ₇ D ₆ D ₅ D ₄ D ₃ D ₂ D ₁ D ₀ ) is obtained. Decimal integer register 2
Next, ASCII code conversion in the case of being held will be described. Here, D _n (n = 7 to 0) is BCD (4 bits), A _n (n =
7-0) the ASCII code obtained by adding "0011" to the upper _{D n (8bit), '*} ' is a completion code (8bit). The decimal integer register 2 has 32 bits and the data register 8 has 16 bits. Data can be transferred from the code generator 6 to the data register 8 by 16 bits (two ASCII codes) at a time. It is assumed that the transfer is carried out using a copy unit.

Table 5 shows the types of integer data (contents of the decimal integer register 2) including 0 at the most significant digit side, and the contents of the order register 5 and the conversion code data corresponding to each type. It is. In Table 5, '
... 'indicates that no code conversion is performed.

[0042]

[Table 5]

The integer zero detector 13 detects the most significant digit 0 of the contents of the decimal integer register 2 and the most significant digit indicator 14 indicates the type (0 to 8) of (Table 5). According to the instruction of the most significant digit indicating device 14, (Table 5)
Is converted into code data according to the contents of the order register 5 as shown in FIG. For example, in the case of Type 7, when the order register is “1”, D ₀ is selected to generate A ₀ , and the code generator 7 and the code generator 6 that have received the instruction of the most significant digit indicating device 14 transmit the completion code. Add '*' and output. ASCII code data is output in the same manner for other types.

By such an operation, code conversion can be executed and an ASCII code can be output. In particular, when the most significant digit of the integer is zero or consecutive zeros, the code conversion of zero is omitted, so that the integer data is omitted. Can be executed at high speed. Also, the CPU that reads the ASCII code can obtain the code data in order from the head of the ASCII code only by designating the transfer order and without considering the “0” code data on the most significant digit side of the integer.

As described above, according to the present embodiment, consecutive "0" codes on the most significant digit side of the integer data are detected, and the data transfer order is transferred simultaneously with the reading of the ASCII code data. Unnecessary integer code conversion when the most significant digit is zero, which is a problem in the conventional code conversion device, can be omitted, so that code conversion of binary integer data can be performed at high speed. it can.

(Embodiment 5) FIG. 5 shows a configuration diagram of a code conversion apparatus according to a fifth embodiment of the present invention. In FIG. 5, reference numeral 1 denotes a binary-decimal conversion device for converting decimal binary data into binary-decimal data and outputting decimal data;
Decimal decimal register for holding decimal data output from decimal-to-decimal conversion device 1, 15 is decimal decimal register 1
Decimal zero detecting device for detecting a code indicating a continuous numerical value '0' from the least significant digit side from the content of 1. Numeral 16 designates the least significant digit for indicating the least significant digit of decimal data from the output of the decimal zero detecting device 15 A code generator 7 for generating code information to be added to the decimal data code from the output of the least significant digit indicating device 16 and a decimal point code and a completion code from the output of the least significant digit indicating device 16; When the code to be converted is determined and the numerical code is converted, the decimal data to be converted is selected from the contents of the decimal decimal register 11 and the code information output from the code generator 7 is added to the decimal data. To generate code data,
When converting the decimal point code and the completion code, a code data generator for directly outputting the code data output from the code generator 7, 8 is a data register for holding the output of the code data generator 6, and 5 is a code generator 7.
And an instruction register for giving a code conversion instruction to the code generation device 6 and holding data indicating a transfer order when the code data generated by the code data generation device 6 is transferred to the data register 8.

The operation will be described below with reference to FIG.
In the present embodiment, binary data is converted to ASCII code. If there is a zero at the least significant digit of the decimal part, code conversion of the least significant digit of the decimal part is omitted. For example, in ASCII code conversion of binary data including a decimal part of eight decimal digits, when the least significant seven digits are zero.
A _- 100000000 ', not'. A- ₁ 'is output.

As a result of binary-decimal conversion of binary data including decimals by the binary-decimal conversion device 1, 8-digit decimal decimal data (D _-1 D _-2 D _-3 D _-4 D _-5 D) _-6 D _-7 D _-8 ) will be described in the case of ASCII code conversion when it is held in the decimal fraction register 2. Here, D _n (n = -1 to -8) is BC
_{D (4bit), A n (} n = -1~-8) is the ASCII code obtained by adding "0011" to the upper _{D n (8bit), '*} ' is a completion code (8bit). Decimal decimal register 11 is 32
The bit and data register 8 has 16 bits, and data can be transferred by 16 bits (two ASCII codes), and the transfer order is to be transferred using a part of the address bus.

Table 6 shows the types of decimal data (contents of the decimal decimal register 11) including 0 on the least significant digit side, and Table 7 shows the contents of the order register 5 and the conversion code corresponding to each type. Show data. In Table 7, '
... 'indicates that no code conversion is performed.

[0050]

[Table 6]

[0051]

[Table 7]

The decimal zero detecting device 15 detects 0 at the least significant digit side of the contents of the decimal decimal register 11, and the least significant digit indicating device 16 indicates the type of (Table 6).
According to the instruction of the least significant digit indicating device 16, the data is converted into code data according to the contents of the order register 5 as shown in (Table 7). For example, in the case of Type 7, when the order register is "1", the decimal point code ". ', A- ₁ generated by selecting D- ₁ from the decimal fraction register 11 is added and output. Code generator 7 receiving an instruction from least significant digit indicating device 16
And the code generator 6 outputs a completion code '*' when the order register is '2'. ASCII code data is output in the same manner for other types.

With such an operation, the code conversion can be executed to transfer the ASCII code. In particular, in the code conversion of decimal data, when the least significant digit of the decimal is zero or consecutive zeros, the code conversion of the decimal is performed. , The code conversion of decimal data can be executed at high speed. CPU for reading converted ASCII code
In this method, code data can be obtained in order by omitting the code of 0 at the least significant digit side without specifying the zero data at the least significant digit side of the decimal number only by designating the transfer order.

As described above, according to this embodiment, it is possible to detect the least significant "0" or continuous "0" of decimal data and transfer the data simultaneously with the reading of the ASCII code data. Therefore, unnecessary decimal code conversion when the decimal point on the least significant digit side which is a problem in the conventional code conversion apparatus is zero can be omitted, so that code conversion of binary decimal data is executed at high speed. be able to.

In the first to fifth embodiments, since a part of the address is used for the transfer order, the data may be transferred while incrementing the address after the address is specified at the time of the first transfer. The transfer order can be generated easily. For example, address lower 4
If the bits indicate the transfer order, the lower 4 bits of the address at the time of the first transfer should be set to '0001', and this address should be incremented from the next transfer.

In each of the above embodiments, the ASCII code has been described. However, the present invention can be similarly realized by changing the output code of the code generator 6 to EBCDIC, JIS code and the like. In this embodiment, the 32-bit decimal integer register and the 16-bit data register have been described. However, other data widths can be similarly obtained by changing the contents of (Table 2) to (Table 7). realizable.

[0057]

As described above, according to the present invention, regardless of the contents of the data converted into the BCD, the CPU specifies the addresses of all the data and converts all the data into ASCII codes. This is to improve the conventional configuration which has been converted into data, etc., and by determining meaningless data in the data converted into BCD, and by enabling the user to arbitrarily select data to be converted, the following is achieved. This is to speed up each code conversion.

First, by determining the sign of binary data and generating and outputting a negative sign code only when the sign is negative, an unnecessary sign code when the sign is positive is obtained. Since the conversion can be omitted, the code conversion of the binary data including the code can be executed at high speed.

Second, unnecessary decimal code conversion when the decimal number is zero can be omitted by determining whether or not all the decimal numbers are zero. Therefore, code conversion of binary data including a decimal number can be omitted. Can be executed at high speed.

Third, by determining whether or not an integer is zero, unnecessary integer code conversion when the integer is zero can be omitted. Can be executed at high speed.

Fourth, by detecting consecutive '0' codes on the most significant digit side of the integer data, unnecessary integer code conversion when the integer on the most significant digit side is zero can be omitted. Therefore, code conversion of binary integer data can be executed at high speed.

Fifth, by detecting consecutive "0" data from the least significant digit of the decimal data, unnecessary decimal code conversion when the decimal digit at the least significant digit is zero can be omitted. The code conversion of binary decimal data can be executed at high speed.

As described above, according to the present invention, a code conversion for converting an internal data format used in a numerical operation, which is frequently used in a system including a user interface and greatly affects performance, into an ASCII code or the like can be executed at high speed. Its practical effect is extremely large.

[Brief description of the drawings]

FIG. 1 is a configuration diagram of a code conversion device according to a first embodiment of the present invention.

FIG. 2 is a configuration diagram of a code conversion device according to a second embodiment of the present invention.

FIG. 3 is a configuration diagram of a code conversion device according to a third embodiment of the present invention.

FIG. 4 is a configuration diagram of a code conversion device according to a fourth embodiment of the present invention.

FIG. 5 is a configuration diagram of a code conversion device according to a fifth embodiment of the present invention.

FIG. 6 is a configuration diagram of a conventional code conversion device.

[Explanation of symbols]

 Reference Signs List 1 binary-decimal conversion device 2 decimal integer register 3 code flag 4 code determination device 5 sequence register 6 code data generation device 7 code generation device 8 data register 9 decimal zero determination device 11 decimal decimal register 12 integer zero determination device 13 Integer zero detector 14 Most significant digit indicator 15 Decimal zero detector 16 Least significant digit indicator 20 Address register

──────────────────────────────────────────────────続 き Continued on the front page (58) Field surveyed (Int.Cl. ⁷ , DB name) G06F 5/00 G06F 7/38 H03M 7/02 H03M 7/12

Claims (5)

(57) [Claims] 1. A binary-to-decimal conversion device for converting binary data with a positive / negative sign into binary-decimal data and outputting a positive / negative sign and a plurality of digits of decimal data, and an output from the binary-decimal converter. A decimal register for storing the obtained plural-digit decimal data, a code flag for storing the code output from the binary-decimal conversion device, and a code determination device for receiving the code flag and determining whether the code flag is positive or negative. A code code is generated only when the code determination device determines a negative code, and code information to be added to the decimal data of each digit when the decimal data is converted to other code data is generated. When the code determination device indicates a positive code, the code information output from the code generation device is determined in advance with respect to the decimal data input from the decimal register. Added by the digits of the generated code data to sequentially output,
When the sign determination device indicates a negative sign, the negative sign code output from the code generation device and the code information output from the code generation device are converted into decimal data input from a decimal register. A code data generation device that sequentially outputs code data generated by adding a predetermined number of digits to the code data, a data register that holds an output of the code data generation device, and a code code for the code generation device. Or, while instructing generation of code information, instructing the code data generation device to generate code data and transferring data to the data register, and indicating a transfer order from the code data generation device to the data register. A code conversion device comprising: an order register for holding data. 2. A binary-decimal conversion device for converting binary data including a decimal to binary-decimal data and outputting a plurality of decimal integer data and decimal decimal data, respectively, the binary-decimal conversion. The contents of the decimal integer register holding the decimal integer data output from the device, the decimal decimal register holding the decimal decimal data output from the binary-decimal conversion device, and the content of the decimal decimal register A decimal zero determination device for determining whether it is '0', code information to be added at the time of code conversion of the decimal integer data and decimal decimal data, and a decimal point code according to an output of the decimal zero determination device. And a code generator that generates the code information output from the code generator when the decimal zero determination device indicates that there is no decimal.
When the code data generated by adding a predetermined number of digits to the decimal integer data output from the decimal integer register is sequentially output and the decimal zero determination device indicates that there is a decimal number, Code data generated by adding code information output from the code generator to a predetermined number of digits to decimal integer data input from a decimal integer register, and code data output from the code generator. The decimal point code and code data generated by adding code information output from the code generator to the decimal data input from the decimal decimal register by a predetermined number of digits are sequentially output. A data register for holding an output of the code data generator; and code information for the code generator. Indicates generation of a decimal point code, indicates generation of code data to the code data generation device and data transfer to the data register, and indicates a transfer order from the code data generation device to the data register. A code conversion device comprising: an order register for holding data. 3. A binary-decimal conversion device for converting binary data including a decimal number into binary-decimal data and outputting a plurality of decimal integer data and decimal decimal data, respectively, and the binary-decimal conversion device. A decimal integer register holding the decimal integer data output from the binary integer conversion device; a decimal decimal register holding the decimal decimal data output from the binary-to-decimal conversion device; An integer zero judging device for judging that it is 0 ', and code information to be added at the time of code conversion between the decimal integer data and decimal decimal data and a decimal point code in accordance with an output of the integer zero judging device. And the decimal point code output from the code generator, if the integer zero determination device indicates that there is no integer, and the code generator Code information generated by adding code information to the decimal decimal data output from the decimal decimal register by a predetermined number of digits, and sequentially outputting the generated code data. In the case of indicating, the code information output from the code generator, code data generated by adding a predetermined number of digits to the decimal integer data input from the decimal integer register, the code data, The decimal point code output from the code generator and the code information output from the code generator are generated by adding a predetermined number of digits to decimal decimal data input from the decimal decimal register. A code data generation device that sequentially outputs code data, a data register that holds an output of the code data generation device, To generate code information or a decimal point code, instruct the code data generator to generate code data and transfer data to the data register, and transfer the code data from the code data generator to the data register. A code conversion device comprising: an order register for holding data indicating an order. 4. A binary-decimal conversion device for converting binary data to binary-decimal and outputting a plurality of digits of decimal integer data, and converting the decimal integer data output from the binary-decimal conversion device to A decimal integer register to be held; an integer zero detection device for detecting data indicating “0” of the most significant digit or “0” continuous from the most significant digit from the contents of the decimal integer register; and the integer zero detection device. From the output of the most significant digit of the decimal integer data, a most significant digit indicating device for designating a digit having data other than '0', and, according to the output of the most significant digit indicating device, A code generator for generating code information to be added at the time of code conversion; and, based on the output of the most significant digit indicating device, the most significant digit '0' with respect to the decimal integer data input from the decimal integer register. 'Or most significant digit A code for determining data to be converted other than data indicating continuous '0', adding code information output from the code generator to the data by a predetermined number of digits, and sequentially outputting code data generated. A data register that holds an output of the code data generation device; a data register that instructs the code generation device to generate code information; and generates code data and generates the code data to the code data generation device. An order register for instructing data transfer to a register and holding data indicating an order of transfer from the code data generating device to the data register. 5. A binary-to-decimal conversion device for converting decimal binary data into binary-decimal data and outputting a plurality of decimal data, and a multi-digit decimal value output from the binary-decimal conversion device. A decimal decimal register for holding decimal decimal data, a decimal zero detection device for detecting data indicating '0' of the least significant digit or '0' continuous from the contents of the decimal decimal register to the least significant digit, A least significant digit indicating device that designates a digit having data other than '0' from the least significant digit of decimal decimal data from the output of the decimal zero detecting device; and a decimal point code or A code generator for generating code information to be added at the time of code conversion of the decimal decimal data; a decimal point code output from the code generator; The data to be converted other than the data indicating the least significant digit '0' or continuous '0' up to the least significant digit is determined for the decimal decimal data inputted from the code generator, A code data generation device that sequentially outputs code data generated by adding the output code information by a predetermined number of digits, a data register that holds an output of the code data generation device, and a code register. And instruct the code data generation device to generate code data and transfer data to the data register, and change the transfer order from the code data generation device to the data register. And a sequence register for holding the indicated data.