JP3090129B2 - Multiplexer - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

The present invention relates to relates to a multi <br/> duplex device you multiplexes input packets represented by the digital signal from the plurality of ports.

[0002]

2. Description of the Related Art With the improvement of digital technology in recent years, it has been studied to apply digital technology to television broadcasting and the like to provide more programs. In order to provide more programs with high picture quality and high sound quality using a limited transmission band, high-efficiency compression and multiplexing techniques are used. As a representative standard, MPEG2 (Moving Picture image c
There is an oding Expert Group phase 2) method.

[0003] In a digital broadcasting system for broadcasting program data compressed and encoded by the MPEG2 system using satellite waves, terrestrial waves or CATV, the encoded program data is packetized for each predetermined block, and the result is obtained. It is designed to transmit a packet sequence. This packet sequence is called a transport stream, and the packets forming the transport stream are called TS packets. Only one program can be transmitted from a TS packet obtained by encoding one program. In order to provide a plurality of programs at the same time, TS packets obtained from each program are combined into one transport stream by time-division multiplexing and transmitted.

FIG. 3 schematically illustrates a digital broadcasting system. Reference numerals 11 to 15 denote a microphone, a television camera, a movie film, a video tape, and a video disc, respectively, which are examples of materials that are the contents of each broadcast program. The video signal and the audio signal obtained from these materials are equal in number to the number of encoders 16
, And are converted into TS packets by compression encoding. Thereafter, these TS packets are transmitted to the multiplexer 2
The signal is time-division multiplexed by 0, converted by a modulator 21 into a transmission wave of a predetermined frequency band, and transmitted via an antenna 22.

[0005] Here, the structure of a TS packet will be described.
Packets and transport streams obtained by compression encoding and multiplexing according to the MPEG2 system are
It is defined in SO / IEC13818-1. FIG. 4 shows the structure of the TS packet. The TS packet has a fixed length of 188 bytes. The first 4 bytes form a header portion, and the remaining 184 bytes form a data portion. The data section stores video (video) data and audio (audio) data to be transmitted. The header portion stores a synchronization byte, a packet identifier (hereinafter, referred to as a PID), or various other packet control data.

The synchronization byte is data indicating the beginning of the packet, and the PID is data indicating the content of information stored in the packet by a value (hereinafter, PID value).
The PID is the desired T from the transport stream.
Used to select S packets. For example, if multiple programs are multiplexed into one transport stream,
A different PID value is assigned to each packet (video packet) recording video data of each program and each packet (audio packet) recording audio data. Thus, a video packet and an audio packet constituting a desired program can be respectively selected.

[0007] The TS packets will be described by classifying them into the following four types according to their contents. (1) ES (Elementary Stream) The flow of a video packet including video data and an audio packet including audio data is called ES. Video and audio are continuous in time. In order to reproduce these in synchronization with the transmitting side, a PCR (Program Clock Refere
nce. Time reference information called a program time reference value is also transmitted and referred to on the receiving side. A packet including a PCR is called a PCR packet, which is also included in the ES.

(2) PSI (Program Specific Informa)
tion) PSI is additional information related to transmission control. Main PSI
Are PAT (Program Association Table), PMT (Pr
gram Map Table), CAT (Conditional Access Tabl)
e) NIT (Network Information Table). These pieces of additional information are described in the data portion of the TS packet. The correspondence between TS packets and PID values is shown in a table (correspondence table). PAT is the most basic table. A packet including a PAT is called a PAT packet (hereinafter, similarly referred to as a PMT packet, a CAT packet, and the like). The PID value of the PAT packet is always fixed at 0. The PID values other than the PAT packet are not fixed and can be read directly by reading the PAT, or
Reading the PAT followed by another table is indicated indirectly. The PMT is a table indicating PID values of video packets, audio packets, and PCR packets constituting a program. PID where PMT is stored
The values are shown in PAT.

Therefore, to select a certain program, first select P
The PAT packet is read using the ID value of 0, and then the PID of the PMT packet is obtained from the contents of the PAT.
Value, read the PMT, and then obtain the PID values of the video packet, audio packet, and PCR packet from the contents of the PMT, and then obtain the video packet of the program,
Obtain and decode audio packets and PCR packets,
Follow the steps. The CAT is a table for allowing only authorized users to decode and reproduce moving image data and audio data scrambled for restricting decoding and reproduction. The key information for descrambling is E
The customer information is included in a CM (Entitlement Control Message) and the customer information is included in an EMM (Entitlement Management Message). The CAT is a table indicating PID values of ECM packets and EMM packets. The NIT is a table used to transmit information on physical conditions such as the frequency of the transmission path and the modulation method.

(3) SI (Service Information) SI is additional information related to program provision. SI includes a BAT (Bouque) related to a bouquet (a set of organization channels).
t Association Table), SDT (Service Description Table) indicating the organization channel name and broadcaster, etc., and information EIT (Event
Information Table), RST (Running Status Table) indicating the current program progress, T indicating the current date and time
DT (Time Date Table) and the like.

(4) Null Packet A null packet is a packet of blank data that has no particular meaning as data, and the PID value indicates that it is a null packet. In order to maintain a continuous transmission operation, a null packet is transmitted when there is no data to be transmitted.

Now, the synchronization between the transmitting side and the receiving side by PCR will be described in more detail. The PCR is recorded in an adaptation field provided in the data portion of the TS packet. Whether or not the adaptation field is provided in the data section is indicated by an adaptation field control bit provided in the header section. The PCR is composed of 42 bits in total,
Lower 9 bits program clock reference
Extension (PCR-E) and program clock reference base (PCR-
B). PCR-E is a value obtained by counting a 27 MHz clock from 0 to 299.
When E counts from 299 to 0, PCR-B is 1
Increase. In this way, the PCR expresses a range of 24 hours a day by a value obtained by counting a 27 MHz clock.

A method of using the PCR value will be schematically described with reference to FIG. In the transmission device 51, multiplexed video packets, audio packets, and PCR packets are generated. Then, the PCR value obtained by counting the 27 MHz clock 52 by the PCR counter 53 is set in the PCR packet by the PCR value rewriting unit 54 and then transmitted. This allows the PCR value to correspond to the transmission time. In the receiving device 61, the PCR packet included in the multiplexed packet is
Detect at 2. Then, by the clock synchronization circuit 63,
The PCR value in the PCR packet is compared with the PCR value counted by the own clock, and the transmission frequency of the clock is controlled so that the difference between them is reduced. With this clock synchronization means, the receiving device can obtain a clock and a PCR value synchronized with the transmitting device, and can reproduce video and audio at the timing intended by the transmitting device.

The clock synchronization circuit 63 will be described in detail.
First, a clock of approximately 27 MHz is generated by a voltage-controlled crystal oscillator (VCXO) 64. By counting this clock with the PCR counter 65, the PCR
Generate a value. When the PCR packet is received, the PCR value included in the packet is extracted by the PCR packet detecting unit 62, and the PCR value of the PCR counter 65 is calculated by the comparator 66.
Find the difference by comparing to the value. According to the MPEG2 specification, the timing at which the PCR packet arrives has an interval of 0.1 second or less. Therefore, the difference obtained by the comparator 66 is held by the latch 67.

The value of this difference is converted to an analog signal by a DA converter (digital-analog converter), passed through a low-pass filter (low-pass filter) 69, and then converted to a VCXO64.
Add to The P value of the PCR counter 65
VCXO64 if smaller than PCR value of CR packet
And if the PCR value of the PCR counter 65 is larger than the PCR value of the received PCR packet, feedback is applied so as to decrease the transmission frequency of the VCXO 64. With this feedback, VCXO6
The clock obtained from 4 can be synchronized with the clock of the transmitting device. Immediately after starting the receiving device,
Since the PCR counter 65 is indefinite, the PCR value of the first PCR packet obtained thereafter is written to the PCR counter 65.

Next, the internal configuration of the multiplexer 20 shown in FIG. 3 will be described. Multiplexing of packets is realized by sequentially extracting and arriving packets arriving at a plurality of ports. For this purpose, portions denoted by reference numerals 31 to 38 are used. A TS packet arriving via an input port is temporarily stored in a FIFO (First In First Ou).
t) Stored in buffers (temporary storage means that is first taken out from the first put in) 31-34. Also, P
Since each information of SI and SI corresponds to a transport stream combined by multiplexing, PS
Generated by the I / SI generator 30. The packet generated by the PSI / SI generator 30 is also temporarily stored in the FIFO buffer 35. From each FIFO buffer, a packet presence flag indicating the presence or absence of a packet is provided to the control circuit 37.

The control circuit 37 controls the selector 38 to sequentially take out the packets from each FIFO. Specifically, FIFO # 1, FIFO # 2,..., FIFO #
N, FIFO # 0, FIFO # 1 and so on are checked cyclically for the presence or absence of a packet. If there is a packet, the packet is taken out from the FIFO buffer. If there is no packet, the packet is not extracted from the FIFO buffer, and the process proceeds to the next FIFO buffer check. In this way, time division multiplexing is performed.

If there is no packet in any of the FIFO buffers, the control circuit 37 controls the selector 38 to extract a null packet from the null packet generation circuit 36. As a result, even if a packet from the input port or the PSI / SI generator is temporarily interrupted, a null packet is filled in the meantime, so that the output transport stream is not interrupted. On the other hand, if multiplexing is performed including null packets included in an input transport stream, a transmission capacity will be wastefully used up to the null packets. So, FIFO
Null packet deletion units 23-2 provided before the buffer
At 6, the null packet is deleted.

FIG. 6 illustrates the manner in which packets are time-division multiplexed. A packet is appropriately input to each FIFO buffer. The control circuit is controlled so that the FIFO buffer is inspected in order and taken out by the selector. In FIG. 6, packets P ₁₁ , P ₂₁ , P ₃₁ , and P _N1 arrive at the FIFO buffer at substantially the same time, and are thus sequentially extracted. On the other hand, P ₁₂ , P ₂₂ , P ₃₂ , and P _N2 are P ₂₂ and P _N2
Arrived at the FIFO buffer slightly later, so P ₁₂ ,
P ₃₂ , P ₂₂ , and P _N2 are extracted in this order. Like this
The packets are output in the order of arrival, but are kept waiting in the FIFO buffer while other packets are being output.

As can be understood from the above description of the multiplexing process, a plurality of packets arriving at a plurality of input ports at the same time must be sequentially output from the output ports in time order. In other words, the packet transmission interval must be slightly different from the input interval. On the other hand, as exemplified in FIG. 5, the PCR packet is used for clock synchronization in the receiving device. for that reason,
In the multiplexing device, it is essential to rewrite the PCR value according to the packet transmission timing. For this purpose, the portions denoted by reference numerals 41 to 48 shown in FIG. 3 are used. Rewriting of the PCR value is described in JP-A-10-41911.
And US Pat. No. 5,566,174, for example, as follows.

First, a clock signal obtained from the local clock 41 is counted by a PCR counter 42 to create time information inside the multiplexer. here,
A 27 MHz clock is used as the local clock 41, and the counting method when counting by the PCR counter 42 is a PC
It is convenient to unify the format of the PCR value in the R packet. The detectors 43 to 46 detect the arrival of the PCR packet and detect the value (CLK
_TAGGED ) is added as information accompanying the PCR packet. The time point of the multiplexed PCR packet is detected by the detector 47.
And the value of the PCR counter 42 at that time (CL
K _CURRENT ) is required. The PCR value (PCR _OLD ) originally added to the PCR packet is corrected (PCR _OLD ) (PCR
_To rewrite to _NEW ), calculate the following equation. PCR _NEW = PCR _OLD + (CLK _CURRENT -CLK
_TAGGED ) -DLY Here, DLY is a constant corresponding to an average delay time inside the multiplexing apparatus, and is set to make PCR _NEW close to PCR _OLD . The PCR correction circuit 48 is a PC
Delete the CLK _TAGGED attached to the R packet, and
_A process of replacing _OLD with PCR _NEW (PCR re-stamping process) is performed.

[0022]

The flow rate of the remaining packets excluding the null packets arriving at each input port of the multiplexing device is almost constant, and the CBR (Constant Bit Rate) is almost constant.
And a variable VBR (Variable Bit Rate). The multiplexing device according to the prior art uses a FIFO #
1, FIFO # 2,..., FIFO # N, FIFO # 0,
The presence / absence of a packet is checked cyclically, such as FIFO # 1. Therefore, when the flow rate to each port becomes equal to or less than a certain value, the operation is normal without overflowing the FIFO buffer.

However, in the case of VBR, the flow rate to a certain input port may temporarily increase. Nevertheless, in the prior art, since each FIFO buffer is checked cyclically, it is impossible to intensively read only the input port. Therefore, there is an unreasonable reason that the FIFO buffer of the input port overflows despite the fact that the entire FIFO buffer has a free space. In the prior art, the PCR value was rewritten after multiplexing, but the number of PCR packets did not increase. On the other hand, in order for the receiving apparatus to maintain synchronization with respect to the PCR value, it is troublesome if the intervals between the PCR packets are too large. Therefore, in the related art, there is a restriction that the time point of a packet obtained after multiplexing cannot be significantly shifted.

The present invention is to provide a multiplexing apparatus in consideration of these problems, and the purpose of increasing the tolerance of the deviation between sending packets.

[0025]

[Means for Solving the Problems] The present inventionEyesAgainst
Claim1Multiplexing equipment is capable of transmitting packets represented by digital signals.
Input from multiple ports and output after multiplexing
In the multiplexing device, the synchronization of the receiving device is controlled for the packet.
Time reference packet containing the reference information
Packet storage means for storing packets at each input port
And whether there is a packet to be output to the packet storage means
Packet presence / absence indicating means for indicating
Time reference packet generation means for generating a reference packet,
Which packet storage means or time reference packet generation means
Selector control means for instructing whether to extract a packet from
Selected packet storage means or time reference packet generation
Selector means for extracting packets from the means and after multiplexing
Time reference packet that measures the time reference packet interval
Confirmation means, and instructs the packet presence / absence instruction means
The selector control means controls the selector means using
The packet presence / absence indication means
Packet storage means or when it is indicated that there is a packet
Packet from the reference packet generator
Means for checking time reference packet when multiplexing by
The time reference packet interval after multiplexing
If the time reference packet interval is longer than a predetermined time,
In this case, the time reference packet generation means
Specially to generate and multiplex to include
Sign.

With this configuration, even if the time lag of the packet fluctuates due to the amount of time the packet stays in the packet storage means, the time reference packet interval does not become too wide. That is, it is possible to increase the permissible amount of time shift of the packet.

[0027] For purposes of the present invention, the multiplexing apparatus according to claim 2, in the multiplexing device according to claim 1,
Further, the input port has time reference packet deleting means for deleting the time reference packet, and the time reference packet input to the input port is deleted.

With such a configuration, when the time reference packet is input, it is once deleted, then newly generated and multiplexed to the output. That is, the time reference packets do not have too long intervals regardless of the time during which the packets remain in the packet storage means. That is, it is possible to increase the permissible amount of the packet time lag. Moreover, never transmission capacity is wasted costs and because nor more than a predetermined number of time reference packet.

The multiplexer of claim 3, claim 1
Or the multiplexing device according to 2 , wherein the packet to be multiplexed includes audio data or video data, and a fixed upper limit is set for the amount of packets that can be stored in the packet storage means. And packets exceeding this are discarded.

The audio data and the video data are originally temporally continuous data. While this is transmitted in the form of packets, it is reproduced continuously in time by the receiving device. Therefore, it is not desirable to add a very large delay when multiplexing the packets. If there is a packet that cannot be sent by the, it is desirable to discard it.

[0031] In the multiplexing device according to the third aspect ,
Since a certain upper limit is set for the amount of packets that can be stored in the packet storage means, the delay when multiplexing packets is kept within a certain range, and packets that do not fall within this delay must be discarded. become.

[0032]

FIG. 1 shows a multiplexing apparatus according to a first embodiment of the present invention.
This multiplexing device multiplexes transport streams given from N input ports (N is an integer of 2 or more) and outputs the multiplexed stream from one output port. The illustration from the input port # 4 to the input port # N-1 is omitted.

[0033] 101 to 1 provided for each input port
04 is a FIFO buffer for storing packets. P
SI and each information of SI are created so as to be compatible with the multiplexed transport stream. Specifically, PSI
/ SI generator 100 creates PSI and SI packets and multiplexes them via FIFO buffer 105. 1
Reference numerals 06 to 109 denote PCR packet generation units that generate PCR packets. From the FIFO buffers 101 to 105 and the PCR packet generators 106 to 109, the control circuit 111 outputs a signal indicating the presence / absence of a packet (packet presence flag) and a signal indicating the higher output priority (output priority flag). Has been given to. The phrase "the priority of the output of a certain FIFO buffer is high" means that, even if the extraction of the packet from another is postponed, the extraction of the packet from the FIFO buffer should be performed first.

The FIFO buffer 105 and the PCR
Regarding the packet generation units 106 to 109, when there is a packet to be extracted, the output priority is always high, so that the packet presence flag and the output priority flag can be the same signal. The control circuit 111 instructs the selector 112 which packet should be taken out based on these signals. The selector 112 extracts a packet from the FIFO buffers 101 to 105 or the PCR packet generators 105 to 109 based on an instruction from the control circuit 111. If there is no packet to be taken out, the control circuit 111 controls the selector 112 so as to take out a null packet from the null packet generator 110.

The present embodiment shows a case where additional PCR packet is performed. When adding a PCR packet, it is necessary to add a PCR value to the added PCR packet. Therefore, the clock synchronization circuit 121 which reproduces the PCR clock in the multiplexing device and creates the PCR value
To 124 are provided. The clock synchronization circuit can be implemented by, for example, a clock synchronization circuit 63 including 64 to 68 in FIG. For convenience of explanation, the clock synchronization circuits 121 to 121
The PCR value generated in step 124 is hereinafter referred to as LMC (Local
Master Clock) value. LMC values include P
The value of the CR counter 65 is used.

The LMC value output from the clock synchronization circuits 121 to 124 is supplied to the PCR rewriting unit 113 via the selector 112. The PCR packet detectors 125 to 128 detect a PCR packet included in the input TS packet. The PID value of the PCR packet to be detected is determined by the PCR packet
It is set to 5-128. These are equivalent to the PCR packet detection unit 62 in FIG. 5, and all the packets are sent to the unnecessary packet deletion units 131 to 134 at the next stage.

The unnecessary packet deleting units 131 to 134 delete unnecessary packets included in the input transport stream. At least the null packet needs to be deleted. Which other packets to delete depends on the situation. For example, the PSI and SI packets included in the multiplexed transport stream are
If it is generated by the SI generator 100, the PSI and SI packets included in the input transport stream are deleted. On the other hand, PSI or SI packets included in the input transport stream that are to be directly included in the multiplexed transport stream do not need to be deleted. When extracting only one specific program from a transport stream including a plurality of programs, packets of other programs are deleted.

The PID value of the packets to be deleted, is set to unnecessary packet deletion unit 131 to 134 when the device is activated. When multiplexing the PCR packets including those included in the input transport stream, there is no need to delete them. Conversely, after deleting all the PCR packets included in the input transport stream, the PCR packet generators 106 to 10
When the PCR packet is created in step 9, the unnecessary packet deleting units 131 to 134 delete the PCR packet.

The PID rewriting units 135 to 138 rewrite the PID value of the packet. If duplication occurs after multiplexing with the input PID value as it is, it is essential to rewrite the PID value. In addition, P
In some cases, the user may want to reset the ID value. PI before and after rewriting
The correspondence of the D value is determined by the PID rewriting unit 135-
138 is set.

For the multiplexed PCR packet, P
The CR packet interval check unit 114 measures the interval. The PID value of the PCR packet differs for each program. The PCR packet interval check unit 114
The interval of each PCR packet of the ID value is measured. If a predetermined time or more has passed since the last output of the PCR packet, this is indicated by the PCR packet generation units 106-1.
Tell 09. For example, a PC associated with input port # 2
If a predetermined time has elapsed after the output of the R packet, P
The CR packet interval check unit 114 instructs the PCR packet generation unit 107 to generate a PCR packet. The predetermined time may be set to a value (for example, 0.09 seconds) obtained by subtracting a margin such as a time required for multiplexing from an allowable time interval (0.1 seconds) of the PCR packet.

The PCR packet generators 106 to 109
A PCR packet is generated, and the control circuit 111 is notified that there is a PCR packet and that the priority of output is high. As a result, the selector 111 extracts the PCR packet from the PCR packet generators 106 to 109. Thus, the addition of the PCR packet is performed.

The selector 112 selects the packet and the LMC value as one set, and transmits it to the PCR rewriting unit 113.
That is, if the selected packet is a PCR packet,
The corresponding LMC value is also transmitted to the PCR rewriting unit 113. The selector 112 controls whether the FIFO buffer 105 from the PSI / SI generator 110 or the null packet generator 110
Is selected, the L transmitted to the PCR rewriting unit 113 is
Since the MC value is meaningless, for example, 0 is transmitted.

The operation of the control circuit 111 controlling the selector 112 to take out a packet is performed, for example, as follows. The control circuit 111 includes FIFO buffers 101 to 10
5 and the packet presence flags and output priority flags of the PCR packet generators 106 to 109 are inspected cyclically. if,
F when both the packet existence flag and the output priority flag are true
If there is an IFO buffer or a PCR packet generator, the selector 107 is controlled so as to extract the packet. For example, FIFO # 1, FIFO # 3, FIFO #
FIFO # 1, FIFO # 3, FIFO # N, FI while the N packet presence flag and the output priority flag are both true.
Packets are taken out cyclically as in FO # 1. At this time, the packet is not extracted from the FIFO buffer in which the output priority flag is false and the packet presence flag is true. If there is no true output priority flag, and
If there is a true packet presence flag, the selector 107 is controlled so as to take out the packet. For example, FI
FIFO # 2, FIFO # 3, and FI # N are true only for the packet presence flags of FIFO # 2, FIFO # 3, and FIFO # N.
Packets are extracted cyclically, such as FO # N and FIFO # 2. If there is no true packet presence flag, a null packet is extracted from the null packet generator 110.

As the FIFO buffer, a FIFO memory designed specifically for the FIFO can be used. Also,
The present invention can also be implemented by providing a general-purpose memory with a means for controlling a read / write address. In a multiplexing device for transmitting audio data and video data, there is a case where a delay time during multiplexing must be kept below a certain value. To this end, the capacity of the FIFO buffer is made equal to the capacity corresponding to the delay time allowed for the packet, and when the input packet exceeds the capacity of the FIFO buffer, a part of the packet may be discarded. . To discard some packets, for example, of the packets remaining in the FIFO buffer, the packets are discarded in order from the oldest packet. Alternatively, the newly arrived packet may be discarded.

The output priority flag is set to true when the amount of packets stored in the FIFO buffer is large. For example, it is true if packets are stored up to 80% of the capacity of the FIFO buffer. Alternatively, the priority of output may be finely set in accordance with the amount of packets instead of true or false binary. If the value is in accordance with the amount of packets stored in the FIFO buffer, the output priority flag can be implemented. For example, the flow rate of packets input to the FIFO buffer per unit time is measured, and the value is set to a predetermined value. In this case, an embodiment in which the output priority flag is set to true is of course possible.

As can be seen from the above description, claim 1
The packet storage means in the above 3 is implemented by a FIFO buffer. Packet presence or absence indication hand stage, each FIFO
<br/> the packet chromatic flag given to the control circuit from the buffer thus are subjected real. The selector means is a selector 11
It is needless to say that the selector control means is implemented by the control circuit 111.

The time reference packet is implemented by a PCR packet.
The R packet interval checking unit 114 implements the time reference packet generation unit.
6 to 109. The time reference packet deleting unit is implemented when the unnecessary packet deleting units 131 to 134 are set to delete the PCR packet.

[0048] A second embodiment of a multiplexing device according to the present invention (Example 2) Figure 2.
This is different from the embodiment of FIG.
However, this is a more preferred embodiment in that the PCR packet generator can be integrated into one.
In the figure, the parts with the reference numerals 100 to 138 are shown in FIG.
It has the same function and configuration as the parts denoted by the same reference numerals.

The selector 142 is a selector for selecting a packet, like the selector 38 of FIG. Regarding the LMC value required by the PCR rewriting unit 113, the LMC value selector 143 uses the clock synchronization circuits 121 to 124 based on the PID value of the PCR packet.
Select the LMC value from. The PCR packet interval check unit 114 measures the interval between PCR packets having different PID values. If a predetermined time has passed since the last output of the PCR packet, the fact is notified to the PCR packet generation unit 140 and the PCR packet generation unit 14
0 generates a PCR packet with that PID value.
The PCR packets arriving at the input port can be multiplexed without being deleted, and the unnecessary packet deletion units 131 to 131 can be used.
It can also be deleted at 134. In any case, the output of the selector 142 is monitored by the PCR packet interval check circuit 114, and the PCR packet generator 140 is controlled so that PCR packets are generated within a predetermined time interval.

The control circuit 141 controls the selector 142, but differs from the control circuit 111 of FIG. 1 in that a protection priority flag is provided. The protection priority flag is set for the purpose of avoiding packet discard by taking out the packet preferentially, that is, protecting the packet. For example, when both a FIFO buffer that prioritizes packet protection and a FIFO buffer that does not prioritize packet protection are almost full (both output priority flags are true), priority is given to packet extraction from the former. . When a PCR packet is output from the PCR packet generation unit 140, the degree of protection priority is always high.
It is preferable that the packet presence flag and the output priority flag have the same value, and the protection priority flag always be true. In FIG. 2, the protection priority flag is set from each input port. However, the protection priority flag is set by writing the degree of protection priority in a protection priority flag table provided inside the multiplexer. You may.

The control circuit 141 instructs the selector 142 which packet to extract based on the protection priority flag, output priority flag, and packet presence flag. The operation in which the control circuit 141 controls the selector 142 to extract a packet is performed, for example, as follows. Control circuit 127
Checks cyclically the packet presence flag, output priority flag, and protection priority flag provided for the FIFO buffers 101 to 105 and the PCR packet output unit 140. If there is a FIFO buffer or a PCR packet output unit in which the packet presence flag, the output priority flag, and the protection priority flag are both true, the selector 142 is controlled to extract the packet. If there is a FIFO buffer for which both the packet presence flag and the output priority flag are true,
If the protection priority flag is not true, the selector 142 is controlled to take out the packet from the FIFO buffer. If there is no true output priority flag and there is a true packet presence flag, the FIFO
Selector 142 to fetch packet from buffer
Control. If there is no true packet presence flag, a null packet is extracted from the null packet generator 110.

As a more specific operation, the number of input ports N
Is 4, and when the protection priority flag is set for the input port # 3, the reading of packets from the FIFOs # 1 to # 4, the PCR packet generator, and the FIFO # 0 is exemplified. Packets are output from the selector at regular time intervals as shown in FIG. In synchronization with this output timing, the control circuit checks the flag and selects a source from which the packet is to be extracted.

[0053] (A) during normal operation to output the priority flag is not set (1) control circuit, a packet at a certain output timing FI
It is assumed that the user selects to take out from FO # 1.

[0054] (2) First FIFO at the next output timing
Check the # 2 packet presence flag. If this flag is true, it is selected to take out the packet from FIFO # 2, and if this flag is false, the packet presence flag of FIFO # 3 is checked. FIFO # if this flag is true
3 is selected to take out the packet. If this flag is false, the packet presence flag of FIFO # 4 is checked.
If this flag is true, it is selected to take out the packet from FIFO # 4. If this flag is false, the packet existence flag of the PCR packet generation unit is checked. If this flag is true, it is selected to take out the packet from the PCR packet generator. If this flag is false, the FIFO is
Check the # 0 packet presence flag. If this flag is true, it is selected to take out the packet from FIFO # 0. If this flag is false, it is chosen to take out the null packet from the null packet generator.

[0055] (3) When selecting a null packet (2) is started a check from FIFO # 2 packet presence flag at the next output timing.

[0056] (4) as (2) and (3) examines the packet presence flag in order to select the original to retrieve the packet.

[0057] (B) if the input ports # 1 and both inflow of # 2 packets increasing suddenly output priority flag of standing (5) control circuit, a packet at a certain output timing FI
It is assumed that the user selects to take out from FO # 1.

[0058] (6) FIFO # 1 and FIFO # 2 outputs the priority flag is true, the input port # 1 and the input port # 2
Protection priority is the same, and F
Since IFO # 1 has been selected, at the next output timing F
Select IFO # 2.

[0059] (7) FIFO # 1 and the FIFO # 2 of output priority flag is true, the input port # 1 and the input port # 2
Protection priority is the same, and F
Since IFO # 2 has been selected, at the next output timing, F #
Select IFO # 1.

[0060] (8) as long as the output priority flag of FIFO # 1 and FIFO # 2 is true, extraction of packets from the other to output the priority flag is not set to not is selected, and (6)
Repeat (7).

[0061] (C) Further the input port # if inflow of 3 packets suddenly increasing output priority flag stood (9) FIFO # 1, FIFO # 2, the output priority flag of FIFO # 3 is true However, since the input port # 3 has the highest priority, it selects to take out the packet from the FIFO # 3.

[0062] (10) outputs the priority flag of the FIFO # 3 selects the FIFO # 3 as long as true. FIFO # 1 and F
FIFO # 1 and FI even if FIFO # 2 overflows
Retrieving the packet from FO # 2 is not selected.

[0063] (11) when the output priority flag of FIFO # 3 becomes false, if the output priority flag of FIFO # 1 and FIFO # 2 is true, repeating (6) (7).

[0064] (12) If the FIFO # 1 and FIFO # 2 output priority flag becomes false, the same processing as (A).

[0065] By the above processing, the packet of input port # 3 is compared to the other input port, the disposal of the packet is less likely to occur. When the FIFO buffer overflows, that is, when the packet exceeds the capacity of the FIFO buffer, some of the packets (for example, the FIFO
Discard (from the oldest packet among the packets remaining in the FO buffer).

The protection priority flag can be set for each port. If the voice data packet to be transmitted is an announcement, some discarding of the packet can be tolerated, while if it is music, it may be desirable to reduce the discarding of the packet to achieve high quality transmission. In such a case, the degree of packet discarding can be adjusted by setting the protection priority flag of the input port of the music program to true and setting the protection priority flag of the input port of the announcement program to false. Note that the protection priority flag is not a binary value of true or false, and an embodiment in which the priority is set in detail according to the content of the program to be provided is also possible. At this time, when there are a plurality of FIFO buffers for which the output priority flag is true, control may be performed so that the packet is extracted only from the FIFO buffer having the higher protection priority.

As can be seen from the above description, the packet storage means according to claims 1 to 3 is implemented by a FIFO buffer. Packet presence or absence indication hand stage, each FIFO
<br/> the packet chromatic flag given to the control circuit from the buffer thus are subjected real. The selector means is a selector 14
It is needless to say that the selector control means is implemented by the control circuit 141.

The time reference packet is implemented by a PCR packet, and the time reference packet deletion means is executed when the unnecessary packet deletion units 131 to 134 are set to delete the PCR packet. The time reference packet confirmation means includes a PCR packet interval check circuit 1
14 is implemented. The time reference packet generation means,
This is performed by the PCR packet generator 140 .

[0069]

【The invention's effect】 Claim1In the invention, the time reference packet
Packet time so that intervals are not too open
The allowable amount of displacement can be increased.

[0070] Further, in the invention of claim 2, prevent the waste of transmission capacity it is not possible to increase unnecessarily the time reference packet.

[0071] Further, in the invention of claim 3, it is possible to arrange the time delay in multiplexed packets within a certain range.

[Brief description of the drawings]

FIG. 1 is a configuration diagram of a multiplexing device according to the present invention.

FIG. 2 is a configuration diagram of a multiplexing device according to the present invention.

FIG. 3 is a configuration diagram of a digital broadcasting system.

FIG. 4 shows a structure of a TS packet.

FIG. 5 shows how PCR packets are used.

FIG. 6 shows an example of time-division multiplexing processing.

[Explanation of symbols]

 11 Microphone 12 Television camera 13 Movie film 14 Video tape 15 Video disk 16-19 Encoder 20 Multiplexer 21 Modulator 22 Antenna 23-26 Null packet deletion unit 30, 100 PSI / SI generator 31-35, 101-105 FIFO buffer 36, 110 Null packet generation circuit 37, 111, 141 Control circuit 38, 112, 142 Selector 41 Local clocks 42, 53, 65 PCR counters 43 to 46, 47 Detector 48 PCR correction circuit 51 Transmission device 52 27-MHz clock 54, 113 PCR value rewriting unit 61 ...... Receiving device 62, 125-128 ... PCR packet detecting unit 63, 121-124 ... Synchronous circuit 64: Voltage-controlled crystal oscillator 66: Comparator 67: Latch 68: DA converter 69: Low-pass filters 106 to 109, 140: PCR packet generator 114: PCR packet interval checker 131 to 134: unnecessary packet deleting unit 135 to 138: PID rewriting unit 143: LMC value selector

Continuation of the front page (56) References JP-A-10-51410 (JP, A) JP-A-10-164133 (JP, A) JP-A-9-9215 (JP, A) (58) Fields studied (Int .Cl. ⁷ , DB name) H04L 12/00-12/28 H04L 12/50-12/66 H04L 7/08 H04N 7/08

Claims (3)

(57) [Claims] A multiplexing device for multiplexing a packet represented by a digital signal from a plurality of input ports after inputting the packet from a plurality of input ports, and outputting the multiplexed packet includes a time reference packet including reference information for controlling synchronization of a receiving device. And a packet storage means for storing a packet at each input port, and a packet presence / absence indicating means for indicating whether or not there is a packet to be output to the packet storage means, and further generating a time reference packet. Time reference packet generation means; selector control means for instructing which packet storage means or time reference packet generation means to extract a packet; selector means for extracting packets from the selected packet storage means or time reference packet generation means; Time reference packet confirmation means for measuring the interval of the time reference packet after The selector control means controls the selector means using the instruction of the packet presence / absence instruction means, and the packet storage means or the time reference packet generation means instructed to have a packet by the packet presence / absence instruction means. At the time of multiplexing by sequentially taking out packets, the time reference packet confirming means measures the time interval of the multiplexed time reference packet, and if the time reference packet interval is longer than a predetermined time, the time reference A multiplexing apparatus characterized in that a time reference packet is generated by a packet generating means and multiplexed so as to include the time reference packet. 2. The multiplexing device according to claim 1 , further comprising a time reference packet deleting means for deleting the time reference packet at the input port, wherein the time reference packet input to the input port is deleted. A multiplexer. 3. The multiplexing device according to claim 1 , wherein the packet to be multiplexed includes audio data or video data, and the packet to be multiplexed is stored in the packet storage means. A multiplexing device, wherein a certain upper limit is set for the amount, and packets exceeding this amount are discarded.