JP3064831B2 - Symbol identification point detection device - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a detecting device for detecting a symbol identification point of a received signal in a digital radio communication receiving device, and more particularly, to enabling accurate detection.

[0002]

2. Description of the Related Art In digital radio communication of the PSK modulation (phase modulation) system, a transmitting side modulates the phase of a carrier wave according to a symbol and transmits the modulated signal. After demodulation, the symbol is identified and the signal is decoded. At this time, a symbol identification point detection device detects a point at which a symbol of the baseband signal is to be identified.

As shown in FIG. 5, a conventional symbol discrimination point detecting device includes an in-phase component input terminal 1 for inputting an in-phase component I and a quadrature component Q of a received baseband signal of a PSK modulation whose Nyquist band is limited, and a quadrature component input terminal. The input terminal 2 and the input I signal and Q signal are M times the symbol rate (M:
A / D converter 3, which oversamples with a positive integer),
4 and the squared envelope R of the received signal from the oversampled I and Q signals output from the A / D converters 3 and 4 =
A square envelope calculation circuit 5 for calculating I ² + Q ² and a square envelope signal R output from the square envelope calculation circuit 5 are accumulated N times (N: positive integer) for each sample position for each symbol period. And M addition results W ₀ to M depending on the sample position.
The period adding circuit 9 for outputting a W _M-1, detects the largest value in the output W ₀ ~W _M-1 of the synchronous adding circuit 9, a symbol identifying a sample position corresponding to the addition result representing the value It has a maximum value detection circuit 11 that outputs as point information, and a symbol identification point information output terminal 8 that outputs the output of the maximum value detection circuit 11 as symbol identification point information.

The baseband I and Q signals oversampled at M times (M: positive integer) of the symbol rate by the A / D converters 3 and 4 of this device are expressed by the following equation (1).
It will be represented by (2).

I signal: I (nT + kTs) (1) Q signal: Q (nT + kTs) (2) Ts = 1 / fs: sampling period T = 1 / f _R = MTs: symbol period n: arbitrary integer k = 0, The 1, 2,..., M−1 squared envelope operation circuit 5 calculates the squared envelope of the received signal represented by the following equation (3) from the I and Q signals represented by the equations (1) and (2). Calculate R (nT + kTs).

R (nT + kTs) = I (nT + kTs) ² + Q (nT + kTs) ² (3) (k = 0, 1, 2,..., M−1) On the other hand, the synchronous addition circuit 9 is represented by the following equation (3). The cumulative addition represented by the following equation (4) is sequentially performed N times (N: a positive integer) for the squared envelope to be performed, using the sample position k as a parameter.

W _k (n) = W _k (n−1) + R (nT + kTs) (4) (k = 0, 1, 2,..., M−1) Therefore, the synchronous addition circuit 9 operates at the time t = nT + kT
Assuming that the addition is started from s, W _k (n−1) = 0 and W _k (n) to W _k (n + N−1) (k = 0, 1, 2, 2,
.., M-1) are calculated. This means that assuming that M samples are taken from one symbol, the square envelope R calculated from the first sample value of each of the N symbols is R
The value obtained by adding each other, 2 calculated from the second sample value
The calculation is performed for each value obtained by adding the squared envelopes R (Ts),..., The value obtained by adding the squared envelopes R ((M−1) Ts) calculated from the M-th sample value.

Now, assuming that the sample position where k = L is a symbol identification point, the square envelope R (nT + LT
s) takes a substantially constant value every time even if the value of n is changed,
At sample positions other than k = L, R (nT + LT
s) A value larger or smaller than random is taken.
Therefore, if a sufficiently large value is set as the number of additions N,
The final M addition results W _k (n + N−1) (k = 0,
1, ..., L, ..., M-1) _{of, W L (n + N-} 1) indicates the maximum value.

The maximum value detection circuit 11 calculates the addition result W _k (n + N−1) (k = 0, 1,..., L,.
Detecting a maximum value _{W L (n + N-1} ) from the M-1), sample position k = L corresponding to the addition result (t = nT +
LTs) is output as symbol identification point information.

As described above, in the conventional symbol discrimination point detecting apparatus, the square envelope of the received signal for each sample position is added for each symbol period, and the maximum value of the addition result is detected to detect the symbol discrimination point. Are doing.

[0011]

However, in the conventional symbol identification point detecting device, the number of additions N
Is small, and there are a large number of sample values taking values larger than the value at the symbol identification point as the sample value of the squared envelope due to the modulation pattern therebetween, the addition at the sample position other than the symbol identification point There is a problem that the result shows the maximum value and an accurate symbol identification point cannot be detected.

The present invention solves such a conventional problem. The square envelope at the symbol discrimination point takes a substantially constant value each time, and the difference between the square envelope at the symbol interval is obtained. An object of the present invention is to provide a symbol discrimination point detection device capable of detecting a symbol discrimination point with high accuracy and high speed by utilizing the fact that the value becomes substantially zero.

[0013]

Therefore, according to the present invention, A / D conversion means for oversampling a received baseband signal at M times the symbol rate (M: a positive integer), and 2/2 oversampled sample values A symbol discriminating point detecting device for detecting a symbol discriminating point of the received signal using the calculated data of the squared envelope. The absolute value of the difference at the symbol interval of the square envelope is calculated, and the calculated result is cumulatively added N times (N: positive integer) for each symbol period to obtain M kinds of addition results S ₀ depending on the sample position.同期 S _{M -1} and a minimum value detection unit for detecting the minimum value of the addition results S ₀ S _{M -1} and outputting the sample position of the addition result as information of the symbol identification point. means A is provided.

A determining means for determining whether or not the minimum value detected by the minimum value detecting means is smaller than a threshold value; Control means.

Further, for each sample position, the square envelope is cumulatively added N times (N: positive integer) for each symbol period, and M kinds of addition results W _{0 to} W _M−1 depending on the sample position are obtained. A synchronous addition means for outputting, and for each sample position, the absolute value of the difference at the symbol interval of the square envelope is calculated, and the calculation result is cumulatively added N times for each symbol period to obtain an M value dependent on the sample position. Synchronous addition means for outputting the same addition results S _{0 to} S _M-1 , and division of output W _{0 to} W _M-1 of the synchronization addition means by outputs S _{0 to} S _M-1 of the difference synchronization addition means Result Y
Division means for outputting ₀ (= W ₀ / S ₀ ) to Y _{M -1} (= W _{M -1} / S _{M -1} ), and detecting the maximum value among the division results Y _{0 to} Y _{M -1} And maximum value detecting means for outputting a sample position of the division result as information of a symbol identification point.

A determining means for determining whether or not the maximum value detected by the maximum value detecting means is larger than a threshold value; and a sample position for controlling a sample position of the A / D conversion means in accordance with the determination result of the determining means. Control means.

[0017]

Since the absolute value of the difference between the squared envelopes of the respective symbol identification points is substantially 0, if a certain number of the differences are cumulatively added at the symbol period at each sample position, the difference corresponds to the symbol identification point. The cumulative addition value (differential synchronization addition value) at the sample position where it is performed becomes the minimum. Therefore, the symbol identification point can be obtained by detecting the minimum value of the difference synchronization addition value.

When the synchronous addition value at each sample position is divided by the difference synchronous addition value, the division result at the sample position corresponding to the symbol identification point becomes the maximum. Therefore, the symbol discrimination point can also be obtained by detecting the maximum value of the division result.

Further, when the symbol identification point is deviated from the sample position, the symbol identification point cannot be accurately captured by any of the samples, so that the minimum value of the differential synchronization addition value does not fall below the threshold value. Or the maximum value of the division result does not exceed the threshold value. In such a case, the sample position control means determines one of the samples while determining the maximum value or the minimum value as a threshold value.
By shifting the sample position in the A / D conversion until one coincides with the symbol identification point, it is possible to detect the symbol identification point with high accuracy.

[0020]

【Example】

(First Embodiment) As shown in FIG. 1, a symbol discrimination point detection apparatus according to a first embodiment of the present invention receives an in-phase component I and a quadrature component Q of a received baseband signal of PSK modulation with a Nyquist band limited. A / D converters 3 and 4 for oversampling the input I and Q signals at M times the symbol rate (M: a positive integer); A square envelope calculating circuit 5 for calculating a squared envelope R = I ² + Q ² of the received signal from the oversampled I and Q signals output from the D converters 3 and 4, and a squared envelope calculating circuit 5 calculates the absolute value of the difference at the symbol interval of the squared envelope signal R output by
This result is cumulatively added N times (N: a positive integer) for each sample period for each symbol period, and M depends on the sample position.
A differential synchronous adding circuit 6 for outputting the addition result S ₀ ~S _M-1 street, the differential synchronous adding circuit 6 adds the result to detect the smallest value for S ₀ ~S _M-1, the addition result A minimum value detection circuit 7 that outputs a sample position as information of a symbol identification point.
And an output terminal 8 for outputting an output of the minimum value detection circuit 7 as symbol identification point information.

The baseband I and Q signals oversampled at M times (M: positive integer) of the symbol rate by the A / D converters 3 and 4 of this device are converted into I signals: I (NT + kTs) (1) Q signal: Q (nT + kTs) (2) Ts = 1 / fs: sampling period T = 1 / f _R = MTs: symbol period n: arbitrary integer k = 0, 1, 2,. Expressed as −1, the square envelope calculation circuit 5 calculates the square envelope R (nT + kTs) of the received signal by the following equation (3).

R (nT + kTs) = I (nT + kTs) ² + Q (nT + kTs) ² (3) (k = 0, 1, 2,..., M−1) On the other hand, the differential synchronous addition circuit 6 The difference absolute value at the symbol interval of the squared envelope represented is calculated, and the cumulative addition represented by the equation (6) is successively performed N times (N) ( N: positive integer).

ΔR (nT + kTs) = | R (nT + kTs) −R ((n−1) T + kTs) | (5) S _k (n) = S _k (n−1) + ΔR (nT + kTs) (6) (k = 0, 1, 2,..., M−1) The difference synchronous addition circuit 6 calculates the time t
= NT + kTs, the addition starts with S _k (n−
1) = 0, and S _k (n) to S _k (n + N−1) (k =
0, 1, 2, ..., M-1). Now, assuming that a sample position where k = L is a symbol identification point,
The squared envelope R (nT + LTs) takes a substantially constant value every time the value of n is changed, and the difference absolute value ΔR (nT + L
Ts) is almost zero. On the other hand, at sample positions other than k = L, a difference absolute value of ΔR (nT + kTs)> 0 frequently occurs. Therefore, M final addition results S _k (n + N−1) (k = 0, 1,..., L,.
In 1), _SL (n + N-1) indicates the minimum value.

The minimum value detection circuit 7 includes a differential synchronization addition circuit 6
, S _k (n + N−1) (k = 0, 1,..., L,
, M-1), the minimum value S _L (n + N-1) is detected, and the sample position k = L (t =
nT + LTs) is output as symbol identification point information.

As described above, the symbol discriminating point detecting apparatus according to the first embodiment utilizes the fact that the difference absolute value ΔR (nT + LTs) of the squared envelope between the symbol discriminating points becomes substantially zero, and makes use of this difference. The absolute value is added for each symbol position for each symbol period, and the minimum value of the addition result is detected, thereby obtaining a symbol identification point. Therefore, even when a large number of samples exhibiting a value larger than the value of the squared envelope at the symbol identification point are present among the samples added by a small number of additions, the symbol identification point is detected with high accuracy. Can be. As a result, it is possible to reduce the number N of cumulative additions without lowering the detection accuracy, and it is possible to quickly detect the symbol identification point.

(Second Embodiment) As shown in FIG. 2, a symbol discrimination point detecting apparatus according to a second embodiment
A / D converters 3 and 4 for oversampling the input I and Q signals at M times the symbol rate (M: a positive integer), and oversampled I and Q signals From the received signal squared envelope R = I ²
+ Q ² , and a square envelope signal R output from the square envelope arithmetic circuit 5 is cumulatively added N times (N: positive integer) for each sample period for each sample position,
The absolute value of the difference at the symbol interval between the synchronous addition circuit 9 that outputs the M kinds of addition results W _{0 to} W _M−1 depending on the sample position and the square envelope signal R output by the square envelope calculation circuit 5 The difference is calculated by calculating a value, accumulating and adding the calculation result N times (N: positive integer) for each sample position for each symbol period, and outputting M kinds of addition results S _{0 to} S _{M -1} depending on the sample position. The outputs W _{0 to} W _{M−1 of the} adder 6 and the synchronous adder 9
The result of division by the output S ₀ ~S _M-1 of the differential synchronous adding circuit 6 _{Y 0 (= W 0 / S} 0) ~Y M-1 (= W M-1 / S M-1) and outputs the division Circuit 10 and a maximum value detection circuit for detecting the largest value among outputs Y _{0 to} Y _{M -1} of division circuit 10 and outputting a sample position corresponding to the division result indicating the value as symbol identification point information. 11 and an output terminal 8 for outputting the output of the maximum value detection circuit 11 as symbol identification point information.

The A / D converters 3 and 4 and the square envelope operation circuit 5 of this device perform the same operation as in the first embodiment, and
The square envelope calculation circuit 5 calculates the square envelope R according to equation (3).
Calculate (nT + kTs).

R (nT + kTs) = I (nT + kTs) ² + Q (nT + kTs) ² (3) (k = 0, 1, 2,..., M−1) The synchronous addition circuit 9 is represented by Expression (3). The following equation (4) is used for the squared envelope with the sample position k as a parameter.
Is sequentially performed N times (N: positive integer).

W _k (n) = W _k (n−1) + R (nT + kTs) (4) (k = 0, 1, 2,..., M−1) On the other hand, the difference synchronous addition circuit 6 ) Is calculated at the symbol interval of the squared envelope, and the sampled position k is used as a parameter with respect to this difference absolute value, and the cumulative addition represented by the equation (6) is successively performed. (N: positive integer).

ΔR (nT + kTs) = | R (nT + kTs) −R ((n−1) T + kTs) | (5) S _k (n) = S _k (n−1) + ΔR (nT + kTs) (6) (k = 0, 1, 2,..., M−1) According to equations (4) and (6), for example, time t = nT + kTs
, And W _k (n−1) = 0, S
As _{k (n-1) = 0} , synchronous adding circuit 9, W _k (n) from _{W k (n + N-1} ) (k = 0,1,2, ..., M-1) is calculated, and the difference synchronization The adder circuit 6 converts S _k (n) to S _k (n +
N-1) (k = 0, 1, 2,..., M-1).
Now, assuming that the sample position where k = L is the symbol identification point, the squared envelope R (nT + LTs) takes a substantially constant value every time the value of n is changed, and the sample position other than k = L , A value larger or smaller than R (nT + LTs) frequently occurs. Further, as described in the first embodiment, the squared envelope difference absolute value ΔR (nT + LTs) between the symbol discrimination points is almost zero. Therefore, in the calculation of the synchronous addition circuit 9, the final M kinds of addition results W
_{k (n + N-1)} (k = 0,1, ..., L, ..., M-1) W L (n + N-1) of indicates a maximum value, the calculation of the difference synchronous adding circuit 6, S _L ( (n + N-1) indicates the minimum value.

On the other hand, the division circuit 10 calculates the final addition result W _k (n + N−1) of the synchronous addition circuit 9 as shown in the following equation (7).
Is the final addition result S _k (n + N−1) of the differential synchronous addition circuit 6.
Divide by.

Y _k (n + N−1) = W _k (n + N−1) / S _k (n + N−1) (7) (k = 0, 1, 2,..., L,..., M−1) , As described above, the symbol identification point k = L
At the sample position of, W _k (n + N−1) is the maximum value W
_{Take L} (n + N-1), and _Sk (n + N-1) is the minimum value S
_{Since L} (n + N-1) is taken, M division results Y _k (n + N
N−1) (k = 0, 1, 2,..., L.
_L (n + N-1) indicates the maximum value.

The maximum value detection circuit 11 calculates the division result Y _k (n + N−1) (k = 0, 1,..., L.
1), the maximum value Y _L (n + N−1) is detected, and the sample position k = L (t = nT + LT) corresponding to the division result
s) is output as symbol identification point information.

As described above, in the symbol discrimination point detection device of the second embodiment, W _k (n + N−1) is divided by the sum S _k (n + N−1) of the absolute value of the difference between the squared envelopes. By detecting the maximum value, the symbol identification point is obtained. Therefore, among the samples added by a small number of additions, there are many samples having a value larger than the value of the square envelope at the symbol identification point, and W _k (n + N−
Even if 1) indicates the maximum value other than the symbol identification point, S
This effect is compensated for by division by _k (n + N-1), and the symbol identification point can be detected with high accuracy. As a result, the number of additions can be reduced without lowering the detection accuracy, and the symbol identification point can be quickly detected.

(Third Embodiment) The symbol discrimination point detecting device of the third embodiment shifts the sample position (phase of the sampling period) of the A / D converter to a position where the symbol discrimination point can be accurately captured. , Enables highly accurate detection of symbol identification points.

As shown in FIG. 3, this apparatus uses input terminals 1 and 2 for inputting the I and Q components of a PSK-modulated reception baseband signal whose Nyquist band is limited, and connects the input I signal and Q signal to each other. A / D that performs oversampling at M times the symbol rate (M: positive integer) at a sample position corresponding to a control signal of a sample position control circuit 16 described later.
Converter 12, 13 and a square envelope operation circuit 5 for calculating a square envelope R = I ² + Q ² of the received signal from the oversampled I and Q signals output from the A / D converters 12 and 13. When,
The square envelope signal R output from the square envelope calculation circuit 5
The absolute value of the difference at the symbol interval is calculated, and the result is N times for each symbol period for each sample position (N: positive integer)
A difference synchronous addition circuit 6 that performs cumulative addition and outputs M kinds of addition results S _{0 to} S _M−1 depending on a sample position, and a difference synchronization addition circuit 6 among the addition results S _{0 to} S _M−1 A small value is detected, the minimum value is output, and a determination circuit described later is further provided.
A minimum value detection circuit 14 that outputs the sample position of the addition result indicating the minimum value as symbol identification point information in accordance with the output of 15
And the minimum value of the addition result output from the minimum value detection circuit 14 is
Judgment circuit 15 for judging whether or not smaller than a given threshold
And A / D converters 12 and 13 according to the determination result of the determination circuit 15.
And a symbol identification point information output terminal 8 for outputting the symbol identification point information output from the minimum value detection circuit 14.

The operation of the third embodiment will be described.

The difference synchronous addition circuit 6 of this device performs the difference synchronous addition result S _k (n + N) in the same procedure as in the first embodiment.
-1) (k = 0, 1, 2,..., M-1). Now, the difference synchronous addition result _SL (n) corresponding to the sample position k = L
+ N-1) indicates the minimum value. The minimum value detection circuit 14 outputs the minimum value S _L (n + N−1) to the judgment circuit 15, and the judgment circuit 15 determines whether or not this S _L (n + N−1) is smaller than a given threshold Th. Is determined. If it is smaller than the threshold value, the minimum value detection circuit 14 informs the minimum value detection circuit 14 of the sample position k = L corresponding to S _L (n + N−1) from the output terminal 8 as symbol identification point information. Output.

If S _L (n + N−1) is larger than the threshold value, the determination circuit 15 informs the sample position control circuit 16 of the fact, and the sample position control circuit 16 converts the A / D converters 12 and 13. Is shifted by τ (τ = Ts / H (Ts: sampling period, H: positive integer)). As a result, time t = nT + kTs + τ (k =
0, 1, 2,..., M−1), the same operation as in the first embodiment is repeated, and the minimum value S _L (n + N) obtained therefrom is repeated.
-1) is smaller than the given threshold value Th, the minimum value detection circuit 14 determines that the sample position k = L corresponding to S _L (n + N-1) is output to the output terminal 8 as symbol identification point information.
Is output to

If S _L (n + N−1) is still larger than the threshold value, a control signal for shifting the sample position further by τ is output from the sample position control circuit 16, and the sample position is further shifted to perform the above procedure. Is repeated.

However, even if this process is repeated, the threshold value Th is set within jτ (1 ≦ j ≦ H−1) within the variable range of the sample position.
If the difference synchronization addition minimum value less than is not obtained,
The minimum value detection circuit 14 uses the sample position corresponding to the minimum value within the variable range as the symbol identification point information regardless of the threshold value.
To the output terminal 8.

As described above, the symbol discriminating point detecting device of the third embodiment judges the minimum value of the difference synchronous addition result obtained in the first embodiment as a threshold value, and samples the input I and Q signals according to the result. The process of controlling the position is repeated. By this processing, even if the sample position of the A / D converter does not include the symbol identification point in the first stage, the state where the symbol identification point is included in the sample position is obtained by successively moving the sample position. Can be realized. By maintaining this state, it is possible to capture the symbol identification point clearly and with high accuracy.

(Fourth Embodiment) The symbol discrimination point detecting device of the fourth embodiment is obtained by applying the technique of the third embodiment to the device of the second embodiment.

As shown in FIG. 4, this device comprises a sample position control circuit 16 for controlling the sample positions of the A / D converters 12 and 13 in the device of the second embodiment (FIG. 2), and a maximum value detection circuit. A determination circuit 15 for determining whether or not the maximum value output from 17 is larger than a given threshold value;
The sample position control circuit 16 outputs a control signal for controlling the sample positions of the A / D converters 12 and 13 according to the determination result of the determination circuit 15.

In this device, the division circuit 10 divides the synchronous addition value by the difference synchronous addition value in the same procedure as in the second embodiment, and the division result Y _k (n + N−1) (k = 0, 1) , 2,
.., M-1) are output. Now, it is assumed that the division result Y _L (n + N−1) corresponding to the sample position k = L has the maximum value. The maximum value detection circuit 17 calculates the maximum value Y _L (n + N
-1) is output to the determination circuit 15, and the determination circuit 15
_It is determined whether _L (n + N-1) is greater than a given threshold Th. If the value is larger than the threshold value, it is transmitted to the maximum value detection circuit 17, and the maximum value detection circuit 17 outputs Y _L (n +
The sample position k = L corresponding to (N-1) is output from the output terminal 8 as symbol identification point information.

If Y _L (n + N−1) is smaller than the threshold value, the determination circuit 15 informs the sample position control circuit 16 of the fact, and the sample position control circuit 16 turns on the A / D converters 12 and 13. Is shifted by τ (τ = Ts / H (Ts: sampling period, H: positive integer)). As a result, time t = nT + kTs + τ (k =
0, 1, 2,..., M−1), the same calculation as in the second embodiment is repeated, and the maximum value Y _L (n + N) obtained therefrom is repeated.
If -1) is smaller than the given threshold value Th, the maximum value detection circuit 17 determines that the sample position k = L corresponding to Y _L (n + N-1) is output to the output terminal 8 as symbol identification point information.
Is output to

Also in this case, j is within the variable range of the sample position.
When the maximum division value exceeding the threshold value Th cannot be obtained in τ (1 ≦ j ≦ H−1), the sample position corresponding to the maximum value in the variable range is determined as the symbol identification point information regardless of the threshold value. The signal is output from the detection circuit 17 to the output terminal 8.

As described above, the symbol discriminating point detecting apparatus according to the fourth embodiment determines the maximum value of the division result obtained by dividing the synchronous addition value by the difference synchronous addition value obtained in the second embodiment as a threshold value. The process of controlling the sample positions of the input I and Q signals is repeated accordingly. By this processing, even if A
Even if the sample position of the / D converter does not include the symbol identification point, a state in which the symbol position is included in the sample position can be realized by sequentially moving the sample position. By keeping this, it becomes possible to capture the symbol identification point clearly and with high accuracy.

[0049]

As is apparent from the above description of the embodiment, the symbol discrimination point detecting apparatus of the present invention has a sample value indicating a value larger than the value at the symbol discrimination point as the sample value of the squared envelope. Even when there are many, the symbol identification points can be detected with high accuracy. In addition, it is possible to reduce the number of cumulative additions of sample values without lowering the detection accuracy, thereby reducing the time required for symbol identification.

In the apparatus provided with the sample position control mechanism, the sample position can be adjusted to a position including the symbol identification point, so that the symbol identification point can be clearly captured, and the detection accuracy can be further improved. Can be improved.

[Brief description of the drawings]

FIG. 1 is a block diagram showing a symbol discrimination point detection device according to a first embodiment of the present invention;

FIG. 2 is a block diagram showing a symbol discrimination point detection device according to a second embodiment of the present invention;

FIG. 3 is a block diagram showing a symbol discrimination point detection device according to a third embodiment of the present invention;

FIG. 4 is a block diagram showing a symbol discrimination point detection device according to a fourth embodiment of the present invention;

FIG. 5 is a block diagram showing a conventional symbol identification point detection device.

[Explanation of symbols]

 1, 2 input terminal 3, 4, 12, 13 A / D converter 5 square envelope calculation circuit 6 difference synchronous addition circuit 7, 14 minimum value detection circuit 8 output terminal 9 synchronous addition circuit 10 division circuit 11, 17 maximum Value detection circuit 15 Judgment circuit 16 Sample position control circuit

Continuation of the front page (56) References JP-A-7-87153 (JP, A) “Symbol timing recovery method of 16QAM / TDMA method”, Technical Report of IEICE, Vol. 92, No. 411, p. 43-48, RCS92-106 (58) Fields investigated (Int. Cl. ⁷ , DB name) H04L 27/00-27/38

Claims (4)

(57) [Claims] A / A for oversampling a received baseband signal at M times the symbol rate (M: a positive integer)
D conversion means, and a square envelope calculation means for calculating a square envelope of the oversampled sample value, and detects a symbol discrimination point of the received signal using the calculated square envelope data. The symbol discriminating point detecting apparatus calculates the absolute value of the difference between the symbols of the square envelope at each sample position, and accumulates the calculated result N times (N: positive integer) for each symbol period. Difference synchronous adding means for outputting M kinds of addition results S _{0 to} S _M-1 depending on the sample position; detecting the minimum value among the addition results S _{0 to} S _M-1 ; And a minimum value detecting means for outputting the sample position of the symbol identification information as symbol identification point information. 2. A determination means for determining whether a minimum value detected by the minimum value detection means is smaller than a threshold value, and a sample position of the A / D conversion means is controlled according to a determination result of the determination means. The symbol identification point detecting device according to claim 1, further comprising a sample position control means. 3. A / A for oversampling a received baseband signal at M times the symbol rate (M: a positive integer).
D conversion means, and a square envelope calculation means for calculating a square envelope of the oversampled sample value, and detects a symbol discrimination point of the received signal using the calculated square envelope data. In the symbol discrimination point detection apparatus, the squared envelope is cumulatively added N times (N: positive integer) for each sample position for each symbol period, and M kinds of addition results W _{0 to} W depending on the sample position are obtained. A synchronous adding means for outputting _M-1 ; calculating an absolute value of a difference between symbol intervals of the square envelope for each sample position; accumulating the calculated result N times for each symbol period; Difference synchronous adding means for outputting M kinds of addition results S _{0 to} S _M-1 depending on the position, and outputs W _{0 to} W _M-1 of the synchronous adding means to outputs S _{0 to} S _{M of the} difference synchronous adding means. Division result Y ₀ (= W ₀₎ obtained by dividing by _M-1 /
Dividing means for outputting S ₀ ) to Y _{M -1} (= W _{M -1} / S _{M -1} ); detecting the maximum value among the division results Y _{0 to} Y _{M -1} ; A symbol discrimination point detection device, comprising: a maximum value detection means for outputting a sample position as information of a symbol discrimination point. 4. A determining means for determining whether or not the maximum value detected by the maximum value detecting means is larger than a threshold value, and controlling a sample position of the A / D converting means according to a result of the determination by the determining means. The symbol identification point detecting device according to claim 3, further comprising a sample position control means.