JP3015039B2 - Image processing system - Google Patents

Description

Description: BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an image processing system capable of externally performing various editing on given image data.

[Conventional technology]

2. Description of the Related Art In recent years, digital color copying machines have become widespread in which a digital image signal read and read by digitally separating a color image is subjected to desired processing, and color recording is performed based on a digital color image signal obtained by editing. . Further, the present applicant has proposed a device in which a color image storage device, a monitor display, a still video reproducing device, and the like are connected to the digital color copying machine described above.

In these apparatuses, a video print is obtained by temporarily storing images from various video devices, for example, a still video player in a color image storage device, and sequentially sending the stored image data to a color copier. . Further, by connecting a monitor display, the stored image data can be confirmed.

[Problems to be solved by the invention]

However, in the above-described proposed apparatus, an image obtained by a video device is simply printed out, and a message or a comment for the image cannot be synthesized with an image obtained from the video device.

In view of the foregoing, an object of the present invention is to provide an image processing system that can freely add a message, a comment, or a specific pattern to given image data from outside.

Still another object of the present invention is to provide an image processing system capable of freely executing a desired mask process on a given image with a simple configuration.

<Means for Solving the Problems> In order to achieve the above object, the present invention provides a first image storage memory capable of storing a character image developed from a predetermined code and a pattern image obtained by reading a document. Means for synthesizing an image stored in the first image storage memory and an image stored in the second image storage memory, wherein the second image storage memory stores the image in the second image storage memory. The obtained image is superimposed and synthesized as a character pattern on the image stored in the first image storage memory, or the area where the image stored in the second image storage memory exists is stored in the first image memory. A synthesizing unit that can switch whether to perform mask synthesis as a mask pattern that does not output the stored image.

Further, the predetermined code is a character code sent from an external device, and the second image storage memory is a memory in which font data obtained from a font memory is expanded based on the character code. Features.

〔Example〕

Hereinafter, embodiments of the present invention will be described with reference to the drawings.

<Configuration of the Entire System> FIG. 1 is a system configuration diagram showing an example of a schematic internal configuration of a color image processing system according to an embodiment of the present invention. As shown in FIG. A digital color image reading device (hereinafter, referred to as “color reader”) 1 for reading a digital color image, a digital color image printing device (hereinafter, referred to as “color printer”) 2, which prints and outputs a digital color image, It comprises a storage device 3, an SV recording / reproducing device 31, a monitor television 32, a host computer 33, and a film scanner 34.

The color reader 1 of the present embodiment is an apparatus that reads color image information of a read document for each color and converts the color image information into an electrical digital image signal by using a color separation unit described below and a photoelectric conversion element such as a CCD. is there.

The color printer 2 is an electrophotographic laser beam color printer that limits a color image for each color in accordance with a digital image signal to be output, and transfers and records a plurality of times on a recording paper in a digital dot form. .

The image storage device 3 is a device that quantizes a digital image read from the color reader 1 or the film scanner 34 or an analog video signal from the SV recording / reproducing device 31, converts it into a digital image, and stores it.

The SV recording / reproducing device 31 is a device that captures an image with an SV camera, reproduces image information recorded in an SV floppy, and outputs it as an analog video signal. The SV recording / reproducing apparatus 31 can also record an SV floppy by inputting an analog video signal in addition to the above.

The monitor television 32 is a device that displays an image stored in the image storage device 3 and displays the content of an analog video signal output from the SV recording / reproducing device 31.

The host computer 33 has a function of transmitting image information to the image storage device 3 and receiving image information of the color reader 1, the SV recording / reproducing device, and the film scanner 34 stored in the image storage device 3. Further, it controls the color reader 1 and the color printer 2.

Filmscanana 34 is a 35mm film (positive / negative)
Is a device that converts a film image into electrical color image information using a photoelectric converter such as a CCD.

 The details will be described below for each unit.

<Description of Color Reader 1> First, the configuration of the color reader 1 will be described.

In the color reader 1 shown in FIG. 1, reference numeral 999 denotes a document, reference numeral 4 denotes a platen glass on which the document is placed, and reference numeral 5 denotes a full-color full-color sensor for condensing a reflected light image from the document exposed and scanned by a halogen exposure lamp 10. 6 is a rod array lens for inputting an image. An original scanning unit 11 includes a rod array lens 5, a 1: 1 full-color sensor 6, a sensor output signal amplification circuit 7, and a halogen exposure lamp 10 integrated with each other.
The document 999 is exposed and scanned in the direction of the arrow (A1).
The image information to be read for the original 999 is the original scanning unit 11
Are sequentially read line by line by exposing and scanning. The read color separation image signal is amplified to a predetermined voltage by the sensor output signal amplification circuit 7 and then input to the video processing unit via the signal line 501, where the signal is processed. Note that the signal line 501 has a coaxial cable configuration to guarantee faithful transmission of a signal. A signal 502 is a signal line for supplying a drive pulse for the 1: 1 full-color sensor 6, and all necessary drive pulses are generated in the video processing unit 12. Reference numerals 8 and 9 denote a white plate and a black plate for correcting the white level and the black level of the image signal, respectively. By irradiating with a halogen exposure lamp 10, a signal level of a predetermined density can be obtained. Used for white level correction and black level correction.

Reference numeral 13 denotes a control unit for controlling the entire color reader 1 according to the present embodiment having a micro computer. The control unit 13 controls display and key input on the operation panel 20 via the bus 508, and controls the video processing unit 12. The signal lines 509 and 510 are output by the position sensors S1 and S2.
, The position of the original scanning unit 11 is detected.

Further, a stepping motor driving circuit 15 for pulse-driving a stepping motor 14 for moving the scanning body 11 by a signal line 503 is controlled by an exposure lamp driver 21 via a signal line 504 to control ON / OFF of the halogen exposure lamp 10. , And controls the color reader 1 such as control of the digitizer 16 and the display unit via the signal line 505.

Reference numeral 20 denotes an operation unit of the color reader unit 1, which includes a liquid crystal display panel also serving as a touch panel and keys for giving various instructions. The display example of the display panel is shown in FIG. 47 and thereafter.

A color image signal read by the above-described original scanning unit 11 at the time of original exposure scanning is input to the video processing unit 12 via the sensor output signal amplification circuit 7 and the signal line 501.

Next, the details of the original scanning unit 11 and the video processing unit 12 will be described with reference to FIG.

The color image signal input to the video processing unit 12 is separated into three colors of G (green), B (blue), and R (red) by the sample / hold circuit S / H43. Each of the separated color image signals is converted into an analog signal by an A / D converter 44.
It is digitally converted to a digital color image signal.

In the present embodiment, the color reading sensor 6 in the original scanning unit 11 is formed in a staggered shape divided into five regions as shown in FIG. Using the color reading sensor 6 and the shift correcting circuit 45, the reading position shift between the 2,4 channel that is pre-scanning and the remaining 1,3,5 channel is corrected. The corrected signal of the displacement from the shift correction circuit 45 is input to a black correction circuit / white correction circuit 46, and color reading is performed using the signal corresponding to the reflected light from the white plate 8 and the black plate 9 described above. The unevenness in darkness of the sensor 6, the unevenness in the light amount of the halogen exposure lamp 10, the variation in sensitivity of the sensor, and the like are corrected.

Color image data proportional to the input light amount of the color reading sensor 6 is input to the video interface 201 and connected to the image storage device 3.

The video interface 201 has the functions shown in FIGS. 3 to 6. That is, (1) the function of outputting the signal 559 from the black correction / white correction circuit 46 to the image storage device 3 (FIG. 3), and (2) the image information 563 from the image storage device 3 to the selector 119.
(FIG. 4) (3) Image information 562 from the synthesis circuit 115 is stored in the image storage device 3.
(FIG. 5) (4) Combining the binary information 206 from the image storage device 3 with the synthesizing circuit 1
Function to be input to 15 (FIG. 6) (5) Control line 207 (line of HSYNC, VSYNC, image enable EN, etc.) between image storage device 3 and color reader 1
And connection of communication line 561 between CPU and CPU. In particular, the CPU communication line is the communication controller 162 in the control unit 13.
And exchanges various commands and area information.

It has the following five functions. The selection of these five functions is switched by the CPU control line 508 as shown in FIGS.

As described above, the video interface 201
Has five functions, and the signal lines 205, 206, and 207 are capable of bidirectional transmission.

With this configuration, bidirectional transmission is possible, and the number of signal lines can be reduced, the cable can be made thinner, and the cost can be reduced.

The signal line of the interface connector (4550 in FIG. 27 (A)) of the image storage device 3 connected to the color reader 1 is also capable of bidirectional transmission.

Therefore, it is possible to reduce the number of connection lines between the devices constituting the system, and to perform high-level communication with each other.

The image information 559 from the black correction / white correction circuit 46 is
The data is input to a logarithmic conversion circuit 48 (FIG. 2) for performing processing for matching with the relative luminous efficiency characteristics of human eyes.

Here, white = 00H and black = FFH are converted so as to be further input to the image reading sensor, for example, a normal reflective original, a transparent original such as a film projector, and even the same transparent original as a negative film or a positive. As shown in FIGS. 7 (a) and 7 (b), a plurality of LUTs (lookup tables) for logarithmic conversion are provided because the sensitivity of the film or the film and the gamma characteristics input in the exposure state are different. Use them properly according to your application. The switching is performed by the signal lines lg0, lg1, lg2, and is performed by inputting an instruction from an operation unit or the like as an I / O port of the CPU 22. Here, the data output for each of B, G, R corresponds to the density value of the output image, and B (blue), G (green), R
Since the signals of (red) correspond to the amounts of yellow, magenta, and cyan toner, respectively, the color image data thereafter is associated with Y, M, and C.

The color conversion circuit 47 receives input color image data.
This circuit detects a specific color from R, B, and G and replaces it with another color. For example, a function of converting a red portion in a document into blue or any other color is realized.

Next, the color correction circuit 49 performs color correction on the respective color component image data from the original image obtained by the logarithmic conversion 48, that is, the yellow component, the magenta component, and the cyan component as described below. As shown in FIG. 8, the spectral characteristics of the color separation filter arranged for each pixel in the color reading sensor have an unnecessary transmission area as shown by a hatched portion, while, for example, the color transferred to a transfer paper It is well known that the toner (Y, M, C) also has an unnecessary absorption component as shown in FIG. In the drawing, only R and G and Y and M are shown.

Therefore, for each component image data Yi, Mi, Ci, Masking correction for calculating a linear expression of each color and performing color correction is well known. Furthermore, by Yi, Mi, Ci, Min (Yi, M
i, Ci) (the minimum value of Yi, Mi, and Ci) is calculated as a sum (black), and black toner is added later (smearing). Under color removal (UCR) operations, which reduce the amount added, are also common. Fig. 10 (a)
The circuit configuration of the color correction circuit 49 for performing masking, darkening, and UCR is shown in FIG. The feature of this configuration is that it has two masking matrices and can switch at high speed with "1/0" of one signal line. With or without UCR, one signal line "1/0" It has two circuits for determining the amount of smear that can be switched at high speed, and can be switched at high speed with "1/0".

First, prior to image reading, a desired first matrix coefficient Second matrix coefficient From the bus connected to the CPU 22. In this example And In registers 50-52, Are set in the registers 53 to 55.

Reference numerals 56 to 62 denote selectors, respectively.
When "1", A is selected, and when "0", B is selected. Therefore, the matrix The switching signal MAREA566 = "1" When selecting, and "0" for selecting the matrix M _2.

Reference numeral 63 denotes a selector, and the selection signals C ₀ , C ₁ (567, 5
68), outputs a, b, c based on the truth table in FIG. 10 (b).
Is obtained. The selection signals C ₀ , C ₁ and C ₂ correspond to the color signals to be output, for example, in the order of Y, M, C, Bk (C ₂ , C ₁ , C ₀ )
= (0,0,0), (0,0,1), (0,1,0), (1,0,0) Obtain color signals that have been color corrected. The CPU 22 generates C ₀ , C ₁ , and C ₂ according to the image forming sequence of the color printer 2. Now, assuming that (C ₀ , C ₁ , C ₂ ) = (0, 0, 0) and MAREA566 = “1”, the output (a, b, c) of the selector 63 is stored in the register 50
The contents of a, 50b, and 50c, and therefore (a _Y1 , −b _M1 , −c _C1 ) are output. On the other hand, from the input signal Yi, Mi, Ci, Min (Yi, Mi, Ci) =
The black component signal 570 calculated as k is given by 64 at Y = ax−
b (where a and b are constants) undergo a linear transformation (selector 60
) Are input to the B inputs of the subtracters 65a, 65b, 65c. In each of the subtractors 65a, b, and c, Y = Yi− (ak−
b), M = Mi− (ak−b), C = Ci− (ak−b) are calculated and sent to the multipliers 66a, 66b, 66c for the masking operation via the signal lines 571a, 571b, 571c. Is entered. Selector 60
Is controlled by a signal UAREA572, which has a configuration in which UCR (under color removal), presence / absence, and absence can be switched at high speed by “1/0”.

The multipliers 66a, 66b, and 66c have (A _Y1 ,
−b _M1 , c _C1 ) and B input to the above [Yi− (ak−b), Mi
− (Ak−b), Ci− (ak−b)] = [Yi, Mi, Ci], so as is clear from FIG.
Yout = Yi × under the condition of C ₂ = 0 (Y or M or C selection)
(A _Y1 ) + Mi × (−b _M1 ) + Ci × (−c _C1 ) is obtained, and yellow image data subjected to masking color correction and under color removal processing is obtained. Similarly _{Mout = Yi × (-a Y2)} + Mi × (b M2) + Ci × (-c C2) Cout = Yi × (-a Y3) + Mi × (-b M3) + Ci × (c C3) within Dout Is output. The color selection is controlled by the CPU 22 according to the order of output to the color printer to be output (C ₀ , C ₁ , C ₂ ) according to the table of FIG. 10 (b). Register 6
7a, b, c, 68a, b, c are registers for monochrome image formation,
Based on the same principle as the masking color correction described above, MONO =
Each color is obtained by weighted addition using k ₁ Yi + l ₁ Mi + m ₁ Ci.

The switching signals MAREA566, UAREA572, and KAREA573 are the coefficient matrices for masking color correction as described above. UAREA572 is a high-speed switching with and without UCR, and KAREA573 is a primary conversion switching of a black component signal (output from the signal line 574 to the Dout through the selector 61), that is, K = Min (Yi, Mi, Ci), which is a signal for rapidly switching the characteristic of Y = ck-d or Y = ek-f (c, d, e, and f are constant parameters). For example, masking is performed for each area in one copy screen. The configuration is such that the coefficient can be changed and the UCR amount or the sum amount can be switched for each region. Therefore, this configuration can be applied to a case where images obtained from image input sources having different color separation characteristics or a plurality of images having different black tones are combined as in the present embodiment. Note that these area signals MAREA, UAREA, KAREA (566, 5
72, 573) are generated by a region generation circuit (FIG. 2 69) described later.

Next, a black character processing circuit for improving black reproduction of black characters and thin lines in a document and color bleeding of an edge portion of black characters and black thin lines will be described with reference to FIGS. 11 and 12. FIG.

The black level / white correction circuit 46 shown in FIG.
R, G, B (red, green, blue) color signals 559R, 559G, 559B of which white level has been corrected are subjected to LOG conversion 48, masking, under color removal 49, and then the color signals to be output to the printer are The signal is selected and output to the signal line 565. In parallel with this, a luminance signal Y and a chrominance signal are used to detect an achromatic portion of an original and a portion that is an edge portion (that is, a portion that is a black character and a black thin line) from the signals R, G, and B. I, Q to Y,
It is calculated by the I, Q calculation circuit 70 (FIG. 11).

The luminance signal Y575 is input to a line buffer circuit 71 for five lines in order to calculate a 5 × 5 matrix by a well-known digital second-order differentiating circuit 72 for extracting an edge signal. At 72, a Laplacian operation is performed. That is, when the input luminance signal Y is a step-like input (for example, a character portion) as shown in i) of FIG. 12 (d), the output 576 after Laplacian is simultaneously ii).
(Hereinafter referred to as edge signal). Look-up tables LUTA73a and LUTB73b are black letters (or black thin lines)
This is a look-up table for determining a print amount (for example, a toner amount) in the edge portion of FIG. 12, and is constituted by a look-up table having characteristics as shown in FIGS. 12 (a) and 12 (b), respectively. That is, when LUTA acts on the edge signal 576, the amplitude increases as shown in FIGS. 12 (d) and (iii), which determines the amount of black toner in the black edge portion as described later. Also, LUT is applied to edge signal 576.
When B acts, the absolute value becomes negative, which determines the toner amount of Y, M, C (yellow, magenta, cyan) in the black edge portion. This is a signal as shown in FIG. 12 (d) (iv), and becomes a signal as shown in FIG. 12 (v) by passing through a smoothing (averaging) circuit 74.

On the other hand, the achromatic color detection circuit 75 is a circuit that outputs a signal in accordance with the characteristics as shown in FIG. 12, for example, so that the output becomes 1 for a complete achromatic color and the output becomes 0 for a chromatic color. The signal 579, which is selected by the selector 76 at the time of black toner printing by the signal 577 which becomes "1" at the time of black toner printing, passes through the signal 578, and determines the black toner amount at the multiplier 77,
After multiplication with (FIG. 12 (d) (iii)), the adder 78 adds it to the original image signal.

On the other hand, when printing Y, M, and C (yellow, magenta, and cyan) toners, it is desirable that the Y, M, and C toners not be printed on black characters and black thin line portions.
Thus, the selector 76 outputs “1” to the multiplier, the selector 79 outputs a signal (FIG. 12 (d) (v)) obtained by smoothing the output from the LUTB736, and the adder 78 outputs FIG. d) The same signal as in (v) is input, and the signal is subtracted from the original signal only from the black edge portion.

In other words, this means that the signal for determining the amount of black toner for the black edge portion is strong, that is, the amount of black toner is increased, and the amount of Y, M, and C toner for the same portion is reduced, so that the black portion is reduced. That is to express it more black.

Signal 581 obtained by binarizing achromatic signal 580 by binarizing circuit 80b
Is "1" for an achromatic color and "0" for a chromatic color. That is, as described above, in the selector 79, when printing black toner (when 577 = “1”), the S input = “1”, and the A input,
That is, 579 (FIG. 12 (d) (iii)) is output, and the black edge is emphasized. When printing Y, M, C toners (577 = "0"), the signal 581 = "1". Therefore, if the color is achromatic, the B input is selected to reduce the toner amounts of Y, M, C as described above. ,
12 (d) and (v) are output. In the case of a chromatic color, the signal 581 = 0, therefore, ▲ ▼ = 1, that is, the S input of the selector 79 becomes 1, and A is selected. The signals shown in FIGS. 9D and 9C are output to the adder 78, and the well-known edge enhancement is performed.

As shown in FIG. 12 (a), two types of LUTs are prepared for the LUTA 73a: an LUT that becomes zero when the edge signal value is less than ± n and a LUT that becomes zero when the edge signal value is less than ± m. A value to be clamped to zero is selected according to the level of the original signal 565, that is, the density of the original at this time. When the density level of the original is higher than the value set by the CPU 22 via the bus 508, that is, when the density level is higher, the comparator
When the output of 81 becomes "1" and the LUT is clamped to zero at A 'and B' in FIG. 12 (a), when the density is below a certain level, that is, when the output of the comparator 81 is "0", By selecting the LUT that is clamped to zero by A and B, the effect of noise removal according to the density range is changed.

Further, the output 583 of the AND gate 82 is a further improvement for the edge portion of the black character, and 584 (B input) for Y, M, C printing for the edge portion of the black character, and otherwise for the edge portion of the black character. This is a signal for switching to select 585. The signal 586 input to the AND gate 584 is converted to the edge signal by LUTC.
(FIG. 12 (c)) A binarizing circuit for a signal having the characteristic shown in FIG.
It is binarized at 80a, that is, it is "1" when the absolute value of the edge signal is equal to or greater than a predetermined value, and is "0" when it is equal to or less than the predetermined value.
Therefore, 587 = “1”, 581 = “1”, and 588 = “L” are achromatic, when the edge signal is large, that is, at the edge portion of the black signal, and Y, M , C only when printing toner. Therefore, at this time, as described above, the signal for determining the toner amounts of Y, M, and C is reduced from the original signal only in the portion corresponding to the black edge, and further, the averaging circuit 84 Is smoothed, and is output to 589 through the selector 83 when the signal ER = "1". Otherwise, a normally edge-enhanced signal 585 is output at output 589.

The signal ER is controlled by the CPU 22. When ER = "1", the output of the averaging circuit 84 is output to the output 589, and when ER = "0", "0" is output to the output 589. This completely sets the signal of the color toner (Y, M, C) around the edge of the black character to "0" to further eliminate color fringing, and these are selectable.

FIG. 13 is a diagram for explaining area signal generation (MAREA 566, UAREA 572, KAREA 573, etc.) in the area generating circuit 69. The region refers to, for example, a hatched portion in FIG. 13 (e), which is a section in the sub-scanning direction, that is, a timing chart AREA of FIG. 13 (e) for each HSYNC for each line. Is distinguished from other areas.
Such an area is specified by, for example, the digitizer 16 or the like.

FIGS. 13 (a) to 13 (d) show the generation position of this area signal,
This shows a configuration in which the section length and the number of sections are programmable by the CPU 22 and can be obtained in large numbers. In this configuration, one area signal is generated by one bit of a RAM accessible to the CPU. For example, in order to obtain n area signals AREA0 to AREAn, two area RAMs are provided. Yes (first
3 (d) 85A, 85B).

Now, the area signals AREA0 and AR as shown in FIG.
When obtaining EAn, making a "1" in bit 0 of the address of the RAM x _1, x _3, to all bit 0 of the rest of the address "0". On the other hand, “1” is set to the addresses 1, x ₁ , x ₂ , x ₄ of the RAM,
All bits n of other addresses are set to "0". HSYNC in synchronism with the constant clock as the reference, As you read sequentially Shikenshiyaru data RAM, for example, as in the FIG. 13 (c), read data "1" in terms of addresses x ₁ and x ₃ It is. The read data is as shown in FIG.
Since the J-K flip-flops 86-0 to 86-n are in the J and K terminals, the output is a toggle operation, that is, RAM.
When “1” is read out and CLK is input, output “0” →
“1”, “1” → “0”, and a section signal like AREA0,
Accordingly, an area signal is generated. When data = "0" over all addresses, no area section occurs and no area is set.

FIG. 13 (d) shows this circuit configuration, where 85A and 85B are the above-mentioned RAMs. This is because, for example, while reading data from the RAMA 85A line by line to switch the region section at high speed, the CPU 22 performs a memory write operation for a different region setting from the CPU 22 while reading the data from the RAMA 85A line by line. Alternately switches between section generation and memory writing from the CPU. Therefore, when the shaded area in FIG. 13 (f) is designated, RAMA and RAMB are switched in the order of A → B → A → B → A, which is (C ₃ , C ₄ , C ₅ ) =
If (0,1,0), the counter output counted by VCLK is given as an address to RAMA85A through selector 87A (Aa), gate 88A opens, gate 88B closes, and RAMA85A closes.
85A, the entire bit width and n bits are input to the JK flip-flops 86-0 to 86-n, and the interval signals AREA0 to AREAn are generated according to the set values.

During the writing from the CPU to B, the address bus AB
us, the data bus D-Bus, and the access signal /. Conversely With the case of generating the interval signal based on the data set in the _{RAMB85B (C 3, C 4,} C 5) = (1,0,1), performed in the same way, to RAMA85A from CPU Can be written.

Therefore, for example, based on this area signal, it is possible to easily perform processing of the image such as cutting out (trimming) of the image and omitting the frame. That is, the area signal 590 generated as described above by the area generation circuit 69 in FIG.
Selector with the area switching signal ECH591 output from 25
Selected at 89 and input to the input of AND gate 90. This, as is apparent from the figure, for example, FIG. 13 (b), by forming the signal 590 as the AREA0, x ₃ from x ₁
A cutout of the image until, by forming as a AREAn, missing a frame is between the x ₁ to x _2, is a cutout image in the interval from 1 to x _1, x ₂ to x ₄ It will be easily understood.

14 and 15 show the configuration and control timing of the bit map memory 91 for the area limiting mask.
As can be understood from FIG. 2, for example, a detection output 592 of a color conversion circuit described later makes it possible to create an area restriction mask that restricts only a specific color area in a document. A region control mask corresponding to the density value (or signal level) can be created by the signal 593 binarized by the binarization circuit 92 on the basis of the video image signal 560 to be obtained.

FIG. 14 (a) is a block diagram showing details of a bit map memory 91 for an area limiting mask and the control thereof. As shown in FIG. 15, the mask is configured such that 4 × 4 pixels constitute one block and one block corresponds to one bit of the bit map memory. For example, in an image with a pixel density of 16 pel / mm, 297 mm For × 420mm (A3 size), (297 × 420 × 16 × 16) ÷ 16 ≒ 2Mbit, that is,
For example, it can be composed of a dynamic RAM of 1 Mbit and 2 chips.

Signal input to selector 93 in FIG. 14 (a)
592 and 593 are data input lines for generating a mask as described above.
When the output 593 of the binarizing circuit 92 is selected, first, in order to count the number of "1" in the 4 × 4 block, it is input to the buffers 94A, 94B, 94C and 94D for 1 bit × 4 lines. Is done. FIFO9
4A to 94D are connected so that the output of 94A is connected to the input of 94B and the output of 94B is connected to the input of 94C as shown in the figure, and the output of each FIFO is connected to the latches 95A to 95C in 4-bit parallel, by VCLK. It is latched (see the timing chart of FIG. 14 (d)). The outputs 595A of the FIFO and the outputs 595B, 595C, and 595D of the latches 95A, 95B, and 95C are added by adders 96A, 96B, and 96C (signal 596).
The value set via the O port 25 (for example, “12”) is compared with its magnitude. That is, it is determined whether the number of 1s in the 4 × 4 block is larger than a predetermined number.

In FIG. 14 (d), the number of "1" s in the block N is "14" and the number of 1s in the block (N + 1) is "4", so that the output of the comparator 97 in FIG. 597 is a signal 597
Is “1” when is “14” and “0” when it is “4”.
With the latch pulse 598 in FIG.
Is once latched in one block of × 4, Q output of latch 98 is D _IN input of the memory 99, i.e., the mask making data. 100H is an H address counter for generating an address in the main scanning direction of the mask memory. One address is assigned by 4 × 4 blocks, so that the count-up is performed by dividing the pixel clock VCLK by 4 with the frequency divider 101H. Done. Similarly, 100V is an address counter for generating an address in the sub-scanning direction of the mask memory. For the same reason, the frequency divider 101V counts up by the clock obtained by dividing the synchronization signal HSYNC of each line by 4, and outputs the H address, The operation of the V address is controlled so as to synchronize with the operation of counting (adding) "1" in a 4.times.4 block.

Also, the lower 2 bits output of the V address counter, 599,
600 is NORed by NOR gate 102, and clock 60 divided by 4
A signal 602 for gating 1 is generated, and a 4 × 4 signal is generated by the AND gate 103 as shown in FIG. 14 (c).
A latch signal 598 is generated so that only one latch is performed on the block. 603 is a CPU bus 508 (FIG. 2)
604 is an address bus, and a signal 605 is a write pulse WR from the CPU 22. At the time of WR (write) operation from the CPU 22 to the memory 99, the write pulse becomes “Lo”, and the gates 104, 105, 106 open,
An address bus and a data bus from the CPU 22 are connected to the memory 99, and predetermined data is written at random.
When performing WR (write) and RD read sequentially with the address counter and V address counter, use the I / O
The gates 107 and 108 are opened by the control lines of the gates 107 and 108 connected to the port 25, and a sequential address is supplied to the memory 99.

For example, the output 593 of the binarized output 92, the output 592 of the color conversion circuit, or, if a mask as shown in FIG. 16 is formed by the CPU 22, the image is cut out and synthesized based on the area within the thick line frame. It can be performed.

Next, the mask created in units of 4 × 4 pixels is the edge portion (boundary portion) as shown in (i) of FIG. 17 (b).
However, since it is jagged in units of four pixels, the jagged portion is made smooth by the interpolation circuit 109 in FIG. 2 to make it look smooth.

FIG. 17 (a) shows a block diagram of the interpolation circuit. Reference numeral 110 denotes a selector. The A input is Hi clamp, that is, FF _H is input when it is set to 8 bits, and the B input is GND, that is, 00 _H is input to the B input. Switch. This allows
The input of the interpolation circuit 111 outputs FF _H in the area mask and 00 _{H in the} area mask. This is as shown in (i) of FIG. 17 (b). The interpolation circuit 111 may be any circuit such as a primary interpolation method, a high-order interpolation method, a sinc interpolation method, etc., and a circuit having a well-known circuit configuration may be applied. Since the output of the interpolation circuit is output in multiple values, the binarization circuit 112
To binarize. As a result, as shown in (ii) of FIG. 17 (b), the original boundary A is made to be B as shown in FIG. Selector 113
Indicates whether to output the mask memory output as it is (select A) or to select and output a mask signal with a smooth boundary after interpolation as described above, which is connected to the I / O port of CPU22. Switching is performed as necessary according to the signal 608. Therefore, for example, the interpolation output is selected by the signal 608,
Further, when the ECH is switched to select the output of the area restriction mask by the selector 89 in FIG.
As shown in FIG. 8A, a non-rectangular figure can be cut out using a mask. The output of the mask memory of the bit map memory 91 is taken out from the signal line 607 in FIG.
When selected by the selector 114 and synthesized by the synthesizing circuit 115 described later, the result becomes as shown in FIG. 18 (b).

Reference numeral 116 in FIG. 2 denotes a density conversion circuit which can change the density and gradation for each color as shown in FIG. 19, and is constituted by an LUT (look-up table) or the like. 118
This is a repetition circuit and is composed of a FIFO as shown in FIG. Reference numeral 609 denotes an HSYNC shown in FIG. 11B, in which a Lo pulse is input as a line synchronization signal once per line, and
Initializes the internal WR (line) pointer (not shown). 611 is input image data, 612 is output image data, and Repeat 616 is a signal for initializing an RD (read) pointer of the FIFO. Therefore, as shown in the timing chart of FIG. 20 (b), the data 1 to 10 written in the FIFO sequentially are input as the repeat signal 616 as shown in the figure, thereby causing "→ 1 → 2 → 3 → 4 → 1". → 2 → 3 → 1 →
Repeated reading is performed as "2 → 3". That is, the same image can be repeated as shown in FIG. 3 (c) by giving the FIFO a Repeat signal 616 formed identically for each line. As shown in FIG. 21A, "1" data is written into the mask area forming memory of the above-mentioned bit map, and the read data is synthesized by the synthesizing circuit 115 in FIG. 1 to form a dotted line (cut line).

As described above, if the repeat signal is controlled by the region generation circuit 69 so as to be generated at the time point shown in FIG. 21A by the repetition circuit 118, a cut line can be formed for the repetition image. "1" as shown in Fig. 21 (B)
By writing the data of (1), it becomes possible to form a darkened area on the image by writing the line as shown in (C). Image signal 612 output from repetition circuit 118
Is input to the image synthesizing circuit 115 and various image processing is performed.

<Synthesis> Next, details of the synthesis circuit will be described with reference to FIG.

The editing process performed here is independent for each specified area.
This is performed programmably based on the data set in the RAMs 135 and 136 shown in FIG. That is, the processing is performed for each code number (hereinafter, referred to as an area code) obtained from the area code generator 130, which will be described in detail later.

Digitizer is used to specify the above area and various editing processes
16. In response to an instruction (command) obtained from the operation unit 20 and the image storage device 3, the CPU bus 508 passes through the CPU to the area code generator 130, RAMs 135 and 136, and registers 140 to 142 of FIG. The corresponding parameters are set.

In FIG. 25A, reference numeral 132 denotes a selector for selecting one of the outputs of the area code generation circuit 130 and the register 131. In addition, 130 is an area code generator that automatically generates an area code according to the synchronization signals HSYNC and CLK,
The register 131 is a register to which a signal from the CPU bus 508 is input. Reference numerals 135 and 136 denote RAMs in which area codes and processing or image data corresponding to the area codes are stored as tables. As shown in FIG. 25 (F), the contents of the tables in the RAMs 135 and 136 are codes input via the selector 132 as input addresses, and codes C ₀ indicating colors to be formed during image formation by the printer in a frame sequential manner. , C ₁ is applied, as its output, having a function code and 8 bits of three bits. The three-bit function code is provided to the decoder 146 via the selector 137. The function code is, for example, a code for giving an instruction such as a character add-on or masking of a specific image area, as described later. The 8-bit data is, for example, density adjustment data of the image signal 612. 139,14
Reference numerals 3 and 145 denote selectors whose selection states are switched in accordance with the outputs S0, S1, S2, S3 and S4 of the decoder, respectively, and 144 is a multiplier for multiplying the outputs of the selectors 143 and 145. Reference numeral 146 denotes the most significant bit MSB 621 of the 6-bit data input via the selector 132 (the area code is generated such that the MSB becomes "1" at the end of each area of the image as shown in FIG. 25 (E)). The signal 61 shown in FIG.
The decoder decodes three of the character signal indicated by 3,614 and the function code input via the selector 137.

Next, the above-described area code will be described. The area code is a means for assigning a number, that is, an area code to each area when the area 148 is specified on the document 147 using the digitizer 16 or the like as shown in FIG. In this embodiment, the entire area of the document is assumed to be area code "0", and points a, a in FIG.
For example, a rectangular area having a diagonal line b is set as an area code "1", and a rectangular area having a diagonal line between points c and d is set as an area code "2". Here, for example, when scanning is performed in the AB section shown in the figure, the area code is generated at the timing shown in the figure below simultaneously with the scanning. C-
The same applies to the D and EF sections. An area code is generated at the same time as scanning of such an original, and the areas are distinguished by the area codes to realize different image processing and editing in real time for each area.

The above setting is performed by the digitizer 16 and the operation unit 20 as described above. The number of areas that can be set is determined by the number of bits of the area code. For example, if n bits are set, 2 ⁿ areas can be set.

Next, FIG. 25 (C) shows an example of a schematic internal configuration diagram of the area code generation circuit shown in FIG. 25 (A) 130. The generation circuit 130 is a circuit that generates the area code described above in real time simultaneously with the operation of the original, and sets the coordinates and the area code of the area obtained by the area designating means such as the digitizer to programmatically generate the area code. Is to be generated. The details will be described below.

The RAMs 153 and 154 are memories each having a capacity of one main scanning line in a 7-bit 1-word configuration. This RAM is connected to the CPU via a CPU address bus 627 and a data bus 625. Reference numeral 149 generates a RAM address by counting Video CLK with an address counter. The counter 149 is reset by HSYNC, and the same address is selected every time a new line is scanned.
2 to RAM 153, 154. Therefore, the RAMs 153 and 154 read data from the start according to the reset. 155 is an interrupt generator which counts the number of HSYNCs input from the CPU by the CPU data bus 625 and the chip select 624 as a pre-programmed number.
In addition to generating an interrupt signal INT at the PU, the toggle operation of the JK flip-flop 158 causes the address counter 1 to operate.
The RAM read by 49 is also switched. 151,152,1
Reference numeral 56 denotes a selector, which selects one of the A and B inputs according to the output of the flip-flop 158, so that the RAMs 153 and 154 are selected.
Either one is selected.

FIG. 25D is an explanatory diagram showing a data structure of the RAMs 153 and 154. As shown in the figure, MSB is divided into 1 bit and lower 6 bits, and the MSB indicates a change point between the designated area and the unspecified area as described above, and the lower 6 bits store a changing area code. The address of the RAM corresponds to the Y coordinate which is the main scanning direction. FIG. 25D shows, for example, the RAM data when scanning between AB in the designated area 159 (area code "20") on the document 150 shown in FIG. 25E.
At this time, the entire area of the original is set to the area code “0”. Conversely, the set area is an example when the area code “20” is set. The RAMs 153 and 154 are sequentially read from the RAM set as described above from the address generated from the address counter 149, and an area code is generated. For example, in the case of scanning the section shown in FIG. 25 (E) A-B, immediately after the start of scanning, the MSB "1" lower order is output as the RAM output.
As for 6 bits, “0” (area code “0”) is read out, and as shown in FIG. 25 (C), a latch using the MSB627 as a latch signal.
The lower 6 bits are latched by 157, and an area code "0" is output. Also when the point a (O, P) is reached, the MSB "1" and the lower 6 bits "20" are read out as the RAM output, and latched in the same manner as described above to output the area code "20". Area code "2" until the address further advances and the next MSB becomes "1"
"0" is output, that is, the address r is read out, and the area code "20" is continuously output from the latch 157 until data is newly latched as described above.

When the scanning further proceeds and the main scanning in the Y direction ends, X
HSYNC is incremented by one in the direction, and HSYNC is counted by the interrupt generator 155. At this time, as described above, the address counter 14
9 is reset, and the read address is also restarted from 0. Further, since the area is rectangular, the same data, that is, one of the RAMs 153 and 154 can be continuously read out until the scanning in the section CD including the point b in FIG. Container 155
Next, the count number of the X-direction HSYNC, in this example (qo)
Is set, when the scanning from the section AB to the section CD is completed, the interrupt generator 155 outputs the interrupt signal I.
NT is generated, and at the same time, the RAM read by the selector 156 is switched by the toggle operation of the JK flip-flop 158 in FIG. 25 (C). As a result, the next area information programmed in advance is output from the RAM selected by the selector 156. In addition, the occurrence of the interrupt INT causes the CPU to generate another interrupt again from the coordinates of the area and the area code obtained by the above-described means to the interrupt generator 155 and the paused RAM, that is, the RAM not selected by the selector 156. Set the signal according to the specified area. Such setting is performed by the CPU by controlling the data bus 625 and the chip select signals C ₂ ′ and C ₃ ′. The configuration described above, ie, switching between two RAMs sequentially, and programming the idle RAM by the CPU to reduce the area code for the entire screen of the original with a small memory capacity
Can generate 626.

As described above, the area code 626 output from the area code generation circuit 130 shown in FIG.
And an image signal, and performs an editing process for each area based on the area code.

Although the area code generator 130 can generate an area code only for a rectangular area, the present embodiment is configured to be able to handle a non-rectangular area. 131 and 132 are provided for such a configuration.

A register 131 shown in FIG. 25A is connected to the CPU bus 508. An area code corresponding to the non-rectangular area is set in this register in advance.

At this time, as will be described later, when the non-rectangular area signal 615 is input from the image storage device 3, the value set in the register 131 is selected by the selector 132 using the signal 615 as a select signal, and the non-rectangular area signal Can be obtained.

As described above, the area code has 6 bits in this embodiment, and the MSB 621 1 bit has a decoder 146 and a selector 137.
And the other signals are input to the RAMs 135 and 136 in parallel.

The RAMs 135 and 136 have a programmable configuration connected to the CPU by a CPU bus (collectively referred to as a data bus 625 and an address bus 627) 508.

FIG. 25 (F) shows the data structure of the RAMs 135 and 136. 133
Is a schematic diagram of the configuration of the RAM, and area code 4 is used as an address input
A total of 6 bits, ie, a bit and a color select signal 629, 2 bits, are input. At this time, the color select signals C ₀ , C ₁ , and C ₂ are changed from the LSB to ₂ bits C ₀ , C ₁ to select which of the four colors the image signal transmitted in a frame-sequential manner.
The access address is changed for each area code and color.

In the present embodiment, as will be described later, when an image is formed by the printer 2, the image is transferred in the order of M (magenta), C (cyan), Y (yellow), and Bk (black) for each color.
At this time, the type of color to be transferred is determined by the color select 629 signals C ₀ and C ₁ shown in FIG. 25A (the same signals as C ₀ and C ₁ shown in FIG. 10A). I have. FIG. 25 (F)
134 shows a detailed diagram of the data structure. 3 bits from MSB as shown
Has a function code, and by decoding this code, different image processing is performed according to the code. In this embodiment, six types of image editing can be performed for each area code or color by expressing the function code with 3 bits. The lower 8 bits store various parameters at the time of image processing and editing according to the function code.

The 3 bits from the data MSB selected from the area code and the color select signal, that is, the function code, are input to the selector 137 shown in FIG. 25 (A) 137, and 3bi output from the two RAMs by the area code MSB 621.
Switching of function code of t. On the other hand, the lower 8 bits of data are also selected and output by the selector 139 by the select signal S1 from the decoder 146.

The selected function code is combined with the character signal 622 input to the decoder 146 and the area code MSBbit 621 to generate a control signal 623 for performing an editing process. Each control signal is used as a selector selection signal and editing is performed by changing the signal flow. In this embodiment, the following six editing functions are realized by the control signal.

Area through This function is to output the image signal without performing any processing on the specified area. The input image signal passes through a negative / positive inversion circuit (described later) shown at 138 and is selected by S2.
It is selectively output from 143 and input to multiplier 144. On the other hand RAM
One of the data is selected from the selector 139 by S1 and further passes through a selector 145 determined by S3 and S4. The data is calculated and output by the multiplier 144 with the image signal. At this time, the density of the image is determined from the RAM data input to the multiplier 144, and if a different count is set for each color sent in a frame-sequential manner, the density and color balance can be varied independently for each area. .

That is, after the user sets an area using the operation panel and then sets the color balance of the area, the CPU writes the set value to the RAM 135 or the RAM 136 via the bus 508. Further, the B input of the selector 145 may be selected and multiplied by the image signal 612 and the multiplier 144.

Area masking This is a function to output an image uniformly painted in any other color over the entire specified area. For example, while scanning an area in which this function is set, data in the RAM is selected instead of an image signal by S2 and input to the multiplier 144. On the other hand, the coefficient selects the register 142 from the control signals S3 and S4 and is connected to the CPU via a bus (not shown), and an appropriate coefficient such as "1" is stored in advance by the CPU. The operation is performed by the multiplier 144 and output.

Insertion of character in area (1) For example, as shown in FIG.
In this mode, characters such as 160 shown in 9 are inserted.
For example, as shown at 161, character data is stored in a bit map memory or the like in advance. The binary data of the character is scanned and read out of the memory at the timing shown in FIG.
This signal is input as a character signal shown in FIG. 25 (A) 622, and the selector 143 is switched. That is, when the character signal 622 is High, the selector 143 is connected to the RAM 135 or
The decoder 146 performs the insertion by outputting the data S0 to S4 that select the data 136 and select the image signal when the data is low. Further, S3 and S4 change together with the character signal, and the coefficient of the multiplier 144 selects the register 140 when the character signal 622 is high. Again, as mentioned earlier,
It is connected to the bus and sets an appropriate coefficient in advance. Normally, 1 is set in the register 140. In particular, by changing the coefficient set in the register 140, the density of the inserted character can be freely changed.

Insertion of characters in area (2) As shown in FIG. 25 (H), a function of masking the inside of a specified area with a certain specified color and inserting characters in the same area with another specified color as described above. is there. During the scanning of the designated area, the selector 143 selects the data in the RAM as described above. At this time, as described above, the selector 139 is switched from the character signal obtained from the bit map memory shown in FIG. That is, if it is not a character, the data of RAM 135 is output.
This is implemented by selecting 36. It should be noted that, for example, density data of characters in the area is written in the RAM 136 and density data of characters other than the characters in the area is written via the CPU bus 508 in advance.

In the same manner as described above, the registers 142 and 140 are selectively output for the coefficient together with the character signal. The operation is performed by the multiplier 144 and output.

That is, since the registers 140 and 142 are separately provided, the density of the character part and the density other than the character part can be set independently.

Negative / Positive Inversion in Area This function is to output only the image in the area after negative / positive inversion, and switch the negative / positive inversion circuit 138 by the control signal S0. The output from 138 is output with the same settings as the through function.

Negative / Positive Inverted Character Insertion in Area A combination of the above-described character insertion function in area (1) and the negative / positive inversion in area described above is a function of inserting characters into an image of negative / positive inversion in area. Since the character inserting means is the same as the above-mentioned means, the description is omitted.

In the embodiment described above, the decoder of FIG.
The operation of 146 is shown in FIG.

1 to 6 shown in the leftmost column in FIG.
Are shown. Also, the left side shown as “input” in the figure is the input of the decoder 146, and the right side shown as “output” is the output S0 to S4 of the decoder 146.

The image information processed by the video processing unit 12 as described above is output to the color printer 2 via the printer interface 56.

<Description of Color Printer 2> Next, the configuration of the color printer 2 will be described with reference to FIG.

In the configuration of the printer 2 in FIG. 1, reference numeral 711 denotes a scanner, which is a laser output unit that converts an image signal from the color reader 1 into an optical signal, a polygon mirror 712 of a polyhedron (for example, octahedron), and rotates the polygon mirror 712. And an f / θ lens (imaging lens) 713 and the like. Reference numeral 714 denotes a reflection mirror that changes the optical path of the laser beam from the scanner 711 indicated by a one-dot chain line in the figure, and 715 denotes a photosensitive drum.

The laser light emitted from the laser output unit is reflected by the polygon mirror 712, and the f / θ lens 713 and the reflection mirror 714
Scans the surface of the photosensitive drum 715 linearly (writer scan) to form a latent image corresponding to the original image.

Also, 717 is a primary charger, 718 is an overall exposure lamp, 723
Is a cleaner section for collecting the residual toner not transferred,
724 is a pre-transfer charger, and these members are the photosensitive drum 7
It is located around 15. Reference numeral 726 denotes a developing unit for developing an electrostatic latent image formed on the surface of the photosensitive drum 715 by laser exposure, and includes 731Y (for yellow) and 731M.
(For magenta), 731C (for cyan), 731Bk (for black) are development sleeves that directly contact the photosensitive drum 715 to perform development, 730Y, 730M, 730C, and 730Bk are toner hoppers that hold spare toner, and 732 is development This is a screen for transferring the medicine. The sleeves 731Y to 731Bk, the toner hoppers 730Y to 730Bk, and the screw 732 constitute a developing unit 726, and these members are composed of the developing unit 726.
Around the rotation axis P.

For example, when forming a yellow toner image, yellow toner development is performed at the position shown in FIG. To form a magenta toner image, the developing unit 726 is rotated about the axis P in the figure, and a developing sleeve 731M in the magenta developing device is disposed at a position in contact with the photoconductor 715. Similarly, development of cyan and black is performed by rotating the developing unit 726 about the axis P in the drawing.

Reference numeral 716 denotes a transfer drum that transfers the toner image formed on the photosensitive drum 715 to paper, and 719 denotes a transfer drum 716.
An actuator plate 720 for detecting the movement position of the actuator, a position sensor 720 for detecting that the transfer drum 716 has moved to the home position by approaching the actuator plate 719, a transfer drum cleaner 725, a transfer drum cleaner 727
Is a paper press roller, 728 is a static eliminator, 729 is a transfer charger, and these members 719, 720, 725, 727, 729 are transfer rollers 716.
It is arranged around.

On the other hand, 735 and 736 are paper feed cassettes for collecting paper (sheets), 737 and 738 are paper feed rollers for feeding paper from the cassettes 735 and 736, and 739, 740 and 741 are timing rollers for timing of paper feeding and conveyance. The paper fed and conveyed via these is guided by a paper guide 749 and wrapped around the transfer drum 716 while the leading end thereof is carried by a gripper described later, and proceeds to an image forming process.

Reference numeral 550 denotes a drum rotation motor, and the photosensitive drum 715
And the transfer drum 716 is rotated synchronously. 750 is a peeling claw that removes the paper from the transfer drum 716 after the image forming process is completed.
Reference numeral 24 denotes a transport belt that transports the removed paper, and reference numeral 743 denotes an image fixing unit that fixes the paper transported by the transport belt 742. In the image fixing unit 743, a motor 747 attached to a motor mounting unit 748 is used. The torque of the transmission gear
The image is transmitted to a pair of hot-press rollers 744 and 745 via the 746, and an image on a sheet conveyed between the hot-press rollers 744 and 745 is fixed.

The printout processing of the printer 2 having the above configuration will be described below with reference to the timing chart of FIG.

First, when the first ITOP comes, a Y latent image is formed on the photosensitive drum 715 by the laser beam, and this is a developing unit 731Y.
Then, the image is transferred to a sheet on a transfer drum, and a magenta print process is performed. Then, the developing unit 726 rotates around the axis P in the drawing.

When the next ITOP 551 arrives, an M latent image is formed on the photosensitive drum by the laser beam, and cyan print processing is performed by the same operation. This operation is similarly performed for C and Bk corresponding to the following ITOP 551, and yellow print processing and black print processing are performed. When the image forming process is completed in this manner, the sheet is then peeled by the peeling claw 750, the image is fixed by the image fixing unit 743, and the printing of a series of color images is completed.

<Description of Film Scanner 34> The film scanner 34 shown in FIG. 1 will be described with reference to FIG.

3001 is a light source (lamp) for illuminating transparent originals, 3002 is a light source
A heat ray absorption filter for removing heat rays from the light rays from 3001 and 3003 is an illumination optical system for converting illumination light passing through the filter 3002 into a parallel light flux. Reference numeral 3004 denotes a sub-scanning drive table that moves a transparent original in the sub-scanning direction, 3005 denotes a rotary table that rotates the transparent original, 3006 denotes a film holder that stores the transparent original, 3007
Is a transparent original such as a 35 mm photographic film. Reference numeral 3008 denotes a movable mirror that switches the optical path of a light flux (original image) transmitted through the transparent original 3007, 3009 denotes a mirror that deflects the optical path of the original image, and 3010
Reference numeral denotes an imaging lens that forms an original image that has passed through the mirror 3009.

Reference numeral 3017 denotes a lamp holding member that supports the light source 3001. 30
Numeral 64 denotes a CCD line sensor 3061 using a CCD (charge coupled device) array having R, G, and B color separation filters for photoelectrically converting a transmission original image formed by an imaging lens 3010 with a CCD alignment mechanism. , 3062, 3063.

3025 is an analog circuit that amplifies the analog output of the CCD line sensors 3061, 3062, and 3063 and performs A / D (analog / digital) exchange. 3026 is an adjustment signal that generates a standard signal for adjustment to the analog circuit 3025. A source 3027 is a dark correction circuit that performs dark correction on the R, G, and B digital image signals obtained from the analog circuit unit 3025, 3028 is a shading correction circuit that performs shading correction on the output signal of the dark correction circuit 3027, 3029 Is the shading correction circuit 30
An image shift correction circuit that corrects a pixel shift in the main scanning direction with respect to the output signal of 28.

3030 converts the R, G, B signals passed through the image shift correction circuit 3029 into, for example, Y (yellow), M (magenta),
This is a color conversion circuit that converts each color signal of C (cyan). Reference numeral 3031 denotes a look-up table (LUT) for performing LOG conversion and γ conversion of a signal. The output of the lookup table (LUT) 3031 is connected to an interface circuit 3038 and a minimum value detection circuit 3032.

3032 is a minimum value detection circuit for detecting the minimum value of the output signal of the lookup table 3031, and 3033 is a minimum value detection circuit 3033.
Look-up table (LUT) that obtains a control amount for under color removal (UGR) according to 32 detected values, 3034 is a masking circuit that performs a masking process on the output signal of look-up table 3031, and 3035 is a masking circuit A UCR circuit (undercolor removal circuit) that performs undercolor removal processing on the output signal of 3034 based on the output value of the lookup table 3033. 303
Reference numeral 6 denotes a density conversion circuit for converting the recording density of the output signal of the UCR circuit 3035 to a designated density, and reference numeral 3037 denotes a scaling processing circuit for converting the output signal of the density conversion circuit 3036 to a designated scaling factor.

Reference numeral 3038 denotes an interface circuit (I / O) for transmitting signals between the color reader 1 and the image storage device 3 shown in FIG.
F) and 3039 are controllers for controlling the entire apparatus. A CPU (central processing unit) such as a micro computer, a ROM (read only memory) in which processing procedures are stored in a program form, It has a RAM (random access memory) used for storing data and as a work area.

3040 is a scaling circuit 3037 to an interface circuit 303
8, a peak detection circuit for detecting the peak value of the output value input via the controller 3039, 3041 is the controller 3039
An operation unit 3042 for giving various instructions to the display unit 3042 is a display unit for displaying the control state of the controller 3039 and the like.

Reference numeral 3034 denotes a lens aperture control unit that controls the aperture of the above-described imaging lens 3010, reference numeral 3044 denotes a lens distance ring control unit that adjusts the focus of the imaging lens 3010, and reference numeral 3045 denotes a mirror driving unit that drives the movable mirror 3008.

3048 is a film feed control unit and a film holder.
Drive 3006 to send film. 3049 is the sub scanning drive base 30
A sub-scanning control unit for controlling the scanning of 04, a lamp light amount control circuit 3050 for controlling the light amount of the light source (lamp) 3001, and a lamp position driving source 3051 for adjusting the position of the light source 3001 via the lamp holding member 3017 .

Reference numeral 3052 denotes a timing generator which generates a timing signal (clock) under the control of the controller 3039;
Is a bus connecting the above-described control units and processing circuits to the controller 3039, 3054 is a data line for inputting / outputting image data to and from an output device, and 3055 is a synchronization signal Hsyn for the output device.
A synchronization signal line for inputting / outputting c, Vsync and the like, and a communication line 3056 for exchanging commands between the interfaces according to a predetermined protocol.

 Next, the operation of each unit will be described.

The light source 3001 is, for example, a light source such as a halogen lamp, and the light emitted from the light source 3001 passes through a heat ray absorbing filter 3002 and an illumination optical system 3003 to illuminate a transparent original 3007 such as a 35 mm photographic film placed on a film holder 3006. .
The image of the transmission original 3007 passes through a projection lens 3011 and mirrors 3012 and 3013 on a screen (not shown) or a mirror 3009, an imaging lens 3010, and a three-color separation prism 3021 when the optical path is switched by a movable mirror 3008. And projected on the CCD line sensors 3022 to 3024.

In the case of the mode described above, the CCD line sensor 3
022 to 3024 are driven synchronously by the clock of the timing generator 3052, and the output signal of each CCD line sensor is input to the analog circuit 3025. Analog circuit 30
Numeral 25 is composed of an amplifier and an A / D converter. The A / D converter synchronizes the signal amplified by the amplifier with a timing clock for A / D conversion output from a timing generator 3052.
A / D conversion is performed by the converter.

Next, the level correction of the dark signal is performed by the dark processing circuit 3027 on each of the R, G, and B digital signals output from the analog circuit 3025, and then the shading correction circuit 30
The shading correction in the main scanning direction is performed at 28, and the pixel shift in the main scanning direction is further corrected by a pixel shift correction circuit 3029, for example.
The correction is made by shifting the write timing of the FIFO (first-in / first-out) buffer.

Next, the color conversion circuit 3030 corrects the color of the color separation optical system 3021, converts the R, G, B signals into Y, M, C color signals according to the output device, , Q color signal.
In the next lookup table 3031, a luminance linear signal is converted to LOG or an arbitrary γ conversion is performed by referring to the table.

Reference numerals 3032 to 3037 constitute an image processing circuit for outputting an image in four colors of Y, M, C, and Bk (black) mainly used in a printer such as a color laser copying machine. Here, a combination of the minimum value detection circuit 3032, the masking circuit 3034, the look-up table 3033, and the UCR circuit 3035, masking of the printer and UCR (under color removal) are performed.

Next, the density conversion circuit 3036 converts each density signal into a table, and further performs a scaling process in the main scanning direction by a scaling process circuit 3037. After the scaling process, Y ', M', C ', Bk
The signal is sent to the color reader 1 via the interface circuit 3038.
Send to

The interface circuit 3038 is connected to the aforementioned Y ', M',
In addition to the C 'and Bk' signals, image information R (red), G (green), B (blue) from the lookup table 3031
Can also be output.

This is determined by the device to which the film scanner 34 is connected, and when connected to the color reader 1, Y ', M',
Image data is output in the form of C ', Bk', or in the form of R, G, B when connected to the image storage device 3.

In the embodiment shown in FIG. 45, as a method for setting a film on the film scanner 34, as shown in FIG.
Types are possible.

Above figure is for operating automatically If you put many pieces read or a which samples the image sample to be read by excisional the film was placed in a mount M ₁ auto thien Gee to many single once by default is there.

The following figure is provided with a sensor for performing a transport mechanism of carrier in the magazine autoloader M _2, the alignment of the carrier.

<Description of Image Storage Apparatus 3> First, the storage method from the color reader 1 to the image storage apparatus 3 in the present embodiment and the SV which is one of the input video devices are described.
A method of storing video information from the recording / reproducing device 31 in the image storage device 3 will be described. A method for storing image information from the film scanner 34 in the image storage device 3 will also be described.

Next, an embodiment of the present invention in which image information is read from the image storage device 3, processed, and then image formation is performed by the color printer 2, will be described in detail.

<Image Storage from Color Reader 1> The reading area setting by the color reader 1 is performed by a digitizer described below.

 FIG. 23 shows an external view of the digitizer 16.

An operation method for transferring the image data from the color reader 1 to the image storage device 3 will be described later. Mode setting surface 420
Is for setting an arbitrary area on the read original. Point pen 421 is used to specify the coordinates.

In order to transfer image data in an arbitrary area on the document to the image storage device 3, after setting the image registration mode by the operation unit 20, the reading position is designated by the point pen 421.
The operation method will be described later.

The information of this reading area is stored in the communication line 505 in FIG.
To the video processing unit 12 via In the video processing unit 12, this signal is sent from the video interface 201 to the image storage device 3 via the CPU control line 508.

A process of sending information of the designated area of the original 999 to the image storage device 3 will be described.

FIG. 24 shows an example of the address of the information (points A and B) of the area designated by the point pen 421 of the digitizer 16.

The color reader 1 outputs the VCLK signal, the ITOP, the ▲ ▼ signal and the like to the image storage device 3 together with the image data 205 via the signal line 207. FIG. 26 shows the timing chart of these output signal lines. Also video interface 20
1 is the data flow shown in FIG.

As shown in FIG. 26, when the start button of the operation unit 20 is pressed, the stepping motor 14 is driven, and the original scanning unit 11 starts scanning and reaches the leading end of the original.
The ITOP signal becomes "1" and the original scanning unit 11 reaches the area designated by the digitizer 16, and this area is being scanned.
The signal becomes "1". For this reason, the read color image information (DATA 205) while the signal ▲ is “1” may be captured.

As shown in FIG. 26, the image data transfer from the color reader 1 is performed by controlling the video interface 201 as shown in FIG. Is output from the video interface 201, and the R data 205
The R, G data 205G and B data 205B are sent to the image storage device 3 in real time.

Next, how the image storage device 3 stores the image data and the control signal in detail will be described with reference to FIGS.
This will be described with reference to FIG.

The connector 4550 is connected to the video interface 201 in the color reader 1 shown in FIG.
R data 205R, G data 205G, and B data 205B are 94
It is connected to the selector 4250 via 30R, 9430G, 9430B. VCLK sent from video interface 201, ▲
▼ Signal, ITOP is passed through signal line 9450S, selector 4250
Has been entered. Also, before reading the original,
The area information specified by the digitizer 17 is transmitted to the communication line 94.
It is input to the reader controller 4270 through 60, and from here
The data is read by the CPU 4360 via the CPU bus 9610.

The R data 9430R, G data 9430G, and B data 9430B input to the selector 4250 via the connector 4550 are
After being selected by 250, signal lines 9421R, 9421G, 942
1B, and input to the filter circuit 9500.

FIG. 28A is an explanatory diagram showing the filter circuit 9500 in detail.

The image signals 9421R, 9421G, 9421B are stored in FIFO memories 4252R, 425.
Input to 2G, 4252B. It is controlled by a timing control signal 9450 received from the system controller.

The output from the FIFO memories 4252R, 4252G, 4252B is a signal of one main scanning delay with respect to the image information 9421R, 9421G, 9421B, passes through the signal lines 9422R, 9422G, 9422B and passes through the adder 4253.
Input to R, 4253G, 4253B. Adders 4253R, 4253B, 4253G
Averages two pixels in the main scanning direction and two pixels in the sub-scanning direction, that is, four pixels, and outputs the result to signal lines 9423R, 9423G, and 9423B.

The selectors 4254R, 4254G, and 4254B output the image signals 9421R, 9421G, and 9
The signal 421B or the signal 9423R, 9423G, 9423B obtained by addition and averaging is selected, and the signals 9420R, 9420G, 9420B are input to the respective image memories.

The select signals of the selectors 4254R, 4254G, and 4254B are
Although not shown, it is programmable controlled by the CPU 4360.

As described above, for example, when a halftone image or the like is read from the color reader 1, the filter circuit 9500 averages images to prevent image deterioration due to moire.

28 (B) and (C) are block diagrams showing the internal configuration of the selector 4250. As shown in the figure, the image signal from a color reader 1 or, as will be described later, various video equipment such as a still video reproducer or a film scanner can be arbitrarily switched. These switching signals can be programmably controlled by the CPU via the decoder DC.

For example, when storing image information from the color reader 1 to the image storage device 3, the control signals SELECT-A and SELECT-D are set to 0.
Set to tristate buffer 4251R, G, B, HS, VS,
By utilizing only CK, EN and 4252R, G, B, HS, VS, CK, EN, and setting all other tri-state buffers to high impedance, image signals 9430R, G, B from the color reader 1 and control signals 9450S is associated with 9421R, G, B and 9420S, respectively.

As described above, the image signal selected by the selector 4250 passes through the filter 9500, and is output from the system controller 4210.
Is stored in each memory under the control of. The details will be described below.

The system controller 4210 includes selectors 4254R, 4254G,
Image data 9420R, 942 via 4254B and Filter 9500
Of the 0G and 8420B, only the effective area of the image is stored in the FIFO memory 4050.
Transfer to AR, 4050AG, 4050AB. At this time, the system controller 4210 also performs a trimming process and a scaling process at the same time.

Further, the FIFO memories 4050AR, 4050AG, and 4050AB absorb the difference in clock between the color reader 1 and the image storage device 3.

These processes of the present embodiment are shown in the circuit diagrams of FIGS. 27 and 29,
This will be described below with reference to the timing chart of FIG.

FIFO memories 4050AR, 4050AG, 40 via the filter 9500 from the selectors 4253R, 4253G, 4253B shown in FIG.
Prior to the data transfer to 50AB, the effective area in the main scanning direction of the area specified by the digitizer 16 is written to the comparators 4243 and 4233 shown in FIG.
FIG. 29 is a diagram showing the configuration of the system controller 4210 and the configuration of the FIFO memories in the memories A to M.

The comparator 4232 stores the start address in the main scanning direction of the area designated by the digitizer 16 in the comparator.
4233 is set with a step address.

Further, the sub-scanning direction of the area designated by the digitizer 16 is controlled by controlling the selector 4213 to select the CPU bus 9610 side to be valid, and “0” data is written in the valid area of the area designated by the RAM 4212, Write "1" data to the invalid area.

In the scaling process in the main scanning direction, the scaling factor is set to the rate multiplier 4234 shown in FIG. 29 via the CPU bus 9610. Further, the scaling process in the sub-scanning direction can be performed by data written to the RAM 4212.

FIG. 30 is a timing chart when the trimming process is performed. As described above, when only the area designated by the digital 16 is stored in the memory (trimming processing), the trimming position in the main scanning direction is set in the comparators 4243 and 4233 shown in FIG. The position is such that the selector 4213 is set to the CPU bus 9610 side and the CPU writes the data in the RAM 4212 ((example) trimming area in the main scan 1).
000 to 3047, and sub-scanning 1000 to 5095). That is, RAM
Reference numeral 4212 denotes “1” or “0” in an area corresponding to each address output from the counter 4214 input through the selector.
Is written by the CPU. As will be described later, “1” inhibits reading of the memories 4050R, G, and B, and “0” is data that causes reading.

The trimming section signal 9100 in the main scanning direction is
▼ The counter 4230 operates in synchronization with 9452 and CLKIN 9456. When the counter output 9103 becomes 1000, the output of the comparator 4232 becomes 1 and the flip-flop 4235
Output Q becomes 1. Subsequently, when the counter output 9103 becomes 3047, the output of the comparator 4233 becomes 1 and the output of the flip-flop 4235 changes from 1 to 0. In the timing chart of FIG. 30, the output of the rate multiplier 4234 is 1 because the unity magnification process is performed. Addresses 1000 to 3047 of the color image information input to the FIFO memories 4050AR, AG, AB by the trimming section signal 9100 are written to the FIFO memories 4050AR, AG, AB.

Also, from the comparator 4231 ▲ ▼ 94
In response to 52, a signal 9107 delayed by one pixel is output. Thus, ▲ ▼ input of the FIFO memory 4050AR, AG, AB, ▲
▼ CLKIN9456 and CLK9453 input to FIFO memory 4050AR, AG, AB by giving phase difference to input
Absorb the difference of the period.

Next, trimming in the sub-scanning direction is performed by first selecting the counter 4214 that controls the selector 4213 in FIG.
Is output from the RAM 4212. The section signal 9104 is synchronized with the signal 9107 by a flip-flop 4211 and input to the read enable of the FIFO memories 4050AR, AG, AB. That is, the image information stored in the FIFO memories 4050AR, AG, AB is output only during the section where the trimming signal 9101 is "0" (n 'to m').

Also, the signal 9101 is input to the counter controller 9141 as shown in FIG. 32 and becomes a counter enable signal,
In addition, it is a write enable signal for the memories 4060A-R, G, and B, and as described above, the image information output from the FIFO memories 4050A, R, G, and B is immediately output according to the address output from the counter 4080A-0. The data is written to the memories 4060A-R, G, B.

In the above description, only the trimming process has been described, but the scaling process can be performed simultaneously with the trimming. To change the magnification in the main scanning direction, use the rate multiplier 4234 to set the magnification to CP.
Set via U bus 9610. In the sub-scanning, a scaling process can be performed by data to be written to the RAM 4212.

FIG. 31 shows a timing chart when the trimming process and the scaling process (50%) are performed.

FIG. 31 is a diagram showing an example of a timing chart when the image data from the selectors 4254R, G, B are scaled down by 50% and transferred to the FIFO memories 4050AR, AG, AB.

The set value of 50% reduction is set to the rate multiplier 4234 of FIG. 29 via the CPU bus 9610. At this time, the output of the rate multiplier 9106 has a waveform in which “0” and “1” are repeated for each pixel in the main scanning direction as shown in FIG. A logical product signal 9100 of this signal 9106 and the section signal 9105 generated by the comparators 4232 and 4233 controls the write enable to the FIFO memories 4050AR, AG and AB to reduce the size.

In the sub-scanning, as shown in FIG. 31, the write data to the RAM 4212 (read enable signal to the FIFO memories 4050AR, AG, AB) is set to "1" (read-out prohibited) in the image data valid area. Only the image data reduced by 50% is sent to the image memories 4060AR, AG, AB. In the case of FIG. 31, the read enable signal 9101 is reduced by 50% by repeating "1" and "0" data alternately.

In other words, trimming and scaling in the main scanning direction
Control the write enable of FIFO memory 4050AR, AG, AB,
Trimming and scaling in the sub-scanning direction are performed in FIFO memory 40.
Controls the read enable of 50AR, AG, AB.

Next, from the FIFO memory 4050AR, 4050AG, 4050AB, the memory 40
The transfer of the image data to the 60AR, 4060AG, and 4060AB is performed by the counter control 9141A, the counters 4080A-0 to 3, and the control line 9101 shown in FIG. 27C.

Reference numeral 9101 denotes an output of the comparator 4231 shown in FIG. 29, which is used as a read enable RE of the FIFOs 4050R, G, B and a write enable of the memories 4060A-R and B shown in FIG.

The counter control 9141A shown in FIG. 27 (C) is a counter for generating an address for the memories 4060A-R, G, B.
This circuit controls the 4080A-0 to 4080A-3 and has the following three main functions in response to commands from the CPU.

1. CPU read / write mode → Data at any address can be referenced by the CPU.

2. Read mode → The stored image data is read out by the control signal of the system controller, and transferred to the color reader 1 to obtain a print output.

3. Light mode The image from the color reader 1 is stored by the control signal of the system controller.

In any case, the count start address of the counters 4080A-0 to 3 can be arbitrarily set from the CPU. This allows reading and writing from any address. Usually, the start address is address 0.

The control line 9101 is a read enable signal for the FIFO memory, 4050AR, AG, AB, and the counter control 9141
Input to A to control the counter. More memory 4060A
It is also a write enable signal for R, AG, AB.

When the counter control 9141A is in the light mode,
The input control signal 9101 is used as a counter enable signal for the counters 4080A-0 to 3-0A-3, and the counter control may select a counter according to a CPU command or select all counters. 9140A is FI when the control line 9101 which is the counter selection signal is “0”.
Image data read from the FO memories 4050R, G, B is input to the memories 4060R, G, B.

At this time, for example, if the counter 4080A-0 is selected, the enable of the counter 4080A-0 is "0", and the signal 9120-0 counted up in synchronization with the CLK9453.
Is output from the counter 4080-0, passes through the selector 4070, and is input to the ADR9110 of the memories 4060AR, AG, AB.

At this time, since the write enable ▲ ▼ 9101 of the memories 4060AR, AG, AB is also “0”,
Image data 9090R, G, B input to G, B are stored.

Since the memory capacity in this embodiment is 1 Mbyte for each color, the image data in the reading area in FIG.
By reducing the size by 50%, the read image data is converted into data having the maximum capacity of the memory of the image storage device 3 and stored.

Further, in the above embodiment, the CPU 4360 calculates an effective area from the information of the area specified by the digitizer 16 of the A3 document,
Data corresponding to the comparators 4231 to 4233, the rate multiplier 4234 and the RAM 4212 shown in FIG. 29 are set.

In the present embodiment, since the data capacity of the read image is larger than the provided image memory capacity, a reduction process is performed, the data is converted into a storable capacity, and then stored in the image memory. But,
If the data capacity of the read image is smaller than the provided image memory capacity, the trimming information data is set in the comparators 4232 and 4233 that control writing to the memory in the area specified by the digitizer 16, and the rate multiplier 4234 is set. Sets the same magnification. In the write data to the RAM 4212, the image effective area is all set to “0”, and the others are set to “1”, and are set to the same magnification.

Further, in order to store the read image in the memory while maintaining the aspect ratio (vertical / horizontal ratio), the CPU 4360 first obtains the number of effective pixels “x” from the area information sent from the digitizer 16. Next, z is obtained from the maximum capacity “y” of the image storage memory by the following equation.

As a result, (1) When z ≧ 100, the setting of the rate multiplier 4234 is such that the entire effective image area is set to “0” in the 100% RAM 4212 and stored at the same magnification.

(2) When z <100, the setting of the rate multiplier 4234 and the RAM 4212 are both reduced by z%, and stored in the maximum capacity of the memory while maintaining the aspect ratio.

Also in this case, as the data to be written to the RAM 4212, data of “1” and “0” may be written in a timely manner corresponding to the reduction rate “z”.

By controlling in this way, it is possible to perform arbitrary scaling processing with easy control while maintaining the aspect ratio of the input image by controlling only the inside of the image storage device 3, and it is possible to effectively recognize the read image. Become. At the same time, the utilization efficiency of the memory capacity can be maximized.

In addition, the settings described above are stored in the image storage memory (memory
A, B, C, D) and the display (memory M) shown in FIG. 27 (E) can be set independently. When storing images, the same image can be simultaneously stored in different memories at different magnifications, for example. As described above, the data can be stored in the memories A, B, C, D and the memory M.

<Description of Memory E> The memory E in FIG. 27A will be described. No.
Fig. 27 (D-1) shows a schematic diagram of the internal configuration. Memory E
Is a binary image memory (hereinafter referred to as bitmap memory)
The operation is similar to that of the memory A described in the previous section.

Among the image data read from the color reader, the image data to be written to the bit map memory E passes through the selector 4250 and the filter 9500 in the same manner as described in the preceding section, and is stored in the FIFO 4050E-R shown in FIG. 27 (D-1) in the memory E. Written. In such a case, writing is controlled by the write enable 9100 as described with reference to FIG. At this time, in the embodiment, only the R signal is used as an image signal, but any other signal may be used as long as it is represented by a luminance signal. For example, a G signal or a signal obtained by taking a weighted average of R, G, and B at a predetermined ratio may be used. The image data written in the FIFO 4050E-R is read out by the control signal 9101 in the same manner as described in the previous section,
The data is binarized by a binarization circuit indicated by R and sequentially written to a memory. At this time, black becomes “1” and white becomes “0”. The threshold value of the binarization is set by the CPU to a predetermined value via the bus in the register 4.
Write to 053. For example, as shown in FIG. 27 (D-2), a heart-shaped document A having a certain density on a white background is prepared, and an area B is designated as a dotted line in the figure. By reading this area into the bitmap memory E, a binary image of "0" and "1" as shown in the figure is stored in the bitmap memory.

4080E is a counter for controlling the read / write address of the memory 4060ER, 9141E is a counter control for controlling the count state of the counter 4080E, and read by the CPU by the system controller 4210 in the same manner as described in FIG. 29. The writing position is controlled. By sequentially reading this data as indicated by the arrow, a non-short region signal as indicated by F in FIG. 27 (D-2) is output to the signal line 4072 and the selector
Used as 4071 select signal. One input of the selector 4071 is provided with an 8-bit capacity register 4074 connected to the CPU bus so that a predetermined output density value is set in advance, and the other input has a fixed value, for example, 80H. Has been entered. Therefore, when the signal 4072 is "1", the selector outputs the set density value to 4172, and as a result, the set density value is output to the heart-shaped area in the figure.

Also, the most significant bit (MSB) of 4172 is output to 4173 and used as a non-rectangular area signal (referred to as a BI signal).

The above-mentioned 4171 and 4172 correspond to those in FIG. 27 (B). Are input to the video interface 201 shown in FIG.

In the bit map E shown in FIG. 27, the binary image stored in the memory 4060E-R is output as the 27th bit map.
The density set by the register 4074 shown in FIG. (D-1) can be arbitrarily set by rewriting via the CPU. If data of "80H" or more is written in such a register, a bit image is output to the signal line 4173.

<Image Storage from SV Recording / Reproducing Apparatus 31> The system of the present embodiment uses an SV recording / reproducing apparatus as shown in FIG.
It is also possible to store the video image from 31 in the image storage device 3 and output it to the monitor television 32 or the color printer 2. The image processing device 3 also handles the input image.

Hereinafter, a description will be given of how a video image from the SV recording / reproducing device 31 is loaded into the image storage device 3.

First, control of taking in a video image from the SV recording / reproducing apparatus 31 into the image storage device 3 will be described below with reference to the block diagram of the image storage device 3 in FIGS. 27 (A) and 27 (B).

The video image from the SV recording / reproducing apparatus 31 is input as an NTSC composite signal 9000 through an analog interface 4500, and the decoder 4000 outputs four signals of a separate R, G, B signal and a composite SYNC signal 9015R, G,
Separated into B and S.

Also, the decoder 4000 has an analog interface 45
The Y (luminance) / C (chroma) signal 9010 from 10 is decoded in the same manner as described above. 9020R, 9020G, 9020B to selector 4010
Each signal of the 9020S is an input signal in the form of a separate R, G, B signal and a composite SYNC signal.

The selector 4010 is connected to the CPU bus 9610, and the signal 9
Selection of 030R-S and 9020R-S can be made programmable from the CPU.

The 9050R, 9050G, and 9050B signals as the separate R, G, and B signals selected by the selector 4010 are subjected to analog / digital conversion by the A / D converters 4020R, 4020G, and 4020B.

Also, the composite SY selected by the selector 4010
The NC signal 9050S is input to the TBC / HV separation circuit 4030,
The clock signal 9060C, the horizontal synchronization signal 9060H, and the vertical synchronization signal 9060V are further generated from the composite SYNC signal 9050S by the / HV separation circuit 4030, and the image enable signal 9060EN shown in FIG. The enable signal EN is a signal indicating a certain image area.

As described above, the selector 4250 sets the image source to an image from the color reader 1, an image from various video devices (in this embodiment, an SV player is assumed), or a film scanner.
This is a selector for selecting and outputting the image from. The specific operation will be described with reference to FIGS. 28 (B) and (C).

For example, when selecting an image on the video device side, the control signal
SELECT-A and SELECT-B are set to 0 and tri-state buffers 4253R, G, B, HS, VS, CK, EN and 4252R, G, B, HS, VS, C
Making use of only K and EN, setting SEQECT-C, D, E, F, to 1 and setting all other trislat buffers to high impedance, the image signals 9051R, G, B from the video equipment
And synchronization signal 9051S are coupled to 9420R, G, B, 9420S, respectively.

The same applies when inputting image data from another device. Further, the present embodiment is characterized in that a connection buffer with the color reader 1 or the film scanner 34 is used in the selector 4250 in order to use a bidirectional communication line.

In the 9050 output from the TBC / HV separation circuit 4030 of this embodiment, the TVCLK9060C signal is a clock signal of 12.27 MHz, and
▼ 9060H signal is a signal with a pulse width of 63.5 μS,
The 9060V signal has a pulse width of 16.7 ms.

The selector 42 is set so that the video image signal is input.
When switching 50, the CPU switches each switch 4 of the filter 9500.
254R, G, B are switched to the upper side in FIG. Therefore, the data is input to any of the memories A, B, C, and D without substantially applying a filter. Further, when capturing an image from the reader, there is an image in which moire occurs, such as an image of a halftone dot, and accordingly, the switches 4254R, G, B
To prevent the occurrence of moiré, which is switched to the lower side. Next, description will be made again with reference to FIG.

FIFO memory 4050AR, 4050AG, 4050AB
▼ Reset by 9060H signal, TVC starts from “0”
Data 9060R, 9060G, 9060B are written in synchronization with the LK9060C signal. The writing to the FIFO memories 4050AR, 4050AG, 4050AB is output from the system controller 4210.
Performed when signal 9100 is energized.

This FIFO memory 4050AR, 4 by this ▲ ▼ signal 9100
The details of the write control of 050AG and 4050AB will be described below.

The SV recording / reproducing apparatus 31 in the present embodiment conforms to the NTSC standard. Therefore, when the video image from the SV recording / reproducing apparatus 31 is digitized, the screen capacity is 640 pixels (H) × 480 pixels (V). Therefore, first, the CPU 4360 of the image storage device 3 writes the set value to the comparators 4232 and 4233 so as to have 640 pixels in the main scanning direction. Next, the input of the selector 4213 is connected to the CPU bus 9610.
, And “0” for 480 pixels in the sub-scanning direction is written in the RAM 4213.

Also, 100% data is set in the rate multiplier 4234 for setting the magnification in the main scanning direction.

When the image information of the SV recording / reproducing apparatus 31 is stored in the memories 4060AR, AG, AB, the system controller 4210 outputs ▲ ▼ 9060V, ▲ output from the TBC / HV separation circuit 4030.
▼ 9060H, TVCLK9060C are shown in Fig.29 ▲
Connected to ▼ 9455, ▲ ▼ 9452, CLKIN9456.

As described above, by setting the image control signal to the interface of the SV recording / reproducing apparatus, the A / D converters 4020R and 402
The data for one main scan of the video image of 9051R, 9051G, 9051B, which is the output signal from 0G, 4020B, is input to the filter circuit 9500, and the output signals 9420R, G, B are stored in the FIFO memories 4050AR, 4050.
It is stored in 50AG and 4050AB at the same magnification.

<Read processing from image storage device> Next, the memories 4060AR, 4 of the image storage device 3 described above
A process of reading image data from 060AG and 4060AB will be described.

The instruction input when the image output from the memory is formed by the color printer 2 is mainly performed by the digitizer 16 and the operation unit 20 shown in FIG.

For example, when an area where an image is to be formed is designated by a digitizer as shown in FIG. 37, the color reader 1 sends the position coordinates to the CPU 4360 of the image storage device 3 via the control line 9460 connected to the connector 4550. Such position coordinates are output, for example, as 8-dot data.

The CPU 4360 sends the area signal generator 4210-2 (similar to that shown in FIG. 13 (d)) in the system controller 4210 shown in FIG. 27 (F) based on the coordinate information sent to the area signal generator 4210-2. Are programmed to obtain the desired image output. Specifically, data corresponding to the coordinate information is set in the RAMs 85A and 85B shown in FIG. 13 (d). FIG. 27 (F) shows each signal output from the area signal generator as a control signal for each area.

When the above-described program ends, the image storage device 3 waits for a command from the color reader 1, and the image formation is started by pressing a copy start button here.

When the start button is pressed, the color reader 1 sends the command to the CPU 4360 of the image storage device 3 via the signal line 4550, and the CPU 4360 which receives the command switches the selector 4250 instantaneously. In FIGS. 28 (B) and 28 (C), the settings for sending an image from the image storage device 3 to the color reader 1 are as follows: SELECT-C, SELECT-E, SELECT-F are set to “O”, the gate is opened, and other trislats are opened. All buffers are high impedance. Further, the CPU 4360 sets the counter controller of the memory storing the desired image to the read mode.

With the above settings, the start timing signals i-TOP and BD are received from the color reader 1. On the other hand, the color reader 1 obtains an image signal and a CLK image enable signal from the image storage device 3 in synchronization with the timing signal.

First, an embodiment in which an image is formed in accordance with the size of a recording sheet, and then, an embodiment in which an image is formed in an area designated by a digitizer will be described.

<Image Forming Process Corresponding to Size of Recording Paper> In this embodiment, the color printer 2 has two cassette trays 735 and 736 as shown in FIG. 1, and two types of recording paper are set. In this case, A4 size recording paper is set in the upper part, and A3 size recording paper is set in the lower part. The selection of the recording paper is input by the liquid crystal touch panel of the scanning unit 20. The following description is for the case where a plurality of images are formed on A4 size recording paper.

First, prior to image formation, by inputting read image data from the color reader 1, the film scanner 34 or the SV recording / reproducing apparatus to the image storage device 3, the image memories 4060AR, 4060AG, and 4060AB, which will be described later, As shown in the figure, a total of 16 image data of “image 0” to “image 15” are stored.

 Next, press the start key from the operation unit.

As a result, the CPU 22 shown in FIG. 2 detects this key input and automatically sets the image forming position on the A4 size recording paper. When forming the 16 images shown in FIG. 33, for example, the image forming position is set as shown in FIG.

Details of the above image forming processing in this embodiment will be described below with reference to the block diagram of FIG. 27 and the timing chart shown in FIG.

ITOP sent from the color printer 2 to the color reader 1 via the printer interface 56 shown in FIG.
The signal 511 is input to the video interface 201 in the video processing unit 12, and is sent from this to the image storage device 3. The image storage device 3 starts the image forming process in response to the ITOP signal 551. Then, each image sent to the image storage device 3 is stored in the image storage device 3 as shown in FIG.
The image is read from the memory ABCD or the like under the control of the system controller 4210 shown in FIG.

Control signals 9102-0 to 9302-3 output from the area signal generator (FIG. 27 (F)) in the system controller 4210.
Is input to the counter control 9141 as a counter enable signal. The counter control 9141 enables the counter based on the input control signal, and controls the select signal 9140 of the selector 4070. At this time, the counter control 9141 outputs the read enable signal 9103 at the same time, and this signal is
4140-0 to 3-3.

With this access, the image data stored in each of the memories 4060AR, 4060AG, and 4060AB is read, and the read image signals 9160AR, 9160AG, and 9160AB from each memory are stored in a lookup table (LUT) 4110R shown in FIG. 27C. , 4110G, and 4110B, where logarithmic conversion is performed to match the human relative luminous efficiency characteristics. The conversion data 9200AR from each LUT,
9200AG and 9200AB are input to a masking / black extraction / UCR circuit 4120. And this masking / black extraction / UCR circuit
At 4120A, color correction of the color image signal of the image storage device 3 is performed, and at the time of black recording, UCR / black extraction is performed.

And these continuous masking /
The image signal 9210 from the black extraction / UCR circuit 4120A is input to each of the FIFO memories 4140-0 to 4140-3 by the selector 4130 shown in FIG. 27B based on the select signal 9230 output from the area signal generator. You. As a result, the images arranged sequentially as shown in FIG.
Processing can be performed in parallel by the operation of FO4140-0 to FO4140-3.

FIG. 35 is a timing chart showing the flow of the above-described image.

In FIG. 27B, reference numerals 9320-0 to 9320-3 indicate an enable signal 9340 for the enlargement interpolation circuit, and the enlargement interpolation circuit used by the select signal of the selector 4190 is selected. Each of them is output from the area signal generator, so that up to four processing can be independently performed for each area.

For example, the enlargement interpolation circuit by the enable signal 9320-0
When 4150-0 is enabled, the enlargement interpolation circuit 4150-0
Outputs a read enable signal 9280-0 to the FIFO 4140-0, receives image data from the FIFO, and performs enlargement processing. In this embodiment, a primary interpolation method is used. Similarly, when the other enlargement interpolation circuits are enabled, the read enable signal is sent to the FIFO and the data of the FIFO is read. FIG. 35 shows a timing chart.

At this point, as described above, the image data sequentially read from the memory is processed in parallel. Finally, the image layout is completed by the selector 4109, and the image data processed in parallel so far is serialized again. Image data signal. Image signal 9330 converted into serial image data by selector 4190 is subjected to edge enhancement and smoothing (smoothing) processing by edge filter circuit 4180. Then, the signal passes through the LUT 4200 and is input to the selector 4230 via the signal line 9380.

The selector 4230 stores the data of the bitmap memory described above. And image data from the memory. Details of the two switching operations will be described later with reference to FIG.

The image signal 9380 output from the selector 4230 is
And sent to the color reader 1 together with the video enable signal generated by the area signal generator shown in FIG. 27 (F) and the clock.

Hereinafter, when the formation of all the image data of “image 0” to “image 3” is completed, next, “image 4” to “image 7”, “image 8” to “image 11”, and “image 12” to “image 12” Images are sequentially formed in the order of “Image 15”, and “Image 0” to “Image 15” shown in FIG.
Are formed.

As described above, in this embodiment, 16 images are stored and printed out with the layout shown in FIG. 34, but the number of these images can be set arbitrarily.

Further, in the case of an image from the SV recording / reproducing apparatus 31, an image of SV floppy can be continuously printed out, and has a function as an index print.

Similarly, the film scanner 34 uses an auto-changer to automatically store images one after another and print 24 or 36 images, thereby enabling index printing of the film image.

<Image Forming by Layout at Arbitrary Position> In the above description, as shown in FIG. 34, the control for developing the image so that it can be automatically formed and forming the image has been described. However, the present embodiment is limited to the above example. Instead, an arbitrary image can be developed at an arbitrary position to form an image.

Hereinafter, as an example of this case, “image 0” shown in FIG.
The case where “Image 3” is developed as shown in the figure to form an image will be described.

First, the color reader 1, the film scanner 34 or the SV is controlled by the same control as the image input control to the memory described above.
The four pieces of image information read from the recording / reproducing apparatus 31 are stored in the image memories 4060AR, 4060AG, and 4060AB as shown in FIG.

Then, the user operates the point pen 421 to designate and input a desired development position from the coordinate detection plate 420. For example, the deployment area
Specify and enter as shown in Figure 37. The image forming process in this case is shown in the block diagram of FIG. 27 (A) to FIG.
This will be described below with reference to the timing charts shown in FIGS. 38 and 39.

FIG. 38 is a timing chart at the time of image formation on the “l ₁ ” line shown in FIG. 37, and FIG. 39 is a timing chart for “l ₂ ” in FIG. 37.
This is a timing chart when an image is formed on a line.

The ITOP signal 551 is output from the printer 2 in the same manner as described above, and the system controller 4210 starts operating in synchronization with this signal.

In the layout of the image shown in FIG. 37 (A), “Image 3” is the color reader 1 or the film scanner 34.
Alternatively, the image from the SV recording / reproducing device 31 is rotated by 90 degrees.

This image rotation processing is performed in the following procedure. First,
The image is transferred from the 4060AR, 4060AG, 4060AB to the work memory 4390 by the DMAC (Direct Memory Access Controller) 4380 in FIG. Next, after performing a known image rotation process in the work memory 4390 by the CPU 4360, the DMAC 4380 transfers the work image from the work memory 4390 to the 4060AR,
The image is transferred to 060AG and 4060AB, and the image is rotated.

The position information of each image laid out and input by the digitizer 16 is stored in the video processing unit 12 shown in FIG.
Is sent to the image storage device 3 through the same route as described above.

The position information is read by the CPU 4360 via the signal line 9460. As described above, the CPU 4360 performs the program of the area signal generator based on the position information.

The system controller 4210, which has received the development position information for each image, executes an enlargement / interpolation circuit corresponding to each image.
An operation permission signal 9320-0-3 of 4150-0-3 and a counter enable signal 9102-0-3 and each selector control signal are generated, and a desired image can be obtained.

In the layout at an arbitrary position in this embodiment, for example, the counter 0 (4080-0) is set to the image 0, the counter 1 (4080-1) is set to the image 1, and the counter 2 (4080-2).
Operate on image 2 and the counter 3 (4080-3) operates on image 3 respectively.

The control at the time of image formation on the "l ₁ " line shown in FIG. 37 will be described with reference to FIG.

“Image 0” is read from the image memories 4060AR, 4060AG, and 4060AB by the counter 0 (4080-0) from address “0” to address “0.5M” (the storage area of “image 0” shown in FIG. 36). Read up to. Switching of the outputs of the counters 4080-0 to 3 is performed by the selector 4070 under the control of the counter controller 9141.

Similarly, reading of “image 1” is performed by using the counter 1 (4080−
According to 1), the addresses from "0.5M" to "1M" (the storage area of "image 1" shown in FIG. 36) are read. The timing of this reading is shown as 9160AR, AG, AB in FIG.

The data of “Image 0” and “Image 1” are LUT4110AR,
Masking / black extraction / UCR circuit 412 via 4110AG, 4110AB
0A, where it becomes a color signal 9210 in a frame sequence. The frame sequential color signal 9210 is parallelized by the selector 4120,
The data is divided for each pixel and sent to the FIFO memories 4140-0 and 4140-1. Then, the operation permission signals 9320-0, 9320-0,
When 9320-1 is enabled, the enlargement / interpolation circuit 4150-
0,4150-1 enables the FIFO read signals 9280-0,9280-1, and starts read control.

The FIFO memory 4140-0,4140-1 outputs the signal 9280-0,92
At 80-1, transfer of image data to the enlargement / interpolation circuits 4150-0 and 4150-1 is started. Then, the enlargement / interpolation circuits 4150-0 and 4150-1 perform layout and interpolation calculations according to the area specified by the digitizer 16 first. This timing is shown at 9300-0,9300-1 in FIG.

The “image 0” and “image 1” data on which the layout and the interpolation have been performed are selected by the selector 4190,
The signal passes through the edge filter circuit 4180 and is input to the LUT 4200. Subsequent processes up to the connector 4550 are the same as those described above, and a description thereof will be omitted.

Next, the timing of the “l ₂ ” line shown in FIG. 37 will be described with reference to FIG.

Enlargement / interpolation circuit from image memory 4060AR, 4060AG, 4060AB
The processing up to 4150-1 and 4150-2 is substantially the same as described above.

However, since “image 1” and “image 2” are output on the “l ₂ ” line, counter 1 (4080-1) and counter 2 (4080-2), FIFOs 4140-1, 4140-2, The enlargement / interpolation circuits 4150-1 and 4150-2 operate. These controls are performed according to control signals from the system controller 4210.

As shown in FIG. 37, on the “l ₂ ” line, “image 1” and “image 2” overlap. In this overlapped portion, either one of the images or both of the images can be selected by a control signal 9340 from the system controller 4210.

 The specific control is the same as in the case described above.

The signal from the connector 4550 is connected to the color reader 1 by a cable. Therefore, the color reader 1
The video interface 201 selectively outputs an image signal 205R from the image storage device 3 to the printer interface 56 through a signal line path shown in FIG.

The details of the process of transferring the image information from the image storage device 3 to the color printer 2 in the image formation in the above-described embodiment will be described below with reference to the timing chart of FIG.

As described above, when the start button of the operation unit 20 is pressed, the printer 2 starts operating and starts transporting the recording paper. When the recording paper reaches the tip of the image forming section,
The signal 551 is output. The ITOP signal 551 is sent to the image storage device 3 via the color reader 1. Image storage device 3
Are stored in the respective image memories 4060AR and 406 under the set conditions.
The image data stored in 0AG, 4060AB is read, and the above-described processing such as layout, enlargement / interpolation, etc. is performed.

<Memory expansion continuous shooting> The image data sent from the host computer 33 is GPIB
The data is input via the 4580, is once expanded in the work memory 4390, and is similarly read out by the above-described means written in the image memories A, B, C, and D to obtain a print output. For example, as shown in FIG. 43, the image transferred to the image storage memory corresponds to the counter O (4080-0) shown in FIG. 27 (C).
If it is the memory area read out by (1), the image is similarly printed out in the area of image 0 in FIG. 37 (A).

Also, by sending layout coordinate information, enlargement magnification, and print command from the host computer, image formation with an arbitrary layout can be performed under the control of the host computer in the same manner as described above.

Further, since the enlargement magnification can be set arbitrarily, an enlarged output image can be obtained beyond the limitation of the print paper.

FIG. 37 (G) shows an example in which an image stored in a memory is divided into four print sheets and enlarged and printed (hereinafter referred to as enlarged continuous shooting). The details will be described below.

FIG. 37 (F) shows the counter 0 4080 shown in FIG. 27 (C).
FIG. 3 is a diagram schematically illustrating an image stored in a memory area read by A-0.

As shown in the figure, the memory storage area can be arbitrarily divided according to the magnification and the paper size. When the CPU receives an enlargement continuous shooting command from the host computer, the CPU calculates the division size of the memory from the paper size and the enlargement magnification, and sets it in the system controller and the read counter 0.

In the figure, the division size is a in the H direction and b in the V direction. These are used to calculate the starting address read by the counter.

For simplicity, in the figure, each of the four divided areas corresponds to four printouts.

The image forming process is started by the ITOP signal 551 shown in FIG. 40, read out to the address a of one line by the counter enable signal 9130-0 from the system controller 4210, expanded, and sent to the color reader 1. When the reading is completed, the read counter calculates the start address of the next line, repeats the reading, reads the data up to the b line, and completes the printing of the first sheet. Subsequently, until the second sheet ITOP signal 551 arrives, the first address 2 of the second sheet is calculated, and the processing is sequentially repeated, and printing is continuously performed up to the fourth sheet while calculating the first address. Finally, by joining the print images, an enlarged image can be obtained.

<Non-Rectangular Image Synthesis Using Memory E> Next, a non-rectangular image synthesizing process using the bitmap memory E will be described.

For example, a case will be described in which the output area of the image 0 is formed in a heart shape as shown in FIG.

As described above, in consideration of the size of the area of the image 0 to be output first, the heart-shaped binary image is stored in the bitmap memory E.
Expand to Next, in the same manner as in the preceding paragraph, the development area of each image is designated and input from the color reader 1 using the digitizer 16. At this time, only the selection button for the non-rectangular area for image 0 is selected from the operation unit. The position information and the processing information of each of the designated images are sent to the image storage device 3 via the first video processing unit 12. The transmitted information is read by the CPU 4360 through the signal line 9460, and the output timing of the image is programmed based on the information as described above.

Upon receiving the I-TOP signal from the color reader 1, the image storage device 3 starts reading the image from the memory, and the image is actually synthesized when passing through the selector 4230 in FIG.

FIG. 41 is a schematic diagram showing the internal configuration of the selector 4230 of FIG. 27 (B). The register 3010 can programmatically select 8-bit density data or a BI signal from the bit map memory E from the CPU by controlling data set in the register by the register 1. Numerals 3020 and 3030 are such selecting gates. For example, if you select 8-bit density data,
The OR gate 3040 combines the image signal and the bitmap.

On the other hand, when the BI signal is selected, the selector 3050 becomes the select signal, and the image signal of the density of the data set in the register indicated by 3050 by the BI signal and the image data 93 from the memory.
80 can be selected and output.

Normally, register 2 is set to "
0 "is set in advance. Image data 9380 to be sequentially read
Are non-rectangular clipped by the selector 3050, which is output from the bit map and is a non-rectangular area signal BI select signal, to enable non-rectangular image synthesis.

The BI signal is sent to the color reader 1 alone, and the color reader 1 can perform processing using the BI signal.

That is, if the above-mentioned BI signal is used as the signal 206 to be input to the video interface circuit 201 in FIG. 2 and the video interface circuit 201 is used in the state shown in FIG. Can be performed.

Further, in the present embodiment, an image in the image storage device 3 can be combined with a color image read by the reader 1 in real time.

That is, as described above, the ITOP signal 55 of the color printer 2
The image is read from the image storage device 3 in synchronization with 1, and at the same time, the color reader 1 also starts reading the reflection original 999 to the full-color sensor 6 in synchronization with the ITOP signal 551. Since the processing of the color reader 1 is the same as described above, the description is omitted.

The combination of the image information from the image storage device 3 and the image information from the color reader 1 will be described below with reference to the timing chart of FIG.

FIG. 37 (C) shows a portion other than images 0 to 4 in FIG. 37 (A), a reflection original 999 at l ₁ when a reflection original read by the reader 1 is synthesized, and an image storage device 3.
This is a timing chart obtained by synthesizing signals from.

The image information of the color reader 1 read out in synchronization with the ITOP signal 551 is the output signal 559RGB of the black correction / white correction circuit.
Next is output in synchronization with the HSYNC in l ₁ of Figure 20. As for the image information 205 RGB from the image storage device 3, only the area specified by the digitizer 16 is output.
These two types of image information are input to the video interface 101, and the image of the color original is output from the synthesizing circuit 115 except for the area designated by the digitizer 16, and the digitizer 16
Information from the image storage device 3 is output to the area designated by.

In the above embodiment, as a means for setting a non-rectangular area, a mask pattern of a desired area shape is prepared in advance, and read into a bitmap memory by reading the mask pattern into a bitmap memory.

Further, in this embodiment, as shown in FIG. 27 (D-1), a bit map memory is connected to a CPU bus so that the CPU can develop a mask pattern in the bit map memory. For example, in the case of a star, rhombus, hexagon, or other fixed mask pattern that is considered to be frequently used, the data or a program that generates the data is stored in the program ROM or the font ROM 4070 of the CPU and used when the mask pattern is used. Can start a program and automatically generate a mask pattern.

With the above configuration, there is no need to create and read a mask pattern, and it is possible to easily create a mask pattern in the bit map memory, and to further easily perform image composition as shown in FIG. 37 (B). be able to.

Further, in the present embodiment, for example, the CPU 4360 converts the code data transmitted from the computer 33 into a second character.
Referring to the font M4070 shown in FIG. 7 (D-1), the character font can be developed on the bit map memory indicated by E. In this way, the character font can be freely written in the bit map memory, and the AND gate 3020 in FIG.
Is inactive, and the image data 9380 and the image in the bit map memory are combined by the OR gate 3040, so that character combination with various stored image data can be easily performed.

Further, by activating a pattern generation program by the CPU 4360, for example, the ruled line K can be written in the bit map, and the ruled line and image data as shown in FIG. 37D can be easily synthesized. In addition, various fixed patterns can be provided as a CPU program.

Further, the character data and the image data from the font ROM 4070 previously written in the bit map memory are synthesized,
As shown in FIG. 37 (E), an image having a message on the lower surface of each image shown in FIG. 34 can be obtained. As described above, these characters can be developed by sending character codes from the host computer, or can be read from a reader and set. As described above, in this embodiment, the bitmap memory E is used as a memory for storing a mask pattern having a shape of a desired area, and an image of the mask pattern read by a reader is stored in the memory. Technology to be deployed in
Font from code data sent from computer
A technique for synthesizing the obtained character pattern with reference to ROM4070 has been disclosed.

<Description of Monitor TV Interface> As shown in FIG. 1, the system of this embodiment can output the contents of the image memory in the image storage device to the monitor TV 32. It is also possible to output a video image from the SV recording / reproducing device 31.

This will be described in detail below. Image memory 4060AR, 4060AG, 40
The video image data stored in the 60AB is read by the DMAC 4380, and the display memory 4060M-R, 4060M
-G, 4060M-B and stored.

On the other hand, as described above, the system controller 4210
By controlling the control signals output from the memory to each memory, a desired image can be stored in the image memory and also in the display memory M at the same time.

As shown in FIG. 27 (E) showing the details of the display memory M, the display memories 4060M-R, 4060M
-G, 4060M-B, the video image data stored in LUT44
D / A converter through 20R, 4420G, 4420B 4430R, 4430G, 44
30B, where the analog R signals 4590R and G are synchronized with the SYNC signal 4590S from the display controller 4440.
The signal is converted into a signal 4590G and a B signal 4590B and output.

On the other hand, from the display controller 4440, the SYNC signal 9600 is synchronized with the output timing of these analog signals.
Is output. This analog R signal 4590R and G signal 4590
By connecting the G and B signals 4590B and the SYNC signal 4590S to the monitor 4, the contents stored in the image storage device 3 can be displayed.

Also, in this embodiment, the image displayed by transmitting a control command from the host computer 33 shown in FIG. 1 to the image storage device 3 via the 4580 and the GPIB controller 4310 shown in FIG. Can be trimmed.

The CPU 4360 controls the display memories 4410R, 4410G, and 4410B to display the image memories 4060AR and 4060 based on the area information instructed and input by the host computer 33 under the same control as described above.
Trimming is possible by transferring only the effective area to AG, 4060AB.

Also, in response to the area instruction information from the host computer 33, the CPU 4360 shown in FIG. 27 (B) sets the data in the comparators 4232, 4233 and the RAM 4212 of FIG. 1 and SV recording / playback machine
By inputting the image data from 31, the trimmed image data can be stored in the 4060AR, 4060AG, and 4060AB.

Next, when a plurality of images are stored in the image memories 4060R, 4060G, and 4060B, the layout of each image can be made by using the monitor television 32 and the host computer 33 when recording with the color printer 2.

First, the size of the recording paper is displayed on the monitor television 32, and the layout information of each image is input by the host computer 33 while watching this display, whereby the layout of each image to be recorded by the color printer 2 is possible. .

At this time, control of reading stored information from the images 4060AR, 4060AG, and 4060AB to the color printer 2 and the color printer 2
The recording control is the same as in the above-described embodiment, and a description thereof will be omitted.

<Explanation of Computer Interface> The system of the present embodiment has a host computer 33 as shown in FIG. The interface with the host computer 33 will be described with reference to FIG.

The interface with the host computer 33 is performed by a GPIB controller 4310 connected by a connector 4580. The GPIB controller is connected to the CPU bus 9610 via the CPU bus.
It is connected to the 4360 and can exchange commands with the host computer 33 and transfer image data according to a predetermined protocol.

For example, when image data is transferred from the host computer 33 via GP-IB, the image data is received line by line by the GP-IB controller 4310 and stored in the temporary work memory 4390. The stored data is DMA-transferred from the work memory to the image storage memories AB and CD and the monitor display memory M as needed.
Data is received from the controller 4310, and image transfer is performed by the above-described repetition.

FIG. 42 shows the work memory shown in FIGS. 27 (A) and (B).
4369 is a block diagram showing the relationship between the image storage memories A to C and the monitor display M.

42. In FIG. 42, reference numerals of the components of the embodiment are renumbered. From the host computer 33,
First, the image size to be transferred is sent. That is, the image size concerning the CPU 2403 is read from the host computer 33 via the input terminal 2401 and the GP-IB controller 2402. Next, the image data is read line by line and stored in the temporary work memory 2404. The image data stored in the work memory is sequentially transferred to an image storage memory 2406 and a display 2407 by a DRAM controller 2405 (hereinafter referred to as DMAC) (here, R, G, and B are grouped together for simplicity). . The details will be described below.
For example, as shown in FIG. 43, addresses are assigned to the image storage memory 2406 and the display memory 2407, and images are stored. In the figure, the lower address corresponds to the H direction, and the upper address corresponds to the V direction. For example, point A is H direction 10
If 0H and 100H in the V direction, the address of point A is 100100H. Similarly, the display memory also has lower addresses,
Upper addresses are assigned in the V direction. Here, for example, it is assumed that the images sequentially transmitted are reduced to the same size to the image storage memory 2402 and reduced to 3/4 to the display memory 2407 and transferred.

First, as described above, the image size and reduction ratio of the image sent from the host computer are set in the DMAC, while the DRAM controllers 2408 and 2409 set the storage start address and the reduced image size. After the above setting is completed, a command is sent to the DMAC 2405 by the CPU to start the image transfer.

The DMAC 2405 gives an address and a signal to the work memory 2404 and reads out image data. At this time, the address is sequentially incremented, and when the reading of 1H is completed, the next one line is received again from the host computer and stored in the work memory. On the other hand, at the same time, DMA controllers 2408 and 2409
▼ and ▲ ▼ are given to sequentially write image data. At this time, the DRMA controllers 2408 and 2409 count the ▲ ▼ signals, and sequentially increment the write address from the set start address. When the writing in the H direction is completed, the address in the V direction is incremented, and the writing is performed from the beginning of the next H.

When the above transfer is performed, the DMAC has a function similar to that of the rate multiplayer for ▲, and therefore, the reduction is performed by thinning out ▲. For example, if a reduction of 3/4 is set as described above, the DMAC
In the direction, ▲ ▼ is thinned out once in four times, and in the V direction, one line section ▲ ▼ is not output for every four lines. As a result, ▲ ▼
The reduction is performed by controlling the writing to the memory.

FIG. 44 shows a timing chart. The read address is input to the work memory 2404 as shown in the figure, and ▲ ▼
Signals cause data to appear on the data bus. At the same time, the write address is input to the storage destination address, and ▲ ▼
Data is written by the signal. At this time, ▲ ▼
When the signal is decimated, the write address is not incremented as described above, and no write is performed.

<Description of Man-Machine Interface> As described above, the system of this embodiment (FIG. 1) can be operated from the host computer 33 and the operation unit 20 of the color reader 1.

Hereinafter, a man-machine interface using the operation unit 20 will be described.

By pressing an external device key (not shown) on the operation unit 20 of the color reader 1, the diagram of FIG.
Is displayed on the LCD touch panel.

FIG. 47 shows the color reader 1 to the image storage device 3,
FIG. 8 is a diagram showing an operation when storing image data from the film scanner 34 or the SV recording / reproducing apparatus 31.

When the image registration key shown in FIG. 47A is pressed, the liquid crystal touch panel becomes like C, and the input source displayed in the area surrounded by the broken line indicated by X in FIG. C is ▲ [▼] ▼ ▲ [▲] ▼ Select by key.

In this embodiment, there are three types of input sources, a color reader 1, a film scanner 34, and an SV recording / reproducing device 31, and these are selected by operating the ▲ [▲] ▼ ▲ [▼] ▼ keys.
This is shown below the diagram C.

Next, by pressing the image number key in FIG. The case of FIG. D shows a case where an image is already stored in the designated image number. The image shown in D is displayed by turning on the area shown in FIG. 47Y. E
Figure, G and H figures show input source selection (▲ [▲]
▼ ▲ [▼] ▼ key) is selected, the color reader is selected as E, the film scanner 34 is selected as G, and the SV recorder / player 31 is selected as H. .

When the image registration of the color reader 1 is selected, a state shown in FIG. 47E is obtained. In this state, the digitizer shown in FIG.
The reading area of the original 999 on the platen glass 4 of the color reader 1 is designated by the 16 pointing pens 421. When this instruction is completed, the diagram becomes an F diagram and a diagram for confirmation is displayed. If there is a change in the reading area ▲
By pressing the [C] ▼ key, the display returns to the diagram of FIG.

When the reading area is OK, pressing the ▲ [OK] ▼ key changes to a G diagram, and sets the amount of memory to be used next.

The length of the bar graph of the memory amount shown in FIG. G changes depending on the mounting of the memory board (the memories A to D in FIG. 27A) in the image storage device 3.

The image storage device 3 is a memory board (memory A to memory A) described above.
D) can be mounted from one to a maximum of four.

That is, the bar graph becomes the longest when four memory boards are mounted.

The bar graph in the G diagram shows the memory capacity in the image storage device 3 and sets the used memory amount when registering an image. The amount of memory to be used for registration is determined by the ▲ [+] ▼ ▲ [-] ▼ keys, and by pressing the registration start key, the original scanning unit 11 shown in FIG.

The image information from the original scanning unit 11 shown in FIG. 1 is processed by the video processing unit 12 through the cable 501 and then output to the image storage device 3 via the video interface 201. The image storage device 3 displays the input image information on the monitor television 3. The method of storing the image in the memory (FIG. 27 (C)) of the image storage device 3 is the same as that described above, and a description thereof will be omitted.

As described above, since the setting of the memory amount in the G diagram can be made variable, even when images in the same area are stored, high-quality image storage can be achieved by increasing the set memory amount.

Also, by reducing the memory amount, it is possible to input many images.

Next, the image registration from the film scanner 34 is displayed as shown in FIG. G, and the registration method is the same as that of the color reader 1, so that the detailed description is omitted.

When the image registration from the SV recording / reproducing device 31 is selected, the 47th
The display shown in Fig. H is displayed, and whether AGC (auto gain control) is ON /
Set OFF, and field / frame settings. After the above setting, by pressing the registration start key, the image storage device 3 loads the image information from the SV recording / reproducing device 31 into the memory (FIG. 27 (C)). The method of storing the image in the memory is as described above. It is omitted because it is the same as.

FIG. 48 is a diagram showing an operation method when performing a layout print from the memory in the image storage device 3 to the color printer 2.

FIG. 48C is an operation display for selecting three types of layout patterns.

The fixed pattern layout prints out the contents of the memory of the image storage device 3 in a predetermined pattern.

The free layout indicates the area to be printed by the point pen 421 of the digitizer 16 shown in FIG. 23,
The memory contents of the image storage device 3 are printed out in the area.

Compositing is performed with the point pen 421 of the digitizer 16 shown in FIG.
In areas other than the area instructed to write the contents of the memory of the image storage device 3 in the area designated by, the image of the document on the platen glass 4 of the color reader 1 is synthesized and printed out.

When the fixed layout is selected, the number of print faces in fixed layout printing is set according to FIG. 48D. A to P for each image area of fixed layout
Are given, and each area (A to P)
Are set by using FIGS. 48, E and F, respectively. For example, when 16 screens are selected in FIG. 48D, the display shown in FIG. 48E is made. When the area indicated by A in FIG. E is selected, for example, the display shifts to the figure indicated by F, and the number of the image to be formed in the set area is designated by the number.
Set using the numeric keys in Figure 48. By repeating such designation, a plurality of images can be registered. The number of images to be registered is automatically determined according to the type of the fixed pattern selected in FIG. When the setting is completed, the CPU of the color reader determines the type of the external device of the type selected in FIG.
An image corresponding to the desired screen selected in the F diagram of the reproducing apparatus is stored in the storage device 3.

Next, an instruction for an image number corresponding to a star key (not shown) of the operation unit 20 in FIG. 1 is prompted. Next, a hard copy having a fixed layout is output from the printer 2 by pressing the switch of the designated number. An image output on 16 sides of the fixed layout print is printed in a layout as shown in FIG.

The free layout print shown in FIG. 48J will be described. In the free layout print, first, each area is indicated by a point pen 42 of the digitizer 16 shown in FIG.
Set each area in order with 1. At the same time, the number of the image to be printed in each area is selected using the numeric keypad in the L diagram.

After the setting of each area is completed, by pressing a start key (not shown) of the operation unit 20 shown in FIG. 1, the memory contents of the image storage device 3 are printed out in the area set in FIGS.

In the composite layout shown in FIG. 48G, the area setting is the same as the above-described free layout.

Outside the area, the image of the reflection document is output, and a color-in-color image is output.

FIG. 49 shows a case where the “monitor display” key is turned on in the state shown in FIG. 47A, that is, the display operation on the monitor television 32 and the “color balance” key is turned on in the state shown in FIG. 47A. In this case, the operation for adjusting the tint of each image when the image information in the image storage device 3 is printed out by the color printer 2 is shown.

When the monitor display key shown in FIG. 49A is pressed, the display becomes as shown in FIG. C, and the image number of the image storage device 3 is selected, and either the display on the monitor television 32 or the source display is selected. Details are omitted because they have been described previously.

Pressing the color balance key shown in FIG.
As shown in the figure, the image number for setting the color balance is selected. When you select an image number, the LCD touch panel is E
The display is as shown in the figure, and bar graphs corresponding to red, green, and blue colors are displayed. When the ▲ [+] ▼ key is pressed, the left side of the bar graph functions to amplify the red luminance signal in terms of electric signals, so that the red component displayed on the monitor becomes lighter. This changes the color of the monitor television by changing the curves of the look-up tables (LUTs) 4420R, G, and B in the monitor memory of FIG. The curve of the table (LUT) 4110A-R, -G, -B is also changed. That is, communication is performed from the CPU of the color reader 1 to the CPU in the image storage device. As a result, the rewriting of the LUT is performed by the CPU in the image storage device 3. 2 as described above
By simultaneously changing the type of LUT, it is possible to print out from the color printer 2 in the same color as the image displayed on the monitor.

FIG. 50 is displayed when the "" key is turned on in the state shown in FIG. 47A. “SV” in the display shown in FIG. 50B
It is a figure showing the example of a display when a key is turned on. Ie SV
An operation for displaying the contents of the SV disk reproduced by the recording / reproducing device 31 on the monitor television 32 and an operation for printing out from the color printer 2.

FIG. 50C shows an operation for selecting an index display or an index print.

SV discs can record 50 pages in field recording and 25 in frame recording.

When the display start key in Fig. 50D is pressed, the first 25 screens of the SV disk are displayed on the monitor in the case of field recording,
By pressing the display start key shown in FIG. In such a case, the CPU in the image storage device 3
Puts the SV player in the remote state.

In such a case, the CPU of the color reader 1 issues an instruction to the CPU in the image storage device 3 to sequentially store the images of a plurality of tracks in the memory from the SV reproducer. Then, the CPU in the image storage device 3 issues the following instruction to the SV player. That is, 25 of the first half of 50 screens recorded on the SV disk
The screen is sequentially stored in a memory in the image storage device 3. In such a case, the image storage device 3 only needs to give a head moving instruction to the SV player. Specifically, before the image signal is stored in the image storage device 3, the playback head of the SV player accesses the outermost track in the SV disk, and then the video image reproduced from the outermost track is read as described above. The data is stored in the memory in the storage device 3.
Next, the CPU of the storage device 3 outputs an instruction to the SV reproducer to move the reproduction head one track inward. Then, the image storage device 3 stores the video image again in the memory in the storage device 3. By repeatedly performing such operations, the image storage device 3 sequentially stores the image signals in the memory,
Create a multi-index screen in the internal memory. In the case of frame recording, all SV disks are displayed by pressing the display start key shown in FIG.

FIGS. 50F and 50G show the operation of printing out the contents of the above-mentioned index from the color printer 2. FIG.

By pressing the start key of the operation unit 20 after making the settings shown in FIG. F, the image storage device 3 first stores 25 screen images from the SV recording / reproducing device 31 in the memory, and then switches the color reader 1 Then, the index print is performed by the color printer 2. The same applies to FIG.

By performing the operations in FIGS. 50F and G as described above, image registration and layout printing can be easily performed.

<Control by Host Computer> The system of this embodiment has a host computer 33 as shown in FIG. The interface with the host computer 33 will be described with reference to FIG.

The interface with the host computer 33 is performed by a GP-IB controller 4310 connected by a connector 4580. The GP-IB controller 4310 is connected to the CPU 4360 via the CPU bus 9610, and can exchange commands with the host computer 33 and transfer image data according to a predetermined protocol.

The image data of the color reader 1 and the SV recording / reproducing apparatus 31 are sent to the host computer 33 by the GP-IB controller 4310 connected by the connector 4580, and are stored in a storage area in the host computer 33, and are used for enlargement / reduction processing. ,
Conventionally, clipping of one portion of image data and layout of a plurality of image data have been performed. However, in this case, since the amount of color image data becomes considerably large, the data transfer time between the color reader 1, the SV recording / reproducing device 31 and the host computer 33 can be reduced even through a general-purpose interface such as GP-IB. It takes very much.
Therefore, instead of directly sending the input image data to the host computer 33, a command determined from the host computer 33 is sent to the GP-IB controller of the image storage device 3, and the CPU 4360 decodes the command, By controlling the input image data of the color reader 1 and the SV recording / reproducing apparatus 31 and designating only the image area that is really required, the other parts are not stored in the memory, and the memory is effectively used. It is not necessary to transfer the image data to the computer 33.

Further, even if the input image data is not stored in the storage area in the host computer 33 according to the command from the host computer 33, the image storage device 3 can store the image memories 4060A-R and 4
A plurality of image data can be stored in the 060A-G and 4060A-B, and image processing such as layout and enlargement / reduction of each image is not performed on the host computer 33 side, but only by a command from the host computer. Of the image storage device 3
Since the CPU 4360 performs the processing / instruction on the input image data, the host computer 33 and the image storage device 3
It does not take much time for image transfer between the two, and it is possible to reduce the processing time.

As described above, how the image storage device 3 stores and handles input / output images in response to an instruction from the computer 33 will be described in detail.

All input / output image data stored in the image storage device 3 is handled in the image storage device as an image file. Therefore, the memory A (4060) of the image registration memory
A), memory B (4060B), memory C (4060C), and memory D (4060D) function as RAM disks,
The image file to be stored is managed by the image file management table 4361 using the file name as a key (FIG. 51).

When an image file is registered and stored in the image storage device 3 functioning as a RAM disk, a basic block obtained by dividing each of the memories 7A to 7D of the registration memory into a plurality is used as a management unit of the minimum image file.

The CPU 4360 can also combine some of these basic blocks by using the image file management table 4361 and manage them so as to form one large image file. At this time, management data such as the image file name, the image data size thereof, the protection of the file, and the configuration of the registration memory are all stored in the image file management table 4361 at the time of registration.

Generally, when an image is input from the reader 1 as described above, the image storage device 3 registers the image as an image file in the image storage device at the same size or reduced size. Therefore, if the size of the image to be registered is large, the original size of the document image from the reader 1 approaches the original size and the reduction ratio becomes small. Therefore, when the registered image file is output to the printer 2 or the like, the quality is improved.

When the CPU 4360 inputs image data from the input device such as the reader 1 and the computer 33, the image file name used as a key is given a file name in a configuration as shown in FIG. This file name clarifies the management of image data between the computer 33, the image storage device 3, and the input / output device, and allows the computer 33 to attach an arbitrary image file.

The structure of the image file name is composed of eight characters (ASCII code) of the name of the image file and an extension indicating the type of image of the image data.

The type of the image to be handled is distinguished by the extension, and the registration memory 40 has a structure corresponding to the image type.
It will be registered and managed in 60.

Image types are RGB type luminance image data when extension is ".R", CMYK type density image when ".C", and 16.7 million colors of 8-bit pallet type when ".P". any
This means image data for which 256 colors can be set. Also, ".S"
At this time, a special file having a special meaning in the image storage device 3 and having a special structure is shown.

A coordinate system for handling images in the image storage device is composed of an origin serving as a reference, an X direction representing a width <width> direction of the sheet, and a Y direction representing a height <height> direction (52nd direction).
Figure).

The image storage device processes data from each input device in the image storage device coordinate system and manages various image data.

Analog input terminal (RGB, video) (4500, 4510, 4520R,
When an image from G, B, S) is input and registered in the registration memory, the input image is registered as an image as shown in FIG. The input image at this time is input with a size of 600 pixels in the X direction (width) and 450 pixels in the Y direction (height).

The coordinate system of the digitizer 16 is as shown in Fig. 54 when viewed from the image storage device. The coordinate system of the image storage device and the digitizer coordinate system are the same, and their origins correspond to the X and Y directions.

When viewed from the image storage device, the coordinate system of the reader 1 is
It should look like Figure 55. The origin, X direction, and Y direction of the coordinate system of the image storage device and the reader coordinates correspond to each other.

Next, data exchange via GP-IB will be described.

Image storage device 3 and computer through GP-IB4310
The types of data exchanged between the 33 are categorized as follows.

Command (instruction) Command from the computer 33 to the image storage device 3 Parameter Various arguments attached to the command Data portion ・ Image data Binary data of color (monochrome) image such as RGB, CMYK, etc. ・ Extended data Set in the image storage device 3 This is the data that is transferred when obtaining the existing data or rewriting the setting data.

Response data: ACK / NAK, response with additional information (RET), that is, a response returned from the image storage device to the command.

The above four types of data are exchanged between the computer 33 and the image storage device 3 via the GP-IB controller 4310.

The four types of data will be described below with reference to FIG.

As shown in FIG. 57, handling between the image storage device 3 and each input / output device reader 1, analog input 4500, 4510, 4520R, G, B, S, between the printer 2 and between the image storage device and the computer 33 The image data is classified into the following four types.

RGB data type CMYK data type 8-bit palette data type Binary bit map data type These image data are distinguished by the extension of the image file name described above. For example, on the computer 33 side
If the image file name attached to the SCAN command has an extension of “.R” indicating RGB image data, the CPU 4360 of the image storage device 3 sends an RGB
Input control as a system brightness image, and RG is stored in the image storage device.
Register as B type image data.

 FIGS. 60 and 61 show the structure of RGB type image data.

In the image storage device, the basic blocks of the memories A to D (4060A to D) of the registration memory are configured as shown in FIG. 60 as shown in FIG. , R image (4060A-R), G image (4060A-G), and B image (4060A-B). The image composition of the image is horizontal width
(Width) and height (height) of vertical length are the number of pixels (dots).

Specifically, an RGB color image has a depth of 8 bits (1 byte) for each pixel of R, G, and B, and has a three-frame configuration of R, G, and B. .

Accordingly, one pixel on the R surface has 256 gradations (0 to 255), and the three surfaces R, G, and B have a data structure of 256 × 256 × 256 ≒ 16.7 million colors.

 Note that 0 represents low luminance and 255 represents high luminance.

The data structure is in the R plane from the upper left , And this configuration continues in the order of RGB.

The transfer of image data between the image storage device 3 and the input / output device and the computer 33 is in a transfer format as shown in FIG. That is, data is transferred in a frame-sequential manner.

FIGS. 62 and 63 show the image structure of the CMYK type image data and the transfer format thereof. C represents cyan, M represents magenta, Y represents yellow, and K represents black. In such a case, the memories A to D of the registration memories in the image storage device 3
The basic blocks (shown in FIG. 27A) are made into an image configuration as shown in FIG. 31, and the basic blocks are assigned to the respective blocks.

Specifically, a CMYK color image has a depth of 8 bits (1 byte) for each pixel of C, M, Y, and K, which is a 4-frame structure of C, M, Y, and K It has become.

Therefore, 256 gradations can be expressed by one pixel on the C plane, and the same applies to the M, Y, and K planes.

 0 represents low density and 255 represents high density.

The data structure is C-plane in order from the upper left , And this configuration follows in the order of CMYK.

FIGS. 64 and 65 show an image data image structure of an 8-bit pallet type and its transfer format.

The memories A to D (the 27th memory) of the registration memories of the image storage device 3
The basic block in FIG. A) is configured as shown in FIG. 64, and the basic block is allocated.

The image configuration has a depth of 8 bits (1 byte) per pixel.

The 8-bit data value of one pixel is stored in the color index No. of the color palette table 4391 as shown in FIG.
, And can be set to any color set by the user.

Therefore, it is possible to represent 256 colors per pixel.

 FIG. 85 shows the relationship between image data and color pallets.

The structure of the data is from the upper left of the image It is arranged in order of data.

67 and 68 show a binary bit map type image data image structure and its transfer format.

The binary bit map is stored in the memory E (the 27th
Registered using FIG. A).

This image data is a special file with the image file name extension ".S", and the image file name "BIT
MAP.S "and is registered in the memory E (FIG. 27A) in which only the binary bit map type can be registered.

In the memory E (FIG. 27A), a plurality of registrations cannot be made because the basic block is the entire memory.

Binary bit map type image data has an image configuration having a depth of one bit per pixel.

Therefore, two expressions of "0" and "1" are provided for each pixel. "0" is white (no printing), "1" is maximum density (black)
To express.

The data structure is such that data is set in 8 bytes in order from the upper left of the image, that is, 1 byte per 8 pixels, so that binary bit map type image data is
Direction must be a multiple of 8. height
The direction is arbitrary.

Since the size of the image file is set in pixel units, the amount of data to be transferred is as follows.

<Width>: The width of the image file (width) <height>: The height of the image file (height) 8: Because it is 8 pixels, it becomes 1-byte data.

Next, the configuration of response data to command transmission from the computer 33 to the image storage device 3 will be described with reference to FIG.

-There are basically the following types of response data excluding image data.

FIG. 69 shows the structure of the response data.

As can be seen from the figure, which response data is received differs depending on the type of command.

ACK and NAK are paired, and most of the commands use either of them as response data.

The ACK type response data is an acknowledgment of each command, and indicates that the command has been normally transmitted and decoded to the image storage device 3 side. Fixed value of 3 bytes, the first 1 byte is 2EH and the next 2 bytes are 00H ・ The NAK type response data is a negative response to each command, and is a response to any error when the first byte is 3DH. Two bytes are the error code.

(Error code) = (Upper byte) x (100 (HEX) +
(Lower byte) Response data of the RET type (response with attached information) is a response to a command from the computer 33, and is sent from the image storage device 3 with necessary information attached. The configuration is 8 bytes in total, and the first byte is a header (02
H) is fixed. Following the header, the first data to the seventh data follow one byte at a time, and the contents of each data differ depending on the command.

The commands are used by the computer 33 to control the input / output of image data to / from the image storage device 3 and the management of image files, and there are commands as shown in FIG.

A command performs a function with one instruction,
The parameters following the command are separated into those required.

 FIG. 58 shows an example of the configuration of the command parameter.

The command and the parameter are sent to the image storage device 3 via the GPIB controller 4310 as a character string.
It needs to be converted to a character string representing a decimal number. Some of the parameters include a character string indicating an image file name.

By these commands, the image data is transferred to the computer 33, the image storage device 3, the input / output devices 1, 31, and the output devices 2, 32.
FIG. 59 shows the flow between the respective devices.

Commands from the computer 33 to the image storage device 3 are classified into seven commands. (Figs. 70 to 72) Initialization command: Performs various initializations.

Input / output selection command: Selects an input / output device.

Input / output mode setting command: Sets the conditions for image input / output.

Input / output execution command: Executes image input / output operation.

File operation command: Performs image file-related operations Color setting command: Performs color-related conditions Other commands: Others Next, each command will be described.

 The initialization command will be described with reference to FIG.

The INIT command is a command for setting initial data in the image storage device 3. The INITBIT command is a command for clearing the image of the binary file "BITMAP.S" of the binary bitmap.

The INITPALET command is a command for initializing the palette table of the image storage device 3.

The input / output selection command will be described with reference to FIG.

SSEL command is color reader 1, analog input 45
The input system of 00, 4510, 4520R, 4520G, 4520B, 4520S is selected. The CPU 4360 is a command for selecting the input system specified by the no parameter by the selector 4250 and the selector 4010 when the analog input is performed, and by the selector 4250 when the reader 1 is input.

The DSEL command is a command for setting output of image data from the image storage device to the color printer 2.

The input / output state setting command will be described with reference to FIG.

The DAREA command outputs the upper left coordinate position (sx, sy) and output size (width ×
height). Also, the unit at that time is set by type, and units such as mm, inch, and dot can be set.

The SAREA command is a command for setting the input area from the color reader 1 in the same manner as the DAREA command. S
The input / output range setting by AREA / DAREA is performed by the system controller 4210.

Increase / decrease the magnification when outputting the DMODE command (for the area specified by the DAREA command) from 4150-0 to 4150-3.
This is a command to be set in the interpolation circuit.

The SMODE command uses the system controller to read and zoom when inputting to the area specified by the SAREA command.
The command is controlled by 4210.

The ASMODE command allows the system controller 4210 and counter control 91 to determine whether to input an image as a field signal or a frame signal from the analog input terminal.
Set what to do in 41 with CPU4360.

Note that the field signal and the frame signal are well-known in television, and thus description thereof is omitted.

The input / output execution command will be described with reference to FIG.

The COPY command is a command for reading the reflection original of the reader 1 and directly outputting it to the printer 2 without registering it in the image storage device 3 as an image file. At that time <
The number of sheets to be output to the printer 2 can be designated by the parameter indicated as count>.

The SCAN command causes the CPU4360 to execute SSE
The image data is read from the input device designated by the L command, and the image file name designated by the parameter indicated as <filename>, and the image type of the extension is width.
The data is stored in the image memory 4060 read at a size of × height pixels.

At that time, the CPU 4360 stores the image file name, the image type, the image size, and information on which image memory is registered.
This is set in the image file management table 4361 shown in FIG.

The PRINT command, contrary to the SCAN command, replaces image file data already registered in the image storage device 3 with <file
The CPU 4360 outputs data from the image memory 4060 to the printer via the video interface 201 from the image file management table 4361. At that time <count>
The printer output is repeated for the number of times specified by the parameter indicated as.

The MPRINT command is a command for virtually outputting image file data designated by a parameter indicated as <filename> registered in the image storage device 3. This is useful when combining and outputting multiple layouts.
With this command, a plurality of image files are sequentially specified, and each time the CPU 4360 stores the image file name specified by the MPRINT command in the memory 4370, and
Alternatively, the trigger is triggered by the specification of the COPY command, and the CP
The U4360 combines a plurality of layouts of the image file based on the MPRINT stored in the memory 4370 and outputs the resultant to the printer 2.

The PRPRINT command is an image data (width × h) sent from the computer 33 via the GPIB interface.
The CPU 4360 uses the image memory 406 with the file name specified by the parameter indicating eight (size) as <filename>.
This is a command that is registered in 0 and directly output to the printer by the same operation as the PRINT command.

The DRSCAN command reads the image data from the color reader 1 into a designated size (width × height) read image memory 406.
0 is registered with the specified file name indicated as <filename>, and the attribute data is set in the image file management table in the same manner as the SCAN command. Then, the data is further transferred to the computer 33 via the GPIB interface 4580.

 Next, the file operation command in FIG. 77 will be described.

The DELE command is a command for deleting, from the image file management table 4361, an image file specified by a parameter indicated as <filename> among image files already registered in the image storage device 3. At that time, the CPU 4360 determines the free space of the image memory after the deletion from the management table 4361, sets the free space data in the RET type response data, and returns the data to the computer 33.
Send 8 bytes of response via GPIB.

The DKCHECK command stores the type (CM) of the image file specified by the type parameter in the image memory in the image storage device 3.
CPU43 checks whether an image of YK, RGB, 8-bit palette, binary bitmap) can be secured with an image size of width x height.
60 is determined from the image file management table 4361 and RET
The response data of the type is set as to whether or not it can be reserved, and the DKCHECK command of the remaining capacity after the reservation, for example, the computer 33, is transmitted as RET response data via GPIB.

For example, the 47th command
The display shown in FIG. G can be performed.

The FNCHECK command checks whether the image file specified by the parameter indicated as <filename> exists in the image file management table 4361, and checks whether the image file exists /
No is set in the RET response data and returned to the computer 33.

The FNLIST command is a command for transmitting the contents of the management table of the current image file to the computer.

The REN command is a command for changing the name of the image file set in the image file management table, and is a command for changing the image file name <Sfilename> before the change to <Dfilename> after the change.

Next, a file operation command involving input / output of image data will be described with reference to FIG. 78.

The LOAD command is a command for transferring data of an image file specified by a parameter indicated as <filename> among commands registered in the image storage device from the image memory 4060 to the computer 33 via GPIB.

The SAVE command is the opposite of LOAD, and the width on the computer
The image data is registered in the image storage device 3 with the data of × height image size under the file name of the <filename> parameter. First, the CPU 4360 is a command for setting a file name, an image type, and an image size in the image file management table 4361, and setting image data sent from the computer to a free area of the image memory 4060.

The PUT command is applied to the image file data specified by the parameter indicated as <filename> already registered in the image storage device 3 from the upper left coordinates (sx, sy).
The image data sent from the computer can be fitted within the th × height size range.

The GET command converts the image data of the image file <filename> specified in the opposite direction from PUT into the upper left coordinates (sx, sy) width ×
The image data can be transferred to the clipping computer 33 in the image range of height.

 FIG. 80 shows other commands.

MONITOR command is SSEL according to <type> parameter
In response to the analog input specified by the command, the display controller 4440 performs through display setting in which data is directly passed to the analog outputs 4590R, G, B, and S for display. Note that examples of the type variable include “0” (set through display), “1” (set monitor monitor), and the like. Furthermore, the MONITOR command has a lower priority than other commands, and the setting of the through display is canceled by another DSCAN or SCAN command.

In response to the PPRREQ command, the CPU 4360 obtains information on the paper size currently set in the color printer 2 from the control unit 13 via the video interface 201, and transmits paper determination data to the computer.

The PPRSEL command is a command for selecting one of a plurality of paper trays specified by the <no> parameter to the control unit 13 in the same manner as described above, and is transmitted to the color printer 21 via the image storage device 3. Is output.

The SENSE command is used by the CPU 436 for the state of each of the image storage device 3, the color reader 1, and the color printer 2.
0 is a command for communicating with and obtaining the control unit 13 via the video interface and transmitting the data to the computer.

Next, a command transmission procedure from the computer 33 to the image storage device 3 will be described.

When the commands are divided into the basic commands for image input / output (i) Input / output selection command SSEL, DSEL (ii) Input / output status setting command SMODE, SAREA, DMODE, DAREA, RPMODE, ASMODE (iii) Input / output execution The commands are SCAN, DRSCAN, PRINT, MPRINT, DRPINT.

As shown in FIG. 82, there is a basic procedure for transmitting a command for input / output of image data.

First, an input / output device is selected by using an input / output selection command.
The CPU 4360 analyzes the command and returns an ACK / NAK of response data to the command to the computer 33.

Next, the input / output status setting command is sent to the computer 33.
Is transmitted to the image storage device 3, and the CPU 4360 returns the ACK / NAK response data to the computer 33 in the same manner as described above.

The input / output state setting command loses its effect when the input / output execution command is executed, and returns to the default state. Therefore, if the input / output execution command is executed without executing the input / output state setting command, the input / output state setting is set to the default value. If it is desired to set a specific input / output state when executing input / output, it is necessary to execute an input / output state setting command for each input / output execution (for each basic type).

Then, an input / output execution command for actually executing input / output of image data is sent, and the CPU 4360 returns response data of the RET type in response thereto.
The input / output of the actual image data is performed by the input / output device reader 1,
The processing is performed between the image storage device and the SV 31, the printer 2, the monitor 32, and the like.

 This input / output is the same as in the above-described embodiment, and the description is omitted.

The CPU 4360 uses the image file management table 4361 to check the attribute of the image file in advance in response to a command related to image file registration from the computer, or to register the memory capacity of the file (memory A to memory A).
D) It is possible to perform processing such as checking in advance A)) in FIG. 27 and notify the computer 33 side.

There are FNCHECK and DKCHECK commands as pre-check commands for this image file.

The procedure for checking this image file is
As shown in FIG. 3, first, the existence of the designated file of the image file and its film attribute are sent to the computer 33 as RET type response data, and further, the remaining capacity of the image file or the desired image A response as to whether the file size can be secured is returned as RET data.

The basic form of the file check can be incorporated into the basic form of the input / output command described above, and the image file can be checked and responded before executing the input / output.

 Next, synthesis of an image file will be described.

In order to combine a plurality of images registered as image files in the registration memory 4060 of the image storage device 3 and output them to the color printer 2, it is possible to send an MPRINT command from the computer to the image storage device 3.

The MPRINT command specifies an image file name registered in the image storage device as an argument. The CPU 4360 analyzes the command string of the MPRINT command,
Register the file name temporarily above.

The designated file name is temporarily registered in the RAM by sequentially transmitting the MPRINT command sequence from the computer 33 as much as the plurality of layouts, and the computer transmits the PRINT command sequence when the last image of the plurality of layouts is obtained. When the CPU 4360 analyzes this PRINT command,
The CPU transfers the designated image data from the image memory to the color printer from the image file management table 4361 in the order of the image file names sent in the order of the MPRINT commands on the RAM. The combined output at that time is as described above.

As for the order of transmission of MPRINT from the computer and the order of priority of image synthesis by the PRINT command, the image specified first has priority as shown in FIG.

To combine a special file, which is a binary bitmap memory (memory in FIG. 27A), with an image file registered in the image storage device, the above-described MP
If the special file name of "BITMAP.S" is set on the computer side in the image file names specified by the RINT and PRINT commands, the CPU 4360 will execute
A combination of a plurality of image files and a combination of binary bitmap data are performed. In this embodiment, the image of the binary bit map is basically switched to black when the dot is "1", and the portion where the dot is "0" is switched so that the output of another image file is prioritized. Such an example is shown in FIG.

Such switching is performed by the video interface of the reader 1.
The use of 201 makes the configuration of the image storage device simple.

As an image synthesizing function, an image file, a binary file "BITMAP.S" special file, and a reflection document of one reader can be synthesized and output, and the synthesizing operation described above is performed.

The above-mentioned operation by the command from the computer
It can be executed by MPRINT command and COPY command.

Specifying multiple image files by MPRINT using commands, and finally sending a COPY command to trigger
The 360 can give an instruction for a copying operation to the CPU of the color reader, and further combine and output the image film by the MPRINT command and the reflection original of the reader unit.

At this time, if an image film of "BITMAP.S" is designated in the MPRINT, it can be synthesized with a binary bitmap.

In this embodiment, the priority order is automatically set to the lowest for the reflection original of one reader by the COPY command.
Can be the background of the image.

The command transmission order from the computer and the actual output result by the printer are as shown in FIG.

In this embodiment, as a color adjustment function, as shown in FIG. 79, the PALETTE command, the BALANCE command, and the GA command as commands from the computer corresponding to the color palette function, the color balance function, and the gamma correction function, respectively.
There are MMA command and BITCOLOR command.

The color pallet is used to set the color of the 8-bit pallet type as described above or to color the image data of the binary bit map type. To do this,
Set the color data to the palette number in the color palette. Specifically, 256 color data can be set, and data of 8 bits for each RGB is set.

By making the color data set in the color pallet 4362 in the image storage device 3 the same as the color pallet stored in the host computer, the color of the image output by the color printer 1 through the image storage device 3 and the host computer Can be the same as

The color palette table in the image storage device 3 is PALE
Palette table stored in image storage device 3 by TTE command
Can be set for each image file registered in. Therefore, when outputting an 8-bit pallet type image file with the extension ".P" using the PRINT and MPRINT commands, the PALETTE command is set from the computer, and then, for example, as shown in FIG. PR that sets (768) bytes of RGB palette table data in the palette table of the image storage device 3 via the GP-IB4580
When the INT / MPRINT command is executed, the R, G, and B components of the currently set palette table 4362 are
4110A-R, 4110A-G, and 4110A-B are set, and calculations for converting from luminance to density are performed on the respective tables.

At this time, the 8-bit pallet luminance information is converted into density information by converting the pallet type image file data specified by the PRINT / MPRINT command through the LUTs 4110A-R, 4110A-G, and 4110A-B in which a pallet table is set. The images are sequentially output to an image output system and output by a color printer.

The 8-bit pallet type image is stored in the work memory 4390 when it is sent from the computer via GP-IB.
Each line is set, and the registration memory 4060−
The same data is set in R, 4060-G, and 4060-B, and it repeats sequentially.

The maximum number of 8-bit pallet tables that can be set by the PALETTE command is 16, and can be set for each 8-bit pallet type of image data when combining with a plurality of layouts.

Before virtually outputting a plurality of 8-bit pallet type images by the MPRINT command, the CPU 4360 temporarily registers the color pallet data (768 bytes) in the memory 4370 of the image storage device 3 by the PALETTE command.

Repeat this process for multiple 8-bit pallet images that are to be layout-combined.
The command causes the actual output to be executed.

The image storage device 3 sets the pallet table of the 8-bit pallet image according to each MPRINT command set up to that time by the PRINT command from the memory 4370 to the output color pallet table 4362 when the pallet is sequentially synthesized and output. Thus, a plurality of images can be combined and output to the printer 2 as described above.

Next, in the setting of the color balance, setting of two types of color balance of the RGB type and the CMYK type can be distinguished by the type parameter. This setting is
Can be set by NCE command.

RGB color balance is LUT4110A-R, 4110A-G, 4110
-B1, C2, C3 of BALANCE command
Set by the value of ± 50% of the parameter, and calculate the conversion from luminance to density.

The CMYK color balance sets the gradient of the density for the LUT4200 by the value of the C1, C2, C3, and C4 parameters of the BALANCE command ± 50%.

Each image file data is converted by the above LUT,
The image quality can be changed to low to high brightness and low to high density.

The GAMMA command is output from the printer 2 to RGB-type image file data based on the type parameter.
Memory 437 in advance to enable color reproduction on the CRT
0 The data of the LUT registered on 4110A-R, 4110A-G,
By setting the values to 4110A-B and adding a conversion operation from luminance to density, RGB image data subjected to CRT correction of γ = 0.45 can be reproduced in color and output.

The BITCOLOR command is for the binary bitmap memory (special file “BITMAP.S”) (memory E in FIG. 27A), the upper left (sx, sy) coordinates, size width × heig
In the range of ht, the color of the index No. of the color palette 4362 specified by the index parameter is changed to 2 in "BITMAP.S".
When outputting the value bit map to the color printer 2, coloring can be performed by a command from the computer as described above. Sx, sy, wi by BITCOLOR command
The parameters of dth, height, and index are stored in the memory 437 by the CPU 4360.
It is possible to hold more than one on zero. And actually M
PRINT or PRINT command to "BITMAP.
When a file name of "S" is specified, CPU4360 is connected to CPU2 of control unit 13 of color reader 1 / color printer 2.
2, the parameters of the area of sx, sy, width, height and the index No. of the color pallet corresponding thereto from the image storage device 3 via the video interface.
The control unit transmits the 3-byte color data of the RGB component in the color palette table 4362 corresponding to the (index parameter), and repeats (when multiple areas are specified by the BITCOLOR command, repeats).
Reference numeral 13 sets these parameters in the programmable synthesizing unit 115 so that a designated area can be colored in a designated area when outputting a binary bit map to a color printer.

After setting the area and color on the control unit 12 side in this way, the CPU 4360 of the image storage device 3 executes the binary bit map data of "BITMAP.S" by the PRINT or MPRINT command (the memory E of FIG. 27 (A)). ) Can be colored and output via a video interface by a command from a computer.

Coloring is performed on the portion of the binary bit map where the bit is "1".

By the remote function, the color reader / color printer and the image storage device 3 can be set in a state where they can be controlled by the host computer.

The REMOTE command described above is a command from a computer that performs remote control.
(Fig. 92).

In the system remote state, the color reader / color printer and the image storage device 3 can be controlled by a command from a computer.

Only the image storage device 3 can be controlled by a command from the host computer 33. At this time, the color reader / color printer can perform a copying operation by itself as a copying machine.

The local state is a local state (a state in which control cannot be performed) from both the color printer and the color reader from the host computer. The local state is specified by a remote control from the operation unit of the color reader 1 or a REMOTE from the host computer. The remote status will be established as soon as the command is issued.

The copier remote state can be controlled by setting the image storage device 3 to a remote state in accordance with an instruction from the operation unit of the color reader 1. At this time, the command from the computer cannot execute the function of the image storage device 3.

These remote / local states can be specified by the type parameter of the REMOTE command from the host computer 33.

According to the type parameter of the REMOTE command, the CPU 4360 communicates with the CPU 22 of the control unit 13 of the color printer 2 and the color reader 1 via the video interface 201, so that the computer can indicate the four remote / local states described above. it can.

84 to 87 show some examples of the command transmission procedure described above.

FIG. 84 shows a procedure for registering image data from the input device to the image storage device 3 as an image file by the SCAN command. The basic part of the file check in the figure is
As described above, it is also possible to check in advance by inserting the procedure of FIG. 83.

FIG. 85 shows an example of a procedure for outputting image data of an image file already registered in the image storage device 3 by a PRINT command.

FIG. 86 shows a procedure for inputting image data from an input device to an image storage device by using a DRSCAN command, performing registration, and transferring the image data to the computer 33.

FIG. 87 shows an example in which the image data on the computer 33 is output by the output device in the reverse of the DRSCAN command of FIG. 86.

 Next, an actual command embodiment will be described.

FIG. 93 shows an example of outputting an image in the host computer to a color printer as an example of single image output. For example, an example will be described in which a 1024 × 768 pixel RGB type image is centered within a range of 277 × 190 mm from the upper left (10,10) mm position of a sheet and printed out.

As an example of layout output of a plurality of images, an example is shown in which two RGB type image data in the host computer 3 are laid out on one sheet of paper and output by the color printer 2 (FIG. 94).

In this example, an example is shown in which two images of 1280 × 1024 × and 1024 × 768 pixels of the RGB type are centered within the range shown in the figure and printed out.

When outputting a plurality of images, the image data is registered in the image storage device 3 from the host 3 one image at a time, the virtual output is performed, and the image data is output to the printer 2 (shown in FIG. 96). In some cases, the virtual output is registered and all the virtual outputs are output collectively (the case shown in FIG. 95). Both output results are the same.

FIGS. 97 and 98 show examples of taking an image from the reader into the host 3.

In such a case, first, a range of an area (297 × 210 mm) corresponding to, for example, A4 size on the reader 1 is read as RGB type image data at a size of 1000 × 707 pixels, and the data is taken into the host computer 3.

As described above, according to this embodiment, the computer
The image data can be input / output only by exchanging a command (command) between the image storage device 3 and the computer 33 without holding the input / output image data on the computer 33. 1, printer 2, etc.)
Data transfer between them can be reduced.

In the above description, a so-called flatbed type sensor using a color line sensor is used as a means for photoelectrically converting the target image in the present embodiment. However, the present invention is not limited to this. For example, a spot type sensor may be used. Is not limited to this type.

Further, in this embodiment, a color printer which forms a full-color image by so-called frame sequential image formation is used as a means for forming an image. However, such a color printer may be a printer other than a frame sequential printer, for example, an ink jet printer. Alternatively, a thermal transfer type printer or a printer called Cycolor may be used.

In this embodiment, the host computer, the image storage device, and the color reader communicate with each other as independent devices to realize the various functions described above, so that a novel system can be provided.

As described above, the present embodiment has a binarization memory for storing characters and the like separately from the image storage memory, and further inputs a message or a ruled line into the binarization memory from an external device, thereby enabling video input. A message or a comment can be added to the image and printed out.

<Effect of the Invention> According to the present invention, a message specified by a character code or a predetermined pattern can be freely added to given image data, or a pattern read from a document can be used as a mask pattern to provide the given image data. It is possible to mask a desired region of the obtained image data with a simple configuration, and thereby it becomes possible to execute various image processing.

[Brief description of the drawings]

FIG. 1 is a block diagram showing a configuration of a system according to an embodiment of the present invention. FIG. 2 is a block diagram showing a configuration of a document scanning unit 11, a video processing unit and a control unit 13 shown in FIG. Figures 6 to 6 show the video interface shown in FIG.
7 (a) and 7 (b) are diagrams illustrating the configuration and characteristics of the logarithmic conversion circuit 48 shown in FIG. 2, FIG. 8 is a diagram illustrating spectral characteristics of a color separation filter, 9 is a diagram showing the absorption wavelength characteristic of the color toner, FIG. 10 (a) is a block diagram showing the configuration of the color correction circuit 49 shown in FIG. 2, and FIG. 10 (b) is a diagram of FIG. 10 (a). FIG. 11 is a block diagram showing the configuration of the black character processing circuit 69 shown in FIG. 2, and FIGS. 12 (a), (b), (c) and (d) are diagrams of FIG. FIG. 13 (a), (b), (c), (d), (e), and FIG.
(F) is a block diagram showing the area signal generated by the area generating circuit 69 and the configuration of the generating circuit 29. FIGS. 14 (a), (b), (c) and (d) are bit maps for the area limiting mask. FIG. 15 is a diagram showing the configuration and control timing of the memory 91. FIG. 15 is a diagram showing the relationship between the mask bit map memory 91 and the pixels of the original image. FIG. 16 is a mask memory formed on the mask bit map memory 91. 17 (a) is a block diagram showing the configuration of the interpolation circuit 109 shown in FIG. 2, and FIG. 17 (b) is a diagram for explaining the operation of the interpolation circuit shown in FIG. 17 (a). FIGS. 18 (a) and 18 (b) are diagrams showing an example in which clipping and synthesis are performed according to the output of the mask memory 91, respectively. FIG. 19 is a diagram showing characteristics of the density conversion circuit 116. FIG. 20 (a) is a block diagram showing a configuration of the repetition circuit 118, and FIG. 20 (b) is a repetition circuit. FIG. 20 (c) is a diagram showing an output example of the repetition circuit 118, and FIGS. 21 (A), (B) and (C) are other output examples of the repetition circuit 118. 22, FIG. 22 is a time chart showing a print sequence of the printer 2, FIG. 23 is a plan view of the digitizer 16, FIG. 24 is a diagram showing information addresses of an area designated by a point pen of the digitizer 16, FIG. 25 (A) is a block diagram showing a configuration of the synthesizing circuit 115 of FIG. 2, FIG. 25 (B) is a diagram showing a relationship between an area code and an example of a region on a document, and FIG. 25 (C). FIG. 25 (A) is a diagram showing a configuration of the area code generator 130 shown in FIG. 25 (A), FIG. 25 (D) is a diagram showing an example of data in the RAMs 153 and 154 shown in FIG. 25 (C), FIG. 25 (E) shows an area corresponding to the data shown in FIG. 25 (D), and FIG. 25 (F) shows FIG. 25 (A). FIG. 25 (G) is a diagram illustrating the data structure of the RAMs 135 and 136 shown in FIG. 25. FIG. 25 (G) is a diagram illustrating the combination state shown in FIG. 25 (A). FIG. FIG. 25 (i) is a diagram illustrating the operation of the decoder 146 shown in FIG. 25 (A), and FIG. 26 is a color reader. 27 (A) and 27 (B) are block diagrams showing the configuration of the image storage device 3, and FIG. 27 (C) is a diagram showing the timing of the signal 207 and the image signal 205 output from FIG. 27A shows the configuration of memories A to D, FIG. 27D shows the configuration of bitmap memory E, and FIG. 27D-2 shows the original and the bitmap memory E written to bitmap memory E. FIG. 27 (E) shows the configuration of the monitor memory M shown in FIG. 27 (A), and FIG. 27 (F). 27 (A) and 27 (B) show a part of the internal configuration of the system controller. FIG. 28 (A) is a block diagram showing the internal configuration of the filter 9500 shown in FIG. 27 (A). FIGS. 28 (B) and (C) show the selector 42 shown in FIG. 27 (A).
FIG. 29 is a block diagram showing the internal configuration of the system controller 50. FIG. 29 is a system controller 4210 shown in FIG.
FIG. 30 is a timing chart showing a case where a trimming process is performed, FIG. 31 is a timing chart showing a case where a trimming process and a scaling process are performed, FIG. 32 is a block diagram showing the relationship between the memories 4060A-R, G, B inside the memory A, the counter controller, and the counter. FIG. 33 is the memory 4060R when the memories A, B, C, D are connected. ,
FIG. 34 is a diagram showing the capacities of G and B, FIG. 34 is a diagram showing a state in which an image in the storage device 3 is formed by the color printer 2, and FIG. 35 is a diagram showing the operation of the circuits in FIGS. FIG. 36 is a diagram showing the capacity of the memories 4060A-R, G, B, FIGS. 37 (A) and (B) are diagrams showing an example of image synthesis, and FIG. 37 (C) is an image 37 is a timing chart showing the timing at the time of composition, FIGS. 37 (D) and (E) are diagrams showing another example of image composition, and FIGS. 37 (F) and (G) explain enlarged continuous shooting from a memory. Fig, 38 Fig timing Chiya over preparative for explaining the operation of the 27 views of respective parts in l ₁ line of FIG. 37 (a), FIG. 39 each part of FIG. 27 in the l ₂ line of FIG. 37 (a) FIG. 40 is a timing chart showing a sequence of a frame sequential color image formation in the color printer 2. FIG. 41 is a diagram showing the internal configuration of the selector 4230 in FIG. 27 (B), and FIG. 42 is a memory M (corresponding to 2407) and an image memory A shown in FIGS. 27 (A) and 27 (B). , B, C, D (corresponding to 2406), FIG. 43 illustrates the operation of the circuit illustrated in FIG. 42, and FIG. 44 illustrates the circuit operation illustrated in FIG. FIG. 45 is a block diagram showing the structure of the film scanner 34 shown in FIG. 1, FIG. 46 is a perspective view showing the structure of the film carrier shown in FIG. 45, and FIGS. 1 is a diagram showing a display example of the operation unit 20 shown in FIG. 51. FIG. 51 is a block diagram showing the configuration of the storage device 3 as viewed from the host computer 33 shown in FIG. 1, and FIGS. FIG. 56 is a diagram showing the structure of the image file name, and FIG. 57 is a diagram showing the data transferred between the host computer 33 and the image storage device 3. FIG. 58 shows an example of the configuration of a command, FIG. 59 shows a flow of image data generated by various commands, and FIG. 60 shows a memory for inputting R, G, B images. FIG. 61 is a diagram showing a state at the time of data transfer, FIG. 62 is a diagram showing a storage state of Y, M, C, K image inputs in a memory, and FIG. 63 is a diagram showing a state at the time of data transfer. FIG. 64 is a diagram showing a state of storing pallet image data in a memory, FIG. 65 is a diagram showing a mode at the time of data transfer, and FIG. 66 is a diagram showing pallet image data and R, G of each pallet. FIG. 67 is a diagram showing the state of storage of binary input in the memory, FIG. 68 is a diagram showing the form at the time of data transfer, and FIG. 69 is a diagram showing the response data. FIG. 70 shows the configuration of each command, FIG. 70 shows the classification of each command, FIG. 71 to FIG. 80 show each command, FIG. 81 to FIG. 87 Fig. 88, Fig. 89, Fig. 90 are diagrams showing an example of image composition in the system of the present embodiment, Fig. 91 is a diagram showing the structure of a color palette, Fig. 92 is Remote and local relationships between the color reader 1, the image storage device 3, and the host computer 33. FIGS. 93 to 98 are diagrams showing the exchange of commands between the host computer 33 and the image storage device 3. . In the figure, 1 ... color reader 2 ... color printer 3 ... image storage device 32 ... monitor television 33 ... host computer 11 ... document scanning unit 12 ... video processing unit 16 ... digitizer 20 ... operation unit

Continuation of front page (72) Inventor Takayuki Komine 770 Shimonoge, Takatsu-ku, Kawasaki-shi, Kanagawa Prefecture Within the Tamagawa Works of Canon Inc. (56) References JP-A-60-182848 (JP, A) (58) .Cl. ⁷ , DB name) H04N 1/38-1/393

Claims (2)

(57) [Claims] A first image storage memory; a second image storage memory capable of storing a character image developed from a predetermined code and a pattern image obtained by reading a document; Means for synthesizing the stored image and the image stored in the second image storage memory, wherein the image stored in the second image storage memory is stored in the first image storage memory. The image is superimposed and synthesized as a character pattern on the image, or the area where the image stored in the second image storage memory exists is used as a mask pattern to prevent the image stored in the first image memory from being output. An image processing system comprising: a synthesizing unit capable of switching whether to perform processing. 2. The method according to claim 1, wherein the predetermined code is a character code sent from an external device, and the second image storage memory is a memory in which font data obtained from a font memory is expanded based on the character code. 2. The image processing system according to claim 1, wherein: