JP2979196B2 - Semiconductor substrate device for light valve and method of manufacturing the same - Google Patents

Description

Description: TECHNICAL FIELD The present invention relates to a flat light valve device used for a direct-view display device, a projection display device, and the like. More specifically, the present invention relates to a semiconductor substrate integrated circuit device which is used as a substrate of a flat light valve device and has a pixel electrode and a driving circuit formed on a semiconductor thin film laminated on a substrate carrier. As the light valve device, for example, an active matrix device is typical.

[Prior Art] The principle of an active matrix device is simple: a switching element is provided for each pixel, the corresponding switching element is turned on when a specific pixel is selected, and the switching element is turned off when not selected. It is something to keep in a state. The switch element and a circuit for driving the switch element are formed on a glass substrate constituting a liquid crystal panel.
Therefore, the technique of thinning the switch element and the circuit element is important. Normally, insulated gate field effect thin film transistors are used as these elements.

Conventionally, in an active matrix device, a thin film transistor is formed on the surface of an amorphous silicon thin film or a polycrystalline silicon thin film deposited on a glass substrate. Since these amorphous silicon thin films and polycrystalline silicon thin films can be easily deposited on a glass substrate by using a vacuum evaporation method or a chemical vapor deposition method, they are suitable for manufacturing an active matrix device having a relatively large screen.

[Problems to be solved by the invention]

While an active matrix device using a conventional amorphous silicon thin film or polycrystalline silicon thin film is suitable for a direct-view display device requiring a relatively large area image surface,
It is not necessarily suitable for miniaturization of the device, high-speed operation, and high-density pixels. That is, the operating speed is slow because the current driving capability is smaller by one digit or more because the crystal is not a short crystal. Further, when a conventional amorphous or polycrystalline silicon thin film is used, a fine semiconductor processing technique cannot be directly used, and a switch element and a peripheral circuit element on the order of submicron cannot be integratedly formed. For example, in the case of an amorphous silicon thin film, the film formation temperature is about 300 ° C., so that high-temperature processing required for a miniaturization technique cannot be performed. Further, in the case of a polycrystalline silicon thin film, since the size of crystal grains is about several μm, miniaturization of the thin film element is necessarily limited. or,
The deposition temperature of the polycrystalline silicon thin film is about 600 ° C,
It is difficult to make full use of the miniaturization technology that requires a high temperature treatment of 0 ° C. or higher. As described above, in an active matrix device using a conventional amorphous or polycrystalline silicon thin film, it is difficult to achieve the same integration density and small chip size as a normal semiconductor integrated circuit device. There was a problem.

SUMMARY OF THE INVENTION In view of the above-mentioned problems of the related art, it is a general object of the present invention to provide a semiconductor integrated circuit device which can be used as a substrate of a flat light valve device such as a miniaturized active matrix liquid crystal device. I do. In order to achieve this general purpose, the present invention uses a semiconductor substrate having a two-phase structure consisting of an electrically insulating transparent carrier layer and a semiconductor single crystal thin film layer formed thereon to form a thin film such as a thin film transistor. An element was formed.

By the way, in general, a semiconductor substrate for a light valve device includes a light transmitting area in which a pixel electrode group and a switch element group for selectively supplying power to each pixel electrode are formed, and a circuit element group for driving the switch element group. And a light non-transmissive area in which a peripheral circuit is formed. In each section, the switch element group and the circuit element group are individually electrically separated by element isolation regions. By the way, in the non-light-transmitting area, a sufficient light transmittance is required also for the element isolation region in order to increase the light transmittance, but there is relatively room for dimensional accuracy. On the other hand, in the non-transmissive area, in order to integrate a circuit element group such as a transistor constituting a peripheral circuit at a high density, the element isolation region is required to have fine and high-precision size / shape control. It is rather preferable that the material is optically opaque because it is not necessary to transmit light. In view of the above, the present invention forms element isolation regions having different dimensional accuracy and different optical characteristics with respect to the light-transmitting area and the non-transmitting area to improve the performance of the semiconductor integrated circuit device for a light valve as a whole. Its characteristic purpose is to improve.

[Means to solve the problem]

In order to achieve the above-described general and characteristic objects of the present invention, a light-valve semiconductor substrate device according to the present invention includes a light-transmitting area having a light-modulating function as a light valve and an electric-transmitting area. A semiconductor substrate in which a light non-transmissive area for control is set adjacently is used. In the transmission area, a pixel electrode group for performing light modulation in a matrix and a switch element group for selectively supplying power to each pixel electrode are formed. On the other hand, in the non-transmissive area, a peripheral circuit including a circuit element group for driving the switch element group is formed. As a feature of the present invention, the semiconductor substrate used has a two-phase structure including a transparent carrier layer and a semiconductor single crystal thin film layer. The switch element group and the peripheral circuit element group are formed on the semiconductor single crystal thin film layer in a high-density, high-definition, and integrated manner. In addition, in the transmission area of the semiconductor single crystal thin film layer, individual switch elements are electrically separated by an optically transparent separation area, and in the non-transmission area, each peripheral circuit element is optically non-transparent. The element is electrically separated by a proper isolation region.

In one embodiment of the present invention, the non-transparent isolation region is composed of a thick field oxide film having a relatively small film thickness obtained by limited selective thermal oxidation of the surface portion of the semiconductor single crystal thin film layer. On the other hand, the transparent isolation region is formed of a relatively thick full-thickness field oxide film obtained by selective thermal oxidation of the entire thickness of the semiconductor single crystal thin film layer.

According to another aspect of the present invention, the transparent separation region is constituted by a separation groove formed by selective etching of the entire thickness of the semiconductor single crystal thin film layer, and the non-transparent separation region is formed in the same manner as in the first embodiment. It is composed of a thick field oxide film.

Next, a typical method for manufacturing the above-described semiconductor integrated circuit substrate device for a light valve will be described. First, a semiconductor single crystal plate such as a silicon wafer used for VLSI manufacturing is bonded to the transparent carrier layer. The semiconductor single crystal plate is subjected to mechanical chemical polishing to form a semiconductor single crystal thin film layer. Next, a transparent isolation region is formed on the surface of the semiconductor single crystal thin film layer in the non-transmission area, and an element region surrounded by the transparent isolation region is defined. At the same time, a non-transparent separation region is formed in the non-transmissive area on the surface of the semiconductor single crystal thin film layer in the light non-transmissive area, and an element region surrounded by the non-transparent separate area is defined. Subsequently, a pixel electrode is formed in a portion other than the element region in the transmission area, and a switch element for selecting a pixel is formed in the element region. At the same time, a circuit element for driving the switch element is formed in the element region in the non-transmissive area.

[Action]

As described above, according to the present invention, a substrate having a two-phase structure including a transparent carrier layer at least partially insulative and a semiconductor single crystal thin film layer formed thereon is used. The crystal thin film layer has the same quality as a silicon wafer used for VLSI manufacturing. Therefore, a switch element for selecting a pixel and a peripheral circuit element for driving the switch element can be easily formed in an integrated manner on the semiconductor single crystal thin film layer by making full use of ultra-fine technology. The resulting integrated circuit chip has extremely high pixel density and element integration density, and can constitute an ultra-small, high-speed, high-definition active matrix liquid crystal device.

Particularly, in the transmission area, the individual switch elements are electrically separated by the transparent separation area, so that the light transmittance of the transmission area can be sufficiently ensured. On the other hand, since no light transmission function is required in the non-transmissive area, each circuit element is separated by a non-transparent separation area.
The non-transparent isolation region is composed of a thick field oxide film obtained by limited selective thermal oxidation of the surface portion of the semiconductor single crystal thin film layer. Since the thickness of the thick field oxide film is relatively small, the size of the bird's beak is small and the effective area of the element region can be effectively secured. On the other hand, by forming the transparent isolation region with a full thickness field oxide film obtained by selective thermal oxidation of the entire thickness of the semiconductor single crystal thin film layer, the semiconductor single crystal thin film layer is completely transparent. Since the thickness of the full thickness field oxide film is large, the size of the bird's beak is inevitably large, but there is no problem because the dimensional accuracy of the switch element region is not as strict as that of the circuit element region. Alternatively, the transparent isolation region can be made completely transparent by being constituted by an isolation groove formed by selective etching of the entire thickness of the semiconductor single crystal thin film layer. Generally, the etching accuracy is lower than the selective thermal oxidation accuracy, but on the other hand, the etching speed is much higher than the selective thermal oxidation speed, so that it is suitable for improving the production efficiency.

〔Example〕

Hereinafter, preferred embodiments of the present invention will be described in detail with reference to the drawings. FIG. 1 is a schematic partial sectional view showing a typical embodiment of a semiconductor integrated substrate device for a light valve according to the present invention. As shown in the figure, the present apparatus utilizes a composite substrate having at least a two-phase structure, comprising an electrically insulating transparent carrier layer 1 and a semiconductor single crystal thin film layer 2 laminated thereon. Since this two-phase structure is formed by bonding, the single crystal thin film layer 2
Can have the same crystallinity as the substrate used for the LSI. The transparent carrier layer 1 is made of, for example, quartz and the semiconductor single crystal thin film layer 2 is made of, for example, silicon single crystal. As shown, the composite substrate is divided into a right half light transmitting area and a left half light non-transmitting area. In the light transmitting area, a pixel electrode group and a switch element group are formed in a matrix, but in FIG. 1, one transparent pixel electrode 3 is provided for simplicity.
And one corresponding switching element 4 is shown. The switching element 4 is generally composed of an insulated gate field effect transistor, and has a gate electrode G laminated with a pair of a source region S and a drain region D formed on the surface of the semiconductor single crystal thin film layer 2 via a gate insulating film 5. It is composed of The transparent pixel electrode 3 is electrically connected to the source region S via a contact hole formed in the gate insulating film 5. On the other hand, peripheral circuits including a drive circuit including a plurality of circuit elements are formed in the light non-transmissive area. In the figure, one circuit element 6 is shown for simplicity. This circuit element 6 is also usually composed of an insulated gate field effect transistor.

In the light transmission area, a transparent separation region 7 is formed to electrically separate the individual switch elements 4.
In the example shown in FIG. 1, the transparent isolation region 7 is composed of a full thickness field oxide film obtained by selectively thermally oxidizing the entire thickness of the semiconductor single crystal thin film layer 2. In general, when the entire silicon single crystal layer is converted to a silicon dioxide layer by thermal oxidation, the thickness is approximately doubled. The field oxide film of silicon dioxide is optically transparent. Since the transparent pixel electrode 3 is superimposed on the transparent separation region 7, incident light passing through the transparent pixel electrode 3 can be transmitted in the light transmission area as a whole, and an excellent light valve function can be achieved. it can. When the semiconductor single crystal thin film layer 2 is subjected to full-thickness thermal oxidation, the size of the bird's beak increases, and the effective area of the element region for forming the switch element 4 decreases. However, no problem arises because the switch element 4 is not required to have a stricter integration density or dimensional accuracy than the circuit element 6. On the other hand, in the light non-transmissive area, the individual circuit elements 6 are electrically separated by the non-transparent separation area 8. In this example, the non-transparent isolation region 8 is formed of a thick field oxide film obtained by limited selective thermal oxidation of the surface portion of the semiconductor single crystal thin film layer 2. As is apparent from the figure, the thickness of the thick field oxide film is smaller than that of the full thickness field oxide film. Therefore, the size of the bird's beak can be reduced, and the effective area of the element region for forming the circuit element 6 can be set effectively, so that ultra-high density integration is possible. by the way,
Below the thick field oxide film, the semiconductor single crystal thin film layer 2 left without being thermally oxidized is partially left. This single crystal layer is optically opaque and blocks incident light. However, light incident on the non-transmissive area is not a problem since it is not related to the light valve action.

Next, a typical example in which a liquid crystal active matrix type light valve is formed using the semiconductor substrate device shown in FIG. 1 will be described with reference to FIG. As shown in the figure, the liquid crystal active matrix type light valve comprises a semiconductor substrate device, a counter substrate 9 disposed opposite to the semiconductor substrate device, and an electro-optical device comprising a liquid crystal filled between the semiconductor substrate device and the counter substrate 9. Material layer 10
It is composed of As described above, a matrix group of pixel electrodes 3 defining pixels and a group of switch elements 4 for selectively supplying power to individual pixel electrodes 3 according to a predetermined signal are provided on the surface of the substrate device of the present invention. Is formed.

As described above, the semiconductor substrate device utilizes a composite substrate including the carrier layer 1 made of quartz glass and the single-crystal silicon semiconductor thin film layer 2. A polarizing plate 11 is adhered to the back side of the quartz glass carrier layer 1. Each switch element 4 is formed of an insulated gate field effect transistor, and its source region is connected to the corresponding pixel electrode 3, its gate electrode is connected to the scanning line 12, and its drain region is also connected to the signal line 13. It is connected to the. The portion where the plurality of switch elements 4 and the pixel electrodes 3 described above are formed in a matrix defines a light transmitting area, and performs a light valve action on an incident light beam.

An X driver 14 is formed on the upper surface of the composite substrate, and is connected to the signal lines 13 in a row. Further, a Y driver 15 is formed on the left surface of the composite substrate, and is connected to the row-shaped scanning lines 12. The X driver 14 and the Y driver 15 include many circuit elements 6 shown in FIG. 1 and define a light non-transmissive area. Actually, the circuit elements 6 are mutually connected to form a shift register or a level shifter, and drive the individual switch elements 4 in a line-sequential manner.

The counter substrate 9 includes a glass carrier 16, a polarizing plate 17 adhered to the outer surface of the glass carrier 16, and a counter electrode 18 formed on the inner surface of the glass carrier 16. In addition, the inner surfaces of a pair of substrates in contact with the liquid crystal layer 10 are each provided with a liquid crystal alignment layer 19.
And 20 are formed.

Next, the operation of the light valve shown in FIG. 2 will be briefly described. The gate electrode of the transistor constituting each switch element 4 is connected to a scanning line 12, and a scanning signal is applied by a Y driver 15 to control the conduction and cutoff of each switch element 4 line by line. The image signal output from the X driver 14 is applied to the selected switch element 4 in the conductive state via the signal line 13. The applied image signal is supplied to the corresponding pixel electric distance 3 to excite the pixel electrode, and the liquid crystal layer 10 is excited.
To make the transmittance substantially 100%. on the other hand,
At the time of non-selection, the switch element 4 becomes non-conductive and maintains the image signal written to the pixel electrode as electric charge. The liquid crystal layer 10 has a high specific resistance and normally operates as a capacitive element. The on / off current ratio is used to represent the switching performance of these switch elements 4. The current ratio required for the liquid crystal operation can be easily obtained from the writing time and the holding time. For example, when the image signal is a television signal, 90% or more of the image signal must be written within about 50 μsec of one scanning line period. On the other hand, 90% or more of the electric charge must be held in one field period of about 16 msec. As a result, the current ratio needs to be 5 digits or more. In this regard, since the switch element 4 is formed on the single crystal silicon semiconductor thin film layer 2 having extremely high charge mobility, an on / off ratio of six digits or more can be secured. Therefore, it is possible to obtain an active matrix type light valve device having an extremely high-speed signal response. Further, by utilizing the high mobility characteristic of the silicon single crystal thin film layer 2, the X driver 14 and the Y driver
Peripheral circuits including the driver 15 can be formed on the same silicon single crystal semiconductor thin film at a very high density.

First Embodiment Hereinafter, various preferred embodiments of a semiconductor substrate device for a light valve according to the present invention will be described in detail with regard to a manufacturing method and a structure thereof. First, FIG. 3 (A) to FIG. 3 (G)
The first embodiment will be described in detail with reference to FIG. This embodiment shows an example of a method of manufacturing the semiconductor substrate device for a light valve shown in FIG. First, in the step shown in FIG. 3A, a quartz glass substrate 31 and a single crystal silicon semiconductor substrate 32 are prepared.
The single crystal silicon semiconductor substrate 32 is preferably a high quality silicon wafer used for VLSI manufacturing. The crystal orientation has, for example, a uniformity in the range of <100> 0.0 ± 1.0, and the single-crystal lattice defect density is 500 / cm ² or less. The front surface of the prepared quartz glass substrate 31 and the back surface of the single crystal silicon semiconductor substrate 32 are precisely smoothed. Then, both substrates are thermocompression-bonded by overlapping and heating both surfaces which have been smoothed. By this thermocompression bonding, both substrates
31 and 32 are firmly fixed to each other.

In the step shown in FIG. 3B, the surface of the single crystal silicon semiconductor substrate 32 is polished. As a result, a single crystal silicon semiconductor film layer 33 polished to a desired thickness is formed on the surface of the quartz glass substrate 31. A composite substrate having a two-phase structure including the carrier layer 31 made of a quartz glass substrate and the single crystal silicon semiconductor film layer 33 is obtained. Note that, in order to make the single crystal silicon semiconductor substrate 32 thinner, an etching process may be used instead of the polishing process. Since the quality of the silicon wafer 32 is substantially preserved in the single-crystal silicon semiconductor film layer 33 thus obtained, a composite substrate material having extremely excellent crystal orientation uniformity and lattice defect density is obtained. Can do things.

By the way, various types of semiconductor single crystal composite substrates having such a two-layer structure have been conventionally known. So-called SO
This is called an I substrate. For example, an SOI substrate is formed by depositing a polycrystalline silicon thin film on a carrier surface made of an insulating material by chemical vapor deposition, etc. It was obtained by converting to a structure. However, in general, a single crystal obtained by recrystallization of a polycrystal does not always have a uniform crystal orientation and has a large lattice defect density. For these reasons, it has been difficult to apply a miniaturization technique to an SOI substrate manufactured by a conventional method, similarly to a silicon single crystal wafer.

Subsequently, in the step shown in FIG. 3C, only the surface portion of the silicon single crystal thin film layer 33 is selectively thermally oxidized to form a thin field oxide film. In the figure, the right half shows a light transmitting area and the left half shows a light non-transmitting area. The thin field oxide film 34 is formed only in the light non-transmissive area and defines the circuit element region 35. A part of the silicon single crystal layer 33 is left under the thin field oxide film 34, and is entirely non-transparent and forms a non-transparent isolation region.

In the step shown in FIG. 3 (D), the entire surface of the silicon single crystal layer 33 is subjected to selective thermal oxidation in the transmission area, and a thick field oxide film 36 is formed. This thick field oxide film is formed by converting the entire thickness of the silicon single crystal layer 33 to silicon dioxide. Therefore, thick field oxide 36
Are substantially light transmissive and form transparent isolation regions. A switch element region 37 is formed in a portion surrounded by the thick field oxide film 36. In the example described above, a thin field oxide film 34 is formed first, and a thick field oxide film 34 is formed.
36 was formed later. However, the manufacturing method according to the present invention is not limited to this, and the order of forming the two types of field oxide films may be reversed.

In the step shown in FIG. 3E, the device regions 35 and 37 are formed.
Gate oxide films 38 and 39 are simultaneously formed on the surface of the substrate. Further, a gate electrode G patterned in a predetermined shape is formed on the gate oxide film. The gate oxide films 38 and 39 are formed by a thermal oxidation process.
The gate electrode is formed by depositing a polycrystalline silicon film by a chemical vapor deposition method. That is, the deposited polycrystalline silicon film is selectively etched by using a resist patterned in a predetermined shape to form a gate electrode G made of the polycrystalline silicon film on the gate oxide films 38 and 39.

Next, in the step shown in FIG.
Is used as a mask, ions of impurities such as arsenic are implanted through the gate oxide films 38 and 39 to form a drain region D and a source region S in the silicon single crystal layer 33. As a result, in each of the element regions 35 and 37, a transistor channel region in which impurities are not implanted is formed below the gate electrode G and between the drain region D and the source region S. As a result, in the light non-transmission area, the circuit element region
At 35, an insulated gate field effect transistor constituting a circuit element is formed. Further, in the light transmission area, an insulated gate field effect transistor for forming a switch element in the switch element region 37 is formed.

Finally, in a step shown in FIG. 3 (G), a part of the gate oxide film 39 on the source region S of the transistor constituting the switch element is removed to form a contact hole, and the contact hole is formed. A transparent pixel electrode 40 is formed.
The pixel electrode 40 is made of ITO or the like, and is overlaid on the transparent field oxide film 36. Therefore, the pixel electrode 40,
The three-phase structure composed of the thick field oxide film 36 and the quartz glass substrate 31 is optically transparent, so that a transmission type light valve device can be obtained. On the other hand, the opaque silicon single crystal layer 33 is partially left under the thin field oxide film 34 formed in the light non-transmissive area. As shown, the bird's beak of the thin field oxide film 34 is smaller in size than the bird's beak of the thick field oxide film 36, so that the variation amount is small, the circuit element region 35 can be formed with high accuracy and high density. Finally, a protective film made of PSG or the like is coated so as to cover the entire surface of the composite substrate. Although not shown, the switch element group and the circuit element group are electrically connected to each other according to a predetermined pattern.

As described above, in the manufacturing method shown in FIGS. 3A to 3G, a high-quality silicon single crystal thin film layer is formed by using a high-temperature film forming process, high-resolution photolithographic etching, and an ion implantation process. By performing the above, it is possible to integrally form an insulated gate field effect transistor having a size on the order of microns or submicrons. Since the silicon single crystal layer used is of extremely high quality, the obtained insulated gate field effect transistor has excellent electrical characteristics. At the same time, the pixel electrode can be formed in a micron order size by a miniaturization technique, so that a semiconductor integrated circuit chip substrate for an active matrix liquid crystal device having a high-density and fine structure can be manufactured.

Second Embodiment Next, referring to FIGS. 4A to 4C, a second embodiment will be described.
Examples will be described in detail. This embodiment is a further improvement of the first embodiment, in which a thin field oxide film is extended around a thick field oxide film forming a transparent isolation region to reduce the variation in the size of the switch element region. First, in the step shown in FIG. 4A, a composite substrate including a quartz glass carrier layer 41 and a silicon single crystal layer 42 is prepared. The method of manufacturing this composite substrate is the same as in the first embodiment. Subsequently, only the surface portion of the silicon single crystal layer 42 is selectively thermally oxidized to form a thin field oxide film 43. In the figure, the left side shows a light non-transmission area, and the right side shows a light transmission area. A peripheral circuit element region 44 is formed in the light non-transmission area, and a switch element area 45 is formed in the light transmission area. Since each element region is surrounded by the thin field oxide film 43, its dimensional accuracy is extremely high. This is because the variation amount of the bird's beak existing at the edge of the thin field oxide film 43 is small. The field oxide film is obtained by partially performing thermal oxidation of the single crystal silicon layer 42 using a double layer of a silicon oxide film and a silicon nitride film formed in a predetermined pattern as a mask.

Subsequently, in a step shown in FIG. 4 (B), a second selective thermal oxidation process is performed to form a thick field oxide film 46. This thick field oxide film 46 is formed only in the light transmitting region and is formed on the thin field oxide film 43. As a result, a thin field oxide film 43 is left around the thick field oxide film 46 as shown. Therefore, there is no change in the size of the switch element region 45. Since the thick field oxide film 46 is formed until it reaches the surface of the quartz carrier layer 41, it is completely light-transmissive, and the peripheral circuit element group and the switch element group can be completely electrically separated.

Finally, in the step shown in FIG. 4C, a transistor having a gate electrode G, a drain region D and a source region S is formed in the circuit element region 44, and the gate electrode G and the drain are similarly formed in the switch element region. A transistor having a region D and a source region S is formed. This step is similar to the steps shown in FIGS. 3 (E) to 3 (G). A pixel electrode 47 is electrically maintained in the source region S of the switch element transistor. Further, a transparent protective film 48 is coated over the entire surface of the composite substrate.

Third Embodiment Next, a third embodiment of the present invention will be described in detail with reference to FIGS. 5 (A) to 5 (C). In this embodiment, the non-transparent isolation region is formed of a thin field oxide film obtained by limited selective thermal oxidation of the surface portion of the semiconductor single crystal layer, and the transparent isolation region is formed by selecting the entire thickness of the semiconductor single crystal layer. Of the isolation groove formed by the selective etching. First, in the step shown in FIG. 5A, a composite substrate having a structure in which a carrier layer 51 made of a quartz glass plate and a silicon single crystal thin film layer 52 are stacked is prepared. The method of manufacturing this composite substrate is the same as the step shown in FIG. The thickness of the silicon single crystal layer 52 is several μm.
It is about. In order to oxidize the entire thickness by selective thermal oxidation to form a thick transparent field oxide film, a high temperature treatment must be performed for a long time. For example, to convert a 2 μm silicon single crystal thin film into a thermal oxide film, 1100 ° C
Must be continuously performed for 24 hours. For this reason, in the first embodiment and the second embodiment, the manufacturing efficiency is relatively low. Therefore, in this embodiment, the transparent isolation region is formed by an etching groove instead of a thick field oxide film.

That is, in the step shown in FIG. 5 (B), the silicon single crystal layer 52 is selectively etched to form a separation groove 53. This selective etching can be performed, for example, by anisotropic etching using plasma ions or the like through a mask having a predetermined pattern. The separation groove 53 is formed only in the right half of the light transmission area in the figure, and an island-shaped switch element region 54 is formed. On the other hand, the circuit element region 55 is left in the left half light non-transmissive area in the figure.

Finally, in the step shown in FIG. 5C, a switch transistor having a gate electrode G, a drain region D and a source region S is formed in the island-shaped element region 54. The forming method is the same as in the above-described embodiment. Further, the pixel electrode 56 is connected to the source region S of the switch transistor.
Is formed. As is clear from the figure, the switch element area
Reference numeral 54 is surrounded by a transparent separation groove, which is different from the structure surrounded by a thick field oxide film bird's beak as in the above-described embodiment. On the other hand, in the light non-transmissive area, a thin field oxide film 57 is formed on the silicon single crystal layer 52 to define the circuit element region 55. A peripheral circuit device transistor having a gate electrode G, a drain region D and a source region S is formed for this circuit device region. The forming method is the same as in the previous embodiment. Finally, PSG
A protective film 58 made of a transparent material such as The separation groove 53 is buried by this protective film.

Fourth Embodiment Next, a fourth embodiment of the present invention will be described in detail with reference to FIGS. 6 (A) to 6 (C). This embodiment is an improvement of the embodiment shown in FIGS. 5 (A) to 5 (C), in which an oxide film layer is buried in an isolation trench to planarize the substrate surface. . First, in the step shown in FIG. 6A, a quartz crystal plate layer 61 and a silicon single crystal thin film layer 62 are formed.
Is prepared. Anisotropic selective etching is performed on the silicon single crystal layer 62 to form a separation groove 63. This separation groove is formed only in the light transmission area shown on the right side in the figure, and defines an island-like switch element region 64.

Next, in the step shown in FIG.
65 is filled in the element isolation groove 63, and the substrate surface is flattened. The silicon oxide film 65 can be buried by using a deposition process of silicon dioxide by a chemical vapor deposition method or the like. Unlike the third embodiment, in this embodiment, the surface of the substrate is flattened, so that disconnection of a wiring pattern or the like formed later can be effectively prevented. or,
When the surface is flat, the gap size between the counterpart substrate and the light valve device can be made constant when incorporated in the light valve device, and the operating characteristics of the light valve device can be stabilized.

Finally, in the step shown in FIG. 6C, an insulated gate field effect transistor is formed in the island-shaped switch element region 64. A transparent pixel electrode 66 is connected to the source region S of the switch transistor. The transparent pixel electrode 66 is formed on the transparent buried oxide film 65.
On the other hand, in the light non-transmissive area on the left half in the figure, a thin field oxide film 67 is formed to define a circuit element region 68, and the circuit element region 68 is insulated in the same manner as in the above-described embodiment. A peripheral circuit element composed of a gate field effect transistor is formed.

Fifth Embodiment Next, a fifth embodiment of the present invention will be described in detail with reference to FIGS. 7 (A) to 7 (C). This embodiment is a further improvement of the third embodiment. That is, a field oxide film is formed only on a part of the surface of the island-shaped element region where the switch transistor is formed, thereby stabilizing the operation characteristics of the transistor element. FIG. 7A is a cross-sectional view along the longitudinal direction L of the switch transistor. As illustrated, an island-like switch element region 72 is formed on the surface of a quartz substrate 71. The switch element region 72 is obtained by selectively etching a silicon single crystal thin film. The surface and side surfaces of the island-shaped element region 72 are gate oxide films
Coated with 73. A drain region D and a source region S are formed at predetermined intervals along the longitudinal direction L. A channel region is formed between the pair of impurity diffusion regions. That is, the longitudinal direction L indicates the channel direction. A gate electrode G is formed above the channel region with a gate insulating film 73 interposed therebetween.

FIG. 7B shows the same switch transistor in the width direction W.
It is sectional drawing cut | disconnected along. The width direction W indicates the width direction of the channel region. As shown, thin field oxide films 74 are formed on both sides in the width direction of the channel region. This field oxide film 74 is obtained by partially thermally oxidizing only the surface portion of the silicon single crystal thin film forming the element region 72.

FIG. 7C is a plan view of the same switch transistor. As illustrated, a drain region D, a gate electrode G, and a source region S are sequentially formed on the surface of the island-shaped element region along the longitudinal direction L. A pair of thin field oxide films 74 are formed so as to define the width of the channel region immediately below the gate electrode G. Generally, etching accuracy is on the order of 1000 mm and selective thermal oxidation accuracy is
It is a unit of 100Å. In this embodiment, the width of the channel is defined by a field oxide film having excellent processing accuracy. Accordingly, it is possible to obtain a light valve semiconductor substrate device having stable operation performance without variation in the operation characteristics of the individual switch transistors. On the other hand, when such a thin field oxide film is not used, the width dimension of the channel region is defined by a pair of etched end faces of the island-shaped element region. However, the processing accuracy of etching is inferior to the processing accuracy of thermal oxidation, so that the width of the channel region varies.

FIG. 8 shows a sixth embodiment of the present invention. Generally, a circuit element group formed in the light non-transmissive area includes P-type and N-type transistor elements. In this embodiment, the same-type transistor elements are separated from each other by a thick field oxide film having a relatively small thickness, and the different-type transistor elements are separated by a selective thermal oxidation of the entire thickness of the semiconductor single crystal layer. Elements are separated by a full thickness field oxide film having a film thickness. Such a structure prevents so-called latch-up. As shown in FIG. 8, the silicon single crystal layer 82 coated on the surface of the insulating transparent carrier layer 81 includes:
An N-type insulated gate field-effect transistor and a P-type insulated gate field-effect transistor are formed adjacent to each other. These transistors are arranged in the light non-transmissive area and constitute a group of peripheral circuit elements. N-type transistor
Reference numeral 83 is formed in the portion of the silicon single crystal layer 82 into which a P-type impurity is introduced, and includes an N ⁺ -type drain region and a source region, and a gate electrode. N-type transistor
Reference numeral 83 is formed in an element region surrounded by a field oxide film 84 having a relatively small thickness. On the other hand, the P-type insulated gate field effect transistor 85 is formed in a portion of the silicon single crystal layer 82 into which N-type impurities are introduced. P
The type transistor 85 includes a P ⁺ type drain region and a source region, and a gate electrode. P-type transistor
Similarly, 85 is formed in the element region surrounded by the thin field oxide film 84. Another P-type transistor 86 is formed adjacent to this P-type transistor 85. As shown, the pair of P-type transistors 85 and 86 are separated from each other by a thin field oxide film 84. Therefore, although the portion of the silicon single crystal layer 82 into which the N-type impurity is introduced is continuous between both transistors, there is no problem in electrical isolation.

On the other hand, the N-type transistor 83 and the P-type transistor 85 adjacent to each other are completely separated by a thick field oxide film 87. Therefore, the portion of the single crystal thin film layer 82 into which the P-type impurity is introduced and the portion of the single crystal thin film layer 82 into which the N-type impurity is introduced are separated from each other. If the thick field oxide film 87 is not provided and the N-type region and the P-type region of the silicon single crystal thin film layer 82 are continuous with each other, N
Region of the p-type transistor 83 and the drain region of the p-type transistor 85
A parasitic thyristor having a NPNP junction structure is formed between the thyristor and the source region. As a result, latch-up occurs between the odd-shaped transistors 83 and 85, causing a malfunction of the transistors. In the present embodiment, a thick field oxide film 87 is formed by selectively thermally oxidizing the entire thickness of the silicon single crystal layer 82 to realize a latch-up free structure.

Seventh Embodiment Finally, a seventh embodiment of the present invention will be described in detail with reference to FIGS. 9 (A) to 9 (D). This embodiment relates to a method for manufacturing a composite substrate in which island-shaped element regions are formed in advance. First, in the step shown in FIG. 9 (A), a high-quality silicon single crystal plate made of a silicon wafer for LSI manufacturing or the like is used.
91 are prepared. A concave portion 92 is formed on the back surface of the silicon single crystal plate 91 by using anisotropic etching.

Next, in a step shown in FIG. 9 (B), a silicon dioxide film 93 is entirely deposited on the back surface side of the silicon single crystal plate 91 using a chemical vapor deposition method. As a result, the recess 92 is filled with the silicon oxide film. Further, the surface of the silicon oxide film 93 is flattened by performing scientific polishing.

In the step shown in FIG. 9 (C), an insulating transparent carrier substrate 94 made of quartz glass or the like is prepared. After smoothing the surface of the carrier substrate 94, the carrier substrate 94 is bonded to the silicon oxide film 93 by thermocompression bonding.

Finally, in the step shown in FIG. 9D, the silicon single crystal plate 91 is mechanically or chemically polished to remove the single crystal plate 91. This polishing process is a silicon oxide film layer
The process is performed until 93 trapezoidal surface portions are exposed. As a result, the thinly polished silicon single crystal thin film layer 95 is separated by the exposed silicon oxide film. An element region 95 and a transparent separation region 96 are previously formed on the surface of the composite substrate formed by such a manufacturing method. Moreover,
The surface of the composite substrate is extremely flat, which can contribute to an improvement in yield in a later process.

〔The invention's effect〕

As described above, according to the present invention, a semiconductor integrated circuit substrate device for a light valve is configured using a composite substrate having a semiconductor single crystal thin film layer formed on a carrier layer. For this reason, it is possible to form not only a switch element group for selectively supplying a pixel electrode group and a pixel electric distance group with high density to the light transmitting area of the composite substrate, but also to a peripheral light non-transmitting area. The peripheral circuit element group for driving the switch element group can be formed simultaneously by using the LSI manufacturing technology. In particular, the performance of the light valve semiconductor substrate device can be improved by changing the optical or physical characteristics of the element isolation region in the light transmission area and the element isolation area in the light non-transmissive area. That is, in the light transmission area, the light modulation efficiency of the light valve is improved by using a transparent element isolation region. On the other hand, since it is not necessary to form a transparent element isolation region in the light non-transmissive area, the integration density of the peripheral circuit element group can be reduced by using the element isolation region having high dimensional accuracy even if it is opaque. I try to improve.

[Brief description of the drawings]

FIG. 1 is a schematic partial sectional view showing a typical structure of a semiconductor substrate device for a light valve according to the present invention. FIG. 2 is a liquid crystal active matrix light valve using the semiconductor substrate device for a light valve shown in FIG. FIGS. 3 (A) to 3 (G) are schematic exploded perspective views of the apparatus, and FIGS. 3 (A) to 3 (G) are process diagrams showing a first embodiment of the present invention, and FIGS.
4 (A) to 4 (C) are process diagrams showing a second embodiment of the present invention, FIGS. 5 (A) to 5 (C) are process diagrams showing a third embodiment of the present invention, 6 (A) to 6 (C) are process diagrams showing a fourth embodiment of the present invention, and FIGS. 7 (A) to 7 (C) are schematic diagrams showing a fifth embodiment of the present invention. FIGS. 8 and 9 are schematic partial sectional views showing a sixth embodiment of the present invention, and FIGS. 9 (A) to 9 (D) are process diagrams showing a seventh embodiment of the present invention. DESCRIPTION OF SYMBOLS 1 ... Transparent carrier layer, 2 ... Semiconductor single crystal thin film layer 3 ... Transparent pixel electrode 4, ... Switch element 6 ... Circuit element, 7 ... Transparent separation area 8 ... Non-transparent separation area

Claims (12)

(57) [Claims] A semiconductor substrate having a light transmitting area and a non-transmitting area, wherein a pixel electrode group and a switch element group for selectively supplying power to each pixel electrode are formed in the transparent area; A light valve semiconductor substrate device in which a peripheral circuit including a circuit element group for driving the switch element group is formed in a non-transmissive area, wherein the semiconductor substrate comprises a transparent carrier layer and a semiconductor single crystal thin film layer The switch element group and the circuit element group are integrally formed on the semiconductor single crystal thin film layer, and individual switch elements are separated by a transparent separation region in a transmission area, and each circuit element is separated in a non-transmission area. A semiconductor substrate device for a light valve, wherein the elements are separated by a non-transparent separation region. 2. The semiconductor substrate for a light valve according to claim 1, wherein said non-transparent isolation region comprises a thick field oxide film obtained by limited selective thermal oxidation of a surface portion of said semiconductor single crystal thin film layer. apparatus. 3. The light-valve semiconductor substrate device according to claim 2, wherein said transparent isolation region is formed of a full-thickness field oxide film obtained by selective thermal oxidation of said semiconductor single-crystal thin film layer. . 4. The semiconductor substrate device for a light valve according to claim 3, wherein the transparent isolation region includes an additional thick field oxide film extending over the full thickness field oxide film. 5. The light-valve semiconductor substrate device according to claim 2, wherein said transparent isolation region comprises an isolation groove formed by selective etching of the entire thickness of said semiconductor single crystal thin film layer. 6. The semiconductor substrate device for a light valve according to claim 5, wherein an oxide film layer is buried in said separation groove. 7. The circuit element group includes P-type and N-type transistor elements, the same-type transistor elements are separated by a thick field oxide film, and the different-type transistor elements are separated by a total thickness of the semiconductor single crystal thin film layer. 3. The light-valve semiconductor substrate device according to claim 2, wherein elements are separated by a full-thickness field oxide film obtained by selective thermal oxidation. 8. A first step in which a semiconductor single crystal plate is bonded to a transparent carrier layer and then polished to form a semiconductor single crystal thin film layer, and a transparent separation region is formed in a light transmission area on the surface of the semiconductor single crystal thin film layer. A second step of defining an element region surrounded by this; a third step of forming a non-transparent isolation region in a light non-transmissive area on the surface of the semiconductor single crystal thin film layer and defining an element region surrounded by the second step; A fourth step of forming a pixel electrode in a portion other than the element region of the transmissive area and forming a switch element for pixel selection in the element region; and a circuit element for driving the switch element in the element region of the non-transmissive area. A method of manufacturing a semiconductor substrate device for a light valve, comprising a fifth step of forming. 9. The light-valve semiconductor substrate device according to claim 8, wherein said third step is a step of selectively thermally oxidizing a surface portion of said semiconductor single crystal thin film layer to form a thick field oxide film. Manufacturing method. 10. The manufacturing of a light-valve semiconductor substrate device according to claim 9, wherein said second step is a step of selectively thermally oxidizing the entire thickness of said semiconductor single crystal thin film layer to form a full thickness field oxide film. Method. 11. The method of manufacturing a light-valve semiconductor substrate device according to claim 9, wherein said second step is a step of selectively etching the entire thickness of said semiconductor single crystal thin film layer to form an island-shaped element region. . 12. The first step comprises, after forming a concave portion on the back surface of the semiconductor single crystal plate, depositing and flattening an oxide film on the back surface, and then adhering a transparent carrier layer to the flattened surface to form a semiconductor substrate. The method according to claim 8, further comprising the step of polishing the crystal plate, wherein the second step is a step of further precisely polishing the semiconductor single crystal plate until the surface of the deposited oxide film is exposed. Production method.