JP2971839B2 - Wireless device tester - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a radio device tester, and more particularly, to a radio device tester having a characteristic of a PN signal synchronization portion on a receiving side in CDMA communication.

[0002]

2. Description of the Related Art In recent years, mobile communications such as mobile phones and PHSs have been rapidly spreading. In particular, in the future, mobile communication using a CDMA communication system, which adopts a digital system such as PHS, and further secures the number of channels, is considered to be widely used.

[0003] As these wireless devices become mass-produced, it becomes important to accurately and promptly inspect them. FIG. 11 is a diagram showing a state in which a mobile phone terminal or a base station using the CDMA system is inspected by a wireless device tester.

As shown in FIG. 1A, a CDMA signal corresponding to a voice signal or the like is output from a mobile phone terminal or a base station 91 to be inspected to which a voice signal or the like is input, and a radio tester is provided. Received at 92. FIG. 9B shows a case where a synchronization signal is transmitted from the mobile phone terminal or the base station 91 to the wireless device tester 92 via the trigger synchronization cable 93.

[0005] In the wireless device tester 92, various analyzes are performed using the CDMA signal, and as a result, the quality inspection of the mobile phone terminal or the base station 91 to be inspected is performed.

Here, especially in the mobile phone base station 91, how the voice signal and the like is converted into a CDMA signal,
Further, whether or not various measurements for testing the base station 91 are performed by the wireless device tester 92 will be described with reference to FIG.

FIG. 12 is a diagram for explaining the schematic operation of the base station and the radio device tester. First, as shown in FIG. 12A, in the base station 91, a voice signal and the like are 19.2 Kbp.
is converted to digital data of s, and the bit sequence is multiplied by an orthogonal code to obtain digital data of 1.2288 Mbps. Here, the case of conversion according to the IS-95 standard will be described. That is, a Walsh code is used as the orthogonal code, and a line of 64 channels is secured.
One of them is a pilot channel.

[0008] The 1.2288 Mbps digital data is further multiplied by a PN signal to perform spread spectrum. This spread spectrum signal is further QPSK modulated and output as a CDMA signal.

On the other hand, as shown in FIG. 1B, in the radio tester 92, the received CDMA signal is QPSK-demodulated, multiplied by a PN signal at a timing synchronized with the base station side, and subjected to inverse spectrum spreading. The inversely spread spectrum signal is further multiplied by an orthogonal code, and a signal for each channel is extracted.

The signal for each channel extracted by the wireless device tester 92 in this way corresponds to the initial audio signal and the like. Here, the result of extracting the final signal or various information obtained in the extracting process is used to determine whether the base station 91 exhibits a predetermined performance, for example, code domain power, time difference between CHs (channels), Various measurements such as waveform quality are performed.

Incidentally, the above-mentioned PN in the wireless device tester 92 is
In the inverse spread spectrum by multiplication of signals, the CDMA signal and the PN of the wireless device tester are used in the reverse spread.
Synchronization between signals is detected, and multiplication is performed in accordance with the detected synchronization timing.

In order to perform the synchronization detection, first, data is extracted from the CDMA signal at each timing called a chip point calculated by clock estimation and resampling. Here, the chip point interval is 1.22.
Equivalent to 88 MHz. The extracted data is multiplied by the PN signal to calculate the correlation value, and then the data sequence is shifted by one chip point to calculate the correlation value again. By repeating this operation and sequentially shifting the data sequence to calculate the correlation value,
The correlation value calculated when the CDMA signal and the PN signal are synchronized becomes the maximum.

In this way, the radio equipment tester can detect the synchronization timing without knowing the PN multiplication timing on the base station side as in the case of FIG.

Here, the CDMA signal and the radio device tester P
Multiplying the N signals means that a kind of autocorrelation is obtained for each PN signal between the base station and the wireless device tester. Therefore, the longer the length of each signal to be multiplied, the more the calculated correlation value becomes. It becomes large, and it becomes easy to detect the synchronization timing.

As the pattern length of the PN signal, data of ²¹⁵ bits is typically used. However, it is not practical to multiply all such long data due to the problem of calculation speed. Therefore, in the conventional synchronization method is performed partially, for example, extracted by synchronously detecting the data having a length of about 2 ¹⁰ bits. However, even when a part of the PN pattern is used, a considerable amount of calculation time is required for this synchronization detection. On the other hand, if the PN pattern length is shortened in order to increase the speed, synchronous detection becomes impossible when there is much noise.

Another method for performing synchronization detection is shown in FIG.
As shown in (b), the wireless device tester 92 transmits the signal from the base station 91 via the trigger synchronization cable 93 to the base station 91.
At the time of multiplication of the PN signal. In this way, the wireless device tester 9 can be reliably and rapidly performed.
2 can generate the synchronization timing.

[0017]

As described above, in order to generate the synchronization timing on the wireless device tester 92 side at high speed and reliably in the prior art, the wireless device tester 92 is connected to the portable telephone terminal or the base station 91 by a cable. The connection must be made at 93.

However, it is not realistic to provide such a cable connection terminal for inspection in all mobile communication terminals such as the mobile phone terminal 91 which are generally sold. In other words, as mobile phones and the like have become widespread and a large number of terminals have been manufactured, it is necessary to further reduce costs and perform inspections efficiently. However, first,
Providing the cable connection terminal increases the manufacturing cost accordingly. Next, also in the inspection process using the wireless device tester, if the trigger synchronization code 93 is reconnected every time between all products and the wireless device tester to perform the measurement, a great deal of labor is required.

Further, in a case where a plurality of manufacturers manufacture mobile communication terminals, corresponding to a specific wireless device tester,
There is also a problem that a terminal for the trigger synchronization cable 93 is not always provided in the product.

Against this background, there is a need for a method for efficiently detecting the synchronization timing without connecting a cable between the wireless device tester 92 and the portable telephone terminal 91.

However, as explained above, P
The method of detecting synchronization using a part of the N patterns has a problem that it takes time to perform PN synchronization detection. In addition, this problem becomes more serious in the case where the synchronization detection is repeated many times continuously and the measurement is performed repeatedly instead of performing the measurement only once.

Furthermore, in reality, it is often necessary to repeat the synchronization detection many times in succession to repeatedly perform the measurement. This is because performing synchronous detection for each measurement and repeatedly performing the measurement is extremely effective for improving the accuracy of the measurement. In addition, the first measurement is simply performed for the adjustment of the device, and a full-scale measurement may be performed after the second measurement. Furthermore, in a quality inspection standard, an average value of a plurality of measurements may be required.

Therefore, there has been a demand for a technique capable of performing a plurality of high-speed measurements while performing PN synchronization detection for each measurement. The present invention has been made in view of such circumstances, and provides a CDMA radio device tester that does not require an external trigger input for PN synchronization and enables high-speed repetitive measurement. With the goal.

[0024]

In order to solve the above-mentioned problems, according to the present invention, a CDMA signal received as a signal under test is subjected to PN synchronization a plurality of times while detecting synchronization, and the CDMA signal obtained by each PN synchronization is obtained. A / D for converting a CDMA signal into digital data in a CDMA radio tester that uses a plurality of signals as data for measurement evaluation
A conversion unit, a memory for storing digital data, a data extraction designating unit for designating an extraction start position and an extraction length for extracting digital data from the memory, and a data extraction designation when performing the first PN synchronization for the CDMA signal. First synchronization detection means for calculating a correlation value by multiplying and integrating the data taken out by the designation of the means and the PN data, and performing a shift of the calculation of the correlation value to detect a synchronization position on the PN data; When performing PN synchronization for the second time or later, a plurality of synchronization detection means for performing synchronization detection using data extracted by the designation of the data extraction designation means at the synchronization position detected by the first synchronization detection means. It is a wireless device tester.

In the present invention configured as above,
In the first PN synchronization detection, correlation value calculation is performed for all PN patterns. However, in the second and subsequent PN synchronization detections, the correlation value calculation and synchronization detection at that position may be performed using the first synchronization position without performing the correlation value calculation for all the PN patterns. High-speed repetitive measurement can be performed without requiring an external trigger input for synchronization.

[0026]

Embodiments of the present invention will be described below. (First Embodiment of the Invention) FIG. 1 is a block diagram showing a configuration example of a wireless device tester according to a first embodiment of the present invention.

In the radio device tester 1a, the CDMA signal to be measured received from the antenna 2 is converted by the A / D converter 3
A / D-converted and stored in the wave memory 4, and the signal stored in the wave memory 4 is QPSK-demodulated by the QPSK demodulation unit 5 and subjected to inverse spectrum spreading by the PN synchronization unit 6 a. I have. Then, various measurements are performed by the measurement calculation unit 7 from the data obtained by the PN synchronization unit 6a, and the results are displayed on the display unit 8.

The synchronization timing in the PN synchronization section 6a is determined by the timing calculation section 15 in the PN synchronization section 6a.
a, and a PN synchronization timing generating means including a trigger generating unit 16, a trigger detecting unit 17a, and an address counter unit 18.

In the present embodiment, the CDMA signal to be measured has been converted in accordance with the IS-95 standard. That is, a data string of 19.2 Kbps is multiplied by an orthogonal code (Walsh code) and a PN signal to obtain 1.
After becoming 2288 Mbps digital data, QPS
K-modulated and transmitted.

It should be noted that among the components of the wireless device tester 1, Q
Some of the functions of the PSK demodulation unit 5, PN synchronization unit 6a, measurement calculation unit 7, and trigger detection unit 17a are constituted by a DSP (digital signal processor) as hardware and an operation program thereof.

In each of the above configurations, first, the wave memory 4 stores an A / D converted digital CDMA signal to be measured. In the wave memory 4, the address counter 18 automatically increments according to the clock, so that the timing (time) of receiving the CDMA signal to be measured can be associated with the memory address. . That is, the trigger generator 16
From the trigger output time (internal reference point) and the increment number at that time, the storage start position of the CDMA signal, that is, the head of the wave memory (or a predetermined designated position from the head) can be known. The difference between the head (or designated position) of the wave memory and the internal reference point at this time is defined as a time difference t1, and the time difference t1 and the address at the time of output of the internal reference point are stored in the trigger detection unit 17a.

The wave memory 4 includes a trigger detecting unit 17
The data corresponding to N chips whose start position is specified by the time difference t1 and the address at the time of output of the internal reference point by a is output to the QPSK demodulation unit 5, and finally the PN synchronization unit 6a.

Next, the QPSK demodulation unit 5 is configured as shown in FIG. FIG. 2 shows the QPS in this embodiment.
FIG. 3 is a block diagram illustrating a schematic configuration of a K demodulation unit.

As shown in the figure, the QPSK demodulation unit 5
It comprises a quadrature demodulator 21, a clock estimator 22, and a symbol point extractor 23. The quadrature modulation unit 21 removes a carrier component from the A / D-converted CDMA signal, separates the obtained signal into an I component and a Q component, performs QPSK demodulation, and subjects each IQ component to a clock estimation unit. 22
And the symbol point extraction unit 23.

The clock estimating section 22 determines the timing (symbol timing) at which point the QPSK demodulated signal is to be coded. Ie QPS
When the K demodulated signal is processed by the PN synchronization unit 6a,
It is necessary to convert to a bit string of 2288 Mbps. For this purpose, the QPSK demodulated signal is encoded at 1.2288 MHz, and the clock estimating unit 22 determines the encoding timing (ie, the clock synchronization timing). This clock estimation is, for example, Q
This is performed by, for example, averaging a number of peak point positions in the PSK demodulated signal.

The symbol point extracting section 23 is composed of a quadrature modulating section 21
The QPSK demodulated signal obtained in step (1) is encoded at symbol timing and sent to the PN synchronization unit 6a. In addition,
The encoded signal is expressed as in equation (1).

[0037]

(Equation 1)

Further, a 2 [pi] f _c = omega when the transmitter does not frequency conversion in both the receiver. Next, the PN synchronization unit 6a includes a timing calculation unit 15a, performs PN synchronization detection on the QPSK demodulated signal encoded by the QPSK demodulation unit 5, and performs inverse spectrum spreading of the demodulated signal using a PN signal. The despread signal is delivered to the measurement calculation unit 7.

The PN synchronizing section 6a converts the CDMA data code-converted by the QPSK demodulating section 5 into a PN synchronizing section 6a.
a correlation value calculating means for multiplying and integrating the PN pattern in a to calculate a correlation value, and the correlation value calculating means for shifting the CDMA data input data having the operation length N between the PN pattern and the PN pattern. Shift calculating means for calculating a correlation value at all chip points, a peak point detecting means for detecting a chip point having a maximum correlation value based on the correlation value calculated at each chip point, and a PN synchronization point such as a peak point. PN synchronization determination means for determining whether or not the candidate is truly a synchronization point by using a threshold value (not shown). Furthermore, pattern length 2
¹⁵ PN data are stored in the trigger detector 17a.
The PN data can be extracted so as to have a fixed time positional relationship with an internal reference point given at a fixed period from the trigger generating unit 16 via the.

The PN synchronization unit 6a has two types of synchronization detection modes, and the operations of the above-described units are appropriately combined under the control of the timing calculation unit 15a, so that synchronization detection is performed in one of the modes. ing.

The timing calculation unit 15a calculates a certain measured C
In the first PN synchronization detection operation for the DMA signal, the PN synchronization detection is performed in the first mode among the above modes. That is, by controlling the shift operation means, the peak point detection means and the PN synchronization judgment means, the wave memory 4
, The input data of the operation length N given via the QPSK demodulation unit 5 is searched for all PNs, and it is determined whether the chip point having the maximum correlation value is the PN synchronization position.
If synchronization cannot be determined for a certain operation length N, the operation length N is changed to a larger value and the wave memory 4
, The same operation as described above is executed, and by repeating this operation, the synchronous position for the operation length N is finally determined.

In the first mode, the timing calculating section 15a calculates the time difference t2 between the internal reference point and the synchronous position.
Is calculated, and the operation length N when synchronization is obtained with the time difference t2 is stored in the trigger detection unit 17a.

On the other hand, 2 for a CDMA signal to be measured
In the second and subsequent PN synchronization detection operations, that is, in the second mode, the timing calculation unit 15a notifies the trigger detection unit 17a each time input data from the wave memory 4 becomes necessary. As a result, first, the time difference t2 and the operation length N determined in the first mode are stored in the trigger detector 17.
a, and calculates the timing for performing PN synchronization by limiting the search range.

Specifically, the input data of the operation length N is set to PN
The starting position for multiplying the data is the internal reference point and the time difference t.
The position is set to the above-mentioned synchronization position obtained from step 2, and at this position, each unit is caused to execute correlation value calculation and PN synchronization determination. If the synchronization cannot be obtained, a process such as a shift operation similar to that in the first mode is executed, a new operation length N and a time difference t2 are obtained, and the results are stored in the trigger detection unit 17a. I do.

The trigger generator 16 outputs a trigger at a predetermined interval, that is, an internal reference point.
a. Trigger detector 17a
Receives the internal reference point at a predetermined interval from the trigger generation unit 16 and inputs it to the timing calculation unit 15a. The memory address of the internal reference point generated during the storage of the CDMA signal to be measured, and the stored data at that time Time difference t1 from the beginning (or a predetermined position), timing calculation unit 15a
The time difference t2 and the operation length N obtained by the above are stored, and necessary commands and timings are given to the wave memory 4 and the timing operation unit 15a based on the information.

That is, first, the trigger detecting section 17a
The time difference t1 is determined by detecting the trigger timing and assigning a value to the address counter value. Further, at the time of the second and subsequent PN synchronization detection operations, the timing calculation unit 15
When the notification is received from a, a time difference t2, which is a difference between the synchronous position and the internal reference point, and a calculation length N are first given to the timing calculation unit 15a. Next, the time difference t1 and the measured CDMA
A start point of input data is determined for the wave memory 4 based on the internal reference point generated during storage of the signal, and input data of the operation length N is supplied to the PN synchronization section 6a via the QPSK demodulation section 5. To instruct.

The address counter 18 is a counter for sequentially writing digital signals to the wave memory 4. Since the write timing (increment timing) from the counter unit 18 is given to the wave memory 4 and the trigger generation unit 17a at the same time, the trigger detection unit 17a obtains the time difference t1 and can adjust the operation timing of each unit. ing.

The measurement calculation section 7 is a section for evaluating the despread signal output from the PN synchronization section 6a. The measurement calculation section 7 multiplies the despread signal by a Walsh code, which is an orthogonal code, for each channel (CH). In addition to extracting data, code domain power (output ratio of each CH), inter-CH time difference, inter-CH phase difference, time difference between system time and pilot CH, waveform quality, frequency error, and the like are obtained, and the results are output to the display unit 8. It is supposed to. Also, the measurement calculation unit 7
Is configured to notify the timing calculation unit 15a of whether the PN synchronization detection operation is the first time, the second time or more.

Next, the operation of the radio device tester configured as described above according to the embodiment of the present invention will be described.
FIG. 3 is a diagram for explaining timing generation in the case where the wireless device tester according to the present embodiment repeatedly performs measurement a plurality of times.

When the measurement of the CDMA signal to be measured is started, the data is stored in the wave memory 4 while being subjected to A / D conversion. At this time, when writing to the wave memory 4, the memory address thereof is counted up by the address counter section 18, and the address value is also input to the trigger detecting section 17a.

During this measurement, a trigger is generated from the trigger generation unit 16, and the time when the trigger (internal reference point) is generated is stored in the trigger detection unit 17a in association with the memory address count-up. The difference between the internal reference point and the count-up value from the time of occurrence is the time difference t shown in FIG.
It is one. Thereafter, the input data of the operation length N is taken out from the wave memory 4 using the time difference t1.

In the synchronization detection using the input data of the operation length N, in the first time, a shift operation is performed between the input data and all the PN signals in the PN synchronization section 6a, and a PN synchronization point is detected. Note that the start position of the PN data has a fixed relationship with the position of the internal reference point.

For this reason, as shown in FIG. 3, the PN synchronization position is located at a fixed time difference t2 from the internal reference point. The internal reference point referred to here is not limited to the internal reference point when the CDMA signal to be measured is stored in the wave memory, but means a trigger generated at a fixed period.

When performing the PN synchronization detection for the second time or later, the time difference t2 between the PN synchronization position and the internal reference point is used.
The input data cut out using the time difference t1 is calculated at the synchronization candidate position of the PN data, so that quick PN synchronization is obtained.

The above operation will be described in more detail separately for the first PN synchronization detection operation and the second and subsequent PN synchronization detection operations. (First PN Synchronization Detection Operation) FIG. 4 is a view for explaining the first PN synchronization detection operation in the wireless device tester of the present embodiment.

[0056] First, the data of the operational length N ₀ is taken from the top (or designated position) of the wave memory using time difference t1. At this time, the time difference t1 is stored (FIG. 4).
(A)).

Next, in the PN synchronization section 6a, correlation is obtained for the entire PN data. Note that this operation is the first time is recognized by a notification from the measurement calculation unit 7,
Corresponding control is performed by the timing calculator 15a (FIG. 4B).

Next, if the correlation is obtained according to FIG. 4B, the inverse spread spectrum is executed at the PN synchronization position, and the result is sent to the measurement calculation section 7. In this case, the synchronization processing ends here. On the other hand, if the correlation is not obtained, the operation length N is increased (N ₁ ), and the operation of FIG. 4B is executed again. At this time, an instruction to retrieve data from the wave memory 4 is issued by the trigger detection unit 17a that manages the time difference t1 and the like. When requesting data extraction, the timing calculation unit 15a notifies the trigger calculation unit 17a of a new calculation length N (FIG. 4C).

The operation length N is increased until the correlation is obtained, and the operation length N when the correlation is finally obtained and the time difference t2 between the correlated PN synchronization position, that is, the internal reference point, are calculated by the timing operation unit 15a. To the trigger detection unit 17a, and the trigger detection unit 17a manages the information (FIG. 4D).

(Second and Later PN Synchronization Detection Operations) FIG. 5 is a diagram for explaining the second and subsequent PN synchronization detection operations in the wireless device tester of this embodiment.

First, when performing the PN synchronization detection, the fact is notified to the trigger detection unit 17a. Based on the internal reference point generated by the trigger generator 16 and the time difference t2, a candidate point of the PN synchronization position is provided from the trigger detector 17a to the timing calculator 15a (FIG. 5A).

Next, the head (or designated position) of the wave memory 4 is set to the time difference t by the trigger detecting unit 17a.
1, data corresponding to the operation length N obtained in the first synchronization is extracted from this point, and input to the PN synchronization unit 6a via the QPSK demodulation unit 5 (FIG. 5).
(B)).

Next, the PN synchronization section 6a correlates the input data with the PN data at the PN synchronization candidate points (FIG. 5C). If the correlation is obtained at the candidate point, the inverse spread spectrum is executed at the PN synchronization position, and the result is sent to the measurement calculation unit 7. In this case, the synchronization processing ends here. In most cases, PN synchronization should be obtained at this candidate point.

On the other hand, if synchronization is not achieved,
Processing similar to (b) to FIG. 4 (d) is performed. That is, a correlation is obtained for the entire PN data by a shift operation, and a synchronous position is detected. If the correlation is not obtained, the operation length N is increased, and a similar repetition operation is performed (FIG. 5D).

Then, the operation length N is increased until the correlation is obtained, and the new operation length N when the correlation is finally obtained is obtained.
And a new time difference t2 from the internal PN synchronization position, that is, the internal reference point, which is correlated, is notified from the timing calculation unit 15a to the trigger detection unit 17a.
The information is managed in a (FIG. 5 (e)).

As described above, the second and subsequent synchronization detections are normally performed at high speed without performing the PN shift operation, and reliable synchronization detection is performed even if the candidate points are wrong.

Then, using the despread signal obtained by the PN synchronization, the measurement calculation unit 7 causes the code domain power (output ratio of each CH), the inter-CH time difference, the inter-CH phase difference, the time difference between the system time and the pilot CH, and the waveform. Quality, frequency error, and the like are obtained, and the results are output to the display unit 8.

As described above, in the wireless device tester according to the embodiment of the present invention, in the first PN synchronization, a shift operation for searching all PN data is performed to perform reliable synchronization detection, and the second and subsequent times. In the PN synchronization, the correlation value is calculated at the first synchronization position, and the synchronization is determined based on the correlation value. Therefore, an external trigger input for the PN synchronization is not required, and the second and subsequent times have a high speed. PN synchronization detection can be performed, and high-speed repeated measurement can be performed.

In this embodiment, the second and subsequent correlation value calculations are performed at the PN synchronization position. However, for example, a PN search (PN shift calculation) is performed within a limited range before and after the PN synchronization position. Alternatively, the reliability of the synchronization detection may be improved. (Second Embodiment of the Invention) In the first embodiment, the operation length N of the input data is managed by the trigger detection unit 17a.
Although the data is taken out from the wave memory 4 in accordance with the operation length N, in this embodiment, the operation length N is managed by the PN synchronization unit, and the PN synchronization is performed for the repetition operation for changing the operation length N. Processing can be performed only inside the synchronization unit. Except for the above points, this embodiment performs the same operation as that of the first embodiment.

FIG. 6 is a block diagram showing an example of the configuration of a wireless device tester according to the second embodiment of the present invention. In FIG. Only the different parts will be described.

The wireless device tester 1b of the present embodiment has the same configuration as that of the first embodiment, except that the function of the trigger detection unit 17b is partially changed, and the configuration of the PN synchronization unit 6b is changed. .

The trigger detector 17b does not manage the operation length N and the time difference t2, and uses the time difference t1 to obtain data of a predetermined length from the head (or a designated position) of the wave memory 4 (the operation length N can be obtained). The PN synchronization unit 6b determines the maximum value or the larger of the determination operation length M described later).
, And the same configuration as in the first embodiment. The operation length N and the time difference t2 are managed by the operation length control unit 14 and the timing operation unit 15b of the PN synchronization unit 6b, respectively.

The timing calculator 15b calculates the time difference t between the synchronous position and the internal reference point from the trigger generator 16.
2 is provided, and the correlation calculation timing with the input data is provided to the peak detection unit 12, and the configuration is the same as that of the first embodiment.

On the other hand, the entire PN synchronization section 6b is configured as follows. That is, the PN synchronization unit 6b includes a matched filter unit 11, a peak detection unit 12, a PN synchronization determination unit 13, an operation length control unit 14, and a timing operation unit 1.
5b, while performing PN synchronization detection on the encoded QPSK demodulated signal, despreading the demodulated signal with the PN signal, and delivering the despread signal to the measurement calculation unit 7. I have.

The matched filter unit 11 is a PN pattern length variable filter unit that performs synchronization detection on a PN pattern of a predetermined operation length N for an input signal.
The detailed configuration will be described later. In the case of the second or later synchronization detection, only one correlation value (maximum correlation value P _max is obtained) using the operation length N given from the operation length control unit 14 and the synchronization candidate point given from the timing operation unit 15b. ) Is calculated.

The peak detector 12 calculates the maximum correlation value P (t) from the correlation value P (t) calculated by the matched filter unit 11.
_max and the time (chip point) t _{max at which} it becomes the maximum correlation value
And a determination threshold value P _jud is calculated using the maximum correlation value P _max . Note that the synchronization determination performed by the PN synchronization determination unit 13 does not use the maximum correlation value P _max as it is, but the synchronization candidate point t at which the maximum correlation value P _max is obtained.
In _max, using the reference correlation value P _ref which recalculates the correlation value true of the PN pattern length (here 2 ¹⁵ bits) or negligible the influence of noise or the like sufficiently long PN pattern length (determination calculation length M) Done. For this reason, the judgment threshold value P _jud is calculated again each time using the judgment operation length M and the operation length N. In the case of the second or subsequent synchronization detection, the only correlation value provided from the matched filter unit 11 is a PN synchronization candidate point (maximum correlation value _Pmax ).

At the chip point t _max at which the maximum correlation value is a synchronization candidate point, the PN synchronization determination section 13 has a sufficiently long P that can ignore the influence of the true PN pattern length or noise.
The reference correlation value P is determined using the decision operation length M, which is the N pattern length.
_ref is calculated, and the reference correlation value P _ref and the judgment threshold value P _jud are calculated.
Are compared to determine the synchronization. When it is determined that synchronization has been obtained at the chip point t _max , the PN synchronization determination unit 13 sends the calculation result to the measurement calculation unit 7 as inverse spread spectrum data obtained by multiplying the PN signal, and synchronization is obtained. When it is determined that there is no such information, the fact is notified to the operation length control unit 14.

The operation length control unit 14 includes a PN synchronization determination unit 13
When it is determined that synchronization cannot be obtained in step (3), the operation length N of the PN pattern is changed.
Changed to new multiplied operation length N, matched filter unit 1
1 is instructed to execute the synchronization detection again. The operation length control unit 14 manages the final value of the operation length N used in the first synchronization detection, and in the case of the second or subsequent synchronization detection, based on the instruction of the timing operation unit 15b. The stored operation length N is given to the matched filter unit 11 from the beginning.

Here, the detailed configuration of the matched filter unit 11 will be described with reference to FIG. FIG. 7 is a block diagram illustrating a detailed configuration example of the matched filter unit according to the present embodiment.

In matched filter section 11, QP
The QPSK demodulated signal S (t) from the SK demodulation unit 5 is held by the signal holding device 31. Here, the signal hold device 31 has a QPSK demodulated signal S corresponding to data of a predetermined length designated by the trigger detection unit 17b.
(T) is stored, and is subjected to each operation described later.

On the other hand, from the operation length control unit 14, a signal hold unit 31, a complex multiplier 32, a PN hold unit 33,
The operation length N is given to the timing generator 34. In addition,
The operation length N is also a hold length N, a multiplication length N, and an integration length N for each of the units 31, 32, 33, and 34.

A PN generator 35 is provided, and a PN pattern generated by the PN generator 35 is held in a PN hold device 33 via a data shifter 36. The data shifter 36 shifts data according to the shift operation timing from the timing generator 34.

In accordance with the shift operation timing given by the timing generator 34, the input data and the PN data of the operation length N held in the respective units 31 and 33 are multiplied by the multiplication unit 32 and further integrated by the integrator 37. It is supposed to be. The timing generator 34 clears the integrator 37 prior to this calculation.

The I component (Re) output from the integrator 37
) And the Q component (Im) are added through an adder 40 after passing through multipliers 38 and 39, respectively, and output to the peak point detection unit 12 as a correlation value P (t). . The calculation of the correlation value P (t) by the operation of each unit is performed according to the equation (2).

[0085]

(Equation 2)

Here, the codes n and t both indicate the arrangement of the data strings, but the code n is the N of the operation length N.
Data and which one is indicated. Sign t
Indicates which point in the entire data string such as the PN pattern is pointed. Note that the symbol t also corresponds to the time of the transmitter.

The multiplication of the input data of the operation length N and the PN data is performed as shown in FIG. FIG. 8 is a diagram showing an operation example of matched filtering by the matched filter unit.

That is, when the operation length N = 128 chips, first, the input data extracted by the operation length N (128 chips) and the data of the operation length N from the head of the PN data are obtained at each chip point. The data is multiplied by each other, and the correlation value P (t) at the leading chip point of the PN pattern is obtained.
(FIG. 8A).

Next, the position of the input data of the operation length N is shifted by one chip point, and the same multiplication is performed to obtain the correlation value P (t) at the chip point next to the above-mentioned first chip point ( FIG. 8 (b).

Thereafter, the correlation value P (t) at each chip point is sequentially obtained in the same manner, and if synchronization is obtained, a self-phase between transmission and reception PN patterns is obtained. The correlation value is the largest.

As described above, in the second and subsequent synchronization calculations, the correlation value is calculated only at the synchronization candidate points given by the timing calculation unit 15b.
Next, an operation of the PN synchronization device according to the embodiment of the present invention configured as described above will be described.

In the present embodiment, the operation length N and the time difference t2 between the synchronous position and the internal reference point are calculated by the operation length control unit 14 respectively.
And the timing calculator 15b manages the timings and the like corresponding to these units 14 and 15b instead of the trigger detector 17a.
The operation is the same as that of the first embodiment except that the cut-out data from is long enough for the operation of the PN synchronization unit 6b.

In particular, the second and subsequent synchronization operations are the same as those of the first embodiment except for the difference described above, and therefore the description thereof is omitted, and the operation in the PN synchronization unit 6b in the first synchronization operation is described here. Will be described in detail. In the second and subsequent synchronization operations, the subsequent operation when synchronization is not achieved at the initial candidate point is the same as the first synchronization operation.

FIG. 9 is a flowchart showing an operation example of the PN synchronizer of this embodiment. First, in the matched filter unit 11, initial values N and T are set. Here, the number T of PN columns is, for example, 32768 (2 ¹⁵ bits).

Next, the I component data and the Q component data from the QPSK demodulation unit 5 are stored in the signal hold device 31 (ST2). The data corresponding to the operation length N among these data is the input data used for the operation.

Next, a PN pattern of the operation length N is read (ST3). The PN pattern read here is N data corresponding to the input data and the position where the operation is performed, as shown in FIG. In the case of the first calculation,
I component value P _i (t) and Q component value P _{q in} integrator 37
(T) is cleared.

Next, multiplication and subsequent integration are executed (ST4), and the above operation is repeated and integrated for all of the operation length N (ST4 to ST5). Step ST5
Is returned to step ST4, n = n + 1. The I component value P _i (t) and the Q component value P _q (t) are (3)
It is shown as in equations a) and (3b).

[0098]

(Equation 3)

Next, a correlation value P (t) is calculated (ST
6), is sent to the peak detection unit 12. Note that the correlation value P
(T) is P (t) = (P _i (t)) ² + (P _q (t))
² is calculated.

If the above operation is executed T times, that is, as shown in FIG. 8, the operation of obtaining the correlation value by shifting the input data and the PN data by one chip is executed T times. The correlation value P (t) for the chip point is obtained and given to the peak point detection unit 12 (ST
3-7). When returning from step ST7 to step ST3, PN shift is performed with t = t + 1.

Next, the processing in the peak point detecting section 12 will be described. First, the maximum correlation value _Pmax and the chip point _tmax that becomes the maximum correlation value are detected from the correlation values P (t) for all chip points (ST8).

Next, a decision threshold value P _jud is calculated (ST9). This is because if the synchronization position detection is performed again in the determination of the PN synchronization determination unit 13 and the calculation length N is changed, the level of the calculated correlation value changes.

For example, when the arithmetic operation length N is multiplied by a and a synchronous operation is performed at the same chip point, if PN synchronization is established at that chip point, the amplitude becomes a times the absolute value and the correlation value becomes a ² times the absolute value. . When the PN synchronization is not established, the amplitude is a ^1/2 times the absolute value and the correlation value is a times. The PN determination by the PN synchronization determination unit 13 is performed using this property. That is,
In the PN synchronization determination, the chip point _tmax having the maximum correlation value obtained in step ST8 is set as a candidate for a synchronization point, and a determination power calculation using the determination calculation length M is performed at this chip point to make a determination. This is performed by comparing with a threshold value P _jud . For this purpose, in this step ST9, the judgment threshold value P _jud corresponding to the operation length N and the judgment operation length M is calculated in advance. Here, the determination operation length M is set to 4096.

That is, from the nature of the correlation value change when the operation length N is multiplied by a, if the PN synchronization candidate point is truly a synchronization point, the maximum correlation value P _max obtained in step ST8 is changed to ( M / N) ² times the value is consistent with the later determination power calculation result obtained (the reference correlation value P _ref). Therefore, the determination threshold is P _jud = C × (M /
N) ² × P _max is calculated. C is a margin coefficient with respect to the threshold, for example, C = 2 ^-1/2 .

Next, the processing in the PN synchronization determination section 13 will be described. First, a correlation value is calculated at the PN synchronization candidate point (chip point t _max ) with the operation length, that is, the judgment operation length M (ST10, ST11). This step ST1
0 and ST11, the operation length N is determined and the operation length M is determined.
The same calculation as in steps ST4 and ST5 is executed simply by substituting. The I component value t _mpi and the Q component value t _mpq at this time are shown in equations (4a) and (4b).

[0106]

(Equation 4)

As a result of the calculations in steps ST10 and ST11, the reference correlation value P
_ref is obtained (ST12). Note that P _ref = (P _i
^{(Tmax)) 2 + (P} q (tmax)) ^2.

Next, the reference correlation value _Pref and the judgment threshold value P
The comparison with _jud is performed, and if P _ref ≧ P _jud, it is determined that the candidate point is the PN synchronization point (ST13), and the synchronization result is sent to the measurement calculation unit 7 and the process ends normally.

On the other hand, if P _ref ≦ P _jud, it is determined that the candidate point is not the PN synchronization point (ST13), and a command is issued to the arithmetic length control unit 14 to perform the next matched filtering.

Here, FIG. 10 shows how a candidate point is determined as a PN synchronization point. FIG. 10 is a diagram showing a PN synchronous position detecting operation by correlation value calculation.

As shown in the figure, since the operation length N starts from the smallest value, when the maximum correlation P _max is detected by the peak detector 12, the value is small, and the noise is small. When it is large, the correlation value is not much different from the correlation value of other chip points as shown in the figure (FIG. 10A).

[0112] projects the operation by the determining operation length M is made by the candidate point, since determination calculation length M is a sufficiently large value, the correlation value P _ref if candidate points in PN synchronization point from the noise, The threshold will be exceeded (see FIG. 10).
(C)). Note that, in the calculation based on the determination calculation length M, all PN
Since the shift is not performed and the calculation is performed only at the candidate points, the required calculation time is short.

If the candidate point is not the PN synchronization point, the reference correlation value _Pref becomes substantially the same as the other correlation values, and it is determined that the candidate point is not the synchronization point. It can be seen that since the noise level is high, it is necessary to perform matched filtering with a longer operation length N (FIG. 10C).

The above is the operation of the PN synchronization determination section 13.
In the operation length control unit 14 which has been instructed by the PN synchronization determination unit 13 to perform the next matched filtering, the value of the operation length N is increased, and in this embodiment, N = 2 × N (ST14). If the operation length N does not exceed the maximum value _Nmax (ST15), the matched filter unit 11 is instructed to execute the next operation with the new operation length N, and the process returns to step ST2.

On the other hand, if the new operation length N exceeds the maximum value _Nmax (ST15), the process ends abnormally, assuming that the synchronization point could not be detected. In this manner, the first PN synchronization detection is performed in the wireless device tester 1, and the obtained operation length N and synchronization position are used for the second and subsequent synchronization detections.

As described above, the wireless device tester according to the embodiment of the present invention has the same configuration as that of the first embodiment, and further includes the matched filter 11 for the first PN synchronization detection. While the PN data and the PN data are shifted by PN, the correlation value at each time is calculated by the calculation length N, and the PN synchronization determination unit 13 calculates the reference correlation value at the time of the maximum correlation value by the calculation length for synchronization determination. Is compared with a predetermined threshold value to determine whether or not the time point of the maximum correlation value is the PN synchronization point, and when the time point of the maximum correlation value is not the PN synchronization point, the operation length control unit 13 N
And the calculation from the matched filter unit 11 is redone with this new calculation length N, so that the same effect as that of the first embodiment can be obtained, and sufficient S / S for the first synchronization detection. Fast P for signals with N
By performing N synchronization detection, it is possible to reliably detect synchronization even for a signal having a poor S / N.

That is, first, the matched filter section 11
Since the initial operation length in is initially set short,
When the PN synchronization point can be detected even by matched filtering with a short operation length N with little noise or the like, the PN synchronization detection can be performed in a short time. Therefore, in conjunction with the second and subsequent high-speed PN synchronization detections, PN synchronization at an even higher speed, that is, a despreading operation can be performed.

If PN synchronization cannot be detected with this short operation length, the operation length control unit 13 causes the operation length N to be detected.
And make the matched filtering and synchronization determination again. Therefore, in this case, although it takes time for matched filtering, there is a high possibility that PN synchronization can be detected.

If the PN synchronization cannot be detected, the operation length control means further increases the operation length and repeats a series of processing. Therefore, the PN synchronization detection is performed in the shortest time corresponding to the input signal condition and reliably.

Further, since the reference correlation value calculated with the long operation length M for synchronization determination is used for the synchronization determination in the PN synchronization determination unit 13, the synchronization detection can be reliably performed. This is because if the operation at the long operation length M is a true PN synchronization point, a correlation value sufficient for PN synchronization detection can be obtained. Note that the calculation of the reference correlation value can be executed in a short time because the correlation value calculation is not performed at all times by the PN shift.

In the matched filter unit 11 of the present embodiment, as shown in FIG. 5, the input data is shifted with respect to the PN pattern in the matched filtering operation. However, the present invention is not limited to this. For example, the PN pattern may be shifted with respect to the input data.

Further, each method used in the second embodiment can be appropriately applied to the wireless device tester of the first embodiment. The present invention is not limited to the above embodiments, and can be variously modified without departing from the gist thereof.

Further, the method described in the embodiment can be executed by a computer as a program, for example, a storage medium such as a magnetic disk (floppy disk, hard disk, etc.), an optical disk (CD-ROM, DVD, etc.), a semiconductor memory, etc. And can also be transmitted and distributed via a communication medium. A computer that implements the present apparatus reads a program recorded on a storage medium, and executes the above-described processing by controlling the operation of the program.

[0124]

As described above in detail, according to the present invention, 1
Since the second and subsequent synchronization detections are performed using the first PN synchronization position and the operation length N, CDMA for CDMA that does not require an external trigger input for PN synchronization and enables high-speed repetitive measurement. Wireless device tester can be provided.

[Brief description of the drawings]

FIG. 1 is a block diagram showing a configuration example of a wireless device tester according to a first embodiment of the present invention.

FIG. 2 is an exemplary block diagram showing a schematic configuration of a QPSK demodulation unit in the embodiment.

FIG. 3 is an exemplary view for explaining the timing generation in the case where the measurement is repeated a plurality of times in the wireless device tester of the embodiment.

FIG. 4 is a first P in the wireless device tester of the embodiment;
The figure explaining N synchronous detection operation | movement.

FIG. 5 is an exemplary view for explaining the PN synchronization detection operation of the second and subsequent times in the wireless device tester of the embodiment;

FIG. 6 is a block diagram showing a configuration example of a wireless device tester according to a second embodiment of the present invention.

FIG. 7 is an exemplary block diagram showing a detailed configuration example of a matched filter unit according to the embodiment;

FIG. 8 is a diagram showing an operation example of matched filtering by a matched filter unit.

FIG. 9 is a flowchart showing an operation example of the PN synchronization device of the embodiment.

FIG. 10 is a diagram showing a PN synchronous position detection operation by correlation value calculation.

FIG. 11 is a diagram showing a state in which a mobile phone terminal is inspected by a wireless device tester.

FIG. 12 is a diagram illustrating a schematic operation of a base station and a wireless device tester.

[Explanation of symbols]

 1a, 1b: Wireless device tester 2: Antenna 3: A / D conversion unit 4: Wave memory 5: QPSK demodulation unit 6a, 6b: PN synchronization unit 7: Measurement calculation unit 8: Display unit 11: Matched filter unit 12: Peak Detector 13 PN synchronization determiner 14 Operation length controller 15a, 15b Timing calculator 16 Trigger generator 17a, 17b Trigger detector 18 Address counter 21 Quadrature demodulator 22 Clock estimator 23 Symbol point extraction unit 31 ... Signal hold device 32 ... Derivative multiplier 33 ... PN hold device 34 ... Timing generator 35 ... PN generator 36 ... Data shifter 37 ... Integrator 38,39 ... Multiplier 40 ... Adder

────────────────────────────────────────────────── ─── Continuation of the front page (56) References JP-A-8-163107 (JP, A) JP-A-8-331007 (JP, A) JP-A-9-321663 (JP, A) JP-A-10- 98412 (JP, A) (58) Fields investigated (Int. Cl. ⁶ , DB name) H04J 13/00 G01R 31/00 H04B 7/26 H04B 17/00 H04L 27/22

Claims (1)

(57) [Claims] 1. A CDMA signal received as a signal under test is subjected to PN synchronization a plurality of times while detecting the CDMA signal.
A CDMA radio tester using a plurality of signals obtained by N synchronization as data for measurement evaluation, A / D conversion means (3) for converting the CDMA signal into digital data, and storing the digital data. A memory (4); a data extraction designating means (1) for designating an extraction start position for extracting the digital data from the memory and an extraction length.
6, 17a, 18), when performing the first PN synchronization for the CDMA signal, calculate the correlation value by multiplying and integrating the data extracted by the designation of the data extraction designating unit and the PN data. By shifting the value operation, PN
Initial synchronization detecting means (6) for detecting a synchronization position on data
a, 15a), when performing the PN synchronization for the second time or later, perform synchronization detection using the data extracted by the designation of the data extraction designation means at the synchronization position detected by the first synchronization detection means. A plurality of synchronization detecting means (6a, 15a, 1
7a), a wireless device tester.