JP2944343B2 - Feedback type sense amplifier - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a feedback sense amplifier, and more particularly to a multi-stage sense amplifier.

[0002]

2. Description of the Related Art A conventional cascade connection type sense amplifier is shown in FIG.
As shown in FIG. 2, a transistor 6 having an input terminal 1 (IN (-)) as an input and a transistor 8 having an input terminal 2 (IN (+)) as an input are provided. 37 is connected to the transistor 9 having the gate input of the REF signal of the input terminal 4 and the sense amplifier 10 of the first stage.
The first stage sense amplifier 10 and the next stage sense amplifier 11 have the same configuration. In this case, the output 13 of the first-stage sense amplifier is connected to the IN (-) input of the next-stage sense amplifier 11, that is, the gate of the transistor 6.

[0003] Such a conventional multi-stage sense amplifier,
A small potential difference between the input signal IN (−) and the input signal (+) is voltage-amplified by the first-stage sense amplifier 10 and further amplified by the next-stage sense amplifier 11 to obtain a voltage having a logical amplitude that can be determined at the next stage. Thus, a function as a sense amplifier was obtained.

[0004]

In such a conventional multi-stage sense amplifier, as the input signal voltage becomes weaker, the cascade connection of the sense amplifier becomes more multi-stage, the number of transistors increases, and the circuit configuration becomes complicated. Would. Further, since the sense amplifiers are arranged in cascade, there is a problem that power consumption increases and operation speed decreases.

An object of the present invention is to provide a feedback type sense amplifier which solves the above problems, has a simple circuit configuration, consumes less power, and has an increased operation speed.

[0006]

According to a first aspect of the present invention, there is provided:
A first or second field-effect transistor connected to a current mirror circuit, a source or a drain of the first or second field-effect transistor is connected in common, and a third field-effect transistor is connected; A feedback potential sense amplifier in which a reference potential is applied to the gate of the third field-effect transistor, the drain or source of the second field-effect transistor serves as an output terminal, and the gate serves as a second input terminal. The gate of the field effect transistor is connected to a first input terminal via an input potential protection circuit, and the output terminal is connected to the gate of the first field effect transistor via the input potential protection circuit. It is characterized by the following.

A second configuration of the present invention has first and second field-effect transistors connected to the current mirror circuit, and a source or a drain of the first and second field-effect transistors is connected in common. A third field-effect transistor is connected, a reference potential is applied to the gate of the third field-effect transistor, and the gates of the first and second field-effect transistors are connected to the first and second input terminals. And none
A fourth field-effect transistor is provided in parallel with the first field-effect transistor, and is provided between an output terminal connected to a drain or a source of the second field-effect transistor and a gate of the fourth field-effect transistor. A fifth field-effect transistor whose gate is controlled, and between the gate of the fourth field-effect transistor and a constant potential,
A sixth field-effect transistor whose gate is controlled is provided.

[0008]

FIG. 1 is a circuit diagram showing a feedback sense amplifier according to a first embodiment of the present invention. In FIG. 1, the feedback type sense amplifier of the present embodiment has the same configuration as that of the first-stage sense amplifier 10 of the cascade-type sense amplifier described above except for the sense section, and differs from the input terminal 1 (IN (−)). The input potential protection circuit 14 is interposed between the gate of the transistor 6 and the input potential protection circuit 1 from the output terminal 5 (OUT).
That is, the feedback input to the transistor 6 is made via the reference numeral 4.

Here, the input potential protection circuit 14 is controlled by the CTL signal of the input terminal 3. The input potential protection circuit 14 includes transistors 40, 42, 43, 44 and an inverter 45.

Both the input signal IN (-) of the input terminal 1 and the input signal IN (+) of the input terminal 2 are at a high level (High).
level), the CTL signal of the input terminal 3 is at a low level (Low level), and the input potential protection circuit 1
The transfer gates (transistors 43 and 44) on the input terminal 1 side of No. 4 are open, and to protect the input potential,
Transfer gate on the feedback side (transistors 40 and 4)
2) is closed.

Next, the potential of the input signal IN (-) of the input terminal 1 drops while the potential of the input signal IN (-) is weak, and a potential difference occurs with the input signal IN (+) of the input terminal 2. As a result, the transistor 6 of the sense amplifier is gradually closed, and the voltage amplified by the current mirror circuit 7 of the sense amplifier is output to the output terminal 5. At this time, by changing the CTL signal of the input terminal 3 from Low to High, the input signal IN (−) of the input terminal 1 is disconnected, and at the same time, the output terminal 5
, The transfer gate between the inputs of the transistor 6 is opened and the feedback state is established, and the feedback is repeated until the transistor 6 is completely closed.

The above operation is shown in the waveform diagram of FIG. In FIG. 2, the horizontal axis represents time (t) and the vertical axis represents voltage (V).
The input signals IN (+) and IN (-) and the output signal (OU
T) and the input signal CTL.

As described above, the configuration of the present embodiment includes the sense amplifier transistor to which the input signals IN (-) and IN (+) are input, the control signal CTL for controlling the input signal IN (-), and the reference signal REF. , Output OUT
, An input potential protection circuit for protecting the potential of the input signal, and a feedback section from the output OUT to the input IN (−) via the input protection circuit. By using the type sense amplifier, characteristics as a sense amplifier can be obtained without the conventional cascade connection.

FIG. 3 is a circuit diagram showing a memory circuit using two feedback sense amplifiers according to a second embodiment of the present invention.

In FIG. 3, a second embodiment of the present invention relates to a left feedback transistor 6 constituting a first feedback sense amplifier.
8, 9, 36, 37, and right transistors 6, 8, 9, 36, 37 constituting a second feedback sense amplifier;
Transistors 80 to 83, input potential protection circuit 14,
It includes input terminals 15, 17, 19, 20, an output terminal 16, a bias (BIAS) terminal 21, a CTL terminal 22, and an output selector 18.

Here, the output selector 18 has transfer gates 70 and 71. Input potential protection circuit 1
4 denotes transfer gates 50, 51, 52, 53
And inverters 60 to 63. Each transfer gate is composed of a P-channel or N-channel MOS transistor.

The input terminal 19, ie, the RAM output (−), and the input terminal 20, ie, the RAM output (+), are connected to the inputs of the feedback sense amplifiers via the input protection circuit 14, respectively. The feedback type sense amplifier has a low level (Low level) amplification and a high level (Hig), respectively.
h level). The input of each feedback sense amplifier is input to the PR of the input terminal 15 every cycle.
This signal is input from the E signal and is precharged to High level. The signal output to OUT of the output terminal 16 is output from the output selector 18 controlled by the OE input signal of the input signal 17 after the inverter in the preceding stage is stabilized as a sufficient output level.

As described above, the memory circuit which has conventionally been multistaged into three or four stages can be simplified in circuit configuration by using this feedback type sense amplifier. Further, since the number of stages of the sense amplifier is reduced, the power consumption is reduced and the operation speed is increased.

FIG. 4 is a circuit diagram showing an internal feedback type sense amplifier according to a third embodiment of the present invention. In FIG. 4, in the present embodiment, the transistor 22 and the transistors 21 and
3 and the CTL (inverted value) system wiring connected thereto are all the same in configuration as the first-stage sense amplifier 10 in FIG. 5, except that the feedback from the OUT of the output terminal 5 is different from that in FIG. The point is that only the transistor 21 is passed without passing through one input potential protection circuit 14.

Here, the CTL and CTL (inverted value) signals of the input terminal 3 are such that the transistor 21 controlling the transistor 23 is a CTL signal and the transistor 22 is the CTL signal.
(Inverted value) Control by signal. Signal IN of input terminal 1
When a slight potential difference is generated between (−) and the signal IN (+) of the input terminal 2 and the transistor 6 gradually starts closing,
By changing the CTL signal of the input terminal 3 from High to Low, the OUT of the output terminal 5 and the transistor 23 are changed.
The feedback is performed via the transistor 21 between the two, and the feedback is repeated until the transistor 23 is completely closed. At this time, the transistor size of the transistor 6 is smaller than that of the transistor 23. With the above operation, the function as the sense amplifier can be achieved.

[0021]

As described above, according to the present invention, the sense amplifier is multiplied by cascade connection in order to amplify a weak voltage, but the sense amplifier is fed back inside the sense amplifier. There is an effect that a sufficient output voltage can be obtained without increasing the number of stages, thereby reducing the power consumption of the entire sense amplifier, increasing the operation speed, and simplifying the circuit configuration. There is also an effect.

[Brief description of the drawings]

FIG. 1 is a circuit diagram showing a feedback sense amplifier according to a first embodiment of the present invention.

FIG. 2 is a waveform chart showing operation signals of respective units in FIG.

FIG. 3 is a circuit diagram showing a second embodiment of the present invention.

FIG. 4 is a circuit diagram showing a third embodiment of the present invention.

FIG. 5 is a circuit diagram showing a conventional multi-stage sense amplifier.

[Explanation of symbols]

 Reference Signs List 1 input terminal (IN (-)) 2 input terminal (IN (+)) 3 input terminal (CTL) 4 input terminal (REF) 5, 16 output terminal (OUT) 6 transistor 7 current mirror circuit 8, 9, 21, 22, 23 Transistor 10 First stage sense amplifier 11 Next stage sense amplifier 12 Next stage sense amplifier IN (-) input 13 First stage sense amplifier output 14 Input potential protection circuit 15 Input terminal (PRE) 17 Input terminal (OE) 18 Output selector 19 Input terminal (RAM output-) 20 Input terminal (RAM output +)

Claims (3)

(57) [Claims] A first mirror connected to a current mirror circuit;
A second field-effect transistor, a source or a drain of the first and second field-effect transistors are connected in common, a third field-effect transistor is connected, and a reference potential is connected to a gate of the third field-effect transistor. , A drain or a source of the second field-effect transistor serves as an output terminal, and a gate serves as a second input terminal, wherein the gate of the first field-effect transistor has an input potential of A feedback sense amplifier connected to a first input terminal via a protection circuit, and the output terminal is connected to a gate of the first field effect transistor via the input potential protection circuit. 2. The input potential protection circuit has two transfer gates that are alternately turned on and off.
2. The feedback sense amplifier according to 1. 3. A first and a first mirror connected to a current mirror circuit.
A second field-effect transistor, a source or a drain of the first and second field-effect transistors being connected in common to a third field-effect transistor, and a gate of the third field-effect transistor is connected to a third field-effect transistor; A reference potential is applied, gates of the first and second field-effect transistors are used as first and second input terminals, and a fourth field-effect transistor is provided in parallel with the first field-effect transistor;
A fifth field-effect transistor having a gate controlled between an output terminal connected to a drain or a source of the second field-effect transistor and a gate of the fourth field-effect transistor; The sixth gate whose gate is controlled is between the gate of the field effect transistor and the constant potential.
A feedback sense amplifier comprising the field effect transistor described above.