JP2909158B2 - Charge coupled device - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION [Object of the Invention] (Field of Industrial Application) The present invention relates to the structure of a charge-coupled device (CCD) used for a solid-state imaging device or the like.

(Prior Art) A charge-coupled device (CCD) has an excellent feature that an analog signal can be transferred with low noise, and thus is currently applied to a device such as a solid-state imaging device. FIG. 8 is a cross-sectional view of an example of a conventionally known single-layer gate structure CCD. It operates with three-phase clock pulses. n
An SiO ₂ gate insulating film is formed on the surface of a silicon substrate, and a charge transfer electrode such as Al is arranged thereon. The charge generated by injection or light from the pn junction is stored in a high potential well on the silicon surface under the electrode (FIG. 8 (a)). Next, when an even larger positive voltage (V ₃ ) is applied to the adjacent electrode, the electric field causes the electric charge to move below the adjacent electrode (FIG. 8 (b)). Next, when the voltage of the electrode is returned to the original state of FIG. 8 (a), the electric charge is transferred to the lower right side of the electrode (FIG. 8 (c)). By repeating this process, charges are transferred one after another. In addition, 2
A two-phase gate structure for operating with a phase clock pulse is also known.

These are surface CCDs (SCCDs) that transfer minority carriers as an information source among CCDs, but also have embedded channels that transfer majority carriers as an information source.
There is a CCD (BCCD). In the BCCD, a thin region of a conductivity type opposite to the substrate, such as an n-type, is formed in an interface region between a semiconductor substrate and a gate insulating film (SiO ₂ ).
In this area, majority carriers separated by the empty layer are transferred. Since the signal charge does not reach the substrate interface during charge transfer, the transfer efficiency is not degraded due to the trapping level at the interface between the substrate and the insulating film, and is widely used at present.

FIG. 7A shows an example of a conventional charge-coupled device. A p-well 11 and an n-type charge transfer channel 12 are formed on an n-type silicon semiconductor substrate 10, and charge transfer electrodes 14-1 and 14-2 are alternately provided via an insulating film (SiO ₂ ) 13. Are located. The insulating film 13 has portions with different film thicknesses under the same electrode, that is, a thin layer and a thick layer. Therefore, a potential level difference occurs in the channel potential under the same charge transfer electrode. In such a state, the charge transfer electrode 14
-1, 14-2 correspond to the two-phase clock pulse 70 (φ
₁ ) and 71 (φ ₂ ) are applied, respectively, and at the time t = t ₁ , a potential state as shown in FIG.
the transfer channel potential state becomes t = t ₂ hours is changed as shown in Figure No. 7 (c). Therefore, the electrons under the electrode 14-1 in FIG. 4B are transferred to below the electrode 14-2 according to the potential energy as shown in FIG. 4C. However, in this conventional structure,
A potential pocket 16 is generated in the channel below the electrode gap,
Since the electrons are captured here, it is impossible to transfer the charges completely, which causes the transfer efficiency to deteriorate. In the conventional structure, as shown in FIGS. 7 (b) and 7 (c), charges are accumulated in the channel below the thick portion of the insulating film 13, but are accumulated under the thick portion of the insulating film. Has the disadvantage that the amount of stored charge cannot be increased because the storage capacity of the thin film is smaller than that of the thin portion.

(Problems to be Solved by the Invention) As described above, in the conventional charge-coupled device, there is a problem that a potential pocket is generated in a channel of an electrode gap to cause transfer noise and a problem that a large amount of accumulated charge cannot be obtained.
SUMMARY OF THE INVENTION An object of the present invention is to provide a charge-coupled device that eliminates the occurrence of the potential pocket, has a good transfer effect, and has a large accumulated charge amount.

[Configuration of the Invention] (Means for Solving the Problems) In the present invention, a plurality of charge transfer electrodes are juxtaposed on a semiconductor substrate via a gate insulating film, and each charge transfer electrode is adjacent to the gate insulating film. The present invention relates to a charge-coupled device formed over a thin portion and a thick portion and having a charge transfer channel below a gate insulating film, wherein the charge transfer channel is formed under a thick portion of the gate insulating film. The impurity concentration of the first region is made lower than that of the second region below the thin portion of the insulating film by self-alignment, or the impurity concentration of the first region is made lower by self-alignment. It is characterized by making it darker. A third layer having a lower impurity concentration than the first and second regions below the gap between the charge transfer electrodes and below the thin portion.
Are formed by self-alignment. It is also possible to provide an electrode for controlling the potential below the gap between the charge transfer electrode and the charge transfer electrode via the gate insulating film.

(Operation) Since the impurity concentration of the channel in the thick portion F of the gate insulating film is lower than the impurity concentration of the channel under the thin portion of the gate insulating film, the amount of transferred charges can be increased. The generation of a potential pocket can be prevented by an electrode for controlling the potential.

(Example) Example 1 Hereinafter, an example of the present invention will be described with reference to the drawings.
FIG. 1 (a) is a cross-sectional view of a two-phase drive type charge-coupled device of Example 1, and FIGS. 6 (b) and (c) are shown in FIG. 6 after a clock pulse is applied to a charge transfer electrode. Time t ₁ and
4 shows a transfer channel potential state diagram at t ₂ . In the figure, n-type silicon is used for a semiconductor substrate 10. In this substrate, a p-well region 11 and an n-type charge transfer channel are formed, on which a gate insulating film 13 of, for example, SiO ₂ is provided. Gate insulating film 13
The thin portions and the thick portions are alternately arranged, and the charge transfer electrodes 14-1 and 14-2 on the gate insulating film 13 are formed so as to straddle both portions at intervals. . The charge transfer electrodes 14-1 and 14-2 are covered with an interlayer insulating film 18 such as SiO ₂ , on which a gap potential control electrode 20 made of a metal such as aluminum or copper is formed. Have been. In this embodiment, the charge transfer channel is divided into three regions for each charge transfer electrode and between the electrodes. That is, the n-type region 12 which is the first region below the thick portion, and the n ⁺ region which is the second region below the thin portion.
It comprises a mold region 21 and a third region, an n ^- type region 22 between the electrodes and formed below the thin part. The second region 21 is formed by implanting an n-type impurity into a thin portion of the insulating film 13 in a self-aligned manner.
Represents the thick portion of the insulating film 13 and the charge transfer electrode 14-1, or
An n-type impurity is implanted in a self-aligned manner between 14-2 and formed. Since the charge transfer channel is divided into regions having different impurity concentrations, there is a step in the potential when two-phase driving is performed, and the charge transfer channel is compared with the case where the impurity concentration of the channel shown in FIGS. 7B and 7C is uniform. As a result, the potential increases in the second region 21 below the thin portion of the insulating film 13 and the third region 21
In 22, the potential acts to decrease,
As shown in FIGS. 2B and 2C, the charge transfer electrodes 14-1 and 14-1
The potential state of the charge transfer channel changes according to the movement of the clock pulse applied to -2. The electric charge stored at time t = t ₁ in FIG.
Is transferred under the transfer electrodes 14-2 to the left by the potential changes in t = t ₂ hours in the first view (C). At this time, the portion for storing the charge of the transfer electrode is not under the thick portion of the insulating film 13 as in the prior art, but in the second region 21 below the thin portion, so that the storage capacity is increased, It is possible to increase the amount of accumulated charges. In the embodiment, the generation of a potential pocket in the channel is prevented by controlling the impurity concentration in the third region of the transfer channel. Further, an appropriate voltage is applied to the transfer channel potential control electrode 20 below the gap between the charge transfer electrodes. Is also applied to prevent the generation of potential pockets. The applied voltage is a direct current, and is applied to the electrode 20 simultaneously with the application of the clock pulse.

2 (a) to 2 (d) are cross-sectional views showing the steps of manufacturing the charge-coupled device of the first embodiment.

First, impurities are diffused into an n-type silicon substrate 10 to form a p-well region 11. Next, on the substrate 10, for example,
A gate insulating film 13 having a uniform thickness such as SiO ₂ is formed by means such as thermal oxidation. Next, an n-type impurity is ion-implanted through the gate insulating film 13 so that the p-type
An n-type impurity diffusion layer 12 is formed in the well region. On the basis of this structure, a photoresist 17 is patterned on the insulating film 13 and n-type impurities are selectively ion-implanted into the n-type charge transfer channel 12 using the resist as a mask to form a second region having a high impurity concentration. 21 are selectively formed (FIG. 2A). Next, the portion of the insulating film 13 where there is no resist 17 is removed to expose the second region 21 (FIG. 2B).
Next, after removing the resist 17 by etching, the entire surface of the substrate 10 is thermally oxidized again to form an insulating film 13 having a thick portion and a thin portion (FIG. 2C). A second region 21 is formed below the thin portion. A metal film such as aluminum is formed on the entire surface by vapor deposition or the like, and is patterned to form the charge transfer electrodes 14-1 and 14-2 (FIG. 2 (d)). P-type impurities are ion-implanted into the thick portion of the insulating film 13 and the electrode 14-1 or the electrode 14-2 in a self-aligned manner to form a third region (n ^- region) 22 of the charge transfer channel. Then the electrode with an interlayer insulating film 18 such as SiO ₂ 14-2,14-
Then, an electrode 20 for controlling the channel potential below the gap between the charge transfer electrodes is formed on the insulating film 18.
The channel region 12 under the thick portion of the insulating film 13 into which impurities are not implanted becomes the first region.

Second Embodiment Next, a second embodiment will be described with reference to FIG. A p-well 11 and an n-type transfer channel are formed on an n-type silicon substrate 10, and the transfer channel is formed by an n ^- type first region 30, an n-type second region 31, and an n ^- type third region. 32, a gate insulating film 13 having a thick portion and a thin portion is formed thereon, and a charge transfer electrode 14-
1, 14-2 are formed, and a gap potential control electrode 20 is further formed thereon with an interlayer insulating film 18 interposed therebetween.

FIGS. 3B and 3C are channel potential diagrams when the two-phase driving clock pulses 70 and 71 shown in FIG. 6 are applied to the charge transfer electrodes 14-1 and 14-2, respectively. In FIG. 3B, the electrons accumulated under the electrode 14-1 are transferred under the electrode 14-2 by applying a clock pulse of the opposite phase as shown in FIG. 3C. At this time, since the portion where the electrode is stored is a thin portion of the insulating film 13, the storage capacity can be increased, and the amount of stored charge can be increased. Also, by applying an appropriate DC voltage to the channel potential control electrode 20 below the gap between the p-type impurity and the electrode implanted in the region of the channel 32, the generation of a potential pocket in the channel is prevented, and the complete transfer of charges is prevented. It is possible. FIG. 4 is an example of a method for producing the CCD shown in FIG. 3 (a). First, SiN 19 serving as a mask is patterned on the insulating film 13 having a uniform thickness, and pN is transferred into the n-type transfer channel 31.
A type impurity is implanted to form a region (first region) indicated by the channel 30. Next, as shown in FIG. 4B, the portion of the insulating film 13 where the SiN 19 is not applied is etched. Then, as shown in FIG. 4C, the entire surface is oxidized to form a thick portion and a thin portion in the insulating film 13. At this time, the impurities implanted in the region of the channel 30 are implanted into the thick portion of the insulating film 13 by self-alignment. After etching the SiN 19, the electrodes 14-1 and 14-2 are patterned and formed,
A p-type impurity is implanted into the thick portion of the insulating film 13 and the electrodes 14-1 and 14-2 in a self-aligned manner to form a channel region 32 (third region). After the insulating film 18 is formed, a gap between the electrodes is formed. A lower channel potential control electrode 20 is formed. FIG. 5 is an example in which an interline area sensor is configured using the charge coupled device (CCD) of the present invention. The charge photoelectrically converted by the photodiode 60 is transferred to the vertical CCD 69 and the horizontal CCD 80 and output by the charge detector 65. Vertical CCD electrode 6
1-1, 61-2, 61-3, 62 and horizontal CCD electrodes 63, 64
Below is the CCD structure of the present invention shown in FIG. 1 or FIG. A DC voltage for controlling the channel potential is applied to each of the channel potential controlling electrodes 66, 67, 68 below the gap between the electrodes.

The silicon substrate may be of a p-type. In that case, the well region is unnecessary. Further, the application example of the solid-state imaging device has been described, but the invention can be applied to other semiconductor devices.

[Effects of the Invention] According to the present invention, using a charge transfer electrode having a single-layer structure,
It is possible to realize a two-phase drive type charge-coupled device having a large accumulated charge amount and good transfer efficiency.

[Brief description of the drawings]

FIG. 1A is a cross-sectional view of the charge-coupled device of Example 1, FIGS. 1B and 1C are channel potential diagrams when a clock pulse is applied to a charge transfer electrode, and FIG. FIGS. 3A to 3D are cross-sectional views illustrating a manufacturing process of the charge-coupled device according to the first embodiment, FIG. 3A is a cross-sectional view of the charge-coupled device according to the second embodiment, and FIGS. 4A is a potential diagram when a clock pulse is applied to the charge transfer electrode in FIG. 4A, and FIGS. 4A to 4D are cross-sectional views of a manufacturing process of the charge-coupled device of Example 2, and FIGS. FIG. 6 is a plan view of an interline area sensor using the charge-coupled device of the present invention, FIG. 6 is a characteristic diagram of a pulse applied to the charge transfer electrode of the present invention, and FIG. FIGS. 7 (b) and 7 (c) are cross-sectional views of a two-phase drive type charge-coupled device. FIG. Potential diagram, 8
(A), (b), and (c) are cross-sectional views illustrating the principle of the charge-coupled device. 10 n-type silicon substrate, 11 p-well, 12 charge transfer channel, 13 gate insulating film, 14-1, 14-2 charge transfer electrode, 16 potential pocket, 17 ... resist, 18 ... interlayer insulating film, 19 ... SiN mask, 20, 66, 67, 68 ... channel potential control electrode, 21, 31 ... second region, 22, 32 ... third region , 30 ... First area.

Continuation of the front page (58) Field surveyed (Int.Cl. ⁶ , DB name) H01L 21/339 H01L 27/14-27/148 H01L 29/762-29/768

Claims (3)

(57) [Claims] A plurality of charge transfer electrodes are juxtaposed on a semiconductor substrate via an insulating film. The charge transfer electrodes are formed by dividing the same electrode layer, and each charge transfer electrode is adjacent to the insulating film. The charge transfer device is formed on the thin portion and the thick portion, and has a charge transfer channel under the insulating film.
The impurity concentration of the first region under the thick portion of the insulating film is adjusted by self-alignment to the second region under the thin portion of the insulating film.
The impurity concentration of the second region is made lower than that of the first region, or the impurity concentration of the second region is reduced by self-alignment.
The impurity concentration in the region is higher than the impurity concentration in the region. 2. Under the gap between said charge transfer electrodes,
The charge coupled device according to claim 1, wherein a third region having a lower impurity concentration than the first and second regions is formed below the thin portion by self-alignment. 3. The charge coupled device according to claim 1, further comprising an electrode for controlling a potential below a gap between the charge transfer electrode and the charge transfer electrode via the insulating film.