JP2897695B2 - EL device driving device - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a driving device for an EL (electroluminescence) element.

[0002]

2. Description of the Related Art FIG.
FIG. 1 shows a schematic cross-sectional configuration of an EL element. EL element 100
Is a transparent electrode 1 laminated on a glass substrate 101.
02, first insulating layer 103, light emitting layer 104, second insulating layer 1
05, the back electrode 106, and the transparent electrode 1
02, an AC voltage is applied between the back electrodes 106 to emit light.

When the back electrode 106 is grounded,
When a positive or negative AC voltage is applied to the transparent electrode 102, an AC voltage can be applied to the EL element. When a positive or negative AC voltage is applied to one of the electrodes as described above, two types of power supplies are normally required, and there is a problem that the power supply circuit becomes large. The present invention has been made in view of the above-mentioned problems, and has an EL element.
To when outputting an AC voltage, an object of applying the positive and negative AC voltage to the EL element by using a single power source without using the positive and negative two power.

[0004]

SUMMARY OF THE INVENTION To achieve the above object, the present invention comprises a first switching means for opening and closing a connection between an anode of a power supply and a first reference voltage, and a switching means for opening and closing a connection between a cathode of the power supply and a second reference voltage. The second switching means is selectively turned on in response to the control signal, and the first switching means is turned on.
When the second switching means is on in the
Connect the anode of the source and one electrode of the EL element to
A positive voltage is applied to one of the electrodes.
The electrode is connected to one electrode of the EL element and
Discharging the charged electric charge through the second switching means,
Also, the first switching means is on and the second switching means
The power supply cathode and the EL element
Connect one electrode to one electrode of the EL element
Voltage and then the anode of the power supply and one of the EL elements
By connecting the electrodes, the electric charge accumulated in the EL element is
The first feature is that the discharge is performed via the switching means .

Thus, when the first switching means is turned on, a voltage on the negative polarity side based on the first reference voltage is generated from the cathode of the power supply, and when the second switching means is turned on. , Second from the anode of the power supply
, A voltage on the positive polarity side based on the reference voltage is generated.
Accordingly, alternating positive and negative voltages with a single power supply is output, it is possible to drive the EL element by the output.

The first and second switching means are generally bidirectional, but in the present invention, by using a transistor having a parasitic diode, the circuit is simplified by utilizing the operation of the parasitic diode. Can be Further, the present invention has a first power supply and a second power supply,
A first switching means for opening and closing the connection between the anode of the first power supply and the reference voltage, and a second switching means for opening and closing the connection between the anode of the second power supply and the cathode of the first power supply, as control signals. The first switch is turned on in response to the
The switching means is off and the second switching means is on
During the positive field, the anode of the first power supply and one of the EL elements
Connected to one electrode of the EL element and
A scanning voltage is applied, and then the cathode of the first power supply and the EL element
Of the EL element by connecting one electrode of
Discharge through the second switching means and the first switch.
The switching means is on and the second switching means is off
During the negative field, the cathode of the first power supply and the EL
Connect one electrode of the element and
Polar scanning voltage is applied, and then the anode of the power supply and the EL element
Connect one of the electrodes of the
Discharging through the first switching means;
Data is applied to the other electrode of the EL element using the voltage of the anode of the power supply.
The second feature is that the power supply voltage is output .

Thus, when the first switching means is turned on, a reference voltage is output from the anode of the first power supply, and a negative voltage based on the reference voltage is output from the cathode. When the second switching means is turned on, a positive voltage that is the sum of the voltages of the first and second power supplies is output from the anode of the first power supply, and the second power supply is output from the cathode. Is output.

[0008] Therefore, by operating the first and second switching means, four different voltages can be output from the first power supply, and the output voltages are used as drive voltages for one electrode of the EL element. E using the power supply voltage of
By setting the driving voltage of the other electrode of the L element to EL,
An EL element can emit light by applying AC voltages having different polarities to the element in positive and negative fields. In that case, the circuit can be simplified by using the second power supply for generating the respective drive voltages.

[0009]

BEST MODE FOR CARRYING OUT THE INVENTION

(First Embodiment) FIG. 1 is a circuit diagram showing a first embodiment of the present invention. The power supply circuit shown in FIG. 1 has a single power supply 1, the anode of which is grounded via an N-channel FET (first switching means) 2, and the cathode of which is a P-channel FET (second switching means). 3 to be grounded. Further, a smoothing capacitor 4 is provided in parallel with the power supply 1.

An N-channel FET 2 has an input terminal S1
And a control signal is input to the P-channel FET3.
A control signal is input from the input terminal S2 via the coupling capacitor 5. Note that Zener diodes 6, 7 and a resistor 8 are provided for input protection. An output circuit 9 is provided at an output stage of the power supply circuit, and the output voltage is applied to one electrode of the EL element 100.
The other electrode of the EL element 100 is grounded.

The operation of the above arrangement will be described with reference to a timing chart shown in FIG. Note that GND in FIG. 2 indicates a ground voltage. Input terminals S1, S2
As shown in FIG. 2, a high-level and low-level control signal is input to the. When the control signals are both at the low level, the N-channel FET 2 turns off and the P-channel FE
T3 turns on. Accordingly, the voltage V of the power supply 1 is output to the + terminal, and the ground voltage is output to the − terminal.

When both control signals are at a high level, the N-channel FET 2 is turned on and the P-channel FE
T3 turns off. Therefore, the ground voltage is output to the + terminal, and the voltage of −V is output to the − terminal. On the other hand, the output circuit 9 operates at the timing shown in FIG.
The state is alternately switched to the switch state of 1 and T2. With the switching, the AC voltage shown in FIG. 2 is output by the voltage of ± V and the ground voltage. Since the AC voltage is applied to one of the EL elements 100, the EL element 100 emits light.

When S1 and S2 are at a high level, the N-channel FET 2 is on. At this time, if T1 is on, the output becomes GND. When S1 and S2 become low level, the P-channel FET 3 is turned on.
If 1 remains unchanged, the output will be V. When T2 is turned on from T1 while S1 and S2 remain as they are, the output becomes GND and E
The charge of the L element flows from T2 to GND through the parasitic diode of FET3. Times (pulse widths) T _P and T _N for outputting a voltage are determined by the switching timing of the switches T1 and T2 and the state changes of S1 and S2.

FIG. 3 shows a specific configuration of the output circuit 9 described above. The output circuit 9 has a P-channel FET 9a and an N-channel FET 9b, and has input terminals 9c, 9d
Either of the FETs is turned on in response to a high-level signal or a low-level signal (a signal interlocked with a control signal input to the input terminals S1 and S2), and one of the voltages at the + terminal and the − terminal is changed. It is configured to output. Note that 9e and 9f in the figure are parasitic diodes.

In the above-described embodiment, the output of the AC voltage of ± V with respect to the ground voltage has been described. However, the voltage connected to the power supply 1 via the FETs 2 and 3 is not a ground voltage but a predetermined voltage. If the second power supply generates the reference voltage, an AC voltage centered on the reference voltage can be output. In this case, if the same voltage as the above-described reference voltage is applied to the other electrode of the EL element, the EL element 100 can emit light as in the above-described embodiment. (Second Embodiment) In the first embodiment, a circuit for simply emitting light from an EL element has been described. However, segment display or matrix display can be performed by the EL element. In the present embodiment, an example in which a matrix display is performed by using an EL element will be described.

FIG. 4 shows the overall structure of an EL display device according to the second embodiment. The EL display panel 100 'in this EL display device has a transparent electrode 1 of the EL element shown in FIG.
02, a plurality of back electrodes 106 are arranged in a matrix to constitute a scanning electrode and a data electrode. FIG. 4 shows odd-numbered scan electrodes 201, 202,...
, Are formed, and the data electrodes 40 are arranged in the column direction.
1, 402, 403,... Are formed.

Scan electrodes 201, 301, 202, 30
.. And the data electrodes 401, 402, 403,.
.., 121,... Are formed. Since the EL element is a capacitive element, it is represented by a capacitor symbol in the figure. To perform display driving of the EL display panel 100 ', scanning driver ICs 20 and 30 and a data driver IC 40 are provided.

The scanning-side driver IC 20 is a push-pull type driving circuit, and has odd-numbered scanning electrodes 201 and 20.
P-channel FETs 21a, 22 connected to 2,.
, and N-channel FETs 21b, 22b,..., and odd scan electrodes 2 according to the output from the control circuit 200.
Scan voltages are applied to 01, 202,. Also, FET
Each of 21a, 21b, 22a, 22b,.
Parasitic diodes 21c, 21d, 22c, 22d,... Are formed to set the voltage of the scan electrode to a desired reference voltage.

The scanning driver IC 30 has the same configuration.
Control circuit 300, P-channel FETs 31a, 32a,
, And N-channel FETs 31b, 32b,.
A scanning voltage is supplied to the even-numbered scanning electrodes 301, 302,. Similarly, the data-side driver IC 40
0, P-channel FETs 41a, 42a,... And N-channel FETs 41b, 42b,.
01, 402, 403,...

FIG. 5 shows the scanning driver IC 2 described above.
0, 30 and the configuration of a voltage supply circuit A for supplying a voltage to the data side driver IC 40. In FIG. 5, a voltage supply circuit A is provided with a second power supply 10 for outputting a voltage Vm, and a power supply 1 (hereinafter, referred to as a first power supply in the second embodiment) is a P-channel FET 3. Is turned on, its cathode and the anode of the second power supply 10 are connected,
A voltage based on the voltage Vm is output from the anode of the first power supply.

The second power supply 10 has a voltage supply line L3,
The voltage Vm and the ground voltage are applied to the data side driver I via L4.
Supply to C40. Further, the first power supply 1 supplies a voltage for forming a scanning voltage to the scanning driver ICs 20 and 30 via voltage supply lines L1 and L2. Note that the first power supply 1 has a voltage of Vr-Vm in the present embodiment. Here, Vr indicates a driving voltage required for light emission.

A control signal is input to the N-channel FET 2 and the P-channel FET 3 via the filter circuits 11 and 12, and the other components are denoted by the same reference numerals as those shown in FIG. The same portions as those shown in FIG. 1 have the same or equivalent configurations. The power supply 1 in FIG. 1 needs a sufficient voltage for light emission,
The power supply 1 in FIG. 5 needs to be lower than the light emission threshold.

In the above configuration, as shown in FIG. 1, when a low-level control signal is input to the input terminals S1 and S2, the N-channel FET 2 turns off and the P-channel FET 3 turns on. Therefore, the voltage Vm of the second power supply 10 is output from the cathode of the first power supply 1 to the voltage supply line L2, and the voltage Vr (= Vr−Vm + Vm) is output from the anode.
Is output to the voltage supply line L1.

When a high-level control signal is input to the input terminals S1 and S2, the N-channel FET 2 turns on and the P-channel FET 3 turns off. Accordingly, a voltage of -Vr + Vm is output from the cathode of the first power supply 1 to the voltage supply line L2, and a ground voltage is output from the anode to the voltage supply line L1. Therefore, in the case of driving the later-described positive field (when the control signals to the input terminals S1 and S2 are both at low level), the voltages Vr and Vm are output from the voltage supply lines L1 and L2, respectively, and the negative voltage described later is In the case of driving the field (when the control signals to the input terminals S1 and S2 are both at a high level), the voltage supply lines L1 and L2
A ground voltage and a voltage of -Vr + Vm are output from L2.

With reference to the timing chart of FIG. 6, description will be given of the operation of the above configuration in which the EL elements are driven in a matrix in positive and negative fields. (Positive field) Both control signals to the input terminals S1 and S2 in FIG. 5 are set to low level. As a result, the voltages Vr and Vm are output from the voltage supply lines L1 and L2, respectively, as described above. Further, the voltage supply lines L3, L4
Output a voltage of Vm and a ground voltage.

At this time, the scanning electrodes 201, 301, 20
The voltages of 2, 302,...
The voltage is Vm due to the operation of the parasitic diode of the zero FET. Also, the FET of the data side driver IC 40
.. Are turned on, and the voltage of the data electrode is set to Vm. In this state, the voltage applied to all the EL elements becomes 0 V, so that the EL elements do not emit light.

Thereafter, the light emission operation in the positive field is started. First, the P-channel FET 21a of the scanning driver IC 20 connected to the scanning electrode 201 in the first row is turned on, and the voltage of the scanning electrode 201 is set to Vr. A scanning driver IC connected to another scanning electrode;
All the output stage FETs 20 and 30 are turned off, and their scan electrodes are brought into a floating state.

The data electrodes 401, 402, 40
3, P channel F of the data side driver IC 40 connected to the data electrode of the EL element to emit light
The ET is turned off, the N-channel FET is turned on, and the P-channel FET of the data driver IC 40 connected to the data electrode of the EL element that does not want to emit light is turned on and the N-channel FET is turned off.

As a result, the voltage of the data electrode of the EL element desired to emit light becomes the ground voltage, so that a voltage Vr higher than the threshold voltage is applied to the EL element, and the EL element emits light. In addition, the voltage of the data electrode of the EL element that does not want to emit light remains at Vm, and a voltage of Vr-Vm is applied to the EL element. The voltage of Vr-Vm is set lower than the threshold voltage, and the EL element does not emit light.

In the timing chart of FIG. 6, the P-channel FET 41a of the data side driver IC 40 is turned off,
When the N-channel FET 41b is turned on, the EL element 11
1 shows a state in which a voltage of Vr is applied to the EL element 111 to cause the EL element 111 to emit light. Thereafter, by turning off the P-channel FET 21a and turning on the N-channel FET 21b of the scanning driver IC 20 connected to the scanning electrode 201 in the first row, the electric charge accumulated in the EL element on the scanning electrode 201 is discharged. .

Next, the P-channel FET 31 of the scanning driver IC 3 connected to the scanning electrode 301 in the second row
a is turned on to set the voltage of the scanning electrode 301 to Vr. A scanning driver IC connected to another scanning electrode;
All the output stage FETs 20 and 30 are turned off, and their scan electrodes are brought into a floating state. In addition, data electrode 4
By setting the voltage levels of 01, 402, 403,... To the voltage levels corresponding to the EL elements to be caused to emit light and the EL elements not to be caused to emit light, light emission driving of the EL elements in the second row is performed in the same manner as described above. I do.

In the timing chart of FIG. 6, the P-channel FET 41a of the data side driver IC 40 is turned on,
The N-channel FET 41b is turned off, and the data electrode 40
1 shows a state in which a voltage of Vr-Vm is applied to the EL element 121 with the voltage of 1 being Vm, and the EL element 121 does not emit light. Thereafter, the P-channel FET 31 of the scanning driver IC3 connected to the scanning electrode 301 in the second row
By turning off a and turning on the N-channel FET 31b, the electric charge accumulated in the EL element on the scan electrode 301 is discharged.

Thereafter, line-sequential scanning is repeated in the same manner until the last scanning line is reached. (Negative field) The control signals to the input terminals S1 and S2 in FIG. As a result, as described above, the ground voltage and -Vr + are applied from the voltage supply lines L1 and L2.
Vm is output.

At this time, the scan electrodes are set to the ground voltage by the operation of the parasitic diodes of the scan driver ICs 20 and 30. Further, the FET 41b of the data side driver IC 40,
42b, 43b... Side are turned on, and the voltage of the data electrode is set to the ground voltage. In this state, the voltage applied to all the EL elements becomes 0 V, so that the EL elements do not emit light. Hereinafter, the negative field performs line sequential scanning similarly to the positive field.

The scanning electrode of the row for which display selection is to be performed is -Vr +
Vm is applied. On the data electrode side, contrary to the positive field, the voltage of the data electrode to emit light is set to Vm, and the data electrode not to emit light is kept at the ground voltage. Therefore, when the voltage Vm is applied to the data electrode with respect to the scan electrode to which the voltage of -Vr + Vm is applied, the voltage of -Vr is applied to the corresponding EL element, and the EL element emits light. Further, when the voltage of the data electrode is the ground voltage, the voltage of -Vr + lower than the threshold voltage is applied to the EL element.
Since Vm is applied, the EL element does not emit light.

One cycle of the display operation is completed by driving the positive and negative fields described above, and this operation is repeated. In the second embodiment, the voltage Vm used for driving in the positive field functions as an offset voltage. That is, a voltage of Vr−Vm is applied to the scanning driver ICs 20 and 30 in the positive field, and a voltage of −Vr + Vm is applied in the negative field. Therefore,
The withstand voltage of the scanning driver ICs 20 and 30 can be reduced by the offset voltage Vm.
20 and 30 can be reduced in withstand voltage.

Since the offset voltage Vm is changed from the offset voltage Vm to the driving voltage Vr at the time of light emission, the voltage change can be reduced, the peak current flowing through the EL element can be reduced, and the reliability of the EL element can be reduced. Can be improved. As an embodiment of the segment display, the data side driver IC is eliminated in FIG.
One of the electrodes of the element is set to GND. Then, the power supply 10 is eliminated, and the source of the FET 3 is set to GND. In this case, the power supply circuit A corresponds to FIG. At this time, in order to make the EL emit light, the power supply 1 needs to have a voltage sufficient for light emission.

In the various embodiments described above, the present invention is applied to the driving circuit of the EL element. However, the present invention is applied to a driving circuit which operates by receiving a positive or negative AC voltage from one output line. Then, the present invention can be applied to other than the EL element. In that case, in the configuration shown in the first embodiment, the generated positive and negative voltages may be selectively output by push-pull operation to drive the load.

The driver IC is a P-channel FET
And a push-pull driver composed of only N-channel FETs. Also, N-channel FET2,
NPN and PNP bipolar transistors may be used instead of the P-channel FET3.

[Brief description of the drawings]

FIG. 1 is a circuit diagram showing a first embodiment of the present invention.

FIG. 2 is a timing chart showing the operation of each unit in FIG.

FIG. 3 is a circuit diagram showing a specific configuration of an output circuit in FIG. 1;

FIG. 4 is an overall configuration diagram of an EL display device according to a second embodiment of the present invention.

FIG. 5 is a configuration diagram illustrating a configuration of a voltage supply circuit according to a second embodiment of the present invention.

FIG. 6 is a driving timing chart in the configuration of FIG. 4;

FIG. 7 is a schematic sectional configuration diagram of an EL element.

[Explanation of symbols]

1, 10 power supply, 2 N channel FET, 3 P channel FET, 9 output circuit, 20, 30 scanning driver IC, 40 data driver IC, 100 EL
Element, 100 '... EL display panel.

Continuation of the front page (56) References JP-A-63-199396 (JP, A) JP-A-63-235991 (JP, A) Japanese Utility Model Showa 62-57293 (JP, U) (58) Fields investigated (Int) .Cl. ⁶ , DB name) G09G 3/00-3/38

Claims (7)

(57) [Claims] A power supply (1), a first power supply for opening and closing a connection between an anode of the power supply and a first reference voltage.
Switching means (2), and a second means for opening and closing the connection between the cathode of the power supply and a second reference voltage.
Switching means (3), wherein the first and second switching means are selectively turned on in response to a control signal, and the first switching means is off when the first switching means is off. 2 switches
When the switching means is on, the anode of the power source
One electrode of the L element is connected to connect one electrode of the EL element.
A positive voltage is applied to the pole, after which the cathode of the power supply is
One electrode of the EL element is connected and stored in the EL element.
Discharging the accumulated electric charge via the second switching means.
And when the first switching means is on, the
When the second switching means is off,
The cathode of the source is connected to one electrode of the EL element,
A negative voltage is applied to one electrode of the L element, and thereafter,
Connect the anode of the power supply and one electrode of the EL element
The charge accumulated in the EL element is transferred to the first switch.
A driving device for an EL element, comprising: a circuit (9, 20, 30) for discharging via a switching means . 2. The driving device for an EL element according to claim 1, wherein the first and second reference voltages are the same voltage.
Motion device . 3. The EL device according to claim 2, wherein the first and second reference voltages are both ground voltages .
Drive . 4. The EL element according to claim 1, wherein the first and second reference voltages are different from each other.
Child drive . 5. The first and second switching means comprises:
Features a transistor with a parasitic diode
The EL device according to claim 1, wherein
Drive . 6. An EL element arranged in a matrix has positive and negative
Apply drive voltages of different polarities in the field.
And a connection between the first and second power supplies (1, 10) and the anode of the first power supply (1) and a reference voltage.
First switching means (2), an anode of the second power supply (10) and a cathode of the first power supply
Second switching means (3) for opening and closing the connection of
For example, the first, second switching means, in response to the control signal
Alternatively, the second switch is turned on when the first switching means is turned off.
When the positive field is turned on when the
1 by connecting the anode of the power supply and one electrode of the EL element.
A positive scanning voltage is applied to one electrode of the EL element,
After that, the cathode of the first power supply and one of the EL elements
Connect the poles (201, 301 ...) and store in the EL element
Discharged through the second switching means.
And when the first switching means is on, the
At the time of the negative field where the switching means 2 is off
A cathode of the first power supply and one electrode of the EL element;
And a negative scanning electrode is applied to one electrode of the EL element.
Pressure and then the anode of the power supply and the EL element
By connecting one of the electrodes, the charge stored in the EL element is
A first discharging means for discharging through the first switching means;
A driving circuit (20, 30) and the other of the EL element using the voltage of the anode of the second power supply.
Output a data voltage to the other electrode (401, 402 ...)
E comprising a second drive circuit (40).
Drive device for L element. 7. The first power supply circuit according to claim 1, wherein the first drive circuit comprises a first power supply.
Voltage is supplied from the anode and cathode through the voltage supply line.
And a driver IC.
The driving device for an EL element according to claim 6.