JP2889282B2 - Audio coding device - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION "Industrial application field" The present invention changes the encoding speed in accordance with the nature of speech so that the long-term average encoding speed is the same. TECHNICAL FIELD The present invention relates to a speech coding apparatus which enables communication with better speech quality than a fixed-rate coding scheme.

2. Description of the Related Art The coding method used in current voice communication is mainly a fixed-rate coding method, and this method is characterized in that the coding rate is always constant in time.
In other words, μLaw-PCM and ADPCM that are currently frequently used are 64k
It has a coding rate of bps or 32 kbps, and this value does not change over time. Considering that the communication speed of many current voice lines is constant, the fixed-rate coding method can be said to be a reasonable coding method. on the other hand,
In a packet communication network or an ATM (asynchronous transmission) communication network, the communication speed of a line or a channel need not always be constant, and the restriction of a constant speed (fixed speed) in a conventional communication network is eliminated.

In a normal telephone conversation, while one person is speaking,
Because the other is silent (listening), the effective voice segment accounts for 40-50 of the total talk time, statistically
It is said to be about%. There is no need to send audio information to the other party during this silent period. Further, even in a sound section, it is sufficient to send the minimum information necessary for realizing a predetermined voice quality. It is known that the minimum speech information depends on the nature of the speech waveform, the energy, the degree of speech quality, or the coding method used, and often varies with time. In an ATM communication network, variable-rate coding, in which the coding rate changes over time, is more advantageous in terms of voice quality or communication efficiency than fixed-rate coding in terms of voice characteristics. Has also been proven.

As a variable rate coding method, among the methods proposed so far, AD
PCM-MQ (Tomita et al. "Realization of variable-rate speech coder using ADPCM-MQ" IEICE Technical Report DSP88-26, 1988)
And Embedded ADPCM (DJGoodman, “Embe
dded DPCM for variable bit rate transmissin "IEEE T
rans, on Com. Vol. COM-28, no. 7, July 1980).

The ADPCM-MQ method shown in FIG.
A plurality of ADPCM coding circuits 11 corresponding to..., N are arranged, and a speech signal from an input terminal 12 is input to these plurality of ADPCM coding circuits 11 to perform coding at the same time. At 13, the local decoded signal of each ADPCM encoding circuit 11 is compared with the input audio signal, and the output of the ADPCM encoding circuit 11 that satisfies a certain quality and has the lowest encoding speed is selected by the selection multiplexing circuit 14. The output is output to the voice code output terminal 15 to make the speed variable. The feature of this method is that encoding is already completed at the stage of selecting one ADPCM encoding circuit to perform encoding processing at multiple speeds in parallel, and there is no large encoding delay That is. However, even in this method, the output of the ADPCM encoding circuit can be selected only after evaluating the input speech for one audio block (usually 10 to several hundred samples). ~ Several tens of milliseconds), but there is no other delay in principle. Also, there is no degradation in audio quality specific to embedded coding as in embedded ADPCM described later. The disadvantage of ADPCM-MQ is that multiple ADPs
Since the CM encoding circuit is installed, the amount of hardware increases. When a different ADPCM encoding circuit is selected, it is necessary to copy the internal state of the previous ADPCM encoding circuit to the current ADPCM encoding circuit and maintain the continuity of the encoding process.
For example, as shown in FIG. 4, when the audio block j performs 2-bit encoding and the next audio block j + 1 performs n-bit encoding, the arithmetic processing of the 2-bit encoding circuit is performed at the transition from block j to j + 1. It is necessary to copy the internal state to the n-bit encoding circuit. A copying mechanism for that purpose is also required. For this reason, the encoding device using ADPCM-MQ has a disadvantage that the configuration becomes complicated and the cost increases.

FIG. 5 shows a configuration of a variable rate encoding device using an Embedded ADPCM encoder. Normal ADPCM (hereinafter referred to as normal ADPCM) requires that the processing operations of the encoder and the decoder be synchronized in order to obtain a normal reproduced (decoded) voice. Therefore, the encoded voice code ( ADPCM code)
If even one bit is lost during transmission or discarded intentionally, the above-mentioned synchronization is lost, and large noise is generated in the reproduced voice, and the reproduction of the original voice itself becomes difficult. However, if the embedded ADPCM discards the lower-order bits (one or more bits specified at the time of encoding) of the speech code, the decoding itself can be performed correctly even if discarded. For example, the lower 2 bits of a 5-bit Embedded ADPCM code
Even if the bits are discarded and transmitted using only three bits, and the decoding is performed by inserting 0 into the lower bits during decoding, the encoder and the decoder can be synchronized with each other, and there is no significant quality degradation due to decoding errors. Therefore, when performing the variable rate encoding using the embedded ADPCM encoder, for example, the audio signal from the input terminal 12 is subjected to the encoding process of the quantization bit number 5 and the core bit number 2 by the embedded ADPCM encoding circuit 16 and A signal of 5 bits per sample is output, and at the same time as the encoding, an evaluation is performed by the encoding bit number determination circuit 17. If it is determined, the lower 2 bits of the 5 bits which are the output code of the encoding circuit 16 are discarded by the bit discarding circuit 18 to realize the variable rate encoding. The core bits are inversely quantized bits input to the predictor, and can be dropped in the range from the number of quantization bits to the number of core bits.

Obviously, the advantage of this method is that only one encoding circuit is required, and therefore, there is no need for a mechanism for copying the internal state that is required when using a different encoding circuit as in ADPCM-MQ. Therefore, it is easier to implement a variable rate encoder than ADPCM-MQ. The biggest disadvantage of the variable rate coding method using the Embedded ADPCM encoder is that the voice quality is low. That is, the non-embedded code (normal
An example of a comparison of the segmental S / N of the ADPCM) (A), the embedded ADPCM code (core bit 2) (B), and the code (C) obtained by bit dropping the Embedded ADPCM is shown. For example, Embedded ADPCM with 2 drop bits (24kb / s)
The quality of a normal ADPCM is almost 2 bits (16kb /
This figure shows that s) can be used.

[Problems to be Solved by the Invention] In the conventional variable rate coding method, the encoder configuration becomes complicated, and the economic efficiency is impaired, or the voice quality as the variable rate coding method is insufficient. There was a problem.

The present invention has been made in order to solve such a problem, and an object of the present invention is to provide a variable-rate code speech coding apparatus capable of improving the speech quality and economically realizing the coding apparatus. .

"Means for solving the problem" In this invention, normal ADPCM or Emb
Using edded ADPCM for the encoding circuit, the encoding bit number determination circuit determines how many bits the audio block should be encoded, and performs the audio block encoding process based on the number of bits of the determination result. The audio block is stored in the buffer during the determination process by the coded bit number determination circuit. The encoding process of the audio block from the buffer is performed using the internal state data read from the common data memory, and at the end of the process, the internal state data at that time is stored in the common data memory. In order to change the encoding speed by changing the number of quantization bits in this way, Embedded
Much better quality can be realized than the bit drop method by code. Also, although a plurality of coding circuits corresponding to a plurality of coding bit numbers are logically necessary, one of the coding processes is performed serially instead of always executing them simultaneously like ADPCM-MQ. Since the execution is performed, the processing load can be reduced, and as a result, the hardware amount can be reduced. In addition, since internal state data necessary for the encoding process can be inherited from the common data memory as it is even if the number of quantization bits changes, a mechanism for copying data and variables such as ADPCM-MQ is not required.

Embodiment An embodiment of the present invention will be described below with reference to FIG. The encoding bit number determination circuit 21 processes an input audio sample in block units (duration of which is usually several millimeters to several tens of milliseconds), thereby obtaining an encoding circuit that satisfies predetermined quality and has the least number of bits. This is a circuit for selection, and determines the number of coded bits corresponding to the audio block by calculating the power per audio block, the prediction gain specific to the ADPCM coding method, and the like. Audio sample buffer
Reference numeral 22 denotes a buffer having a capacity capable of storing at least one audio block of audio samples. The audio samples in the buffer are supplied to each ADPCM encoding circuit 23. The encoding unit 24 includes a plurality of ADPCM encoding circuits 23 corresponding to 2 to n encoded bits, and a common data memory 25 commonly accessed by the encoding circuits 23. These encoding circuits 23 do not operate simultaneously. That is, only one encoding circuit 23 corresponding to the number of encoded bits specified by the encoded bit number determination circuit 21 operates. Each of the plurality of encoding circuits 23 may be constituted by one digital audio signal processor (DSP), or all the encoding circuits 23 may be implemented by one DSP. Also, instead of DPS, coding circuit 2 using wired logic
3 is acceptable. The common data memory 25 has a common memory and a common memory so that the plurality of encoding circuits 23 can access the common data memory in common.
Created in the address space.

Next, the operation will be described. The input audio sample from the input terminal 12 is input to the coded bit number determination circuit 21 and
It is input to the audio sample buffer 22. As shown in FIG. 2, the determination of the number of coded bits is performed for each audio block. An audio block consists of one or more consecutive audio samples, and the audio block length (the number of audio samples in the block) need not be fixed, but may vary over time. When all the samples of the audio block j have been input, the coding bit number determination circuit 21 determines the optimum number of quantization bits based on the result of the arithmetic processing of the sample. Next, the encoding circuit 23 for the quantization bit number is activated, and the encoding is performed on the audio sample j stored in the buffer 22. In the encoding process, since the data of the internal state by the encoding process of the previous block j-1 is stored in the common memory 25, the encoding is performed using the data. When the encoding process is completed, an output terminal is attached with information indicating how many bits the encoded output has been encoded.
The internal state data at the time when the encoding process is completed is transmitted to the transmission line 27 from the transmission line 26 and stored in the common data memory 25. Therefore, even if the number of quantization bits changes and a different encoding circuit is started, prediction difference can be continuously performed using the data of the immediately preceding input sample value sequence. In the case of actual circuitization, a plurality of encoding circuits that differ depending on the number of quantization bits can be physically realized by only one, and different quantization tables (differences) according to the designation of the number of quantization bits. What is necessary is just to access the correspondence table between the quantity and the quantized value.

On the receiving side, a receiving circuit from the transmission line 27 through the receiving terminal 28
29 receives information on how many bits of the received coded signal have been coded for each audio block, activates a decoding circuit 32 in a decoding unit 31 in accordance with the number of bits, and executes a common data memory 33 in the same manner as the coding processing. May be performed while referring to. At this time, the method of transmitting the coding rate information may be determined depending on the communication system to be applied. For example, in the case of packet communication, one voice block may be made into one packet, and information on the coding rate may be placed in the packet header. As can be understood from FIG. 2, the delay time required for encoding is the speech block length + the encoding time.

[Effects of the Invention] As described above, according to the present invention, variable speed coding of voice can be easily realized, and good quality can be obtained.

[Brief description of the drawings]

FIG. 1 is a block diagram showing a variable rate coding transmission system to which an embodiment of the present invention is applied, FIG. 2 is a diagram showing a delay time of coding according to the present invention, and FIG. 3 is a diagram showing a conventional ADPCM-MQ system. FIG. 4 is a block diagram, FIG. 4 is a diagram for explaining that it is necessary to copy a variable value (internal state data) when changing an encoding circuit in FIG. 3, and FIG. 5 is a conventional Embedded ADPCM.
FIG. 6 is a block diagram showing a configuration for realizing a variable bit rate by bit drop using a code, and FIG. 6 is a diagram showing a segmental SN ratio with respect to a bit rate of various ADPCM codes.

Continuation of the front page (56) References JP-A-63-16756 (JP, A) JP-A-63-7042 (JP, A) JP-A-62-3535 (JP, A) JP-A-62-91024 (JP) , A) JP-A-62-222726 (JP, A) (58) Fields investigated (Int. Cl. ⁶ , DB name) H03M 7/32-7/38 H03M 3/00

Claims (1)

(57) [Claims] 1. A signal sequence of an audio signal is received, and for each signal sequence of a fixed time length or a variable time length (referred to as an audio block), it is determined how many bits per sample should be coded. A coded bit number determining circuit for determining, a buffer for storing the signal sequence for the time length, and an encoding for ADPCM coding the signal sequence of the buffer with the coded bit number specified by the coded bit number determining circuit. A plurality of ADPCM encoding processing means for performing encoding processing respectively corresponding to a plurality of encoding bit numbers, a data memory commonly accessed by the plurality of ADPCM encoding means, The data read out from the data memory by only the means corresponding to the number of coded bits determined by the coded bit number determination circuit among the plurality of coding processing means is used as the internal state data in the buffer. Means for executing an encoding process on an input audio block, means for storing the internal state data at that time in the data memory at the end of the encoding process, and encoding the encoding result and the number of bits. And a means for transmitting information indicating whether or not the speech encoding is performed.