JP2876824B2 - Frequency multiplier - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a frequency multiplier.

[0002]

2. Description of the Related Art Heretofore, this type of frequency multiplying circuit has used an oscillator that oscillates at a specific frequency without particular limitation.

[0003]

The above-described conventional oscillator that oscillates at a specific frequency has a disadvantage that the frequency of the input repetitive waveform cannot be tripled and output.

[0004]

A frequency multiplier according to the present invention has a differentiator between an inverting output of a first CML circuit and an inverting input of a second CML circuit. by have a delay element between the non-inverting output of the circuit and the non-inverting input of the second CML circuit, repeating wave input
The frequency of the shape is tripled and output .

[0005]

DESCRIPTION OF THE PREFERRED EMBODIMENTS Next, the present invention will be described with reference to the drawings. FIG. 1 is a circuit diagram of one embodiment of the present invention. The differentiating circuit 3 is inserted between the first CML circuit inverted output section 4 and the second CML circuit inverted input section 5, and the delay element 6 is connected to the first CML circuit inverted output section.
It is interposed between the ML circuit non-inverting output unit 7 and the second CML circuit non-inverting input unit 8.

When a repetitive waveform a as shown in FIG. 2 is input to the input unit 9, a waveform b as shown in FIG. 3 is output from the first CML circuit inversion output unit 4, and the first CML circuit non-inversion output unit 7 Output a waveform c as shown in FIG. First CM
The waveform b transmitted from the L circuit inversion output unit 4 is differentiating circuit 3
, And becomes a waveform d as shown in FIG. The waveform c transmitted from the first CML circuit non-inverting output unit 7 passes through the delay element 6 and
Is input to the second CML circuit non-inverting input section 8 as a waveform e.

At this time, the resistance component 1 of the first CML circuit and the resistance component 2 of the second CML circuit are appropriately set, and the reference voltage and the time constant of the differentiating circuit 3 are further determined according to the repetition frequency of the input waveform. By appropriately setting the delay time of the delay element 6, the waveforms e and d having a time relationship and an amplitude relationship as shown in FIG.
This is seen in the ML circuit non-inverting input section 8.

The second CML circuit non-inverting output unit 1
As shown in FIGS. 8 and 9, waveforms f and g having a frequency three times the frequency of the input unit can be obtained in the 0 and the second CML circuit inverted output unit 11, respectively. That is, the present invention
The waveform that has passed through the differentiating circuit and the delay circuit is
Input to the inverter circuit input section and the second CML circuit input section.
2 CML inversion circuit input section and 2nd CML circuit input section
Output waveforms
As a result, the output waveform is output as a tripled waveform.
Will be different.

[0009]

As described above, according to the present invention, the differentiating circuit is connected between the first CML circuit inverted output section and the second CML circuit inverted input section, and the delay element is connected to the first CML circuit non-inverting section. By connecting between the inverting output unit and the second CML circuit non-inverting input unit, the first CML circuit resistance component 1 and the first CML circuit resistance component can be used when a waveform is repeatedly input to the input unit. 2 is appropriately set, and the reference voltage and time constant of the differentiating circuit and the delay time of the delay element are appropriately set according to the repetition frequency of the input waveform, so that the second CML circuit non-inverting output section and the second In the CML circuit inverted output unit, there is an effect that a waveform whose frequency is three times the frequency of the input unit can be obtained.

[Brief description of the drawings]

FIG. 1 is a circuit diagram of one embodiment of the present invention.

FIG. 2 is a diagram showing a waveform a supplied to an input unit 9;

FIG. 3 is a diagram showing a waveform b.

FIG. 4 is a diagram showing a waveform c.

FIG. 5 is a diagram showing a waveform d.

FIG. 6 is a diagram showing a waveform e.

FIG. 7 is a diagram showing a relationship between a waveform d and a waveform e.

FIG. 8 is a diagram showing an output waveform f.

FIG. 9 is a diagram showing an output waveform g.

[Explanation of symbols]

 3 Differentiating circuit 6 Delay element 9 Input section 10, 11 Output section

Claims (1)

(57) [Claims] A differential circuit provided between an inverting output of the first CML circuit and an inverting input of the second CML circuit;
By providing a delay element between the non-inverting output section of the CML circuit and the non-inverting input section of the second CML,
A frequency multiplying circuit characterized in that the frequency of a return waveform is tripled and output .