JP2839768B2 - Image rotation circuit - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an image rotation circuit capable of rotating image data corresponding to a bit map in units of 90 degrees and forming a mirror image as required.

[0002]

2. Description of the Related Art Conventionally, when a character is output to a printer or an OCR or the like, there is a case where the character is converted into a right vertical writing or a left vertical writing and output. It is necessary to rotate the n × n bit image data by 90 ° or 270 °. When writing characters from bottom to top as necessary, the original image data may be inverted 180 ° and output. (This is referred to as upside down.) Further, when creating a logo or the like or a negative of a photograph or the like, it may be necessary to mirror-invert the characters to create a so-called mirror image.

Conventionally, there has not been a rotation circuit that enables all such rotations or the formation of a mirror image by hardware, and rotation processing of image data is performed by software. For example, as an example of the above method, a storage area W of the original image data to be rotated and a storage area X of the rotated image data are provided, and after clearing the storage area X, the original image is stored in the original image storage area W by one. While reading bit by bit,
The operation of calculating the address position in the area X after rotation corresponding to each rotation angle for each corresponding bit and rewriting the bit in the area X at that address position to 1 is performed for all the bits of the storage area W. There was a way to do it.

However, there is a problem that the rotation processing by the above software takes a long processing time and consequently takes a long time for character recognition. On the other hand, as a method for obtaining a rotated image of image data by hardware, 90 ° or 2 °
A technique has been proposed in which 70 ° can be selectively rotated.

For example, in Japanese Patent Application Laid-Open No. 2-199594, as shown in FIG. 8A, data of each column read from the image data holding unit 51 is read in a column direction in an address order (hereinafter referred to as ascending order). A first multiplexer 52 for 90-degree rotation, and a second multiplexer for 270-degree rotation for reading the data of each column read from the image data holding unit 51 in the column direction in the reverse order of the address (hereinafter referred to as descending order). 53, and the reading thereof is selected based on the selection signal, so that 90 ° and 270
8 ° rotation data output technology and Fig. 8
As shown in (B), before the first multiplexer 55 for 90 ° rotation that reads the data of each column read from the intermediate data holding unit 54 in the column direction in the order of addresses,
Based on the selection signals of 90 ° and 270 °, a selection inversion input control unit 56 for rotating the original image data by 180 ° while reading the original image data as it is or in the reverse direction from the end of the address is provided. When the original image data is held as it is by the multiplexer 55, the 90 ° rotation data is output from the multiplexer 55. On the other hand, when the 180 ° inverted data is held in the intermediate data holding unit 54 via the control unit 56, A technique has been proposed in which the multiplexer 55 outputs 270 ° rotation data by 90 ° rotation, thereby making it possible to output 90 ° and 270 ° rotation data.

[0006]

In the technique shown in FIG. 8A, dedicated multiplexers 52 and 53 are provided for obtaining images rotated 90 ° and 270 °, respectively, so that the circuit scale is reduced. Although the rotation can be increased and the rotation of 0 ° and 180 ° can be realized with the same configuration, there is a problem that a circuit is required to be large-scale and complicated because a multiplexer is required for each rotation angle. For this reason, in the technique shown in FIG. 8B, a control unit 56 for selectively inputting a 180 ° rotation is provided, and a 90 ° rotation multiplexer 551 provides 90 °, 2
Although it is configured to obtain two rotation data of 70 °, in this technique, in order to obtain 270 ° rotation data, writing to the intermediate data holding unit 54 must be performed in the reverse direction from the end of the address. Therefore, address management is required, and the load on software increases.

At 90 ° and 270 °, the intermediate data holding unit 5
4 because the writing procedure for the same image data is different.
If an attempt is made to obtain rotated images at both the angles of 270 ° and 270 °, the contents of the intermediate data holding unit 54 must be rewritten for each rotation, which leads to an increase in processing time. Further, in each of the above techniques, only two rotation angles of 90 ° and 270 ° can be obtained, and 180 ° rotation data and a mirror image cannot be obtained.

Certainly, in the second prior art, since the 180 ° rotation data is held in the intermediate data holding unit 54, 180 ° rotation data can be obtained by directly outputting the 180 ° rotation data. As described above, when creating a logo or the like or a negative of a photograph, it may be necessary to mirror the characters to create a so-called mirror image, but in the above configuration, such a mirror image is required. Attempting to achieve this requires a greater number of multiplexers and intermediate data holding units, and makes the circuit configuration extremely complicated.

The present invention has been made in view of the above problems of the prior art,
It does not require a large-scale and complicated circuit, and avoids the complexity of software.
It is an object of the present invention to provide an image rotation circuit which makes it possible to obtain every rotation image at every 0 ° and its mirror image.

[0010]

According to the present invention, there is provided an original image holding section for holding original image data in a dot matrix form, and a column bit selecting section for sequentially selecting the image data of the original image data holding section in column units. A row bit selection unit for sequentially selecting the image data of the original image data holding unit in row units, and whether to output the output from each of the bit selection units based on a first selection signal in ascending or descending address order. A read control unit for controlling, a selector unit for selecting a data output from any one of the bit selection units based on a second control signal, and an output from the selector unit based on a third control signal. Or an array control unit for selecting whether to output in the reverse column direction, and by appropriately combining the control signals, the rotation data obtained by rotating the original image data in units of 90 ° or its rotation data. It is characterized in that the produced configured to be able to image.

[0011]

Next, the operation of the above technical means will be described with reference to FIG. First, original image data in the form of an n × n dot matrix read from an optical reading device or a character font is written in a matrix in the image data holding unit 2 under the control of the writing control unit 1. On the other hand, the data written in the image data holding unit 2 is
Are sequentially input to the column bit selection unit 4 in units of columns, and are sequentially input to the row bit selection unit 5 in units of rows. The outputs from the bit selection units 4 and 5 are selectively output to the selector unit 6 based on a second control signal (THR). On the read control unit 3 side that performs address selection, the first control signal (I
Based on NV), address control is performed to determine whether to output the data output for each column (row) in ascending order or descending order.

As a result, for example, the second control signal (TH
When the output of R) is H, the column bit selector 4 is output, and when it is L, the row bit selector 5 is output. On the other hand, when the output of the first control signal (INV) is L, read control is performed. When the selection signal in the address ascending order is output from the unit 3 and the selection signal in the address descending order is output when the signal is H, as shown in FIG. 7, when (INV) L and (THR) H, Original image data as is (A) and (INV) L
And (THR) L, image data (B) rotated by 90 ° is obtained, but (INV) H and (THR) H
In the case of, the mirror image (G) is not (INV) H and (THR) L instead of the image data (C) rotated by 180 °.
In the case of (2), not the image data (D) rotated by 270 ° but the image data (F) rotated by 90 ° of the mirror image is obtained.

Therefore, in order to obtain image data rotated by 270 ° and 180 °, a third process is further required. Therefore, the present invention is provided with an array control unit 7 for selecting whether to output the output from the selector unit 6 in the forward or reverse direction based on the third control signal (MIR). That is, in the case of (INV) H and (THR) H, (MIR)
Is set to H, the image data (C) rotated by 180 ° is obtained instead of the mirror image (G). By setting (MIR) to L, the mirror image is obtained. Further, in the case of (INV) H and (THR) L, by setting (MIR) to H, the image data (F) obtained by rotating the mirror image by 90 ° can be used instead of (F).
The image data (D) rotated by 70 ° is obtained, and by setting (MIR) to L, the image data (F) obtained by rotating the mirror image by 90 ° can be obtained.

Similarly, in the case of (INV) L and (THR) H, the mirror image (E) of the original image data is set to (INV) L and (THR) L by setting (MIR) to H. By setting (MIR) to H, mirror images (F) of the image data rotated by 270 ° can be obtained respectively. Therefore, according to the present invention, only three control signals of the three control signals can be obtained without software processing. In combination, the original image data corresponding to the bitmap can be rotated in units of 90 degrees, and a mirror image can be formed if necessary.

[0015]

DESCRIPTION OF THE PREFERRED EMBODIMENTS Preferred embodiments of the present invention will be illustratively described in detail below with reference to the drawings. FIG. 1 is an overall configuration diagram of an embodiment according to an image rotation circuit of the present invention, which has already been described in the section of operation, and will be described while avoiding the duplication. FIG.
In this embodiment, reference numeral 1 denotes a writing control unit for controlling the writing of the original image data in the form of an nxn dot matrix.
It consists of a dot matrix.

2 is a 4 * 4 bit memory,
An image data holding unit 3 for holding the original image data, a read control unit 3 for outputting a selection signal in ascending or descending order of address to respective bit selection units 4 and 5 described later by a first control signal (INV); 4 and 5 are column bit selection units for sequentially selecting image data in the original image data holding unit in column units (row units) and reading out the original data in ascending or descending order of addresses in a column direction (row direction) according to the selection signal. 4 and the row bit selection units 5 and 6 output the second control signal (TH
R) based on a third control signal (MIR). The selector unit 7 selects the data output from any one of the bit selection units based on the third control signal (MIR). An array control unit 7 for selecting whether to output.

Hereinafter, each component in the overall configuration diagram of FIG. 1 will be described in more detail. FIG. 2 shows a circuit configuration of the original image data holding unit, showing a 4 * 4 flip-flop 12.
A single data holding element composed of (n * n) is formed in a matrix, and a write enable W
Write data D0 to D3 read from a character font or the like based on E are sequentially written in line units.

The write control unit shown in FIG.
0 and a gate circuit 11 (n). When a decode signal from the address decoder 10 is output to the OR gate 11 (n) based on the write addresses A0 and A1 transmitted to the address decoder 10, the signal The OR is synchronized with RW
WE (n) is output from the gate 11 (n).

The read control unit 3, as shown in FIG.
An OR gate 13 (0, 1) and an address decoder 14 are provided.
0 and A1 are applied to the OR gate 13 (0, 1) together with the first control signal (INV), and the control signal (INV) is
In this case, the selection signals SEL1 to SEL4 are sequentially output from the address decoder 14 in the ascending order of the address.
When V) is H, the address decoder 14 sequentially outputs the selection signals SEL1 to SEL4 in the address descending order.

FIG. 3 shows a circuit configuration of the column bit selection unit 4, the row bit selection unit 5, and the selector unit 6, which correspond to the number of columns (the number of rows) of the original image data holding unit 2 by n sets ( 4
(Set) column bit selection circuit 15 (n), row bit selection circuit 16 (n), and selector circuit 17 (n), and more specifically, selects bit data of the fourth column (fourth column from the left). And a row bit selector 16 (3) for selecting the bit data of the fourth row from the top,
A first combination of a selector circuit 17 (0) for selecting the bit data RCD0 from any one of the selection units based on the control signal (THR) H / L, It is composed of a combination of the second column and the second row, and a combination of the first column and the first row.

Each selector circuit 17 (0-3) has a second
When the control signal (THR) is H, the column bit selection unit 1
5 (0 to 3), the bit data RCD (0 to 3) selected by the select signal SEL (1 to 4), and in the case of L, the select signal SEL (1) from the row bit selector 16 (0 to 3). ~Four)
, The bit data RCD (0 to 3) selected are output selectively. That is, the THR signal H
/ L, the bit data selected from the output of the column bit selection unit or the selection signal SEL (1 to 4) in the row bit selection unit 5 can be output from each selector unit 6. In this case, Since the control signal (THR) is commonly output to the data selector circuits 17 (0 to 3), the four data selector circuits (0 to 3) output n-bit data in row or column units. Will be.

The column bit selection circuit 15 (0 to 3)
And the output order of the data from the row bit selection circuits 16 (0 to 3) is the selection signal SEL (1 to 4) applied to each selection unit.
And the control signal (IN
When V) is L, the selection signals SEL1 to SEL4 are sequentially applied in ascending address order, while when the control signal (INV) is H, the selection signals SEL1 to SEL4 are sequentially applied in descending address order. I have.

The array control section 7 comprises four selectors 18 (0 to 3) as shown in FIG. 6, and each selector 18 (n) outputs the output RCD (( 0-
3)) is connected to the A terminal, and conversely, the selector circuit 17 is connected to the A terminal.
Outputs RCD (3 to 0) from (3 to 0) are respectively applied to the B terminal, in other words, applied to the forward arrangement and the reverse arrangement, respectively.
When the third control signal MIR applied to each selector 18 (0-3) is L, the output of the RCD (n) from the A terminal is in the forward arrangement, and when it is H, the output of the RCD (n) includes the original image in the reverse arrangement Four types of rotated images and four types of mirror images are output for each column unit D (0 to 3).

Therefore, according to the present embodiment, the first control signal INV and the second control signal TH
By controlling each of the R and third control signals MIR to H or L, four types of rotated images including one original image and four types of mirror images can be obtained as shown in FIG.
In this embodiment, the configuration of the original image data is 4 * 4 bits for the sake of simplicity. However, the present invention is not limited to the above bit configuration and can be realized by any configuration of n * n bits. It is.

[0025]

As described above, according to the present invention, there is no need for software processing such as address management or the like without increasing the scale and complexity of the circuit, and the processing time is short and only the hardware configuration is used. It has various remarkable effects such as making it possible to obtain all rotated images in 90 ° units and their mirror images.

[Brief description of the drawings]

FIG. 1 is an overall configuration diagram of an embodiment of the present invention.

FIG. 2 shows a detailed circuit configuration of an image data holding unit in FIG.

FIG. 3 shows a detailed circuit configuration of a column bit selection unit, a row bit selection unit, and a selector unit of FIG.

FIG. 4 illustrates a circuit configuration of a write control unit in FIG. 1;

FIG. 5 shows a circuit configuration of a read control unit in FIG.

FIG. 6 shows a circuit configuration of an array control unit 7 in FIG.

FIG. 7 shows a rotated image obtained by an embodiment of the present invention and its mirror image.

FIG. 8 shows a block diagram of a rotation circuit according to the prior art.

[Explanation of symbols]

 DESCRIPTION OF SYMBOLS 1 Write control part 2 Image data holding part 3 Read control part 4 Column bit selection part 5 Row bit selection part 6 Selector part 7 Array control part

──────────────────────────────────────────────────続 き Continued on the front page (58) Field surveyed (Int.Cl. ⁶ , DB name) G06T 3/00-3/60 B41J 2/485 G09G 5/24 640 H04N 1/387

Claims (1)

(57) [Claims] An original image holding unit for holding original image data in a dot matrix form; a column bit selecting unit for sequentially selecting image data of the original image data holding unit in units of columns; A row bit selection unit for sequentially selecting image data in row units; a read control unit for controlling whether to output the output from each bit selection unit in ascending or descending address order based on a first selection signal; A selector for selecting the data output from any one of the bit selectors based on the control signal of No. 2 and whether the output from the selector is output in the forward or reverse direction based on a third control signal. And an array control unit for selecting the image data. By appropriately combining the control signals, it is possible to generate rotated data obtained by rotating the original image data in units of 90 ° or a mirror image thereof. Image rotation circuit, characterized in that the.