JP2839160B2 - Printer device data transfer method - Google Patents

Description

Detailed Description of the Invention [Table of Contents] Outline Industrial application field Conventional technology (FIGS. 6 and 7) Problems to be solved by the present invention (FIG. 8) Means for solving the problems (FIG. 1) Function Embodiment (FIGS. 2 to 5) Effects of the Invention [Overview] Data transfer method of a printer device, in particular, printing data in a hard copy device or the like from a host-side data processing system to a printer-side data processing system A data transfer method for a printer device for transferring data from a host computer to a printer device for the purpose of shortening the data transfer preparation period of the host-side data processing system and performing the data transfer process at a high speed. Wherein the host computer includes a control unit, a queue buffer circuit for temporarily storing data to be transferred to the printer device, and a data from the queue buffer circuit. An interface circuit that reads data and transfers the data to the printer device.The printer device determines whether a PRBSY signal whose logical level changes depending on whether data is being read or not, and whether internal processing of data is ongoing. When the PRBSY signal indicates that data is not being read, the interface circuit reads data from the queue buffer circuit and transmits the read data to the printer, and outputs the internal signal by the PRRDY signal. Upon detecting the completion of the process, the printer device outputs a PRSTB signal whose logic level changes, the printer device starts internal processing of the data according to the change in the level of the PRSTB signal, and the queue buffer circuit has an empty space for storing data. And outputs a BUFEMP signal whose logic level changes according to whether or not there is
When a free space is detected in the queue buffer circuit by the FEMP signal, data is transferred to the queue buffer circuit.

[Industrial applications]

The present invention relates to a data transfer method for a printer device, and more particularly, to a method for transferring print data from a host to a printer at a high speed in a hard copy device or the like.

[Conventional technology]

 6 and 7 are explanatory diagrams according to a conventional example.

FIG. 6 shows a configuration diagram of a printer device according to a conventional example.

In the figure, a hard copy device that performs a bit image printing process includes a host-side data processing system A and a printer-side data processing system B. The host-side data processing system A includes a data input circuit 1, a main MPU (microprocessor unit) 2, a RAM (memory that can be written and read at any time) 3, a queue buffer circuit 4, and a queue buffer control / output circuit 5, and includes a keyboard and other components. The print data (hereinafter, referred to as DATA signal) input from the support tool is transferred to the printer-side data processing system.

The printer-side data processing system B includes an interface circuit
6, Data latch circuit 7, Sub MPU 8, RAM 9, Print output drive circuit
10 is for reading the DATA signal transferred from the data processing system A and controlling the drive of a print output mechanism such as a thermal head.

FIG. 7 is a flowchart of a print data transfer method according to a conventional example.

In the figure, data processing system A transfers data processing system B to DA.
When transferring the TA signal, first, in step P1, the "L" level of a data read completion signal (hereinafter, referred to as a PRBSY signal) of the data processing system B is confirmed. Here, when the “L” level indicating the completion of reading is confirmed (YES), the process shifts to Step P2.

In step P2, the DATA signal is set in the queue buffer circuit 4, and after the completion of the setting, in step P3, the DATA signal is output to the queue buffer control / output circuit.

Next, in step P4, the "H" level of the data signal timing signal (hereinafter, referred to as the PRSTB signal) is output to the data processing system B. Next, when continuing the data transfer process in step P5, the process returns to step P1 and repeats step P2.

Thus, the DATA signal can be transferred from the data processing system A to the data processing system B.

[Problems to be solved by the invention]

By the way, according to the conventional example, as shown in the time chart of FIG. 8, after confirming the "L" level of the PRBSY signal, the DATA signal is set in the queue buffer circuit 4, and
After the signal is set, the PRSTB signal is output to the data processing system B.

For this reason, the data transfer preparation period T2 from the falling time of the PRBSY signal to the time when the DATA signal is output to the queue buffer control / output circuit 5 becomes longer.

As a result, there is a problem that a high-speed print process cannot be performed due to a delay in data transfer in a hard copy device or the like that performs a bit image process that requires a large amount of print data and high resolution.

SUMMARY OF THE INVENTION The present invention has been made in view of the problems of the related art, and has been made in consideration of the above-described problems. The purpose is to provide a transfer method.

[Means for solving the problem]

FIG. 1 shows a principle diagram of a data transfer method of a printer device according to the present invention.

The transfer method is a printer device data transfer method for transferring data from a host computer to a printer device, wherein the host computer includes a control unit 12a, a queue buffer circuit 14a for temporarily storing data to be transferred to the printer device, An interface circuit 15 that reads data from the queue buffer circuit 14a and transfers the data to the printer device.The printer device performs a PRBSY signal whose logic level changes depending on whether data is being read or not, and an internal process of the data. Outputs a PRRDY signal whose logic level changes depending on whether or not it is continuing, and the interface circuit 15 reads data from the queue buffer circuit 14a when the PRBSY signal indicates that data is not being read and sends it to the printer device. When the completion of internal processing is detected by the PRRDY signal, The printer device outputs a PRSTB signal in which the level changes, the printer device starts internal processing of the data according to a change in the level of the PRRSTB signal, and the queue buffer circuit 14a determines whether or not the data storage location has an empty space. BUFE whose logic level changes according to
The above object is achieved by outputting an MP signal, wherein the control unit 12a transfers data to the queue buffer circuit 14a when detecting an empty storage location of the queue buffer circuit 14a based on the BUFEMP signal.

[Action]

According to the present invention, the interface circuit 15 monitors the printer with the PRBSY signal and the PRRDY signal output from the printer, and when the internal processing of the printer is completed, the next data (DATA) is transmitted to the key buffer circuit. 14a
And transmits it to the printer device. On the other hand, when data is read from the queue buffer circuit 14a and a space is generated in the storage area, the level of the BUFEMP signal changes. As a result, the control unit 12a transfers new data to the queue buffer circuit 14a.

Normally, the time required for data transfer in the host computer is shorter than the time required for internal data processing in the printer, so new data is stored in the queue buffer circuit 14a during data processing in the printer. Is replenished. Therefore, the data transfer time from the control unit 12a to the queue buffer circuit 14a can be ignored.
Further, the printer device fetches the next data as soon as the internal processing is completed and starts the internal processing.

As a result, the speed of the data transfer processing is increased, and high-speed printing processing can be performed.

〔Example〕

Next, an embodiment of the present invention will be described with reference to the drawings.

2 to 5 are views for explaining a data transfer device of the printer device according to the embodiment of the present invention, and FIG. 2 is a configuration diagram of the printer device according to the embodiment of the present invention.

In the figure, the host computer includes a host-side data processing system A and a data input support tool D, and the printer device includes a printer-side data processing system B and a print output support tool C. The data processing system A includes a key input circuit 11a, a communication driver 11b, an LCD (liquid crystal display) driver 11c, and a main MPU (control unit) 12a.
, OSC (crystal oscillator circuit) 12b, work RAM 13a, OS
It comprises a (operating system) ROM 13b, a queue buffer circuit 14a, and a printer I / F (interface) circuit 15. The data processing system A transfers the DATA signal (print data) provided from the data input support tool D to the data processing system B.

The data processing system B includes a printer I / F (interface) circuit 16, a work RAM 19a, an MPU bus 17, a sub MPU 18a, an OSC 18b, an OS ROM 19b, and a head drive circuit.
20a and a motor driver 20b. The data processing system B reads the DATA signal transferred from the data processing system A and controls the driving of the print output support tool C.

The print output support tool C includes a pulse motor 24 for sequentially feeding paper and a thermal head 25 for printing on the paper.

Note that the data input support tool D is provided for the LCD panel 21,
It consists of a keyboard 22 and a serial I / F circuit 23, and print data output from the keyboard 22 and a serial I / F circuit 2
The external print data input from 3 is output to the data processing system A.

FIG. 3 is a data transfer time chart according to the embodiment of the present invention.

In the figure, DATA0 to 7 are print data (DATA signal in the case of 8 bits) transferred from the data processing system A to B. The PRBSY signal is a signal indicating the end of data reading, and in the data processing system B, the DATA signal is used for work.
This signal is generated when data is written to the RAM 19a. The PRBSY signal is output to the data processing system A, and the content is that data reading is completed at the “L” level while data reading is at the “H” level. The PRBSY signal rises in synchronization with the fall of the PRRSTB signal.

The PRRDY signal is a signal indicating completion of data processing,
This signal is generated when the data processing of the data processing system B is completed. The PRRDY signal is output to the data processing system A,
The content is that data processing is being performed at the “H” level and data processing is being suspended at the “L” level.

The PRSTB signal is a signal indicating the data output timing, and is a signal when the DATA signal is transferred from the data processing system A to the data processing system B. The PRSTB signal falls in synchronization with the fall of the PRRDY signal, and has a content of permitting transfer at "L" level and disallowing transfer at "H" level.

The PRIRQ signal is a signal indicating an interrupt request, and is output from the data processing system B to the data processing system A.

The BUFEMP signal is a signal indicating a queue buffer empty, and is a signal output from the queue buffer circuit 14 to the main MPU circuit 12a. BUFEMP signal is “H” level and DA
The contents indicate that the waiting area for the TA signal is full, and that the waiting area is vacant at the "L" level. The BUFEMP signal falls in synchronization with the fall of the PRBSY signal. As a result, the DATA signal is temporarily suspended in the vacant seat of the queue buffer circuit 14a in synchronization with the fall of the PRBSY signal.

T1 is a data transfer preparation period, which is a period between the fall time of the PRBSY signal and the fall time of the PRRDY signal. This is the time from the reading completion time of the data processing system B to the start of reading the next DATA signal.

These constitute a hard copy device that performs a bit image printing process.

Next, a printing data transfer processing method of the apparatus will be described.

FIG. 4 is a flowchart of a data transfer process on the host side according to the embodiment of the present invention.

In the figure, when the power is turned “ON”, first, a step P1
Then, confirm the "L" level of the BUFEMP signal. At this time,
If the "L" level is confirmed (YES), the queue buffer circuit 14a has a vacant seat, and the process proceeds to step P2. In step P2, the DATA signal is transmitted to the queue buffer circuit 14a.
Set to. Then, PR in step P3 or step P4
Check the "H" level of the IRQ signal or the "L" level of the PRBSY signal. The PRBSY signal is at "L" level when the power is normally turned on, and the PRIRQ signal is at "H" level similarly.
Therefore, in the first transfer of the DATA signal, the flow shifts to Step P5. Note that the PRRBSY signal becomes “H” level because
The printer is writing the DATA signal to the RAM 18a, and the PRIRQ signal goes to the “H” level when the printer interrupts the host.

Next, in step P5, the DATA signal is output to the printer I / F circuit 15, and in step P6, the PRRDY signal "L" level is confirmed. At this time, if the "L" level is confirmed (YES), the flow shifts to step P7 to output the PRSTB signal "H" level to the printer. This causes the DATA signal to
The data is transferred from the F circuit 15 to the printer I / F circuit 16.

Thereafter, in step P8, if the data transfer process is to be continued (YES), the process returns to step P1 and repeats the processes in step P2 and subsequent steps.

Next, data reading processing on the printer side will be described.

FIG. 5 is a flowchart of data reading processing on the printer side according to the embodiment of the present invention.

In the figure, first, when the "H" level of the PRSTB signal output from the host is confirmed at step P1 (YES), the DATA signal of the printer I / F circuit is latched at step P2.

Next, in step P3, data processing is started based on the DATA signal, and in step P4, it is written to the work RAM 19a. At this time, the DATA signal is transmitted to the MP by the sub MPU 18a.
The data is transferred to the RAM 18a via the U bus 17.

Next, in step P5, it is determined whether or not the writing process of the RAM 18a has been completed. At this time, when the writing process is completed, that is, when the printer reads the print data (YES), the process shifts to Step P6.

In step P6, the PRBSY signal “L” level is transmitted to the host. At this time, on the host side, the next DATA signal is output from the queue buffer circuit 14a to the printer I / F circuit 15 in synchronization with the rise of the PRBSY signal transmitted from the printer side. BUFEMP is synchronized with the PRBSY signal.
The signal rises, whereby the DATA signal stored in the work RAM 13a is set in the queue buffer circuit 14a (see FIG. 3).

Next, in step P7, when the data processing on the printer side is completed (YES), a PRRDY signal is transmitted to the host side.
At this time, on the host side, the PR output from the printer
The PRSTB signal falls in synchronization with the fall of the RDY signal, and the DATA signal is transferred to the printer I / F circuit 16 (third
See figure).

By repeating these data transfer processing and data read processing, the DATA signal is transferred from the host-side data processing system A to the data processing system B at high speed.

Thus, according to the embodiment of the present invention, even when the printer-side data processing system B is performing data processing, in the host-side data processing A, the DATA signal is queued in synchronization with the fall of the PRBSY signal. The buffer circuit 14a temporarily waits. The DATA signal is transferred to the printer I / F circuit 16 in synchronization with the fall of the PRRDY signal.

For this reason, the data transfer preparation period between the falling time of the PRBSY signal and the output time of the DATA signal can be reduced as compared with the conventional example.

Thus, high-speed transfer processing of the DATA signal can be performed.

〔The invention's effect〕

According to the present invention, data is transferred to the queue buffer circuit 14a while the printer device performs internal data processing.

For this reason, the data transfer preparation period of the host-side data processing system can be shortened as compared with the conventional example, and high-speed data transfer processing can be performed.

This greatly contributes to the manufacture of a hard copy device or the like that performs high-speed data printing.

[Brief description of the drawings]

FIG. 1 is a principle diagram of a data transfer method of a printing apparatus according to the present invention, FIG. 2 is a configuration diagram of a printing apparatus according to an embodiment of the present invention, and FIG. FIG. 4 is a flowchart of a data transfer process on the host side according to the embodiment of the present invention; FIG. 5 is a flowchart of a data read process on the printer side according to the embodiment of the present invention; Is a configuration diagram of a printer device according to a conventional example, FIG. 7 is a flowchart of a print data transfer method according to a conventional example, and FIG. 8 is a time chart explaining problems of the conventional example. (Explanation of symbols) 11: Data standby means, 12: Data output means, 13: Data input means, 14: Storage means, D1: Print data, D2: Read end data, D3: Data processing Completion data.

──────────────────────────────────────────────────続 き Continuation of the front page (56) References JP-A-61-179757 (JP, A) JP-A-62-121722 (JP, A) JP-A-63-137420 (JP, A) 67431 (JP, U) (58) Field surveyed (Int. Cl. ⁶ , DB name) B41J 5/30 B41J 29/38 G06P 3/12

Claims (1)

(57) [Claims] 1. A data transfer method for a printer device for transferring data from a host computer to a printer device, the host computer comprising: a control unit; a queue buffer circuit for temporarily storing data to be transferred to the printer device; An interface circuit for reading data from a buffer circuit and transferring the data to the printer, wherein the printer has a PRBSY signal whose logic level changes depending on whether data is being read, and whether or not internal processing of the data is ongoing. Outputs a PRRDY signal whose logic level changes depending on whether the interface circuit reads data from the queue buffer circuit when the PRBSY signal indicates that data is not being read and transmits the data to the printer device,
When the completion of internal processing is detected by the PRRDY signal, a logical level-changed PRSTB signal is output, and the printer device starts internal processing of the data according to a change in the level of the PRSTB signal. The controller outputs a BUFEMP signal whose logic level changes according to whether or not there is a free space in the storage location. A data transfer method for a printer device, wherein the data is transferred to a circuit.