JP2702276B2 - Linear pulse motor drive circuit for floppy disk drive - Google Patents

Description

Description: BACKGROUND OF THE INVENTION The present invention relates to a floppy disk device which is a peripheral storage device of a computer system or the like serving as a host.
The present invention relates to a floppy disk drive for performing a seek operation for moving a head to a track to be read at high speed using a linear pulse motor.

[Conventional technology]

Conventionally, a linear pulse motor drive circuit for driving a linear pulse motor in this type of floppy disk drive drives the linear pulse motor by switching the excitation pattern every time a step pulse is sent from the host. The step pulse sent from the host is often at a constant interval. In this case, the linear pulse motor is also driven at a constant interval (constant speed).

[Problems to be solved by the invention]

In the above-described conventional linear pulse motor drive circuit of the floppy disk device, the excitation pattern is switched at intervals of a step pulse sent from the host. Since the linear pulse motor has a large inertia, a seek error is likely to occur when a short step pulse is sent from the host to perform a high-speed seek operation. There is a drawback that the settling time, which is the time required to stop, is long.

SUMMARY OF THE INVENTION It is an object of the present invention to provide a linear pulse motor driving circuit for a floppy disk device having a short settling time without causing a seek error even when a short fixed step pulse is sent from a host.

[Means for solving the problem]

The linear pulse motor drive circuit of the floppy disk device of the present invention, the head movement on the track of the floppy disk,
In a linear pulse motor drive circuit of a floppy disk drive, which drives a linear pulse motor according to a step pulse signal which is a pulse train sent from a host and a direction signal indicating a moving direction, a step pulse signal is inputted; A first state in which a plurality of preceding pulses in a pulse train in a signal are converted into pulses having an interval equal to or longer than a predetermined interval, and subsequent pulses are converted into pulses having the same interval as the step pulse, and a drive pulse signal is output. A circuit for inputting a step pulse signal and a direction signal, and outputting a braking signal for braking the current linear pulse motor when the interval between pulse trains in the step pulse signal exceeds a predetermined period. Inputs two-state circuit, drive pulse signal and direction signal ,
A 2-bit up / down counter which counts up or down the number of pulses in the drive pulse signal in accordance with the moving direction indicated by the direction signal and outputs it as a binary counter output signal; a 2-bit up / down counter and a second state And a decoder for receiving an output of the circuit and generating an excitation pattern for driving the linear pulse motor in accordance with the output state. The decoder outputs a counter output signal of the 2-bit up / down counter. The linear pulse motor is driven at the indicated value, and when a braking signal is output from the second state circuit, an excitation pattern is generated to retreat by one pulse in the current moving direction.

[Action]

The step pulse signal sent from the host is the first
The state circuit converts the preceding plurality of pulses into pulses having an interval equal to or longer than a predetermined interval, and the subsequent pulses into pulses having the same interval as the interval between the step pulses. By making this conversion a constant speed after the rotation speed of the linear pulse motor is gradually increased, it is possible to prevent a seek error from occurring. When the interval between the pulse trains in the step pulse signal exceeds a predetermined period, that is, when a certain time has elapsed since the last pulse was sent, the linear pulse motor is retracted by one pulse for a certain period during which the braking signal is output. And then return to the original position. This is a state in which so-called reverse-phase braking is applied, so that the settling time after the last pulse is sent is reduced.

〔Example〕

Next, embodiments of the present invention will be described with reference to the drawings.

FIG. 1 is a block diagram showing a configuration of a main part of an embodiment of a linear pulse motor drive circuit of a floppy disk drive according to the present invention.

This embodiment includes a first state circuit 3, a second state circuit 4, a 2-bit up / down counter 5, a decoder 9, and a stepper driver 10, and a step pulse sent from a host (not shown). Head (not shown) according to the contents of signal 1 and direction signal 2 indicating the moving direction
The linear pulse motor 11 for performing the movement is driven.

The first state circuit 3 inputs the step pulse signal 1,
A plurality of preceding pulses are converted into pulses having an interval equal to or longer than a predetermined interval, and subsequent pulses are converted into pulses having the same interval as that of the step pulse, thereby forming a driving pulse signal.
12 is generated and output to the 2-bit up / down counter 5. The second state circuit 4 receives the step pulse signal 1 and the direction signal 2 and
Is not inputted for a predetermined time, the brake signal 6 at the time of inner circumference seek or the brake signal 7 at the time of outer circumference seek, which is a brake signal, is sent to the decoder 9 for a certain period. The 2-bit up / down counter 5 receives the drive pulse signal 12 and the direction signal 2 and, if the direction signal 2 is at the “H” level and indicates that it moves in the outer peripheral direction, the drive pulse signal 12 Count up the number of pulses of “L”
Level, and counts down if it is an indication that moves in the inner circumferential direction, and outputs the result to binarization to counter output signal 8 _1, 8 ₂ as decoder 9. The decoder 9 also receives the above-described inner-seek seek braking signal 6 and outer-seek seek braking signal 7, and the excitation signals PH1 and PH2 indicating the phase to be excited by the linear pulse motor 11 depending on the state of each signal. , PH3, PH4 are determined, and stepper driver 1
Output to 0. The stepper driver 10 is connected to both ends of the windings W _A and W _B in the linear pulse motor 11, respectively.
Windings W _A in accordance excitation signal PH1～PH4, to supply current to W _B, drives the linear pulse motor 11.

Table 1 below is a truth table of the decoder 9, and FIG. 2 is a time chart showing the operation of each part of the present embodiment.

The operation of this embodiment will be described with reference to Table 1 and FIG.

If five pulses having a pulse interval t ₁ as a step pulse signal 1 is inputted, the first state circuit 3, pulse interval t ₁
Three pulses are transmitted at longer and shorter pulse intervals t ₃ and t ₂ , and the subsequent two pulses output a drive pulse signal 12 having a pulse interval t ₁ . When the direction signal 2 is at the "H" level and the pulse signal is not input as the step pulse signal 1 for the fixed time t4, the second state circuit 4 outputs the outer periphery seek time braking signal 7 for the fixed time t5. When the signal 2 is at the "L" level and no pulse is input for the predetermined time t4, the brake signal 6 for the inner circumference seek is output for the predetermined time t5. As shown in Table 1, the decoder 9 controls the braking signal 6 during the inner seek and the braking signal 7 during the outer seek.
Are sent, the excitation signals PH1 to PH4 for performing the outer and inner operations for one pulse are output.

Therefore, the linear pulse motor 11 is driven so that the rotation speed is gradually increased, and is stopped after the reverse phase braking is applied by the braking signals 6 and 7 during the inner and outer circumference seeks. Therefore, it is possible to prevent even seek error occurs in the case of performing a seek operation at high speed, the final pulse is able to write even short settling time t ₆ from being sent at step pulse signal 1.

〔The invention's effect〕

As described above, according to the present invention, the first state circuit for converting and outputting the interval of the input pulse train, the second state circuit for outputting the braking signal, and the excitation pattern are determined according to these output states. By providing the decoder, it is possible to prevent the occurrence of a seek error even when performing a seek operation at high speed, and to shorten the settling time.

[Brief description of the drawings]

FIG. 1 is a block diagram showing the configuration of a main part of one embodiment of the present invention, and FIG. 2 is a time chart showing the operation of each part of the embodiment shown in FIG. 1 Step pulse signal 2 Direction signal 3 1st state circuit 4 2nd state circuit 5 2 bit up / down counter 6 6 Inner circumference seek braking signal 7 …… Brake signal during outer circumference seek, 8 ₁ , 8 ₂ … Counter output signal, 9 …… Decoder, 10 …… Stepper driver, 11… Linear pulse motor, 12 …… Drive pulse signal, PH1 to PH4 …… Excitation Signal, W _A , W _B …… winding.

Claims (1)

(57) [Claims] A floppy disk drive for moving a head on a track of a floppy disk by driving a linear pulse motor according to a step pulse signal as a pulse train sent from a host and a direction signal indicating a moving direction. In the linear pulse motor driving device of the above, in the pulse train of the step pulse signal, the plurality of preceding pulses, under the constraint that the pulse train is longer than the pulse interval of the step pulse, the following plurality of A first state circuit that converts the pulses into pulses with shorter intervals and outputs them as drive pulse signals, and outputs pulses subsequent to the plurality of pulses as drive pulse signals at the same intervals; and the step pulse signal and The direction signal is input, and the pulse during the step pulse is input. A second state circuit for outputting a control signal for limiting the current movement of the linear pulse motor for a certain time when the interval between rows exceeds a certain time; and inputting the drive pulse signal and the direction signal, A 2-bit up / down counter that counts up or down pulses in the drive pulse signal and outputs the count value according to the moving direction indicated by the signal; and a 2-bit up / down counter and a second state circuit. A decoder for inputting an output and generating an excitation pattern for driving the linear pulse motor in accordance with the output state, wherein the decoder indicates a counter output signal which is an output of the 2-bit up / down counter. The linear pulse motor is moved by the value, and the braking signal is output from the second state circuit. A driving apparatus for a linear pulse motor for a floppy disk drive, wherein an excitation pattern is generated to retreat by one pulse with respect to the current moving direction in the case of being performed.