JP2672580B2 - Magnetic recording / reproducing device - Google Patents

Description

Description: BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a magnetic recording / reproducing apparatus, and more particularly, to a magnetic recording / reproducing apparatus for performing digital signal processing by dividing signals into different bands such as a luminance signal and a chrominance signal. Regarding

[Conventional technology]

Conventionally, there is an example that enables variable speed reproduction without skew by using a variable delay means for controlling the delay time by digital processing like the magnetic reproducing device described in Japanese Patent Laid-Open No. 62-7277. No consideration is given to the delay time difference.

[Problems to be solved by the invention]

In the above-mentioned related art, there is a problem that a color shift occurs because a delay time difference when filtering is performed separately for a luminance signal and a color signal is not taken into consideration.

An object of the present invention is to provide a magnetic recording / reproducing apparatus which performs digital signal processing separately for a luminance signal and a chrominance signal, by correcting the delay time difference of each signal filter and obtaining a good image without color shift. It is to realize a playback device.

[Means for solving the problem]

The above object is achieved as follows. This is achieved by using a control signal generating means capable of varying the signal generation timing for controlling the circuit for processing each signal into a digital signal, or a means for variably delaying each signal during recording and reproduction.

[Action]

The control signal generation circuit or the variable delay means for each signal works so as to cancel the delay time difference of the filter for each signal, and determines the generation timing of the control signal or the delay time for each signal. As a result, the reproduced video signal does not cause color shift.

〔Example〕

Hereinafter, an embodiment of the present invention will be described with reference to FIG. FIG. 1 shows, as an example, an embodiment of a magnetic recording / reproducing apparatus capable of recording / reproducing the high-definition television signal (hereinafter abbreviated as HDTV signal) shown in FIG. 2, and in FIG. ,
3 is an input terminal for red (R), green (G), and blue (B), which are the three primary color signals of the HDTV signal, 4 is an input terminal for a horizontal synchronizing signal (hereinafter abbreviated as HD) of the HDTV signal, and 5 is an HDTV An input terminal for a vertical synchronizing signal (hereinafter abbreviated as VD) of the signal, 6 is a matrix circuit for converting the three primary color signals R, G, B into a luminance signal Y and two color signals C _w , C _N , 10, 11, 12 Is a low pass filter (hereinafter,
LPF), 20, 21, 22 are A / D converters, 30 is a recording system luminance signal processing circuit, 31 and 32 are memories constituting the recording system luminance signal processing circuit 30, and 40 is a recording system color signal processing circuit. , 41 to 45 constitute the recording system color signal processing circuit 40, 41 and 42 are vertical filters for limiting the band in the vertical direction, 43 is a line-sequential conversion circuit, 44 and 45 are memories, and 50 is a recording system control. Signal generation circuit, 51
Is a synchronous information generation circuit, 52 is a switching circuit, 60 and 61 are D / A converters, 70 and 71 are LPFs, 80 and 81 are FM modulation circuits, 90 and 91 are recording amplifiers, 100, 100'101 and 101 'are magnetic heads, 102 is a magnetic tape, 103 is a drum, 110 and 111 are preamplifiers, and 120 and 121 are FM.
Demodulation circuit, 130, 131 LPF, 140 synchronization separation circuit, 150, 151
Is an A / D converter, 160 is a reproduction system luminance signal processing circuit, 161, 162
Is a memory that constitutes the reproduction-system luminance signal processing circuit 160, 170 is a reproduction-system color signal processing circuit, 171-173 are those that compose the reproduction-system color signal processing circuit 170, 171, 172 are memories, 17 is a color signal interpolation circuit, 180 is a reproduction system control signal generating circuit, 181 is a synchronizing signal generating circuit, 190 to 192 are D / A converters, 200 to 202 are LPFs, 21
0 is the luminance signal Y and the two color signals C _W , C _N are the three primary color signals R, G, B
An inverse matrix circuit for converting the signals to 211, 213 to 213 are output terminals for the three primary color signals R, G and B, 214 is an output terminal for the horizontal synchronizing signal HD, and 215 is an output terminal for the vertical synchronizing signal VD.

Next, the operation of the embodiment shown in FIG. 1 will be described. The HDTV signal is supplied to the input terminals 1, 2 and 3 in the form of three primary color signals R, G and B, respectively. Next, by the matrix circuit 6, the three primary color signals R,
G and B are converted into a luminance signal Y and two color signals C _W and C _N. After that, the signal band of each of the Y, C _W , and C _N signals is limited by the LPFs 10, 11, and 12, and converted into digital signals by the A / D converters 20, 21, and 22. The sampling clock WCKY of the luminance signal and the sampling clock WCKC of the two color signals C _W and C _N are set to WCKY = · WCKC because the luminance signal and the band of the chrominance signal have a relationship of about 3: 1 in this embodiment. . Each signal converted into a digital signal is input to a recording system luminance signal processing circuit 30 and a recording system color signal processing circuit 40, respectively, and a recording system control signal generation circuit.
Predetermined signal processing is performed according to the control signal from 50.
This signal processing will be described later in detail with reference to FIG.

Here, LPF10,11,12 is for removing the aliasing component due to sampling when converting to a digital signal,
The limiting band depends on the signal band. In this embodiment, the luminance signal Y is 20 MHz and the two color signals C _W and C _N are 7 MHz as shown in FIG. 2, so that LPF10 is 20 MHz and LPF1 is LPF1.
1 and 12 are limited to 7MHz. On the other hand, the LPF has a different delay time depending on its limited band, and the narrow band has a longer delay time. Here, if the delay time of the LPF 10 is τy and the delay time of the LPFs 11 and 12 is τc, then τc> τy. Therefore, when the signal shown in FIG. 3 (a) is input, after passing through the LPF, as shown in FIG. 3 (b), the luminance signal Y and the color signals C _W , C
_{At N} , the LPF delay time difference τ _M (= τc−τy) is displaced. Regarding the recording / reproducing system signal processing, it is necessary to consider the above deviation. Therefore, in the recording system control signal generating circuit 50, the control signals for the luminance signal and the chrominance signal are synchronized with the sampling clocks RCKY and RCKC, respectively, based on the synchronization information (HD and VD in this embodiment), and τ _M It can be generated at different timings. A signal for controlling memory writing from the recording system control signal generating circuit 50 will be described. The two signals SPy and SPc shown in FIG. 3 (c) are
These are control signals indicating the start of processing of the luminance signal and the chrominance signal, specifically, write start signals to the memories 31, 32 and the memories 44, 45. As shown in FIG. 3 (b), even if there is a LPF delay time difference τ _M between the luminance signal and the chrominance signal, the generation timings of SPy and SPc are variable, and as shown in FIG. 3 (c), SPy, By generating SPc at timings different from each other by τ _M , both the luminance signal and the chrominance signal can be written in the memory regardless of the delay time difference of the filter. Although the signals of SPy and SPc are shown in FIG. 3 (c), it goes without saying that other control signals, such as memory addresses and resets, change their generation timing in conjunction with SPy and SPc.

Next, recording system signal processing will be described in detail. In this embodiment, in order to record a wide band signal as shown in FIG.
Effective period τ of one horizontal scanning period of the original signal after channel division
_O (the period shown by τ _O in FIG. 4 (a)) is expanded 1.8 times in the time axis, and regarding the color signals, the above two color signals C
_W (shown in FIG. 4 (b)) and C _N (shown in FIG. 4 (c))
Is converted into a line-sequential system, then divided into two channels, the effective period τ _O of one horizontal scanning period of the original signal is time-compressed to 0.6 times, and the above luminance signal is time-division multiplexed. Then, the horizontal synchronization information S of the period τ _S is time-division multiplexed to generate the recording video signal of 2 channels shown in FIGS. 4 (d) and 4 (e). The horizontal sync information S is composed of a sync signal having a negative polarity and a time axis reference signal such as a burst signal so that the sync information can be reliably separated at the time of reproduction and the reproduction signal can be processed without a time axis error.

The above signal processing is performed as follows. The recording-system luminance signal processing circuit 30 and the recording-system color signal processing circuit 40 each have a memory for each channel. Luminance signal Y is a memory
Alternately written to 31,32 line by line. Meanwhile, 2
The two color signals C _W and C _N have their vertical bands limited by the vertical filters 41 and 42, and then the line sequential conversion circuit 43 alternately transmits C _W and C _N line by line. It is converted into C _LS and written in the memories 44 and 45 alternately line by line. Further, the above-mentioned synchronization information S is the synchronization information generation circuit 51.
Output. Here, both the luminance signal and the chrominance signal are simultaneously read out in two channels and appropriately switched by the switching circuit 52 in order to time-division-multiplex with the synchronization information S, as shown in FIGS. 4 (d) and 4 (e). Generate a recording signal for the channel.

The time axis expansion and compression at this time are realized as follows. Writing clock WCKY (= luminance signal sampling clock) to luminance signal memory 31, 32, color signal memory 44, 4
The relationship between the read clock RCK and the write clock WCKC (= color signal sampling clock) to 5 is As a result, the luminance signal Y is expanded 1.8 times on the time axis and the line-sequential color signal C _LS is compressed 0.6 times on the time axis.

The recording signals of the two channels obtained as described above are D /
After being converted into analog signals by A converters 60 and 61, LPF7
Entered at 0,71. The recording signal bands of the two channels are the same, the limiting bands of the LPFs 70 and 71 are the same, and there is no difference in delay time. After that, FM modulation is performed by the FM conversion circuits 80 and 81, and the magnetic heads 100 and 101 (or 10
It is supplied to 0 ', 101'. Two sets (100 and 100 ', 101 and 101') of four magnetic heads facing each other at 180 ° are attached to the drum 103 in total. In order to record a wide band signal, the drum 103 is rotated at 5,400 rpm as an example to increase the head relative speed. The magnetic tape 102 is wound around the drum by 180 ° or more, and the video signals divided into the above two channels are magnetic heads 100, 10 for each channel.
The data is sequentially recorded on the magnetic tape 103 by 0'and 101,101 '.

Next, at the time of reproduction, the magnetic heads 100, 100 ', 101, 10
The signal output from 1 ′ is FM via preamplifiers 110 and 111.
The signals are input to the demodulation circuits 120 and 121 and FM demodulated. Then LPF
After the band is limited by 130 and 131, the signals are separated by the synchronization separation circuit 140 and converted into digital signals by the A / D converters 150 and 151. After being converted into digital signals, the luminance signal Y and the line-sequential color signal C _LS are input to the reproduction system luminance signal processing circuit 160 and the reproduction system color signal processing circuit 170, respectively. In the reproduction signal processing circuit, in order to convert it to the original HDTV signal, processing reverse to that at the time of recording is performed. That is, the synchronization information S added at the time of recording
, The luminance signal Y is time-axis compressed to 1 / 1.8 times, and the line-sequential color signal C _LS is time-axis extended to 1 / 0.6 times to synthesize the respective channels. Further, since the color signals are line-sequentially processed at the time of recording, interpolation processing is performed to restore C _W and C _N.

The above processing is realized as follows. The reproduction system luminance signal processing circuit 160 and the reproduction system color signal processing circuit 170 respectively have memories 161, 162, 171, and 172 for each channel, and the synchronization information S is not written in the memory, but only the color signal and the luminance signal part are written in the respective signal memories. When reading, the synchronization information can be removed and the time axis companding of data can be performed by reading with a clock according to the compression rate and the extension rate of each signal. Since the color signals are line-sequentially processed at the time of recording, the interpolation circuit 173 performs the necessary interpolation processing to restore the two color signals C _W and C _N. Each of the above signal processing circuits operates according to the control signal from the reproduction system control signal generation circuit 180.

The luminance signal Y and the two color signals obtained as described above
C _W and C _N are converted into analog signals by D / A converters 190, 191, and 192, respectively, and band-limited by LPFs 200, 201, and 202.

Here, the LPF 200 and the LPFs 201, 202 have different limiting bands, like the LPFs 10, 11, 12 of the recording system. Therefore, the delay time of the LPF 200 .tau.y, if the delay time of _{LPF201,202 τ C (τ C> τy} ), time between luminance signal and the color signal for the delay time difference τ _{M (=} τ _C -τy) There will be misalignment. On the other hand, as in the case of recording, the control signals for the luminance signal and the color signals are generated at timings different from each other by τ _M based on the synchronization information, so that the above-mentioned time shift can be corrected. Hereinafter, the fifth
This will be described with reference to the drawings. RSPy and RSPc shown in Fig. 5 (a)
Is an example of a reproduction system control signal, and specifically is a read start signal from the memory for a luminance signal and a color signal, respectively. RSPy As shown in FIG. 5 (a), by generating at _M different timings tau mutually RSPC, luminance signals read out with a time lag tau _M from the memory and the color signal (FIG. 5 (b (Shown in FIG. 5) is passed through the LPF respectively to remove the time difference between the luminance signal and the chrominance signal in the output of the LPF (shown in FIG. 5 (c)). Here, RSPy and RSPc are used as control signals. As an example, it goes without saying that other control signals, such as a memory address and a reset signal, are also generated in association with RSPy and RSPc.

The analog luminance signals Y and 2 obtained as described above
The one color signal C _W , C _N is converted into three primary color signals R, G, B by the inverse matrix circuit 210 and output from output terminals 211, 212, 213, respectively. Further, the horizontal synchronizing signal HD and the vertical synchronizing signal VD are output from the synchronizing signal generating circuit 181, and output terminals 214 and 215 are output.
Is output from each.

Next, another embodiment will be described with reference to the timing charts of FIGS. 6 and 7, 8. FIG. 6 (a) is a second embodiment of the recording system luminance signal processing circuit 30, FIG. 6 (b) is a second embodiment of the recording system color signal processing circuit 40, and FIG. 6 (c) is a reproduction. A second embodiment of the system luminance signal processing circuit 160, FIG. 6 (d) is a diagram showing a second embodiment of the reproduction system color signal processing circuit 170, and the other parts are the same as the block diagram of FIG. And 33,46,163 in the figure
Reference numeral 174 is a variable delay circuit.

The operation of the recording system will be described with reference to FIG. The luminance signal and the color signal (shown in FIG. 7 (a)) input as described above have a time shift τ _M due to the delay time difference between LPFs 10, 11, and 12 (see FIG. 7). (Shown in (b)). here,
The variable delay circuits 33 and 46 can be used to correct the above-mentioned time lag τ _M between the luminance signal and the color signal. That is, the delay amount τ _Dy of the variable delay circuit 33 and the delay amount τ _{Dc of the} variable delay circuit 46.
By setting such that the relationship between and is τ _M = τ _Dy −τ _Dc , the time lag τ _M between the luminance signal and the chrominance signal can be removed as shown in FIG. 7 (c). Therefore, in this case, the generation timings of the memory control signals SPy and SPc shown in FIG. 3 (c) may be constant (shown in FIG. 7 (d)).

On the other hand, also in the reproducing system, the time delay τ _M between the luminance signal and the chrominance signal can be corrected by using the variable delay circuits 163 and 174. That is, the control signals RSPy, RSP shown in FIG.
The relationship between the delay amount τ _Dy of the variable delay circuit 163 and the delay amount τ _Dc of the variable delay circuit 174 with respect to the luminance signal and the color signal (shown in FIG. 8B) read from the memory according to c Set so that τ _M = τ _Dy −τ _Dc . Thus the output of the variable delay circuit (shown in Figure 8 (c)) having a time lag of tau _M in luminance signal and a color signal, offset by the delay time difference tau _M by LPF200,201,202, at the output of the LPF As shown in FIG. 8 (d), the time shift is corrected.

Here, the variable delay circuit is a digital delay means such as a shift register or a line memory. Further, although the first embodiment uses the variable generation means for each control signal and the second embodiment uses the variable delay circuit for the video signal, both of the above two means are provided, for example The same effect can be obtained by using the other one for fine adjustment.

As described above, the time difference between the luminance signal and the chrominance signal is corrected by digitally managing the delay time of the analog LPF, but the delay time of the analog LPF is continuous. However, digital management is discrete. In this case, the smaller the minimum variable range, the smaller the error with respect to the continuous delay amount. Therefore, when the sampling clock rate of each signal is different as in the present embodiment, the luminance signal sampling clock RCKY is used to adjust the control signal generation timing of the luminance signal system and the delay time of the variable delay circuit, and the color signal system is controlled. The signal generation timing and the delay time of the variable delay circuit are adjusted by sampling the color signal sampling clock RCKC (RCKY in this embodiment).
= 3 · RCKC), and can be adjusted independently, and can be adjusted in units of RCKY, which is a relative maximum sampling clock of the luminance signal of a wider band.

Next, a case will be described in which the sampling clock rate is high, the digital variable element and the control signal generation circuit cannot support, and the processing is performed by phase division. By dividing the phase,
The processing clock rate can be lowered. As an example, consider a case where the processing of the luminance signal Y is performed in two phases and the processing of the color signals C _W and C _N is performed without performing phase division. FIG. 9A is a diagram showing sampling phases of the luminance signal Y and the color signals C _W and C _N when A / D converted after passing through the LPFs 10, 11 and 12 in the recording system. In the figure, the points indicated by black circles are originally the luminance signal Y and the color signal.
The data should be in the same position for C _W and C _N , but LPF10 and LP
It is shifted by τ _M due to the difference in delay time between F11 and F12. FIG. 9B shows a case where the luminance signal Y is divided into two phases for signal processing in this state. Here, when the time lag is corrected using the variable delay circuit, the luminance signal Y is adjusted by using 1/2 of the luminance signal sampling clock and RCKY / 2, and the color signal system is adjusted by the color signal sampling clock.
By using RCKC to make each independently adjustable,
FIG. 9 (c) shows the time difference between the luminance signal Y and the color signals C _W and C _N.
It is possible to correct as shown in FIG. It is possible to adjust the sampling clock of a wider band luminance signal in RCKY units. In this embodiment, the luminance signal is divided into two phases and the color signal is not divided into phases. However, the luminance signal is divided into N phases (N is a natural number) and the color signals are divided into M phases (M.
Is a natural number), the present invention can be applied.

In the present embodiment, the time lag due to the delay time difference of the analog filter is described, but the time lag caused by the digital signal processing of different luminance signals and chrominance signals can be similarly corrected. In this embodiment, 2
Although the channel division recording is taken as an example, the present invention can be applied to L channel division recording (L is a natural number) without any change.

〔The invention's effect〕

As described above, according to the present invention, there is an effect that it is possible to realize a magnetic recording / reproducing apparatus capable of obtaining a good screen without color misregistration regardless of the delay time difference of analog filters.

[Brief description of the drawings]

FIG. 1 is a block diagram showing an embodiment of the present invention, FIG. 2 is a diagram for explaining a high definition television system, and FIGS. 3 and 5 are first diagrams.
FIG. 4 is a diagram for explaining the operation of the embodiment shown in FIG. 4, FIG. 4 is a diagram for explaining the recording method of the present embodiment, FIG. 6 is a block diagram showing the essential parts of another embodiment, and FIGS. FIG. 6 is a diagram for explaining the operation of the embodiment of FIG. 6, and FIG. 9 is a diagram for explaining the operation of the other embodiment. 1 to 5 ... input terminal, 211 to 215 ... output terminal, 10 to 12, 70, 71, 130, 131, 200 to 202 ... low pass filter, 20 to 22, 150, 151 ... A / D converter, 6 ... matrix circuit, 30 ...... Recording system luminance signal processing circuit, 40 ...... Recording system color signal processing circuit, 50 ...... Recording system control signal generating circuit, 33,46,163,174 …… Variable delay circuit, 160 …… Reproduction system luminance signal processing circuit, 170 ・ ・ ・… Reproduction system color signal processing circuit, 180 …… Reproduction system control signal generation circuit, 60,61,190 to 192 …… D / A converter, 210 …… Inverse matrix circuit.

 ─────────────────────────────────────────────────── ─── Continuation of the front page (72) Inventor Takashi Furihata 292 Yoshida-cho, Totsuka-ku, Yokohama-shi, Kanagawa Inside the Home Appliances Research Laboratory, Hitachi, Ltd. (56) Reference JP-A-60-141096 (JP, A) JP-A Sho 62-7277 (JP, A) JP-A-62-241491 (JP, A)

Claims (6)

(57) [Claims] 1. An apparatus for time-division multiplexing and recording and reproducing a luminance signal and a color signal of a video signal, wherein the luminance signal is converted into a digital signal by a first sampling clock of a predetermined frequency through a first filter. A first A / D converting means for converting the color signal and a second sampling clock having a frequency lower than that of the first sampling clock through the second filter having a pass band different from that of the first filter to obtain a digital signal. Second A / D converting means for converting into digital data, and first writing means for writing the digital signal from the first A / D converting means to one memory at a time with a first sampling clock in succession in units of horizontal scanning lines. Second writing means for writing the digital signal from the second A / D conversion means to the second memory at a second sampling clock in units of horizontal scanning lines, and the first writing means. Means for generating a first write control signal for controlling the second write control signal and a second write control signal for controlling the second write, and digital signals are alternately read from the first and second memories to obtain a luminance signal and a color. And a D / A conversion means for generating a signal obtained by time-division-multiplexing the signal and converting the signal into an analog signal.
The first write control signal is adjusted at the first sampling clock cycle, and the second write control signal is adjusted at the second sampling clock cycle with a time difference corresponding to the time difference between the second filter and the second filter. A magnetic recording / reproducing apparatus characterized by being generated by. 2. The magnetic recording / reproducing apparatus according to claim 1, wherein the luminance signal is converted into a digital signal by a first sampling clock having a predetermined frequency through a first filter.
Second A / D conversion means for converting the color signal into a digital signal with a second sampling clock having a frequency lower than that of the first sampling clock through a second filter having a pass band different from that of the first filter. From the A / D conversion means, the first digital variable delay means for delaying the digital signal from the first A / D conversion means in synchronization with the first sampling clock, and the second A / D conversion means. Second digital variable delay means for delaying the digital signal from the first digital variable delay means in synchronism with the second sampling clock, and the digital signal from the first digital variable delay means to the first memory in the first memory in the horizontal scanning period unit. The first writing means for writing with the sampling clock and the digital signal from the second digital variable delay means are successively written into the second memory in units of horizontal scanning periods. Second writing means for writing with a sampling clock; means for generating a first writing control signal for controlling the first writing and a second writing control signal for controlling the second writing; The digital signal is alternately read from the second memory, the luminance signal and the chrominance signal are time-division multiplexed, and a D / A conversion means for converting the signal into an analog signal is provided. The second digital variable delay means is
The first digital variable delay means adjusts the delay time at the first sampling clock cycle with a time difference corresponding to the time difference generated by the first filter and the second filter, and the second digital variable delay means 2. The magnetic recording / reproducing apparatus according to claim 1, wherein the luminance signal and the chrominance signal are delayed by adjusting the delay time in the second sampling clock cycle. 3. In the magnetic recording / reproducing apparatus, A / D conversion means for converting a reproduced video signal into a digital signal at a clock of a predetermined frequency; and a digital signal from the A / D conversion means for a luminance signal,
Means for allocating and writing to each memory for color signals, first reading means for reading the luminance signal from each memory in synchronization with the first sampling clock for luminance signals, and second means for color signals for the color signals A second read means for reading in synchronization with the sampling clock of, a means for generating a first read control signal for controlling the first read and a second read control signal for controlling the second read, First D / A conversion means for converting a digital signal from the signal memory into an analog signal, second D / A conversion means for converting a digital signal from the color signal memory into an analog signal, and the first To limit the bandwidth of the output from the D / A conversion means of
, A first filter for limiting the band of the output from the second D / A conversion means, and a second filter having a different pass band, and the means for generating the read control signal is the first filter.
The first read control signal is adjusted at the first sampling clock cycle and the second read control signal is adjusted at the second sampling clock cycle with a time difference corresponding to the time difference between the second filter and the second filter. The magnetic recording / reproducing apparatus according to claim 1, wherein the magnetic recording / reproducing apparatus is generated. 4. In the magnetic recording / reproducing apparatus, an A / D converting means for converting a reproduced video signal into a digital signal at a clock of a predetermined frequency; a digital signal from the A / D converting means for a luminance signal;
Means for allocating and writing to each memory for color signals, first reading means for reading the luminance signal from each memory in synchronization with the first sampling clock for luminance signals, and second means for color signals for the color signals A second read means for reading in synchronization with the sampling clock of, a means for generating a first read control signal for controlling the first read and a second read control signal for controlling the second read, First digital variable delay means for delaying the digital signal from the signal memory in synchronization with the first sampling clock, and second delaying the digital signal from the color signal memory in synchronization with the second sampling clock. And a first D / A for converting the digital signal from the first digital variable delay means into an analog signal. Conversion means, second D / A conversion means for converting a digital signal from the second digital variable delay means into an analog signal, and a first D / A conversion means for limiting the band of output from the first D / A conversion means. 1
And the band of the output from the second D / A conversion means, the first
And a second filter having a different pass band, the first and second digital variable delay means are
The first digital variable delay means adjusts the delay time at the first sampling clock cycle with a time difference corresponding to the time difference generated by the first filter and the second filter, and the second digital variable delay means 2. The magnetic recording / reproducing apparatus according to claim 1, wherein the luminance signal and the chrominance signal are delayed by adjusting the delay time in the second sampling clock cycle. 5. A magnetic recording / reproducing apparatus for signal processing by dividing a luminance signal into N phases (N is a natural number) and chrominance signals into M phases (M is a natural number). Is N times as long as the first sampling clock, and the second control signal is the second
The magnetic recording / reproducing apparatus according to claim 1, wherein the magnetic recording / reproducing apparatus is generated by adjusting the sampling clock of M times. 6. A magnetic recording / reproducing apparatus for performing signal processing by dividing a luminance signal into N phases (N is a natural number) and chrominance signals into M phases (M is a natural number), wherein the first digital variable delay means is first. 2. The magnetic recording / reproducing apparatus according to claim 1, wherein the second digital variable delay means adjusts at a N times cycle of the sampling clock, and the second digital variable delay means adjusts at a M times cycle of the second sampling clock.