JP2655116B2 - CDMA transceiver - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a CDMA transceiver capable of eliminating intersymbol interference.

[0002]

2. Description of the Related Art In order to improve the frequency use efficiency of cellular digital mobile communication, it is necessary to remove co-channel interference waves. In order to use an interference canceller in a cellular system, it is necessary to be able to receive a random access signal such as an access channel and a user packet. Further, in order to prevent the user capacity from decreasing in a multipath environment, it is necessary to follow the multipath.

In signal transmission of a cellular system,
As a technique for removing intersymbol interference distortion generated in a multipath propagation path, there is an adaptive equalization method, and linear equalization and decision feedback equalization (D
FE), maximum likelihood sequence estimation (MLSE), and the like. Demodulation for the purpose of removing intersymbol interference is performed by combining these techniques. In addition, factors of transmission failure in data transmission in a multipath environment include carrier phase shift,
There are timing phase shift, carrier frequency shift, timing frequency shift and the like. Therefore, such a frequency shift must be corrected.

A conventional technique for removing the intersymbol interference and correcting the frequency shift as described above is disclosed in JP-A-4-352.
No. 523 discloses a data transmission demodulator. FIG. 2 is a block diagram showing the configuration. According to this technique, a phase rotation is given to an addition output from an adder 101 to be given to a determiner 100 so as to compensate for the amount of phase fluctuation according to the amount of phase fluctuation.

[0005] In addition, a decision output from the decision unit 100 to be provided to a rear filter constituted by a shift register 102 and a multiplier 103, which is located after the decision unit 100, and an error to be given to the tap coefficient control unit 104 are as follows. , Phase control unit 1
05, the complex conjugate unit 106, and the multiplier 107 provide a phase rotation so as to add a phase fluctuation amount corresponding to the phase fluctuation amount.

With this configuration, when a phase variation such as a frequency offset occurs, it is possible to remove intersymbol interference and correct a frequency shift without lowering convergence and speed. .

[0007]

However, according to the above-described conventional technique, it is possible to remove intersymbol interference and correct a frequency shift without lowering the speed. Unit 108 and shift register 1
02 and the multiplier 103, the phase control unit 105, the complex conjugate unit 106, the multiplier 107, and a number of other components, which requires a circuit configuration, which complicates the circuit configuration and increases the size of the entire device. There's a problem.

The present invention has been made in view of the above problems, and has as its object to provide a CDMA transceiver capable of removing intersymbol interference and correcting a frequency shift with a simple configuration.

[0009]

Means for Solving the Problems] To achieve the above object, CDMA transceiver of the present invention, the transmission means, the transmission
The transmitted data is divided into the modulated input wave of the real part and the
The serial-to-parallel converter that occurs and the real and imaginary parts
Correlated and random complex spreading code of real number and complex number of imaginary number
A PN signal generator for generating an elementary spreading code;
Of real and imaginary part modulated input waves from the converter
The real complex spreading code and the imaginary number from the PN signal generator.
Spread spectrum and modulation by complex product with complex spreading code
A transmitting means having a spread modulating unit for performing the demodulation, and a receiving means for demodulating the transmission data with a fractionally-spaced equalizer and a waveform equalizer using a complex RLS adaptive algorithm are provided.

[0010] The second aspect of the present invention, said transmission means, said
On the output side of the serial converter of the spread modulation unit, the real part modulation
A multiplier for multiplying the input wave by the real complex spreading code.
And the multiplication of the imaginary part modulated input wave and the imaginary complex spreading code
Multipliers and subtraction of output signals from these multipliers
And a subtractor for performing the above operation.
Multiplies the real complex spreading code and the imaginary part modulated input wave
A multiplier, the imaginary complex spreading code and the real part modulated input wave,
And output signals from these multipliers
Provided with an adder for performing the addition, the vector combining section that performs vector synthesis of the real signal and the imaginary signal from the adder from the subtractor of the spread modulation unit, the bandwidth limitation of the output signal of the vector combining part And a receiving filter for performing band limiting of the received signal, a fractionally spaced equalizer that performs fractionally spaced equalization and samples the received signal at twice the spreading rate, A waveform equalizer, which is a transversal digital filter using an RLS adaptive algorithm as a filter coefficient updating algorithm, is provided.

[0011]

According to the CDMA transceiver of the first aspect, in the transmitting means, transmission data is spread-modulated as a product of complex numbers using a complex spreading code in which a real part and an imaginary part of a complex number are respectively uncorrelated and random, In the receiving means, the transmission data is demodulated by a fractionally spaced equalizer and a waveform equalizer using a complex RLS adaptive algorithm.

According to the CDMA transceiver of the present invention, the serial-parallel converter of the transmitting means generates the modulated input wave of the real part and the modulated input wave of the imaginary part of the transmission data, and the PN signal generator generates the modulated input wave of the real part. And a imaginary part are uncorrelated and random, respectively, and a real complex spreading code and an imaginary complex spreading code are generated.
Then, in the spread modulator, spread spectrum modulation is performed by a complex product of the real part modulated input wave and the imaginary part modulated input wave from the serial-parallel converter and the real complex spread code and the imaginary complex spread code from the PN signal generator. Will be

Thereafter, the vector synthesis section performs vector synthesis of the real number signal and the imaginary number signal from the spread modulation section, and the transmission filter limits the band of the output signal of the vector synthesis section. Then, at the time of reception, after the band of the received signal is limited by the reception filter of the receiving means, the fractionally-spaced equalizer performs the fractionally-spaced equalization, and samples the signal at twice the spreading rate of the received signal. You. The received signal is demodulated by the waveform equalizer using the RLS adaptive algorithm.

[0014]

Embodiments of the present invention will be described below with reference to the drawings. FIG. 1 shows a CDMA according to an embodiment of the present invention.
It is a block diagram which shows a transceiver. In FIG. 1, reference numeral 1 denotes a transmitting unit as a transmitting unit, and 2 denotes a receiving unit as a receiving unit.

The transmitting unit 1 uses a complex spreading code in which the real part and the imaginary part of a complex number are uncorrelated and random, respectively.
A part for spreading and modulating the transmission data D as a product of complex numbers. The serial / parallel converter 10, PN signal (pseudo noise signal) generators 11 and 12, a spreading modulator 13, a vector synthesizer 14, A transmission filter 15 and a transmitter 16 are provided.

The serial-parallel converter 10 sorts the transmission data D, which is digital data, for each data period, and modulates the modulated input wave R1 of the real part (I-phase, In-phase) and the imaginary part (Q-phase, Quadrature-phase). ) Is a device that generates the modulated input wave C1. PN signal generator 1
Reference numerals 1 and 12 denote devices for generating a real complex spreading code R2 and a imaginary complex spreading code C2 in which the real part and the imaginary part are uncorrelated and random, respectively.

The spread modulation unit 13 includes a real part modulated input wave R 1 and an imaginary part modulated input wave C 1 from the serial-parallel converter 10,
This is a part to which a real complex spreading code R2 and an imaginary complex spreading code C2 from the N signal generators 11 and 12 are input and spread spectrum modulation is performed by a complex product thereof. Specifically, multipliers 31 and 32 and a subtractor 33 are provided on the output side of the serial-parallel converter 10. The multiplier 31 multiplies the real part modulated input wave R1 and the real complex spread code R2, and the multiplier 32 calculates the imaginary part modulated input wave C1 and the imaginary complex spread code C2.
, And the subtractor 33 subtracts the output signals from the multipliers 31 and 32.

On the output side of the PN signal generators 11, 12, multipliers 34, 35 and an adder 36 are provided. The multiplier 34 multiplies the real complex spreading code R2 by the imaginary part modulated input wave C1, and the multiplier 35 multiplies the imaginary complex spreading code C2 by the real part modulated input wave R1.
Numeral 6 adds the output signals from the multipliers 34 and 35.

The vector synthesizing section 14 is a section for performing vector synthesizing of the real number signal R3 from the subtractor 33 of the spread modulation section 13 and the imaginary number signal C3 from the adder 36. The transmission filter 15 is a so-called root cosine filter,
The bandwidth of the combined modulation signal S from the vector combining unit 14 is limited. The transmitter 16 is a device that transmits the modulated signal S band-limited by the transmission filter 15.

On the other hand, the receiver 2 comprises a receiver 20, a reception filter 21, a fractionally-spaced equalizer 22, and a waveform equalizer 2.
3 and a fractionally spaced equalizer 22 and a complex RLS
(Recursive Last Square) This is a part for demodulating the transmission data D with the waveform equalizer 23 using the adaptive algorithm.

The receiver 20 receives the modulated signal S from the transmitter 1
Is received and output to the reception filter 21.
The reception filter 21 is a so-called root cosine filter, and limits the band of the reception signal S.

The fractionally-spaced equalizer 22 is a sampling circuit that performs fractionally-spaced equalization, and can sample the received signal S at twice the spreading rate. Specifically, a plurality of delay elements 41-1 to 41-n-1 connected in series via a sampling section 40 and a plurality of switch sections 42-1 to 42-n are provided. Further, a clock 43 for outputting a clock signal S1 for operating the sampling unit 40 at twice the spreading rate of the received signal S is provided. This clock signal S1 is supplied to the switch unit 4
2-1 to 42-n are also input to the switch units 42-1 to 42-n.
42-n operate in synchronization with the sampling section 40.

The waveform equalizer 23 is a transversal digital filter using an RLS adaptive algorithm as a filter updating algorithm. Specifically, it has a plurality of tap coefficient sections F1 to Fn to which the switch sections 42-1 to 42-n are connected on the input side. Each of the tap coefficient units F1 to Fn has a function of controlling an output signal so that a difference signal e (n), which will be described later, becomes zero. Then, such tap coefficient units F1 to Fn
The adder 51 for adding the output signals from the tap coefficient units F1 to Fn is provided on the output side of the. On the output side of the adder 51, output signals Y (n) of the tap coefficient units F1 to Fn are provided.
And the desired signal d (n) are subtracted, and the difference signal e (n) is obtained.
Is provided to each of the tap coefficient units F1 to Fn.

Next, the operation of this embodiment will be described.
At the time of transmission in the transmitting unit 1, the transmission data D is distributed for each data period in the serial / parallel converter 10, and the modulation input wave R 1 of the real part and the modulation input wave C 1 of the imaginary part are output to the spread modulation unit 13. You. In parallel with this operation, the PN signal generators 11 and 12 generate a real complex spreading code R2 and an imaginary complex spreading code C2 and output them to the spreading modulator 13.

Then, the multiplier 31 of the spread modulator 13 multiplies the real part modulated input wave R 1 by the real complex spread code R 2, and the multiplier 32 multiplies the imaginary part modulated input wave C 1
And the imaginary complex spreading code C2,
In, the output signals from the multipliers 31 and 32 are subtracted. In parallel with this operation, the multiplier 34
The real complex spreading code R2 is multiplied by the imaginary part modulation input wave C1, and the imaginary complex spreading code C2 is multiplied by the real part modulation input wave R1 in the multiplier 35. The output signals from 35 are added.

Then, the real number signal R3
And the imaginary number signal C3 are output,
, These signals are vector-synthesized, and the synthesized modulated signal S is band-limited by the transmission filter 15, and then transmitted from the transmitter 16 to the receiver 2.

Then, the modulated signal S is received by the receiver 20 of the receiver 2, band-limited by the reception filter 21, and then input to the fractionally-spaced equalizer 22. When the reception signal S is input to the fractionally-spaced equalizer 22, the sampling unit 40 of the fractionally-spaced equalizer 22 samples the signal at twice the spreading rate, and each signal is sequentially delayed by the delay element 41-1.
To 41-n-1 and a switch unit 42-n-1.
1 to 42-n, the tap coefficient section F of the waveform equalizer 23
1 to Fn.

The signals input to the tap coefficient units F1 to Fn are output to the adder 51 after the difference signal e (n) fed back from the subtractor 52 is controlled so as to become zero.
And the output signal Y is added by the adder 51.
(N). That is, a fractionally spaced equalizer
The signal output from 22 is converted into a waveform equalizer 23 and an adder
At 51, despreading (correlation processing) is performed. In parallel with this, the output signal Y (n) and the desired signal d (n) are subtracted by the subtractor 5.
2, and the difference signal e (n) is fed back to each of the tap coefficient units F1 to Fn. That is, in the waveform equalizer 23, the received signal S is demodulated by using the RLS adaptive algorithm for updating the filter coefficients.

[0029]

As described above, according to the CDMA transceiver of the present invention, in the transmitting means, the real part and the imaginary part of the complex number are each transmitted using the uncorrelated and random complex spreading code as a product of the complex numbers. Is spread-modulated, so that the symbol period is doubled as compared with the case where the modulation is performed by the BPSK modulation method, so that the spreading code length can be doubled. As a result, the number of types of spreading codes can be increased, which leads to an increase in the number of multiplex users,
There is an effect that intersymbol interference in multipath over a wider range can be removed.

In the receiving means, the complex RLS
Since the waveform equalizer using the adaptive algorithm is applied, the I-phase (In-phase) and the Q-phase (Quadra) are used.
Thus, there is no need to provide a demodulation unit independent of the true-phase, so that the configuration of the receiving means can be simplified, and as a result, the size of the entire CDMA transceiver can be reduced. Furthermore, since a fractionally-spaced equalizer is also used, timing jitter can be absorbed, and the ability to remove intersymbol interference can be further improved.

[Brief description of the drawings]

FIG. 1 is a block diagram illustrating a CDMA transceiver according to an embodiment of the present invention.

FIG. 2 is a block diagram showing a conventional technique.

[Explanation of symbols]

 DESCRIPTION OF SYMBOLS 1 Transmitting part 2 Receiving part 10 Serial-parallel converter 11, 12 PN signal generator 13 Spreading modulation part 14 Vector synthesis part 15 Transmission filter 21 Reception filter 22 Fractionally-spaced equalizer 23 Waveform equalizer

Claims (2)

(57) [Claims] The transmission data is combined with a modulated input wave of a real part.
A serial-parallel converter that generates the modulated input wave of the imaginary part, and the real part
And imaginary part are uncorrelated and random real complex
PN signal generation for generating a spreading code and an imaginary complex spreading code
A live part, a real part modulated input wave from the serial-to-parallel converter, and
Imaginary part modulated input wave and real number from the PN signal generator
A complex product of a complex spreading code and an imaginary complex spreading code.
Transmitting means having a spread modulator for performing spread spectrum and modulation, and receiving means for demodulating the transmission data with a fractionally-spaced equalizer and a waveform equalizer using a complex RLS adaptive algorithm. A CDMA transceiver. 2. The transmission means according to claim 1 , wherein said real number is provided at an output side of said serial-parallel converter of said spread modulation section.
Multiplying the partial modulation input wave by the real complex spreading code
A multiplier, a power of the imaginary part modulated input wave and the imaginary complex spreading code
Multipliers that perform the arithmetic and the reduction of the output signals from these multipliers.
A subtractor for performing the calculation is provided, and the PN signal generator output side is provided.
The multiplication of the real complex spreading code and the imaginary part modulated input wave
Multiplier, and the imaginary complex spreading code and the real part modulation input.
Multipliers that perform multiplication with power waves and outputs from these multipliers
An adder for adding the power signal, and a real number signal from the subtractor of the spread modulation section and the adder.
A vector synthesizing unit for performing vector synthesis with an imaginary signal from the transmitter, and a transmission filter for performing band limitation on an output signal of the vector synthesis unit, wherein the receiving unit performs band limitation on a received signal, and a fraction filter. A fractional interval equalizer that performs interval type equalization and samples a received signal at twice the spreading rate, and a waveform equalizer that is a transversal type digital filter using an RLS adaptive algorithm as a filter updating algorithm. The CDMA transceiver according to claim 1, comprising: