JP2650775B2 - Method for manufacturing semiconductor device - Google Patents

Description

The present invention relates to a method for manufacturing a semiconductor device. More specifically, the present invention relates to a method for manufacturing a mask ROM.

(B) Conventional technology Conventionally, there has been known a 2-bit information storage type mask ROM memory cell in which impurity concentrations at one end and the other end of a channel region of each MOS transistor are independently controlled. As an example, DSA (Diffusion Self Alig
ned) structure.

This memory cell comprises the steps of (a) forming a source / drain diffusion mask (a gate electrode can also be used) on a semiconductor substrate, and performing impurity diffusion of a conductivity type different from that of the substrate to form source / drain regions; B) Next, while the source / drain diffusion mask is left, an information writing mask pattern is formed, impurities of the same conductivity type as the substrate are ion-implanted, and heat treatment is performed afterward to protrude from the source / drain portions. The process is performed through a process of forming a high-concentration portion in the shape of a channel at the end of the channel, and by these processes the surface concentration of the channel portion is made asymmetric and the conductivity of the MOS transistor is given a direction.

That is, when there is a high-concentration channel portion only on the source side, the threshold value increases according to the surface concentration, but when the high-concentration region is on the drain side, the high-concentration region is almost completely contained in the depletion layer. As a result, Vth remains low since the surface concentration of the channel region hardly changes.

As a result, four types of memory cell transistors having no high-concentration region on either side of the left and right source / train regions, only on the left side, only on the right side, and on both the left and right sides can be formed. It can be used as a source or a drain depending on the reading direction. Therefore, by reading from two directions, a state in which it is turned ON in either direction, and using the left side (having a high density region) as a source
It is turned off when it is used as a drain, it is turned on when it is used as a drain, the right side (having a high concentration region) is turned on when it is used as a drain, and it is turned off when it is used as a source, and there is a high concentration region on both the left and right sides. The four states, that is, the state of being turned off when reading in the direction of, can be set as appropriate. That is, two bits of information (00-01-10
−11) can be stored, thereby achieving higher integration of the mask ROM.

(C) Problems to be Solved by the Invention In order to surely sense the stored data in each memory cell transistor of the 2-bit information storage type obtained by such a method, it is necessary to use a transistor having a high concentration region on one side. It is necessary that the difference between the forward and reverse conductivity characteristics be sufficiently large.

That is, when there is a high-concentration region on the source side, it is necessary to have a high concentration for sufficiently increasing the threshold voltage of the transistor. Conversely, when the high-concentration region side is the drain, the high-concentration region is And do not affect the threshold. These are contradictory phenomena, and in order to satisfy all of them, it is necessary that the extension amount of the high-concentration region is controlled very precisely and the concentration distribution is steep.

However, in the conventional method, as described above, since the introduction of the information writing impurity into the end of the channel region is performed by diffusion in the lateral direction by heat treatment, the concentration distribution is gentle and lacks sharpness. Met.

As a result, the read characteristics of the stored data become insufficient, and this problem has been one obstacle in the mask ROM of the 2-bit information storage type.

The present invention has been made in order to solve such a problem, and it is possible to control the impurity concentration at both ends of a channel region with high steepness and accurately, thereby manufacturing a mask ROM having excellent reading characteristics. It seeks to provide a possible way.

(D) Means for Solving the Problems According to the present invention, there is provided a two-bit information storage device having a channel region below a gate electrode, wherein impurity concentrations at one end and the other end of the channel region are independently controlled. Type transistor elements on multiple substrates and mask
Controlling a concentration of impurities at one end and / or the other end of the channel region by implanting impurity ions in a state where a mask is provided on the channel region; This ion implantation
This is performed by irradiating impurity ions from one end side and / or the other end side of the mask in the channel direction at an inclination angle of 30 to 60 ° with respect to the perpendicular of the substrate, and the mask is ion-implanted. A method of manufacturing a semiconductor device, characterized in that an end of an opening is provided on a gate electrode corresponding to a channel region and on a gate electrode adjacent to the gate electrode.

The present invention provides a method for forming a high-concentration region having an excellent concentration steepness at an end of a channel region without performing a heat treatment by ion irradiation of impurity ions at a specific inclination angle (30 to 60 °). A means using injection was taken.

It is not known to use ion implantation with a large inclination angle for information recording by introducing impurities.

In the present invention, first, the source
A drain region is formed, between which a channel region is set. Here, the source / drain regions are suitably formed by ion implantation with an appropriate mask formed on the channel region. In this case, the ion implantation is performed by implanting impurity ions of a conductivity type opposite to that of the substrate by non-tilt (tilt angle 0 °) ion irradiation or by ion irradiation at a predetermined critical angle (usually about 7 °). In this case, it is preferable to perform ion implantation while rotating the substrate (usually 0.1 to 2 rotations / sec). This one of the ion implantations eliminates the asymmetry of the source / drain regions located on the left and right of the channel region, which is one preferable aspect in terms of further improving the readout characteristics. Note that the mask may be formed of a metal film that can ultimately become a gate electrode, or may be formed of another mask material (for example, a silicon oxide film or a silicon nitride film).

Ion implantation with a large inclination angle of 30 to 60 °, preferably 45 to 60 ° is performed on the substrate on which the channel region is formed in this manner. Here, the inclination of ion irradiation to one end side and the other end side both indicate inclination in the channel direction, and therefore, the irradiation direction is symmetric at one end side and the other end side.

Such ion implantation is individually performed only on one end side, only on the other end side, or on both ends, and two-bit information is stored and secured in each transistor element together with the transistor element that does not perform ion implantation.

The above-described ion implantation is performed using impurity ions of a conductivity type opposite to that of the substrate, and the mask, irradiation conditions, and the like may be the same as those used for normal impurity ion implantation.

(E) Function According to the method of the present invention, ion implantation by ion irradiation with a large tilt angle is performed, so that an impurity ion region having a high concentration and a sharp concentration distribution is formed at one end and / or the other end of the channel region. It is formed. Therefore, it is possible to increase the difference between the forward and reverse characteristics of the transistor in which information is written only on one end side, and the data read characteristics of the 2-bit information storage type mask ROM are improved.

(F) Embodiment Hereinafter, the present invention will be described in more detail with reference to the accompanying drawings.

FIG. 1A is a configuration explanatory view showing a step of forming a high-concentration impurity region only at one end (right side) of a channel region.

First, an oxide film 2 is formed on a P-type silicon (100) semiconductor substrate 1 in this step, and a source / drain to be a gate electrode (WSi / poly-Si electrode) in a later step is formed at a predetermined position thereon. Mask 3 is formed. Next, the mask 3 is formed by a non-tilt ion irradiation method (As ⁺ ion irradiation).
Source / drain regions 4a and 4b of the same shape are formed on both sides of the substrate with good symmetry. The substrate was rotated at a critical angle of 7 ° (2
(Rotation / sec), the source / drain regions with good symmetry can be obtained.

In this state, after the upper surface of the left source / drain region 4b is covered with the resist layer 5, impurity ions are irradiated at an inclination angle (α) of about 45 °. Here, the irradiation conditions are as follows.

Implanted ions: B ⁺ energy: 50 to 80 keV Implantation density: 8 × 10 ^{13 to} 3 × 10 ¹⁴ cm ^{2 By} the irradiation, an impurity region 7 is formed in a form shifted toward the channel region 6, and the left region is the channel region. The information writing impurity region 7a is located at the right end. As a result, a high concentration impurity region is formed only at the right end of the channel region.

FIG. 1 (b) shows a step of forming a high concentration impurity region only at the other end (left side) of the channel region. In order to form the high concentration impurity region only on the left side as described above, the upper surface of the right source / drain region 4a is covered with the resist layer 5 and then irradiated with impurity ions at an inclination angle opposite to the above. Thus, an information writing impurity region 7b having a pattern opposite to that of FIG. 1A is formed. By performing the steps of FIGS. 1A and 1B together, a transistor element having information write impurity regions formed at both ends can be obtained.

FIG. 2 shows an example of a conventional method for comparison. In this case, the information writing ion implantation is performed at an implantation angle of 0 ° to 7 °, and only the heat treatment diffusion is used as a method of extending the information writing impurity region 7 to the channel region 6.

The difference between the method of the present invention and the conventional method lies mainly in the concentration distribution of the information writing impurity formed in the channel portion. FIG. 3 shows this difference. According to the method of the present invention, the impurity introduction into the channel portion is mainly controlled by the ion implantation angle, and the subsequent heat treatment is suppressed to make the impurity concentration distribution sharp. In comparison, the characteristics of the 2-bit memory cell transistor can be improved.

As described above, according to the method of the present invention, it is possible to easily and accurately form a high-concentration impurity region having a steep impurity concentration distribution at the end of a channel region.

According to the method of the present invention, it is possible to further increase the margin for mask alignment when configuring a MOS transistor element. Regarding this point, FIG.
Description will be made based on (d).

FIGS. 4A and 4B show the impurity regions 7 formed when the resist layer 5 serving as a mask is shifted to the left and right sides, respectively, in the method of the present invention. On the other hand, FIGS. 4 (c) and 4 (d) show a state where the resist layer 5 serving as a mask has shifted to the left and right in the conventional method corresponding to FIG.

As described above, in the conventional method, there is a case where no impurity for writing information enters at all (FIG. 4C) or an impurity enters an adjacent transistor which does not want to enter the impurity (FIG. 4D). ing. On the other hand, it can be seen that, even if the same degree of deviation occurs, according to the method of the present invention, writing of two-bit information by introducing impurities can be achieved without causing a serious problem.

(G) Effects of the Invention According to the method of the present invention, it is possible to efficiently manufacture a 2-bit information storage type mask ROM with improved read characteristics of storage data. In addition, there are advantages that the mask alignment margin in the information writing process is widened and that it is not necessary to use a minimum dimension for the mask dimension, and its usefulness is extremely large from the viewpoint of high integration of memory cells. .

[Brief description of the drawings]

1 (a) and 1 (b) are explanatory diagrams showing the steps of a manufacturing method according to the present invention, FIG. 2 is a diagram showing a conventional manufacturing method, FIGS. 1 (a) and 1 (b) correspond to FIGS. FIG. 3 is a schematic view showing the distribution of the concentration of the information writing impurity in the channel region obtained by the manufacturing method of the present invention as compared with the conventional method. FIGS. 4 (a) and 4 (b) show the manufacturing method of the present invention. FIGS. 4 (c) and 4 (d) are explanatory views showing a configuration relating to a mask displacement in a conventional method. DESCRIPTION OF SYMBOLS 1 ... Silicon semiconductor substrate, 2 ... Oxide film, 3 ... Source / drain formation mask, 4a, 4b ... Source / drain region, 5 ... Resist layer, 6 ... Channel region, 7 ... Impurity region 7a, 7b... Impurity regions for writing information.

Claims (1)

(57) [Claims] 1. A two-bit information storage type transistor element having a channel region below a gate electrode and having independently controlled impurity concentrations at one end and the other end of the channel region is formed on a plurality of substrates. A mask ROM is manufactured, and the control of the impurity concentration at one end side and / or the other end side of the channel region is performed by implanting impurity ions in a state where the mask is provided on the channel region. This ion implantation causes impurity ions to be injected from one end and / or the other end of the mask with respect to the normal to the substrate, respectively.
Irradiation is performed by inclining in the channel direction at an inclination angle of ゜ 60 °, and a mask is formed on the gate electrode corresponding to the channel region to be ion-implanted and on the gate electrode adjacent to the gate electrode. A method for manufacturing a semiconductor device having an end.