JP2613297B2 - Test method of printed circuit board - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION [Industrial application field] Failure inspection of printed circuit boards is increasingly difficult year by year due to the increase in the density of components mounted on the printed circuit board and the accompanying increase in the scale and complexity of logic circuits on the entire printed circuit board. It has become to. Therefore, for such a substrate, an in-circuit test method, which is a simple test method, is employed.

The present invention relates to a CAD support method for performing an operation test of a printed circuit board using this in-circuit tester, sharing of fixtures, logical change of a printed circuit board,
The present invention relates to a method for automatically performing diversion design and LSI test pattern generation.

[Conventional technology]

The in-circuit tester to which the present invention is directed is to test whether components such as ICs and LSIs on a printed circuit board operate correctly for each component in accordance with circuit connection information. At this time, it is also possible to simultaneously confirm the continuity of the printed pattern connecting the component pins. Fig. 3 shows the mechanism of this test. FIG. 3A shows a test target circuit.
First, one probe pin of the tester is assigned to each equipotential net of the test target circuit. 1, 2, 3 in the figure
Is a probe pin set up for the net. Here, when testing the part A in the figure, the probe pin 1,
By inputting an input pattern from 2, and observing the result with the probe pin 3, it can be confirmed that A operates normally. Here, a jig (hereinafter abbreviated as fixture) for connecting the tester and the circuit is required. This is shown in FIG. 3 (b). The fixture 906 pushes up the probe pin 905 of the tester by the lifter pin 912 embedded therein, and contacts the component pin 913 on the printed circuit board. The lifter pin 912 is connected to a test interface pin 908 by wiring, and the interface pin 908 is connected to a test circuit of the tester. With this mechanism, the circuit on the printed circuit board can be observed for each component 902 by a tester.

[Problems to be solved by the invention]

In recent years, the number of logic gates mounted on one printed circuit board has increased dramatically, and higher densification and higher integration have been promoted. For this reason, it has become difficult to test a printed circuit board by a function test method in which a test pattern is supplied from an edge pin and the validity of a circuit is checked. Therefore, the number of tests using an in-circuit test method for confirming the validity of each component on a substrate is increasing. This trend is expected to continue in the future.

In a test by the in-circuit test method, one jig (hereinafter, referred to as a fixture) for connecting a tester and a printer board is required for one type of printed board, so the number of fixtures increases in proportion to the number of developed printed boards. The problem here is the manufacturing cost and management method of the test jig and the printed circuit board connection jig used when performing the in-circuit test. This is due to the fact that the price of the fixture is expensive and that if the shape of the fixture is large and the number of fixtures is large, a large space is required in the storage place.

In addition to these problems, if a logical change occurs on the printed circuit board, it is necessary to incorporate this change into the printed circuit board test program (hereinafter abbreviated as TP) fixture immediately but accurately. There was no function to process automatically. As a result, all changes must be done manually and the testing standards body is long,
In addition, there is a problem that the test has to be performed with low reliability information.

Also, in the case of a diverted design board that changes a part of the circuit of the existing printed board and creates another printed board, it is not necessary to create a new TP and debug it even though the TP of the existing printed board exists. However, there is a problem that many man-hours are required.

SUMMARY OF THE INVENTION It is an object of the present invention to solve the above problems and to provide the following tester for efficiently performing a test using an in-circuit tester.

(1) The increase in fixtures is stopped and management is facilitated.

(2) Outputs fixture change and TP change difference information corresponding to the logic change of the printed circuit board.

(3) TP of original printed circuit board for diverted design board
TP change difference and fixture production information difference are output.

[Means for solving the problem]

The system automatically selects an optimal fixture from among the existing fixtures, and automatically generates pin setting change information for the fixture and test information for the printed circuit board. For a printed circuit board that has undergone a design change, the circuit information from the previous test registered in the fixture library is searched, and this is compared with the printed circuit circuit information after the design change. Express in the format of the input language. For the diversion design board, the circuit difference and the fixture difference from the board having the similar logic in the fixture library are automatically generated, and the circuit information of the divert board is also registered in the fixture library.

It should be noted that pins can be added to the fixture, but not deleted. Fixture pins that are not required for the test are prevented from contacting by a mask plate inserted between the test target substrate and the test probe pins.

[Action]

One set of fixtures can test a package of a plurality of codes, and the cost per set can be reduced.

Also, for printed circuit boards that have undergone design changes,
It is now possible to output in-circuit test fixtures and change differences regarding test input information in a short time. The in-circuit test information can be output in a short time for the diverted design board as well as the design change board. As a result, the fixture manufacturing cost during sharing can be significantly reduced compared to before DA system support, and can be reduced to about 1/5 when creating a new system. About
50% reduction.

〔Example〕

 Hereinafter, an embodiment of the present invention will be described.

The present invention comprises the hardware shown in FIG. The host computer 40 has a built-in CPU and main memory, and has a VDT 44, an FD input / output device 46, a plotter 4
1. The printer 42 and the disk device 45 are controlled. Further, the continuity tester 1510 is used to download manufacturing information of the existing fixture and record it on the disk device 45 via the host computer 40. The fixture drilling machine 43 has a function to insert holes and pins into the fixture according to the fixture drilling information processed and created by the host computer 40. The automatic wiring machine 47 is a device for automatically wiring a pinned fixture in accordance with the automatic wiring information output from the host computer 40. The in-circuit tester 30 performs an operation test of the test target printed circuit board using the tester input signal processed and created by the host computer 40 and the completed fixture.

This system has the configuration shown in FIG. 5, and has the following three functions.

(1) Evaluation This is a function for determining whether or not a printed circuit board to be tested can be shared with an existing fixture, and has functions such as simple constraint checking on a logic circuit, selection of a fixture that can be shared, and a check of whether or not a change can be inserted. .

(2) Creation of circuit network information and fixture information According to the fixture selected in the evaluation, test pins are assigned to the circuit network of the printed circuit board, and the change difference of the fixture and tester input information are created.

(3) LSI test pattern generation LSI according to the connection state of the LSI mounted on the printed circuit board
Generate test patterns. LSI developed in-house
Automatically generates input / output test patterns according to the connection status between the design file and the LSI input / output pins. Commercially available LSI
For, the input pattern of the LSI acceptance test pattern is converted according to the connection state. The conversion result is used as an input pattern by a tester to create an expected output value.
(FIG. 6) The execution of the processing flow shown in FIGS. 5 and 6 is controlled by the task control program located at the higher level. For this reason, the user does not need to understand the flow of the program shown in FIGS. 5 and 6; Analyze and issue work instructions to each program.

This will be described with reference to the drawings. In FIG. 5, the user determines whether the task control program is a newly developed printed circuit board, a printed circuit board that has undergone a design change, or a diverted printed circuit board, and management information of the printed circuit board. , The task control program analyzes this and issues an execution command to the evaluation program 510. Upon receiving this, the evaluation program 510 fetches the printed circuit board management information and searches for a fixture to be shared that matches the conditions of the printed circuit board while performing shared evaluation according to the structure of the fixture library 1220 shown in FIG. The evaluation program 510 returns this result to the task control program. If the result can be shared, the task control program issues an execution instruction to the sharing processing program 520. If sharing is impossible, control is passed to the new fixture processing program 530, and if it is necessary to create a dedicated fixture, control is passed to the dedicated fixture processing program 540. Change design processing program if pins can be added to fixtures previously used on the design change board
To 550, on the contrary, if it is not possible to add a pin to the previously used fixture, control to the new change processing program 560. hand over.

Next, the task control program analyzes the processing results from these processing programs, and transfers control to the next LSI-TP generation 580 if all processing has been performed normally. FIG. 6 shows an outline of the processing of the LSI-TP generation 580. If there is no LSI to be tested, this processing is skipped. If the LSI under test exists,
If the LSI design file 610 does not exist, such as a commercially available LSI, the input pattern of the acceptance test pattern 620 of the single LSI is converted into the input test pattern 630 according to the connection state of the LSI on the printed circuit board. This input test pattern 630
Is obtained by an actual chip simulation 660, and is converted to an LSI-TP650 for the in-circuit tester 30. When the LSI to be tested has the design file 610, the test pattern generation and the failure simulation are performed by the test pattern generation processing 640 according to the connection information in a state where the LSI is mounted on the printed circuit board.
-Create TP650.

The task control program repeats this processing by the number of LSIs mounted on the test target printed circuit board. Next, the fixture creation NC data created by the processing up to this point,
An LSI-TP starts processing result output processing 590 for outputting printed circuit board information to an output medium. Through this series of processing, in-circuit test information of the printed circuit board can be created. When the printed circuit board is tested by the in-circuit tester 30, a probe pin 905 for transmitting a test signal from the in-circuit test 30 to the printed circuit board 901 to be tested is allocated as shown in FIG. This allocation method will be described with reference to Table 1. In the table
NO1 indicates that a probe pin is set on the edge pin side when the edge pin of the printed circuit board is connected to a component pin other than the LSI. This is because an abnormal printed pattern between the edge pin and the component pin cannot be found by setting the probe pin on the component pin side. NO2 indicates a case where the LSI and the component pins other than the LSI are connected. In this case, probe pins are set up with priority given to the LSI side. NO3
Indicates a case where the edge pins of the printed circuit board are connected to the pins of the LSI. At this time, if the LSI does not have a test pattern, probe pins are set on both the LSI side and the edge pin side, and a continuity test of a printed pattern between the probe pins is performed. If the LSI has a test pattern, set the probe pin on the edge pin side as in NO1. NO4 indicates a case where the LSI and the LSI are connected via a print pattern. In this case, if one of the LSIs does not have a test pattern, a probe pin is set up on the side of the LSI having no test pattern. If both LSIs do not have a test pattern, both L
Set the probe pin to the position of SI pin. Conversely, if both have test patterns, a probe pin is set up at the signal source (hereinafter referred to as FO; FO: abbreviation for Fan Out). NO5 indicates a case where ordinary components other than the LSI are connected. In this case, pinning is performed on the FO side similarly to NO4.

Parts without test patterns are treated the same as LSIs in the rules of NO1 to NO5. Here, whether or not the component has a test pattern is defined in a component information library secured in the disk device 45 shown in FIG.

Table 2 shows another embodiment of the pin assignment. The vertical direction in the table indicates the types of probe pins of the tester. The normal pin indicates a probe pin used for testing components other than the LSI, the control of the LSI pin indicates an LSI control signal, and the data indicates a probe pin for a data signal to be input to the LSI. The horizontal direction indicates the types of component pins mounted on the printed circuit board. This table shows combinations of component pins mounted on a printed circuit board and pins that can be used in a tester. For example, on a printed circuit board
When components other than the LSI are mounted, the test pins required for testing this may be any of a normal pin, a control pin, and a data pin. However, the LSI mounted on the printed circuit board has a test pattern
, The only test pin that can be used to test this LSI is the control signal pin if the LSI input pin is a control signal.

An embodiment in which the fixture is shared in accordance with the above-described pin setting rule will be described with reference to FIG. Fig. 8 (a)
Is an example of the relationship between the reference circuit and the probe pins. Probe pins are assigned according to the rule that one pin is set for one net. The position of the pin on the fixture at this time is
This is as shown in FIG. In order to share the circuit B composed of the elements BF shown in FIG. 8C with the one-pin one-pin rule, the following pins are added, and the pins are masked. It can be understood that it is better to share.

The pin setting information completed in this way is registered in the library as the latest information of the fixture, and the state of the fixture is stored in the library in the same state as always stored on site. By doing so, the fixture can be shared.

Next, an embodiment of the fixture library will be described with reference to FIG.

FIG. 1 shows the logical structure of the fixture library 1220, and FIG. 7 shows the physical structure of the fixture library 1220. In the figure, a package type list 701 is a management table for classifying package types, which are the shapes of printed circuit boards present in the fixture library 1220. From this table, the corresponding fixtures on the fixture management table 702 for each package type are listed. Points to the head address of the group. The fixture management table 702 has the names and management information of all fixtures, and the relationship between fixtures in the same package type is indicated by a bidirectional pointer 70.
It is managed at 3,704. Fixture manufacturing information and test pin assignment information are registered in the test pin assignment table 710 and the fixture power pin assignment table 711, and these tables are distinguished by the fixture management number 712 in the fixture management table 702. I can do it. Normally, the test pin assignment table 710 and the fixture power supply pin assignment table 711 are stored on the disk device 45, and are read out and processed on the main memory as needed.

Management information of the printed circuit board sharing the fixture is managed by a printed circuit board management table 705, and the relationship between the fixture and the shared printed circuit board is determined by the printed circuit board pointer 706.
And the common printed circuit board group is a bidirectional pointer 70
7, 708. Printed circuit board design information is IC
It is registered in the pin coordinate table 720 and the used IC code list table 721 and can be distinguished by the printed board management number 722 on the printed board management table 705. Normally, the IC pin coordinate table 720 and the used IC code list table 721 are stored on the disk device 45 and read out and processed on the main memory of the host computer 40 as necessary. I c
The pin coordinate table 720 has the circuit network information of the printed circuit board as a result of the test pin assignment and the mounting information. For fixture sharing, it is evaluated whether all fixtures registered in the fixture library 1220 can be shared, and if there is a fixture that satisfies the condition, it is selected as a sharing target. However, in this method, it is conceivable that a fixture prepared for testing a specific printed circuit board group is shared as a fixture used for testing other printed circuit boards. In order to prevent this, a data structure is adopted in which a password can be assigned to each fixture. This password is registered in the password management table 740, and is stored in the fixture management table 7 with the pointer 731.
Associated with 02.

When a fixture is shared, the fixture to be shared may be already being used for testing another printed circuit board or may be being newly created. In such a case, the fixture has received a reservation flag to prohibit sharing. This reservation flag is automatically given when any change is made to the fixture. The reservation flag is released by a manual instruction when the work on the fixture is completed. When the reservation flag is released, the fixture can be handled as a shared object. This reservation flag is a reservation flag table 74
It is registered in 0 and is associated with the fixture management table 702 by the pointer 741.

Also, each table in the fixture library is registered as one member per table in the partitioned organization disk file, and if any change occurs to any of the tables, it does not overlap with the existing members according to the table management number. Generate a new member and write out the contents of the updated table. As a result, the contents of the table before the change are also saved, so that even if the fixture library is improperly updated due to some operation error, it is possible to easily return to the state before the operation error.

FIG. 9 shows an embodiment of the mask. The mask 903 is a test target printed circuit board 901 and the lifter pins 91 of the fixture 906.
The probe pin 905 pushed up by 2 is inserted between the top plates 911 for guiding to the component pins 913 so as to prevent pins 909 unnecessary for the test from touching the substrate 900 to be tested. Also, a hard rubber 904 is provided between the component pins on the mask 903 to prevent the test target substrate 900 from warping.
Is glued.

FIG. 10 shows an embodiment of assignment of the power supply ground pins on the fixture. This figure shows a printed circuit board on which components are mounted. In the figure, 101 indicates a power supply pattern, and 102 indicates a ground pattern. Normally, the power supply and the earth pattern do not run on the same layer, but in this figure, the power supply and the earth pattern run on the same layer for convenience of explanation. Reference numeral 103 denotes a power supply decomputer. When a fixture is shared according to the present invention and a new fixture is created, the power supply and ground supply pins from the tester are set in this position in principle. FIG. 11 shows an example of sharing or changing a fixture that has already been created. In the figure, 101 is a printed circuit board to be tested, and 111 is an IC selected as a test object.
In this case, a circle 112 having a radius r is drawn around the power supply pin of the test target IC 111, and if there is an IC having the same power supply as the test target IC 111 in this range, no new power supply is supplied to the IC. Do the same for Earthpin. The value of the radius r at this time varies depending on the printed circuit board, but the distance between the decaps mounted on the printed circuit board to be tested.
The target is 1/2.

Embodiments in the case where a design change has occurred in a registered board will be described with reference to FIGS. FIG. 12 (A) shows a change difference output method required for an in-circuit test of a printed circuit board in which a design change has occurred. Fixture information 1201, mounting information 1202, and circuit network information 1203 are taken out from the fixture library into the memory, and the contents are compared with the contents of the design master 1210 that has been folded. And the fixture change difference.

An embodiment of outputting the change difference of the circuit network information will be described with reference to FIG. In the figure, a circuit surrounded by a broken line 1301 is a circuit added by a design change, and a signal line indicated by 1302 is an unnecessary signal line at this time. A numeral 1303 indicated by an ellipse in the figure indicates a tester pin number, and a test pin is allocated to a position indicated by an arrow 1304. After the design change, there is no test pin on the signal line 1305, so that the test cannot be performed as it is. Therefore, by allocating a new test pin 1306 to the test, the circuit after the change can be tested. Here, what is output as the change difference of the circuit network information is the IC 1310 existing at the position D as the additional information and the test pin numbers 1306 and 1307 necessary for testing this. The IC 1320 located at the position A supplies the test pattern to the third pin at the test pin 1307 before the change, but this needs to be changed to 1306, and this is output as replacement information.

Fixture change information is newly added test pin
The additional position on the fixture of 1306 is output.

Fixture change information can be created in almost the same way as in the case of changing a printed circuit board, even in a diverted printed circuit board that generates another printed circuit board by partially changing an existing printed circuit board. This embodiment will be described with reference to FIG.

 The following two points are different from the case of the change.

(1) In the case of a change, the information of the same board as the test target is taken out from the fixture library 1220 and the difference is output, whereas in the case of the diverted board, the diverted source board of the test target board is taken out from the fixture library 1220 .

(2) In the case of a change, the output information is the difference between the test target boards, while the diversion board outputs the tester information as a difference and creates all the information on the printed board as new registration information.

By realizing this method, accurate test data can be created in a very short time.

The present invention is designed to operate around the fixture library 1220, and its structure is complicated, so that it cannot be changed manually. For this reason, if the fixture library disk area is destroyed due to some abnormality, the system cannot operate normally. Therefore, a self-diagnosis function is provided in the file management common module 1402 in order to detect abnormalities early and quickly remove the cause of the abnormalities. This is because, when the system operates to add or change some information in accordance with the data structure of the fixture library shown in FIG. Can be detected by checking the validity of At this time, if it is normal, it is output to the fixture library 1220 as it is.
If an error occurs, the host computer 40
The contents of the fixture library data in the memory and the related tables are all output on a computer list. At the same time, the process is interrupted while the information on the exclusive control remains in the exclusive control management information file 1401 shown in FIG. By doing so, if another user uses the system while being destroyed, the file management common module 1402 first checks the contents of the exclusive control file. Wait for 10 minutes due to possible collision with the job. If the exclusive control state is released in the last 10 minutes, the job is executed as it is.
However, if the exclusive state is not released after waiting for 10 minutes, the job is output on the computer list to wait for 10 minutes and the job is terminated. In this case, information of the job at the time of detecting the abnormal state is stored in the exclusive control file. The system administrator analyzes the contents of the fixture library data previously output, the contents of the association table, and the contents of the exclusive control file 1401, removes the cause of the abnormality, and releases the exclusive control state. As a result, the exclusive control state of the fixture library is released, and normal access becomes possible.

In order to effectively share fixtures and reduce costs, it is most effective to use existing fixtures. For this purpose, the existing fixture is registered in the fixture library. This method will be described with reference to FIG.

The information to be extracted from the existing fixture is the following four points.

(1) Mounting position of lifter pin 912 (2) Connection information between lifter pin 912 and interface pin 908 (3) Type of lifter pin 912 (signal pin, power supply pin, ground pin, etc.) (4) Printed circuit board management information As means for realizing this Using a continuity tester (ICT) 1510, a method of extracting connection information between pins of the fixture 906 and writing the information on the floppy disk 1530 was adopted.

Here, the connection cable 1540 is pulled out from the continuity tester 1510 to establish continuity with the interface pin 908, and the lifter pin 912 side is brought into contact with the probe pin 1511 of the continuity tester 1510. The fixture 908 connection information extracted in this manner is written on the floppy disk 1530, then processed by the host computer 40, and registered in the fixture library 1220.

When the processing according to the present invention is completed, an end list shown in FIG. 16 is output at the end of the computer list. In addition, a pin diagram shown in FIG. 17 is output to check how the pins are arranged on the fixture.

〔The invention's effect〕

According to the present invention, when testing a newly developed printed circuit board using the in-circuit tester 30, the fixture creation cost can be reduced by sharing the fixture as a test jig. Regarding the design-changed printed circuit board, accurate change information can be obtained in a short time because the pinning change information of the fixture and the change difference of the printed circuit board test information can be automatically output.
In a printed circuit board to be divertedly designed, accurate fixture change information and printed circuit board test information can be obtained in a short time, similarly to a design-changed printed circuit board.

[Brief description of the drawings]

Fig. 1 shows the structure of a fixture library, Fig. 2 shows a fixture sharing system, Fig. 3 shows the structure of an in-circuit tester, Fig. 4 shows an embodiment of a hardware configuration according to the present invention, and Fig. 5 shows the present invention. Of the system configuration according to
FIG. 7 is a flowchart of an LSI-TP creation method. FIG. 7 is a table relation diagram of a fixture library. FIG. 8 is a fixture sharing mechanism. FIG. 9 is an explanatory diagram of a mask when sharing a fixture. The figure shows the power pin elimination method (1), FIG. 11 shows the power pin elimination method (2), FIG. 12 shows the outline of the processing method of the modified / diverted design printed circuit board, FIG. Fig. 14 shows the fixture library exclusive control method, Fig. 15 shows the existing fixture creation information extraction method, Fig. 16 shows an example of the job end confirmation list, Fig. 17 shows the fixture pin setting diagram, and Fig. 18 shows the fixture pin assignment method. FIG. 19 shows a fixture pin combination method. [Explanation of symbols] 1,2,3 ... probe pins from test, 901 ... printed circuit board to be tested, 903 ... mask, 916 ... fixture, 912 ... lifter pins, 908 ... interface pins, 1220 ... Fixture library

Claims (7)

(57) [Claims] 1. A printed circuit board test method for testing a printed circuit board without creating a new fixture by adding pins to an existing fixture or removing pins unnecessary for the test. A fixture library for storing fixture information and tester pin information is provided, and among the existing fixture information in the fixture library, a plurality of pieces of fixture information that match conditions with a printed circuit board to be tested are provided. A method for testing a printed circuit board, wherein a fixture having the smallest number of additional pins is selected by evaluation. 2. A method for testing a printed circuit board according to claim 1, wherein when unnecessary pins are present on the selected fixture, a mask plate is used which allows only the fixture pins required for the test target board to come into contact. And a method for testing a printed circuit board, wherein unnecessary pins are prevented from contacting. 3. The test method according to claim 1, wherein a power supply pin supplied from the fixture is set on a pin of a decap component. 4. The test method according to claim 1, wherein a power supply line having no decaps is provided, and when a power supply pin supplied from a fixture is set to a power supply pin of a component included in the power supply line, the power supply line is kept constant. A method for testing a printed circuit board, comprising determining a position of a power supply pin by determining that there is no power supply pin supplied from a fixture within a distance. 5. The test method according to claim 1, wherein when a design change occurs in a printed circuit board registered in the fixture library, a difference between registered circuit information and fixture information is output. And test method. 6. A test method according to claim 1, wherein when a printed circuit board registered in the fixture library is diverted to design another board, the circuit network information of the diverted board is registered. A test method characterized by outputting a difference from circuit information of a substrate. 7. A test method according to claim 1, wherein when a printed circuit board registered in the fixture library is diverted to design another board, fixture pin setting information of the diverted board is registered. A test method characterized by outputting a difference from fixture pin stand information of a printed circuit board.