JP2605029B2 - Image processing method - Google Patents

Description

Description: BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an image processing method for displaying an image on a display or printing out an image on a recording medium.

[Related Art] In recent years, with the development of image processing, higher definition of images has been demanded. In particular, at present, the display capability of the display device itself, that is, the number of display pixels is still smaller than the number of print dots at the time of print output. Therefore, in a device or the like that directly outputs an image in a display memory (V-RAM) to a printing device, a high-definition output image image can be obtained even though the printing device itself can perform high-definition output. Can not.

For example, if an A4 size image is to be displayed on a display device at a scanning density of 16 dots / mm, a display having a display dot count of 4000 × 4000 pixels and a display capacity of 4000 pixels is required. If a display device having such a display capability is to be developed or manufactured, the cost will be extremely high. Further, the high-speed memory provided inside the image editing apparatus has a large capacity, and has a disadvantage that the memory cost is high.

[Problems to be Solved by the Invention] In such a problem, an image may be compressed and displayed. For example, if n × m pixel blocks in the input image are 1
Chromaticity information (chromaticity average) as shown in Fig. 19 as a display pixel
It seems to be convenient to compress to chromaticity information (chromaticity average), but if you want to print out with high definition,
There is a problem because the data is too coarse.

As shown in FIG. 20, it is conceivable to divide the pixel block into two regions and prepare for printing out the brightness information and the chromaticity information for each region. In this case, the blocks are displayed. At this time, there is a problem in associating one display pixel.

The present invention has been made in view of such prior art,
It is an object of the present invention to provide an image processing method capable of efficiently displaying and printing an image.

[Means for Solving the Problem] In order to solve this problem, the image processing method of the present invention includes the following steps. That is, in an image processing method for displaying an image on a display device or printing out an image on a recording medium, first information relating to an average brightness value of an n × m pixel block and each constituent pixel in the pixel block And the second information related to the difference between the brightness average value and the image. When displaying the image on a display, the first information is used without using the second information. Display,
When printing out the image on a recording medium, the first
And printing out using the second information.

[Operation] In the present invention, the first information relating to the average brightness value of the n × m pixel block and the second information relating to the difference between each constituent pixel in the pixel block and the average brightness value are stored. I do. Then, when the information is displayed on the display, the information is displayed using the first information without using the second information. When printing out on a recording medium, the first information and the second information are used.

Embodiment An embodiment according to the present invention will be described below in detail with reference to the accompanying drawings.

“Explanation of Image Compression Principle (FIGS. 2 to 6)” FIG. 2 is a diagram showing an original image (original image) in a pixel unit configuration. Read the illustrated image from a reader (not shown),
The 4 × 4 pixel area is compressed as a unit (hereinafter, referred to as a super pixel in this embodiment) (see FIG. 5) and stored in an image memory described later. The details of this compression will be described later.

FIG. 3 shows the storage state of the image composed of the super pixels. As shown in the figure, when compressed, the display capability (the number of display dots) of the display device is only 1/16 of the original image. For example, as described in the prior art section above, when an A4 size image is input at a density of 16 dots / mm (CCD scanner, etc.), about 4000 × 4000 pixels are required. A display device having a display capability in a pixel is sufficient. As a result, it is possible to perform operations such as editing while displaying the image on the display, to reduce the memory cost, and to obtain a high-definition output image.

Also, for example, the display capability of the display device is less than 640 × 5
It may be around 00 dots. Therefore, in this embodiment, when compressing 4 × 4 pixels of the original image into super pixels and displaying the stored information in the image memory, only odd super pixels (or even super pixels) are displayed as shown in FIG. Displayed. In other words, each super pixel stored in the image memory is thinned out and displayed.

FIG. 6 shows an example of compressed data. The data length (each super pixel) is composed of 32 bits. The average brightness of the area of 4 × 4 pixels of the original image is 6 bits, the average chromaticity is 8 bits, and the block pattern information (coded. 4), three bits each as a lightness difference 1 and 2, and four bits each as a chromaticity difference 1 and 2. Each pixel of the original image has a total of 18 bits of color information because each of the color information R, G, B has a gradation of 6 bits. Therefore, for 4 × 4 pixels, a total of 288 bits (= 1
8 × 16), and is compressed to 1/9 in this embodiment.

[Description of Configuration of Image Compression Unit (FIG. 1)] FIG. 1 is a block diagram of an image compression unit that creates compressed data from 6 bits of each R, G, B data of an original image and stores it in an image memory 67. is there.

In the figure, reference numeral 61 denotes a lookup table having an 18-bit input and an 18-bit output, which converts input image information RGB into an L ^* a ^* b ^* uniform color space. Reference numerals 62 to 64 denote toggle buffers each including two sets of four line buffers. Reference numeral 65 denotes a detection unit which divides the average brightness and 4 × 4 pixels from the brightness data into a pixel region having a larger value than the brightness average and a pixel region having a smaller value (binarization), and outputs boundary information of the region as block pattern information. . The detection unit 65 outputs difference information between the average brightness in each pixel region divided into boundaries and the average brightness in the 4 × 4 pixel region as a brightness difference 1 and a brightness difference 2. Here, the lightness difference 1 is difference information of an area having a value larger than the average, and the lightness difference 2 means difference information of an area having a value smaller than the average. The brightness data is calculated using L ^* expressed in a uniform color space L ^* a ^* b ^* , and the chromaticity information described below is calculated using a ^* b ^* .

A lookup table table 61 for converting three primary colors (RGB) of light into a uniform color space L ^* a ^* b ^*, which outputs output data L ^* , a ^* , b ^* according to the following conversion formula: It is.

[Explanation of Generation of Compressed Image (FIGS. 7 to 7)] Hereinafter, a method of generating compressed data will be described in further detail.

FIG. 7 is a diagram for explaining the configuration of the toggle buffers 62 to 64 in detail. Since the toggle buffers have the same configuration, the toggle buffer 62 will be described here.

In the figure, reference numerals 74-1 to 74-4 and 75-5 to 74-8 denote buffer memories, which form a buffer memory pair.
In the following description, the buffer memories 74-1 to 74-4 are referred to as a buffer group 76, and the buffer memories 74-5 to 74-8 are referred to as a buffer group 77).

The data input to each buffer memory is switched and used by the multiplexers 73-1 and 73-2. Further, the multiplexer 72 switches the destination of the input image data to the buffer group 76 or the buffer group 77. The selector 75 selects the output of the buffer group 76 or 77 and transmits the data, contrary to the selector 72, and outputs the outputs from the four buffer memories in parallel. The counter 71 controls the multiplexers 72, 73-1 and 73-2 and the selector 75, and switches the multiplexer 72 and the selector 75 every four rasters by counting the raster synchronization signal. Multiplexer 73-
1 (and the multiplexer 73-2) for switching the output destination (buffer memory).

FIG. 8 is a diagram for explaining the detection unit 65 of FIG. 6 for outputting brightness information from four lines of L ^* data. In the figure, reference numeral 81 denotes a block average calculating circuit for calculating the average of L ^{* in} the block, and 82 delays the data of each pixel in the block by the time required for the block average calculating circuit 81 to calculate the block average. Delay circuit. 84 is the L ^* data of each pixel in the block and the block average calculating circuit 8
This is a circuit that divides the area in the block from the output from 1 and calculates the difference between the area average of each area and the block average. From these, a lightness average referred to in FIG. 6 and a lightness difference 1 and a lightness difference 2 with a block pattern are obtained.

FIG. 9 is a block diagram showing an example of the block average calculating circuit 81.

Here, data of 16 pixels (4 × 4 pixels) is input by inputting data of four rasters in parallel.

First, adders 91-1 and 91-2 add data input in parallel for four pixels each, two pixels at a time. Buffer 92-
1 and 92-2 temporarily hold the outputs of the adders 91-1 and 91-2, respectively. Next, adders 93-1 and 93-2 add two successive outputs of the adders 91-1 and 91-2, respectively. The buffers 94-1 and 94-2 temporarily hold the outputs of the adders 93-1 and 93-2. Further, an adder 95-1 and
95-2 adds two consecutive outputs of the adders 93-1 and 93-2, and finally, the average calculator 96 adds the adders 95-1 and 95-2.
The output of 95-2 is added to calculate the average. Here, the adders 93-1 and 93-2 operate at a cycle twice as long as the addition cycle of the adders 91-1 and 91-2.
1,95-2 and the average calculator 96 operate at twice the period. Therefore, when the adders 91-1 and 91-2 perform the addition operation four times, the adders 93-1 and 93-2 operate twice, and
95-1, 95-2 and the average calculator 96 operate once. The numbers on the bus connecting each adder and buffer in the figure represent the number of bits of the bus.

FIG. 10 is a diagram showing a region dividing / region averaging / region difference calculating circuit 84 for calculating the region dividing, region average, and region difference shown in FIG.
FIG.

In the figure, reference numeral 100 denotes the data of each pixel in the block from the delay circuit 82 shown in FIG. 8 and the block average from the block average calculation circuit 81, and each pixel has a value larger than the block average. It is a comparator that determines whether an area is located or an area having a value less than the block average. Since one block is composed of four rasters and four pixels of each raster, it is assumed that each raster has one comparator 100. In other words, the comparator 100 shown in FIG. 10 and its peripheral counters and the like process one raster.

By the way, the output of each comparator 100 is connected to the gate 101-1.
And 101-2, and the same pixel data is input to both gates 101-1 and 101-2. That is, according to the output of the comparator 100, one of the gates 101-1 and 101-2 outputs the input data as it is, and the other outputs "0". The counter 102 counts the result of the comparator 100 and counts how many of the four pixels fall within region 1 (the region having a value greater than the block average). Also, shift register 10
Numeral 6 shifts the output (binary) of the comparator and outputs the shift state in parallel. Thus, the block patterns of the areas 1 and 2 (areas having a value equal to or less than the block average value) in the block are represented. The region 109 surrounded by the broken line exists in each raster.

The intra-block adders 103-1 and 103-2 calculate the sum of the values of each pixel in the region 1 in the block and the value of each pixel in the region 2 (a value equal to or smaller than the block average). Then, the result is output to the averagers 104-1 and 104-2.

Further, the adder 108 adds up all the number of pixels in the area 1 of each raster and outputs the value to the averager 104-1. At the same time, a value other than the number of pixels in region 1 (the number of pixels in region 2)
Is output to the averager 104-2.

Accordingly, the averaging units 104-1 and 104-2 receive the number of pixels to which the regions 1 and 2 belong and the total sum thereof, and output an average value.

The intra-block adders 103-1 and 103-2 can be constituted by circuits similar to the circuit shown in FIG. The output of the 96 adders is output without omitting the lower bits.

On the other hand, the differentiators 105-1 and 105-2 respectively correspond to the region 1
And the difference between the average of the area 2 and the block average. The block pattern table 107 is for inputting a pattern of each raster 4 bits and outputting a pattern of a total of 16 bits as a pattern code.
The averaging units 104-1 and 104-2, the difference units 105-1 and 105-2, and the block pattern table 107 can be easily realized by a LUT (look-up table) of ROM.

Although the chromaticity can be configured in exactly the same way, the signal for separating the area 1 and the area 2 is performed using the data of the brightness, and the data is performed using the chromaticity data a ^* and b ^* . Although a ^* and b ^* data are handled independently, chromaticity data is obtained by combining a ^* and b ^* .

By compressing the compressed data thus obtained and using it as display data as described above, for example, if an A4 size original is read at a pixel density of 16 pixels / mm, the data amount is actually 4752 × 3360 pixels. Where it comes, 1188 ×
840 super pixels. As a result, a compression ratio of 1/9 can be obtained.

Now, when displaying image information (super pixels) compressed and stored in the image memory 67 in the above processing, in this embodiment, display output is performed at every super (thinning) in both the main scanning direction and the sub-scanning direction. Things. Therefore,
The number of display pixels of the display device itself is 594 × 420 dots,
It can be displayed on a display device of about 640 × 512 dots, and layout editing can be sufficiently performed.

[Explanation of Display Processing (FIGS. 12 to 16)] FIG. 12 is a conceptual diagram of a circuit block for thinning-out display. In the figure, reference numeral 121 denotes an address generation circuit for generating an address when image information is read from the image memory 122, and reference numeral 123 denotes a main scanning thinning circuit for thinning out one super pixel in the main scanning direction.

Various internal configurations of the address generating circuit and the main scanning thinning circuit 123 are conceivable. For example, a counter for generating an address in the sub-scanning direction may be double the normal operation clock (FIG. 13), or may be a normal operation clock. The address is shifted by one bit and used as a double value (FIG. 14). In addition, with respect to the main scanning direction, 1 follows the main scanning direction.
This can be realized by displaying and outputting every super pixel. For example, the memory read clock is used as the basic clock,
The problem can be solved by, for example, latching the image information read from the image memory with the divided clock and outputting the output of the latch to the display device (FIG. 15).

Now, the brightness average value (L ^* ) and chromaticity average (a ^* b ^* ) read out in this manner are displayed on a display data composite device (which can be realized by a lookup table) as shown in FIG.
It is converted to RGB and output to the display device.

Actually, the display data multifunction device stores a conversion table represented by the following equation. Note that RGB can be easily converted to XYZ after being converted by the following conversion table and then easily converted to one equation. Further, L ^* a ^* b ^* may be input and directly converted to RGB.

[Explanation of Combination (FIGS. 17 and 18)] The compressed image stored in the image memory 67 in the above process has 32 bits for each display pixel. From the block pattern (having a code stored therein) within a data length of 32 bits at the time of printing, and is restored to a 4 × 4 binarized block at one end. A value obtained by adding a brightness difference 1 to a brightness average for a pixel group (meaning region 1) having a value of “1” in a 4 × 4 binarization block (meaning a pixel group larger than the brightness average value) The chromaticity value is obtained by adding the chromaticity difference 1 to the chromaticity average (meaning the average value of the pixel group larger than the chromaticity average value).

On the other hand, a pixel group that is “0” (means area 2)
However, decoding is performed by setting the brightness value to a value obtained by subtracting the brightness difference 2 from the brightness average, and setting the chromaticity value to a value obtained by subtracting the chromaticity difference 2 from the chromaticity average. These processes can be easily achieved by using a look-up table.

FIG. 17 shows a decoding example at this time, and FIG. 18 is a diagram showing an example of the decoder.

In the figure, reference numerals 180 to 183 denote brightness decoders for outputting brightness information. The brightness decoders are the same.
A block pattern code (4 bits) in the compression information shown in FIG. 6 is input to the pattern reproducer 184, and generates a block pattern. After this block pattern is converted from parallel to serial, it is input to the selector 185 and used as a switching signal. Selector 18
In 5, lightness information of lightness average + lightness difference 1 and information of lightness average−lightness difference 2 are input, and one of them is output as lightness information by the above-mentioned switching signal. More specifically, when the switching signal is “1”, the brightness average +
Lightness difference 1 (meaning region 1) is selected, and when it is "0", lightness average-lightness difference 2 (meaning region 2) is selected.

Accordingly, the combined 4 × 4 pixels shown in FIG. 17 are generated by the brightness information output from each of the brightness decoders 180 to 183.

 The chromaticity can be decoded by exactly the same processing.

As described above, according to the present embodiment, it is possible to compress a composite image so as to have high definition, and to display the compressed data based on the average brightness and chromaticity of the compressed data. Thereby, it is possible to reduce the memory cost.

In this embodiment, during the compression of the compressed pixel block (FIG. 6)
Thus, the brightness difference 1,2 and the chromaticity difference 1,2 are each used as the brightness average of the entire pixel block or the difference information from the chromaticity level. For example, the brightness difference 1 (brightness difference 2) is calculated from the average brightness of the entire block. Is the average brightness of the large (or less) pixel group, and the chromaticity difference
May be similarly processed. However, if the difference information is used, there is a possibility that the amount of information related to each of the pieces of information may become small.

Although the present embodiment has been described for a color image, a thinned-out display can be similarly performed for a monochrome image using only brightness data, and the same effect can be achieved. In this case, it is sufficient to store only the brightness average and the block pattern, the brightness difference 1 and the brightness difference 2 in the information in the super pixel which is the compressed image data.

In this embodiment, the binarized pixel block pattern is coded. However, the binarized pattern itself may be stored. In this case, the block pattern code shown in FIG. 6 increases from 4 bits to 16 bits, but it is possible to achieve higher definition during printing.

Further, in this embodiment, compression of 4 × 4 pixel blocks of the original image has been described, but it goes without saying that n × m pixel blocks can be actually compressed.

[Effects of the Invention] As described above, according to the present invention, image display and printout can be efficiently performed.

[Brief description of the drawings]

FIG. 1 is a block diagram of an image compression unit, FIG. 2 is a diagram showing an original image in a pixel unit configuration, FIG. 3 is a diagram showing a state in which a 4 × 4 pixel area of the original image is compressed, and FIG. FIG. 5 shows a state in which every other image shown in FIG. 3 is read out and displayed, FIG. 5 shows a state in which 4 × 4 pixel blocks are compressed into super pixels, and FIG. 6 shows a state after compression. FIG. 7 is a diagram showing the internal data configuration of the super pixel, FIG. 7 is a diagram for explaining the configuration of the toggle buffer, FIG. 8 is a diagram for explaining the detection unit of FIG. 1, and FIG. 9 is an example of a block average calculation circuit. FIG. 10 is a detailed diagram of the region dividing / region averaging / region difference calculating circuit shown in FIG. 8, and FIG. 11 is a uniform color section (L ^* a ^* b ^* ) from the input image (RBG).
FIG. 12 is a diagram for explaining a look-up table for conversion into an image, FIG. 12 is a basic configuration diagram for thinning-out display of an image, and FIGS. 13 to 15 are address generation circuits of the address generation circuit shown in FIG. FIG. 16 is a diagram showing the principle, FIG. 16 is a diagram showing a look-up table for converting a compressed mask code into data for display on a display device, FIG. 17 is a diagram showing a composite block pattern, and FIG. FIGS. 19 and 20 are views showing a decoder, and are diagrams showing image data in a conventional compressed state. In the figure, 61 ... look-up table, 62-64 ... toggle buffer, 65,66 ... detector, 71 ... counter, 72,73-
1, 73-2: Multiplexer, 74-1, 74-8: Buffer memory, 75: Selector, 76, 77: Buffer group, 81
…… Block average calculation circuit, 82, 83 …… Delay circuit, 84…
… Area division / area average / area difference calculation circuit, 91-1, 91-
2,93-1,93-2,95-1,95-2 ... Adder, 92-1,92-2,
94-1, 94-2: Buffer, 96: Average calculation unit, 100
... Comparator, 101-1 and 101-2 ... Gate, 102 ... Counter, 103-1 and 103-2 ... Intra-block adders, 104-1 and 104
-2: Averager, 105-1, 105-2 ... Differencer, 106 ...
Shift register, 107 ... Block pattern table, 1
08 ... adder, 121 ... address generation circuit, 123 ... main scanning thinning device, 180-183 ... decoder, 184 ... pattern generator, 185 ... selector.

Claims (1)

(57) [Claims] An image processing method for displaying an image on a display device or printing out an image on a recording medium, comprising: first information relating to an average brightness value of an n × m pixel block; Storing second information relating to a difference between each of the constituent pixels and the brightness average value; and displaying the image on a display without using the second information. And displaying the image on a recording medium by printout using the first and second information.